mthca_main.c 31 KB

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  1. /*
  2. * Copyright (c) 2004, 2005 Topspin Communications. All rights reserved.
  3. * Copyright (c) 2005 Sun Microsystems, Inc. All rights reserved.
  4. * Copyright (c) 2005 Mellanox Technologies. All rights reserved.
  5. *
  6. * This software is available to you under a choice of one of two
  7. * licenses. You may choose to be licensed under the terms of the GNU
  8. * General Public License (GPL) Version 2, available from the file
  9. * COPYING in the main directory of this source tree, or the
  10. * OpenIB.org BSD license below:
  11. *
  12. * Redistribution and use in source and binary forms, with or
  13. * without modification, are permitted provided that the following
  14. * conditions are met:
  15. *
  16. * - Redistributions of source code must retain the above
  17. * copyright notice, this list of conditions and the following
  18. * disclaimer.
  19. *
  20. * - Redistributions in binary form must reproduce the above
  21. * copyright notice, this list of conditions and the following
  22. * disclaimer in the documentation and/or other materials
  23. * provided with the distribution.
  24. *
  25. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  26. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  27. * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  28. * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  29. * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  30. * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  31. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  32. * SOFTWARE.
  33. *
  34. * $Id: mthca_main.c 1396 2004-12-28 04:10:27Z roland $
  35. */
  36. #include <linux/config.h>
  37. #include <linux/version.h>
  38. #include <linux/module.h>
  39. #include <linux/init.h>
  40. #include <linux/errno.h>
  41. #include <linux/pci.h>
  42. #include <linux/interrupt.h>
  43. #include "mthca_dev.h"
  44. #include "mthca_config_reg.h"
  45. #include "mthca_cmd.h"
  46. #include "mthca_profile.h"
  47. #include "mthca_memfree.h"
  48. MODULE_AUTHOR("Roland Dreier");
  49. MODULE_DESCRIPTION("Mellanox InfiniBand HCA low-level driver");
  50. MODULE_LICENSE("Dual BSD/GPL");
  51. MODULE_VERSION(DRV_VERSION);
  52. #ifdef CONFIG_PCI_MSI
  53. static int msi_x = 0;
  54. module_param(msi_x, int, 0444);
  55. MODULE_PARM_DESC(msi_x, "attempt to use MSI-X if nonzero");
  56. static int msi = 0;
  57. module_param(msi, int, 0444);
  58. MODULE_PARM_DESC(msi, "attempt to use MSI if nonzero");
  59. #else /* CONFIG_PCI_MSI */
  60. #define msi_x (0)
  61. #define msi (0)
  62. #endif /* CONFIG_PCI_MSI */
  63. static const char mthca_version[] __devinitdata =
  64. DRV_NAME ": Mellanox InfiniBand HCA driver v"
  65. DRV_VERSION " (" DRV_RELDATE ")\n";
  66. static struct mthca_profile default_profile = {
  67. .num_qp = 1 << 16,
  68. .rdb_per_qp = 4,
  69. .num_cq = 1 << 16,
  70. .num_mcg = 1 << 13,
  71. .num_mpt = 1 << 17,
  72. .num_mtt = 1 << 20,
  73. .num_udav = 1 << 15, /* Tavor only */
  74. .fmr_reserved_mtts = 1 << 18, /* Tavor only */
  75. .uarc_size = 1 << 18, /* Arbel only */
  76. };
  77. static int __devinit mthca_tune_pci(struct mthca_dev *mdev)
  78. {
  79. int cap;
  80. u16 val;
  81. /* First try to max out Read Byte Count */
  82. cap = pci_find_capability(mdev->pdev, PCI_CAP_ID_PCIX);
  83. if (cap) {
  84. if (pci_read_config_word(mdev->pdev, cap + PCI_X_CMD, &val)) {
  85. mthca_err(mdev, "Couldn't read PCI-X command register, "
  86. "aborting.\n");
  87. return -ENODEV;
  88. }
  89. val = (val & ~PCI_X_CMD_MAX_READ) | (3 << 2);
  90. if (pci_write_config_word(mdev->pdev, cap + PCI_X_CMD, val)) {
  91. mthca_err(mdev, "Couldn't write PCI-X command register, "
  92. "aborting.\n");
  93. return -ENODEV;
  94. }
  95. } else if (!(mdev->mthca_flags & MTHCA_FLAG_PCIE))
  96. mthca_info(mdev, "No PCI-X capability, not setting RBC.\n");
  97. cap = pci_find_capability(mdev->pdev, PCI_CAP_ID_EXP);
  98. if (cap) {
  99. if (pci_read_config_word(mdev->pdev, cap + PCI_EXP_DEVCTL, &val)) {
  100. mthca_err(mdev, "Couldn't read PCI Express device control "
  101. "register, aborting.\n");
  102. return -ENODEV;
  103. }
  104. val = (val & ~PCI_EXP_DEVCTL_READRQ) | (5 << 12);
  105. if (pci_write_config_word(mdev->pdev, cap + PCI_EXP_DEVCTL, val)) {
  106. mthca_err(mdev, "Couldn't write PCI Express device control "
  107. "register, aborting.\n");
  108. return -ENODEV;
  109. }
  110. } else if (mdev->mthca_flags & MTHCA_FLAG_PCIE)
  111. mthca_info(mdev, "No PCI Express capability, "
  112. "not setting Max Read Request Size.\n");
  113. return 0;
  114. }
  115. static int __devinit mthca_dev_lim(struct mthca_dev *mdev, struct mthca_dev_lim *dev_lim)
  116. {
  117. int err;
  118. u8 status;
  119. err = mthca_QUERY_DEV_LIM(mdev, dev_lim, &status);
  120. if (err) {
  121. mthca_err(mdev, "QUERY_DEV_LIM command failed, aborting.\n");
  122. return err;
  123. }
  124. if (status) {
  125. mthca_err(mdev, "QUERY_DEV_LIM returned status 0x%02x, "
  126. "aborting.\n", status);
  127. return -EINVAL;
  128. }
  129. if (dev_lim->min_page_sz > PAGE_SIZE) {
  130. mthca_err(mdev, "HCA minimum page size of %d bigger than "
  131. "kernel PAGE_SIZE of %ld, aborting.\n",
  132. dev_lim->min_page_sz, PAGE_SIZE);
  133. return -ENODEV;
  134. }
  135. if (dev_lim->num_ports > MTHCA_MAX_PORTS) {
  136. mthca_err(mdev, "HCA has %d ports, but we only support %d, "
  137. "aborting.\n",
  138. dev_lim->num_ports, MTHCA_MAX_PORTS);
  139. return -ENODEV;
  140. }
  141. mdev->limits.num_ports = dev_lim->num_ports;
  142. mdev->limits.vl_cap = dev_lim->max_vl;
  143. mdev->limits.mtu_cap = dev_lim->max_mtu;
  144. mdev->limits.gid_table_len = dev_lim->max_gids;
  145. mdev->limits.pkey_table_len = dev_lim->max_pkeys;
  146. mdev->limits.local_ca_ack_delay = dev_lim->local_ca_ack_delay;
  147. mdev->limits.max_sg = dev_lim->max_sg;
  148. mdev->limits.reserved_qps = dev_lim->reserved_qps;
  149. mdev->limits.reserved_srqs = dev_lim->reserved_srqs;
  150. mdev->limits.reserved_eecs = dev_lim->reserved_eecs;
  151. mdev->limits.reserved_cqs = dev_lim->reserved_cqs;
  152. mdev->limits.reserved_eqs = dev_lim->reserved_eqs;
  153. mdev->limits.reserved_mtts = dev_lim->reserved_mtts;
  154. mdev->limits.reserved_mrws = dev_lim->reserved_mrws;
  155. mdev->limits.reserved_uars = dev_lim->reserved_uars;
  156. mdev->limits.reserved_pds = dev_lim->reserved_pds;
  157. /* IB_DEVICE_RESIZE_MAX_WR not supported by driver.
  158. May be doable since hardware supports it for SRQ.
  159. IB_DEVICE_N_NOTIFY_CQ is supported by hardware but not by driver.
  160. IB_DEVICE_SRQ_RESIZE is supported by hardware but SRQ is not
  161. supported by driver. */
  162. mdev->device_cap_flags = IB_DEVICE_CHANGE_PHY_PORT |
  163. IB_DEVICE_PORT_ACTIVE_EVENT |
  164. IB_DEVICE_SYS_IMAGE_GUID |
  165. IB_DEVICE_RC_RNR_NAK_GEN;
  166. if (dev_lim->flags & DEV_LIM_FLAG_BAD_PKEY_CNTR)
  167. mdev->device_cap_flags |= IB_DEVICE_BAD_PKEY_CNTR;
  168. if (dev_lim->flags & DEV_LIM_FLAG_BAD_QKEY_CNTR)
  169. mdev->device_cap_flags |= IB_DEVICE_BAD_QKEY_CNTR;
  170. if (dev_lim->flags & DEV_LIM_FLAG_RAW_MULTI)
  171. mdev->device_cap_flags |= IB_DEVICE_RAW_MULTI;
  172. if (dev_lim->flags & DEV_LIM_FLAG_AUTO_PATH_MIG)
  173. mdev->device_cap_flags |= IB_DEVICE_AUTO_PATH_MIG;
  174. if (dev_lim->flags & DEV_LIM_FLAG_UD_AV_PORT_ENFORCE)
  175. mdev->device_cap_flags |= IB_DEVICE_UD_AV_PORT_ENFORCE;
  176. if (dev_lim->flags & DEV_LIM_FLAG_SRQ)
  177. mdev->mthca_flags |= MTHCA_FLAG_SRQ;
  178. return 0;
  179. }
  180. static int __devinit mthca_init_tavor(struct mthca_dev *mdev)
  181. {
  182. u8 status;
  183. int err;
  184. struct mthca_dev_lim dev_lim;
  185. struct mthca_profile profile;
  186. struct mthca_init_hca_param init_hca;
  187. err = mthca_SYS_EN(mdev, &status);
  188. if (err) {
  189. mthca_err(mdev, "SYS_EN command failed, aborting.\n");
  190. return err;
  191. }
  192. if (status) {
  193. mthca_err(mdev, "SYS_EN returned status 0x%02x, "
  194. "aborting.\n", status);
  195. return -EINVAL;
  196. }
  197. err = mthca_QUERY_FW(mdev, &status);
  198. if (err) {
  199. mthca_err(mdev, "QUERY_FW command failed, aborting.\n");
  200. goto err_disable;
  201. }
  202. if (status) {
  203. mthca_err(mdev, "QUERY_FW returned status 0x%02x, "
  204. "aborting.\n", status);
  205. err = -EINVAL;
  206. goto err_disable;
  207. }
  208. err = mthca_QUERY_DDR(mdev, &status);
  209. if (err) {
  210. mthca_err(mdev, "QUERY_DDR command failed, aborting.\n");
  211. goto err_disable;
  212. }
  213. if (status) {
  214. mthca_err(mdev, "QUERY_DDR returned status 0x%02x, "
  215. "aborting.\n", status);
  216. err = -EINVAL;
  217. goto err_disable;
  218. }
  219. err = mthca_dev_lim(mdev, &dev_lim);
  220. profile = default_profile;
  221. profile.num_uar = dev_lim.uar_size / PAGE_SIZE;
  222. profile.uarc_size = 0;
  223. err = mthca_make_profile(mdev, &profile, &dev_lim, &init_hca);
  224. if (err < 0)
  225. goto err_disable;
  226. err = mthca_INIT_HCA(mdev, &init_hca, &status);
  227. if (err) {
  228. mthca_err(mdev, "INIT_HCA command failed, aborting.\n");
  229. goto err_disable;
  230. }
  231. if (status) {
  232. mthca_err(mdev, "INIT_HCA returned status 0x%02x, "
  233. "aborting.\n", status);
  234. err = -EINVAL;
  235. goto err_disable;
  236. }
  237. return 0;
  238. err_disable:
  239. mthca_SYS_DIS(mdev, &status);
  240. return err;
  241. }
  242. static int __devinit mthca_load_fw(struct mthca_dev *mdev)
  243. {
  244. u8 status;
  245. int err;
  246. /* FIXME: use HCA-attached memory for FW if present */
  247. mdev->fw.arbel.fw_icm =
  248. mthca_alloc_icm(mdev, mdev->fw.arbel.fw_pages,
  249. GFP_HIGHUSER | __GFP_NOWARN);
  250. if (!mdev->fw.arbel.fw_icm) {
  251. mthca_err(mdev, "Couldn't allocate FW area, aborting.\n");
  252. return -ENOMEM;
  253. }
  254. err = mthca_MAP_FA(mdev, mdev->fw.arbel.fw_icm, &status);
  255. if (err) {
  256. mthca_err(mdev, "MAP_FA command failed, aborting.\n");
  257. goto err_free;
  258. }
  259. if (status) {
  260. mthca_err(mdev, "MAP_FA returned status 0x%02x, aborting.\n", status);
  261. err = -EINVAL;
  262. goto err_free;
  263. }
  264. err = mthca_RUN_FW(mdev, &status);
  265. if (err) {
  266. mthca_err(mdev, "RUN_FW command failed, aborting.\n");
  267. goto err_unmap_fa;
  268. }
  269. if (status) {
  270. mthca_err(mdev, "RUN_FW returned status 0x%02x, aborting.\n", status);
  271. err = -EINVAL;
  272. goto err_unmap_fa;
  273. }
  274. return 0;
  275. err_unmap_fa:
  276. mthca_UNMAP_FA(mdev, &status);
  277. err_free:
  278. mthca_free_icm(mdev, mdev->fw.arbel.fw_icm);
  279. return err;
  280. }
  281. static int __devinit mthca_init_icm(struct mthca_dev *mdev,
  282. struct mthca_dev_lim *dev_lim,
  283. struct mthca_init_hca_param *init_hca,
  284. u64 icm_size)
  285. {
  286. u64 aux_pages;
  287. u8 status;
  288. int err;
  289. err = mthca_SET_ICM_SIZE(mdev, icm_size, &aux_pages, &status);
  290. if (err) {
  291. mthca_err(mdev, "SET_ICM_SIZE command failed, aborting.\n");
  292. return err;
  293. }
  294. if (status) {
  295. mthca_err(mdev, "SET_ICM_SIZE returned status 0x%02x, "
  296. "aborting.\n", status);
  297. return -EINVAL;
  298. }
  299. mthca_dbg(mdev, "%lld KB of HCA context requires %lld KB aux memory.\n",
  300. (unsigned long long) icm_size >> 10,
  301. (unsigned long long) aux_pages << 2);
  302. mdev->fw.arbel.aux_icm = mthca_alloc_icm(mdev, aux_pages,
  303. GFP_HIGHUSER | __GFP_NOWARN);
  304. if (!mdev->fw.arbel.aux_icm) {
  305. mthca_err(mdev, "Couldn't allocate aux memory, aborting.\n");
  306. return -ENOMEM;
  307. }
  308. err = mthca_MAP_ICM_AUX(mdev, mdev->fw.arbel.aux_icm, &status);
  309. if (err) {
  310. mthca_err(mdev, "MAP_ICM_AUX command failed, aborting.\n");
  311. goto err_free_aux;
  312. }
  313. if (status) {
  314. mthca_err(mdev, "MAP_ICM_AUX returned status 0x%02x, aborting.\n", status);
  315. err = -EINVAL;
  316. goto err_free_aux;
  317. }
  318. err = mthca_map_eq_icm(mdev, init_hca->eqc_base);
  319. if (err) {
  320. mthca_err(mdev, "Failed to map EQ context memory, aborting.\n");
  321. goto err_unmap_aux;
  322. }
  323. mdev->mr_table.mtt_table = mthca_alloc_icm_table(mdev, init_hca->mtt_base,
  324. MTHCA_MTT_SEG_SIZE,
  325. mdev->limits.num_mtt_segs,
  326. mdev->limits.reserved_mtts, 1);
  327. if (!mdev->mr_table.mtt_table) {
  328. mthca_err(mdev, "Failed to map MTT context memory, aborting.\n");
  329. err = -ENOMEM;
  330. goto err_unmap_eq;
  331. }
  332. mdev->mr_table.mpt_table = mthca_alloc_icm_table(mdev, init_hca->mpt_base,
  333. dev_lim->mpt_entry_sz,
  334. mdev->limits.num_mpts,
  335. mdev->limits.reserved_mrws, 1);
  336. if (!mdev->mr_table.mpt_table) {
  337. mthca_err(mdev, "Failed to map MPT context memory, aborting.\n");
  338. err = -ENOMEM;
  339. goto err_unmap_mtt;
  340. }
  341. mdev->qp_table.qp_table = mthca_alloc_icm_table(mdev, init_hca->qpc_base,
  342. dev_lim->qpc_entry_sz,
  343. mdev->limits.num_qps,
  344. mdev->limits.reserved_qps, 0);
  345. if (!mdev->qp_table.qp_table) {
  346. mthca_err(mdev, "Failed to map QP context memory, aborting.\n");
  347. err = -ENOMEM;
  348. goto err_unmap_mpt;
  349. }
  350. mdev->qp_table.eqp_table = mthca_alloc_icm_table(mdev, init_hca->eqpc_base,
  351. dev_lim->eqpc_entry_sz,
  352. mdev->limits.num_qps,
  353. mdev->limits.reserved_qps, 0);
  354. if (!mdev->qp_table.eqp_table) {
  355. mthca_err(mdev, "Failed to map EQP context memory, aborting.\n");
  356. err = -ENOMEM;
  357. goto err_unmap_qp;
  358. }
  359. mdev->qp_table.rdb_table = mthca_alloc_icm_table(mdev, init_hca->rdb_base,
  360. MTHCA_RDB_ENTRY_SIZE,
  361. mdev->limits.num_qps <<
  362. mdev->qp_table.rdb_shift,
  363. 0, 0);
  364. if (!mdev->qp_table.rdb_table) {
  365. mthca_err(mdev, "Failed to map RDB context memory, aborting\n");
  366. err = -ENOMEM;
  367. goto err_unmap_eqp;
  368. }
  369. mdev->cq_table.table = mthca_alloc_icm_table(mdev, init_hca->cqc_base,
  370. dev_lim->cqc_entry_sz,
  371. mdev->limits.num_cqs,
  372. mdev->limits.reserved_cqs, 0);
  373. if (!mdev->cq_table.table) {
  374. mthca_err(mdev, "Failed to map CQ context memory, aborting.\n");
  375. err = -ENOMEM;
  376. goto err_unmap_rdb;
  377. }
  378. /*
  379. * It's not strictly required, but for simplicity just map the
  380. * whole multicast group table now. The table isn't very big
  381. * and it's a lot easier than trying to track ref counts.
  382. */
  383. mdev->mcg_table.table = mthca_alloc_icm_table(mdev, init_hca->mc_base,
  384. MTHCA_MGM_ENTRY_SIZE,
  385. mdev->limits.num_mgms +
  386. mdev->limits.num_amgms,
  387. mdev->limits.num_mgms +
  388. mdev->limits.num_amgms,
  389. 0);
  390. if (!mdev->mcg_table.table) {
  391. mthca_err(mdev, "Failed to map MCG context memory, aborting.\n");
  392. err = -ENOMEM;
  393. goto err_unmap_cq;
  394. }
  395. return 0;
  396. err_unmap_cq:
  397. mthca_free_icm_table(mdev, mdev->cq_table.table);
  398. err_unmap_rdb:
  399. mthca_free_icm_table(mdev, mdev->qp_table.rdb_table);
  400. err_unmap_eqp:
  401. mthca_free_icm_table(mdev, mdev->qp_table.eqp_table);
  402. err_unmap_qp:
  403. mthca_free_icm_table(mdev, mdev->qp_table.qp_table);
  404. err_unmap_mpt:
  405. mthca_free_icm_table(mdev, mdev->mr_table.mpt_table);
  406. err_unmap_mtt:
  407. mthca_free_icm_table(mdev, mdev->mr_table.mtt_table);
  408. err_unmap_eq:
  409. mthca_unmap_eq_icm(mdev);
  410. err_unmap_aux:
  411. mthca_UNMAP_ICM_AUX(mdev, &status);
  412. err_free_aux:
  413. mthca_free_icm(mdev, mdev->fw.arbel.aux_icm);
  414. return err;
  415. }
  416. static int __devinit mthca_init_arbel(struct mthca_dev *mdev)
  417. {
  418. struct mthca_dev_lim dev_lim;
  419. struct mthca_profile profile;
  420. struct mthca_init_hca_param init_hca;
  421. u64 icm_size;
  422. u8 status;
  423. int err;
  424. err = mthca_QUERY_FW(mdev, &status);
  425. if (err) {
  426. mthca_err(mdev, "QUERY_FW command failed, aborting.\n");
  427. return err;
  428. }
  429. if (status) {
  430. mthca_err(mdev, "QUERY_FW returned status 0x%02x, "
  431. "aborting.\n", status);
  432. return -EINVAL;
  433. }
  434. err = mthca_ENABLE_LAM(mdev, &status);
  435. if (err) {
  436. mthca_err(mdev, "ENABLE_LAM command failed, aborting.\n");
  437. return err;
  438. }
  439. if (status == MTHCA_CMD_STAT_LAM_NOT_PRE) {
  440. mthca_dbg(mdev, "No HCA-attached memory (running in MemFree mode)\n");
  441. mdev->mthca_flags |= MTHCA_FLAG_NO_LAM;
  442. } else if (status) {
  443. mthca_err(mdev, "ENABLE_LAM returned status 0x%02x, "
  444. "aborting.\n", status);
  445. return -EINVAL;
  446. }
  447. err = mthca_load_fw(mdev);
  448. if (err) {
  449. mthca_err(mdev, "Failed to start FW, aborting.\n");
  450. goto err_disable;
  451. }
  452. err = mthca_dev_lim(mdev, &dev_lim);
  453. if (err) {
  454. mthca_err(mdev, "QUERY_DEV_LIM command failed, aborting.\n");
  455. goto err_stop_fw;
  456. }
  457. profile = default_profile;
  458. profile.num_uar = dev_lim.uar_size / PAGE_SIZE;
  459. profile.num_udav = 0;
  460. icm_size = mthca_make_profile(mdev, &profile, &dev_lim, &init_hca);
  461. if ((int) icm_size < 0) {
  462. err = icm_size;
  463. goto err_stop_fw;
  464. }
  465. err = mthca_init_icm(mdev, &dev_lim, &init_hca, icm_size);
  466. if (err)
  467. goto err_stop_fw;
  468. err = mthca_INIT_HCA(mdev, &init_hca, &status);
  469. if (err) {
  470. mthca_err(mdev, "INIT_HCA command failed, aborting.\n");
  471. goto err_free_icm;
  472. }
  473. if (status) {
  474. mthca_err(mdev, "INIT_HCA returned status 0x%02x, "
  475. "aborting.\n", status);
  476. err = -EINVAL;
  477. goto err_free_icm;
  478. }
  479. return 0;
  480. err_free_icm:
  481. mthca_free_icm_table(mdev, mdev->cq_table.table);
  482. mthca_free_icm_table(mdev, mdev->qp_table.rdb_table);
  483. mthca_free_icm_table(mdev, mdev->qp_table.eqp_table);
  484. mthca_free_icm_table(mdev, mdev->qp_table.qp_table);
  485. mthca_free_icm_table(mdev, mdev->mr_table.mpt_table);
  486. mthca_free_icm_table(mdev, mdev->mr_table.mtt_table);
  487. mthca_unmap_eq_icm(mdev);
  488. mthca_UNMAP_ICM_AUX(mdev, &status);
  489. mthca_free_icm(mdev, mdev->fw.arbel.aux_icm);
  490. err_stop_fw:
  491. mthca_UNMAP_FA(mdev, &status);
  492. mthca_free_icm(mdev, mdev->fw.arbel.fw_icm);
  493. err_disable:
  494. if (!(mdev->mthca_flags & MTHCA_FLAG_NO_LAM))
  495. mthca_DISABLE_LAM(mdev, &status);
  496. return err;
  497. }
  498. static void mthca_close_hca(struct mthca_dev *mdev)
  499. {
  500. u8 status;
  501. mthca_CLOSE_HCA(mdev, 0, &status);
  502. if (mthca_is_memfree(mdev)) {
  503. mthca_free_icm_table(mdev, mdev->cq_table.table);
  504. mthca_free_icm_table(mdev, mdev->qp_table.rdb_table);
  505. mthca_free_icm_table(mdev, mdev->qp_table.eqp_table);
  506. mthca_free_icm_table(mdev, mdev->qp_table.qp_table);
  507. mthca_free_icm_table(mdev, mdev->mr_table.mpt_table);
  508. mthca_free_icm_table(mdev, mdev->mr_table.mtt_table);
  509. mthca_unmap_eq_icm(mdev);
  510. mthca_UNMAP_ICM_AUX(mdev, &status);
  511. mthca_free_icm(mdev, mdev->fw.arbel.aux_icm);
  512. mthca_UNMAP_FA(mdev, &status);
  513. mthca_free_icm(mdev, mdev->fw.arbel.fw_icm);
  514. if (!(mdev->mthca_flags & MTHCA_FLAG_NO_LAM))
  515. mthca_DISABLE_LAM(mdev, &status);
  516. } else
  517. mthca_SYS_DIS(mdev, &status);
  518. }
  519. static int __devinit mthca_init_hca(struct mthca_dev *mdev)
  520. {
  521. u8 status;
  522. int err;
  523. struct mthca_adapter adapter;
  524. if (mthca_is_memfree(mdev))
  525. err = mthca_init_arbel(mdev);
  526. else
  527. err = mthca_init_tavor(mdev);
  528. if (err)
  529. return err;
  530. err = mthca_QUERY_ADAPTER(mdev, &adapter, &status);
  531. if (err) {
  532. mthca_err(mdev, "QUERY_ADAPTER command failed, aborting.\n");
  533. goto err_close;
  534. }
  535. if (status) {
  536. mthca_err(mdev, "QUERY_ADAPTER returned status 0x%02x, "
  537. "aborting.\n", status);
  538. err = -EINVAL;
  539. goto err_close;
  540. }
  541. mdev->eq_table.inta_pin = adapter.inta_pin;
  542. mdev->rev_id = adapter.revision_id;
  543. memcpy(mdev->board_id, adapter.board_id, sizeof mdev->board_id);
  544. return 0;
  545. err_close:
  546. mthca_close_hca(mdev);
  547. return err;
  548. }
  549. static int __devinit mthca_setup_hca(struct mthca_dev *dev)
  550. {
  551. int err;
  552. u8 status;
  553. MTHCA_INIT_DOORBELL_LOCK(&dev->doorbell_lock);
  554. err = mthca_init_uar_table(dev);
  555. if (err) {
  556. mthca_err(dev, "Failed to initialize "
  557. "user access region table, aborting.\n");
  558. return err;
  559. }
  560. err = mthca_uar_alloc(dev, &dev->driver_uar);
  561. if (err) {
  562. mthca_err(dev, "Failed to allocate driver access region, "
  563. "aborting.\n");
  564. goto err_uar_table_free;
  565. }
  566. dev->kar = ioremap(dev->driver_uar.pfn << PAGE_SHIFT, PAGE_SIZE);
  567. if (!dev->kar) {
  568. mthca_err(dev, "Couldn't map kernel access region, "
  569. "aborting.\n");
  570. err = -ENOMEM;
  571. goto err_uar_free;
  572. }
  573. err = mthca_init_pd_table(dev);
  574. if (err) {
  575. mthca_err(dev, "Failed to initialize "
  576. "protection domain table, aborting.\n");
  577. goto err_kar_unmap;
  578. }
  579. err = mthca_init_mr_table(dev);
  580. if (err) {
  581. mthca_err(dev, "Failed to initialize "
  582. "memory region table, aborting.\n");
  583. goto err_pd_table_free;
  584. }
  585. err = mthca_pd_alloc(dev, 1, &dev->driver_pd);
  586. if (err) {
  587. mthca_err(dev, "Failed to create driver PD, "
  588. "aborting.\n");
  589. goto err_mr_table_free;
  590. }
  591. err = mthca_init_eq_table(dev);
  592. if (err) {
  593. mthca_err(dev, "Failed to initialize "
  594. "event queue table, aborting.\n");
  595. goto err_pd_free;
  596. }
  597. err = mthca_cmd_use_events(dev);
  598. if (err) {
  599. mthca_err(dev, "Failed to switch to event-driven "
  600. "firmware commands, aborting.\n");
  601. goto err_eq_table_free;
  602. }
  603. err = mthca_NOP(dev, &status);
  604. if (err || status) {
  605. mthca_err(dev, "NOP command failed to generate interrupt (IRQ %d), aborting.\n",
  606. dev->mthca_flags & MTHCA_FLAG_MSI_X ?
  607. dev->eq_table.eq[MTHCA_EQ_CMD].msi_x_vector :
  608. dev->pdev->irq);
  609. if (dev->mthca_flags & (MTHCA_FLAG_MSI | MTHCA_FLAG_MSI_X))
  610. mthca_err(dev, "Try again with MSI/MSI-X disabled.\n");
  611. else
  612. mthca_err(dev, "BIOS or ACPI interrupt routing problem?\n");
  613. goto err_cmd_poll;
  614. }
  615. mthca_dbg(dev, "NOP command IRQ test passed\n");
  616. err = mthca_init_cq_table(dev);
  617. if (err) {
  618. mthca_err(dev, "Failed to initialize "
  619. "completion queue table, aborting.\n");
  620. goto err_cmd_poll;
  621. }
  622. err = mthca_init_qp_table(dev);
  623. if (err) {
  624. mthca_err(dev, "Failed to initialize "
  625. "queue pair table, aborting.\n");
  626. goto err_cq_table_free;
  627. }
  628. err = mthca_init_av_table(dev);
  629. if (err) {
  630. mthca_err(dev, "Failed to initialize "
  631. "address vector table, aborting.\n");
  632. goto err_qp_table_free;
  633. }
  634. err = mthca_init_mcg_table(dev);
  635. if (err) {
  636. mthca_err(dev, "Failed to initialize "
  637. "multicast group table, aborting.\n");
  638. goto err_av_table_free;
  639. }
  640. return 0;
  641. err_av_table_free:
  642. mthca_cleanup_av_table(dev);
  643. err_qp_table_free:
  644. mthca_cleanup_qp_table(dev);
  645. err_cq_table_free:
  646. mthca_cleanup_cq_table(dev);
  647. err_cmd_poll:
  648. mthca_cmd_use_polling(dev);
  649. err_eq_table_free:
  650. mthca_cleanup_eq_table(dev);
  651. err_pd_free:
  652. mthca_pd_free(dev, &dev->driver_pd);
  653. err_mr_table_free:
  654. mthca_cleanup_mr_table(dev);
  655. err_pd_table_free:
  656. mthca_cleanup_pd_table(dev);
  657. err_kar_unmap:
  658. iounmap(dev->kar);
  659. err_uar_free:
  660. mthca_uar_free(dev, &dev->driver_uar);
  661. err_uar_table_free:
  662. mthca_cleanup_uar_table(dev);
  663. return err;
  664. }
  665. static int __devinit mthca_request_regions(struct pci_dev *pdev,
  666. int ddr_hidden)
  667. {
  668. int err;
  669. /*
  670. * We can't just use pci_request_regions() because the MSI-X
  671. * table is right in the middle of the first BAR. If we did
  672. * pci_request_region and grab all of the first BAR, then
  673. * setting up MSI-X would fail, since the PCI core wants to do
  674. * request_mem_region on the MSI-X vector table.
  675. *
  676. * So just request what we need right now, and request any
  677. * other regions we need when setting up EQs.
  678. */
  679. if (!request_mem_region(pci_resource_start(pdev, 0) + MTHCA_HCR_BASE,
  680. MTHCA_HCR_SIZE, DRV_NAME))
  681. return -EBUSY;
  682. err = pci_request_region(pdev, 2, DRV_NAME);
  683. if (err)
  684. goto err_bar2_failed;
  685. if (!ddr_hidden) {
  686. err = pci_request_region(pdev, 4, DRV_NAME);
  687. if (err)
  688. goto err_bar4_failed;
  689. }
  690. return 0;
  691. err_bar4_failed:
  692. pci_release_region(pdev, 2);
  693. err_bar2_failed:
  694. release_mem_region(pci_resource_start(pdev, 0) + MTHCA_HCR_BASE,
  695. MTHCA_HCR_SIZE);
  696. return err;
  697. }
  698. static void mthca_release_regions(struct pci_dev *pdev,
  699. int ddr_hidden)
  700. {
  701. if (!ddr_hidden)
  702. pci_release_region(pdev, 4);
  703. pci_release_region(pdev, 2);
  704. release_mem_region(pci_resource_start(pdev, 0) + MTHCA_HCR_BASE,
  705. MTHCA_HCR_SIZE);
  706. }
  707. static int __devinit mthca_enable_msi_x(struct mthca_dev *mdev)
  708. {
  709. struct msix_entry entries[3];
  710. int err;
  711. entries[0].entry = 0;
  712. entries[1].entry = 1;
  713. entries[2].entry = 2;
  714. err = pci_enable_msix(mdev->pdev, entries, ARRAY_SIZE(entries));
  715. if (err) {
  716. if (err > 0)
  717. mthca_info(mdev, "Only %d MSI-X vectors available, "
  718. "not using MSI-X\n", err);
  719. return err;
  720. }
  721. mdev->eq_table.eq[MTHCA_EQ_COMP ].msi_x_vector = entries[0].vector;
  722. mdev->eq_table.eq[MTHCA_EQ_ASYNC].msi_x_vector = entries[1].vector;
  723. mdev->eq_table.eq[MTHCA_EQ_CMD ].msi_x_vector = entries[2].vector;
  724. return 0;
  725. }
  726. /* Types of supported HCA */
  727. enum {
  728. TAVOR, /* MT23108 */
  729. ARBEL_COMPAT, /* MT25208 in Tavor compat mode */
  730. ARBEL_NATIVE, /* MT25208 with extended features */
  731. SINAI /* MT25204 */
  732. };
  733. #define MTHCA_FW_VER(major, minor, subminor) \
  734. (((u64) (major) << 32) | ((u64) (minor) << 16) | (u64) (subminor))
  735. static struct {
  736. u64 latest_fw;
  737. int is_memfree;
  738. int is_pcie;
  739. } mthca_hca_table[] = {
  740. [TAVOR] = { .latest_fw = MTHCA_FW_VER(3, 3, 3), .is_memfree = 0, .is_pcie = 0 },
  741. [ARBEL_COMPAT] = { .latest_fw = MTHCA_FW_VER(4, 7, 0), .is_memfree = 0, .is_pcie = 1 },
  742. [ARBEL_NATIVE] = { .latest_fw = MTHCA_FW_VER(5, 1, 0), .is_memfree = 1, .is_pcie = 1 },
  743. [SINAI] = { .latest_fw = MTHCA_FW_VER(1, 0, 1), .is_memfree = 1, .is_pcie = 1 }
  744. };
  745. static int __devinit mthca_init_one(struct pci_dev *pdev,
  746. const struct pci_device_id *id)
  747. {
  748. static int mthca_version_printed = 0;
  749. int ddr_hidden = 0;
  750. int err;
  751. struct mthca_dev *mdev;
  752. if (!mthca_version_printed) {
  753. printk(KERN_INFO "%s", mthca_version);
  754. ++mthca_version_printed;
  755. }
  756. printk(KERN_INFO PFX "Initializing %s (%s)\n",
  757. pci_pretty_name(pdev), pci_name(pdev));
  758. if (id->driver_data >= ARRAY_SIZE(mthca_hca_table)) {
  759. printk(KERN_ERR PFX "%s (%s) has invalid driver data %lx\n",
  760. pci_pretty_name(pdev), pci_name(pdev), id->driver_data);
  761. return -ENODEV;
  762. }
  763. err = pci_enable_device(pdev);
  764. if (err) {
  765. dev_err(&pdev->dev, "Cannot enable PCI device, "
  766. "aborting.\n");
  767. return err;
  768. }
  769. /*
  770. * Check for BARs. We expect 0: 1MB, 2: 8MB, 4: DDR (may not
  771. * be present)
  772. */
  773. if (!(pci_resource_flags(pdev, 0) & IORESOURCE_MEM) ||
  774. pci_resource_len(pdev, 0) != 1 << 20) {
  775. dev_err(&pdev->dev, "Missing DCS, aborting.\n");
  776. err = -ENODEV;
  777. goto err_disable_pdev;
  778. }
  779. if (!(pci_resource_flags(pdev, 2) & IORESOURCE_MEM) ||
  780. pci_resource_len(pdev, 2) != 1 << 23) {
  781. dev_err(&pdev->dev, "Missing UAR, aborting.\n");
  782. err = -ENODEV;
  783. goto err_disable_pdev;
  784. }
  785. if (!(pci_resource_flags(pdev, 4) & IORESOURCE_MEM))
  786. ddr_hidden = 1;
  787. err = mthca_request_regions(pdev, ddr_hidden);
  788. if (err) {
  789. dev_err(&pdev->dev, "Cannot obtain PCI resources, "
  790. "aborting.\n");
  791. goto err_disable_pdev;
  792. }
  793. pci_set_master(pdev);
  794. err = pci_set_dma_mask(pdev, DMA_64BIT_MASK);
  795. if (err) {
  796. dev_warn(&pdev->dev, "Warning: couldn't set 64-bit PCI DMA mask.\n");
  797. err = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
  798. if (err) {
  799. dev_err(&pdev->dev, "Can't set PCI DMA mask, aborting.\n");
  800. goto err_free_res;
  801. }
  802. }
  803. err = pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK);
  804. if (err) {
  805. dev_warn(&pdev->dev, "Warning: couldn't set 64-bit "
  806. "consistent PCI DMA mask.\n");
  807. err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK);
  808. if (err) {
  809. dev_err(&pdev->dev, "Can't set consistent PCI DMA mask, "
  810. "aborting.\n");
  811. goto err_free_res;
  812. }
  813. }
  814. mdev = (struct mthca_dev *) ib_alloc_device(sizeof *mdev);
  815. if (!mdev) {
  816. dev_err(&pdev->dev, "Device struct alloc failed, "
  817. "aborting.\n");
  818. err = -ENOMEM;
  819. goto err_free_res;
  820. }
  821. mdev->pdev = pdev;
  822. if (ddr_hidden)
  823. mdev->mthca_flags |= MTHCA_FLAG_DDR_HIDDEN;
  824. if (mthca_hca_table[id->driver_data].is_memfree)
  825. mdev->mthca_flags |= MTHCA_FLAG_MEMFREE;
  826. if (mthca_hca_table[id->driver_data].is_pcie)
  827. mdev->mthca_flags |= MTHCA_FLAG_PCIE;
  828. /*
  829. * Now reset the HCA before we touch the PCI capabilities or
  830. * attempt a firmware command, since a boot ROM may have left
  831. * the HCA in an undefined state.
  832. */
  833. err = mthca_reset(mdev);
  834. if (err) {
  835. mthca_err(mdev, "Failed to reset HCA, aborting.\n");
  836. goto err_free_dev;
  837. }
  838. if (msi_x && !mthca_enable_msi_x(mdev))
  839. mdev->mthca_flags |= MTHCA_FLAG_MSI_X;
  840. if (msi && !(mdev->mthca_flags & MTHCA_FLAG_MSI_X) &&
  841. !pci_enable_msi(pdev))
  842. mdev->mthca_flags |= MTHCA_FLAG_MSI;
  843. if (mthca_cmd_init(mdev)) {
  844. mthca_err(mdev, "Failed to init command interface, aborting.\n");
  845. goto err_free_dev;
  846. }
  847. err = mthca_tune_pci(mdev);
  848. if (err)
  849. goto err_cmd;
  850. err = mthca_init_hca(mdev);
  851. if (err)
  852. goto err_cmd;
  853. if (mdev->fw_ver < mthca_hca_table[id->driver_data].latest_fw) {
  854. mthca_warn(mdev, "HCA FW version %x.%x.%x is old (%x.%x.%x is current).\n",
  855. (int) (mdev->fw_ver >> 32), (int) (mdev->fw_ver >> 16) & 0xffff,
  856. (int) (mdev->fw_ver & 0xffff),
  857. (int) (mthca_hca_table[id->driver_data].latest_fw >> 32),
  858. (int) (mthca_hca_table[id->driver_data].latest_fw >> 16) & 0xffff,
  859. (int) (mthca_hca_table[id->driver_data].latest_fw & 0xffff));
  860. mthca_warn(mdev, "If you have problems, try updating your HCA FW.\n");
  861. }
  862. err = mthca_setup_hca(mdev);
  863. if (err)
  864. goto err_close;
  865. err = mthca_register_device(mdev);
  866. if (err)
  867. goto err_cleanup;
  868. err = mthca_create_agents(mdev);
  869. if (err)
  870. goto err_unregister;
  871. pci_set_drvdata(pdev, mdev);
  872. return 0;
  873. err_unregister:
  874. mthca_unregister_device(mdev);
  875. err_cleanup:
  876. mthca_cleanup_mcg_table(mdev);
  877. mthca_cleanup_av_table(mdev);
  878. mthca_cleanup_qp_table(mdev);
  879. mthca_cleanup_cq_table(mdev);
  880. mthca_cmd_use_polling(mdev);
  881. mthca_cleanup_eq_table(mdev);
  882. mthca_pd_free(mdev, &mdev->driver_pd);
  883. mthca_cleanup_mr_table(mdev);
  884. mthca_cleanup_pd_table(mdev);
  885. mthca_cleanup_uar_table(mdev);
  886. err_close:
  887. mthca_close_hca(mdev);
  888. err_cmd:
  889. mthca_cmd_cleanup(mdev);
  890. err_free_dev:
  891. if (mdev->mthca_flags & MTHCA_FLAG_MSI_X)
  892. pci_disable_msix(pdev);
  893. if (mdev->mthca_flags & MTHCA_FLAG_MSI)
  894. pci_disable_msi(pdev);
  895. ib_dealloc_device(&mdev->ib_dev);
  896. err_free_res:
  897. mthca_release_regions(pdev, ddr_hidden);
  898. err_disable_pdev:
  899. pci_disable_device(pdev);
  900. pci_set_drvdata(pdev, NULL);
  901. return err;
  902. }
  903. static void __devexit mthca_remove_one(struct pci_dev *pdev)
  904. {
  905. struct mthca_dev *mdev = pci_get_drvdata(pdev);
  906. u8 status;
  907. int p;
  908. if (mdev) {
  909. mthca_free_agents(mdev);
  910. mthca_unregister_device(mdev);
  911. for (p = 1; p <= mdev->limits.num_ports; ++p)
  912. mthca_CLOSE_IB(mdev, p, &status);
  913. mthca_cleanup_mcg_table(mdev);
  914. mthca_cleanup_av_table(mdev);
  915. mthca_cleanup_qp_table(mdev);
  916. mthca_cleanup_cq_table(mdev);
  917. mthca_cmd_use_polling(mdev);
  918. mthca_cleanup_eq_table(mdev);
  919. mthca_pd_free(mdev, &mdev->driver_pd);
  920. mthca_cleanup_mr_table(mdev);
  921. mthca_cleanup_pd_table(mdev);
  922. iounmap(mdev->kar);
  923. mthca_uar_free(mdev, &mdev->driver_uar);
  924. mthca_cleanup_uar_table(mdev);
  925. mthca_close_hca(mdev);
  926. mthca_cmd_cleanup(mdev);
  927. if (mdev->mthca_flags & MTHCA_FLAG_MSI_X)
  928. pci_disable_msix(pdev);
  929. if (mdev->mthca_flags & MTHCA_FLAG_MSI)
  930. pci_disable_msi(pdev);
  931. ib_dealloc_device(&mdev->ib_dev);
  932. mthca_release_regions(pdev, mdev->mthca_flags &
  933. MTHCA_FLAG_DDR_HIDDEN);
  934. pci_disable_device(pdev);
  935. pci_set_drvdata(pdev, NULL);
  936. }
  937. }
  938. static struct pci_device_id mthca_pci_table[] = {
  939. { PCI_DEVICE(PCI_VENDOR_ID_MELLANOX, PCI_DEVICE_ID_MELLANOX_TAVOR),
  940. .driver_data = TAVOR },
  941. { PCI_DEVICE(PCI_VENDOR_ID_TOPSPIN, PCI_DEVICE_ID_MELLANOX_TAVOR),
  942. .driver_data = TAVOR },
  943. { PCI_DEVICE(PCI_VENDOR_ID_MELLANOX, PCI_DEVICE_ID_MELLANOX_ARBEL_COMPAT),
  944. .driver_data = ARBEL_COMPAT },
  945. { PCI_DEVICE(PCI_VENDOR_ID_TOPSPIN, PCI_DEVICE_ID_MELLANOX_ARBEL_COMPAT),
  946. .driver_data = ARBEL_COMPAT },
  947. { PCI_DEVICE(PCI_VENDOR_ID_MELLANOX, PCI_DEVICE_ID_MELLANOX_ARBEL),
  948. .driver_data = ARBEL_NATIVE },
  949. { PCI_DEVICE(PCI_VENDOR_ID_TOPSPIN, PCI_DEVICE_ID_MELLANOX_ARBEL),
  950. .driver_data = ARBEL_NATIVE },
  951. { PCI_DEVICE(PCI_VENDOR_ID_MELLANOX, PCI_DEVICE_ID_MELLANOX_SINAI),
  952. .driver_data = SINAI },
  953. { PCI_DEVICE(PCI_VENDOR_ID_TOPSPIN, PCI_DEVICE_ID_MELLANOX_SINAI),
  954. .driver_data = SINAI },
  955. { PCI_DEVICE(PCI_VENDOR_ID_MELLANOX, PCI_DEVICE_ID_MELLANOX_SINAI_OLD),
  956. .driver_data = SINAI },
  957. { PCI_DEVICE(PCI_VENDOR_ID_TOPSPIN, PCI_DEVICE_ID_MELLANOX_SINAI_OLD),
  958. .driver_data = SINAI },
  959. { 0, }
  960. };
  961. MODULE_DEVICE_TABLE(pci, mthca_pci_table);
  962. static struct pci_driver mthca_driver = {
  963. .name = DRV_NAME,
  964. .id_table = mthca_pci_table,
  965. .probe = mthca_init_one,
  966. .remove = __devexit_p(mthca_remove_one)
  967. };
  968. static int __init mthca_init(void)
  969. {
  970. int ret;
  971. ret = pci_register_driver(&mthca_driver);
  972. return ret < 0 ? ret : 0;
  973. }
  974. static void __exit mthca_cleanup(void)
  975. {
  976. pci_unregister_driver(&mthca_driver);
  977. }
  978. module_init(mthca_init);
  979. module_exit(mthca_cleanup);