iwl3945-base.c 120 KB

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  1. /******************************************************************************
  2. *
  3. * Copyright(c) 2003 - 2010 Intel Corporation. All rights reserved.
  4. *
  5. * Portions of this file are derived from the ipw3945 project, as well
  6. * as portions of the ieee80211 subsystem header files.
  7. *
  8. * This program is free software; you can redistribute it and/or modify it
  9. * under the terms of version 2 of the GNU General Public License as
  10. * published by the Free Software Foundation.
  11. *
  12. * This program is distributed in the hope that it will be useful, but WITHOUT
  13. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  14. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  15. * more details.
  16. *
  17. * You should have received a copy of the GNU General Public License along with
  18. * this program; if not, write to the Free Software Foundation, Inc.,
  19. * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  20. *
  21. * The full GNU General Public License is included in this distribution in the
  22. * file called LICENSE.
  23. *
  24. * Contact Information:
  25. * Intel Linux Wireless <ilw@linux.intel.com>
  26. * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  27. *
  28. *****************************************************************************/
  29. #include <linux/kernel.h>
  30. #include <linux/module.h>
  31. #include <linux/init.h>
  32. #include <linux/pci.h>
  33. #include <linux/slab.h>
  34. #include <linux/dma-mapping.h>
  35. #include <linux/delay.h>
  36. #include <linux/sched.h>
  37. #include <linux/skbuff.h>
  38. #include <linux/netdevice.h>
  39. #include <linux/wireless.h>
  40. #include <linux/firmware.h>
  41. #include <linux/etherdevice.h>
  42. #include <linux/if_arp.h>
  43. #include <net/ieee80211_radiotap.h>
  44. #include <net/mac80211.h>
  45. #include <asm/div64.h>
  46. #define DRV_NAME "iwl3945"
  47. #include "iwl-fh.h"
  48. #include "iwl-3945-fh.h"
  49. #include "iwl-commands.h"
  50. #include "iwl-sta.h"
  51. #include "iwl-3945.h"
  52. #include "iwl-core.h"
  53. #include "iwl-helpers.h"
  54. #include "iwl-dev.h"
  55. #include "iwl-spectrum.h"
  56. /*
  57. * module name, copyright, version, etc.
  58. */
  59. #define DRV_DESCRIPTION \
  60. "Intel(R) PRO/Wireless 3945ABG/BG Network Connection driver for Linux"
  61. #ifdef CONFIG_IWLWIFI_DEBUG
  62. #define VD "d"
  63. #else
  64. #define VD
  65. #endif
  66. /*
  67. * add "s" to indicate spectrum measurement included.
  68. * we add it here to be consistent with previous releases in which
  69. * this was configurable.
  70. */
  71. #define DRV_VERSION IWLWIFI_VERSION VD "s"
  72. #define DRV_COPYRIGHT "Copyright(c) 2003-2010 Intel Corporation"
  73. #define DRV_AUTHOR "<ilw@linux.intel.com>"
  74. MODULE_DESCRIPTION(DRV_DESCRIPTION);
  75. MODULE_VERSION(DRV_VERSION);
  76. MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR);
  77. MODULE_LICENSE("GPL");
  78. /* module parameters */
  79. struct iwl_mod_params iwl3945_mod_params = {
  80. .sw_crypto = 1,
  81. .restart_fw = 1,
  82. /* the rest are 0 by default */
  83. };
  84. /**
  85. * iwl3945_get_antenna_flags - Get antenna flags for RXON command
  86. * @priv: eeprom and antenna fields are used to determine antenna flags
  87. *
  88. * priv->eeprom39 is used to determine if antenna AUX/MAIN are reversed
  89. * iwl3945_mod_params.antenna specifies the antenna diversity mode:
  90. *
  91. * IWL_ANTENNA_DIVERSITY - NIC selects best antenna by itself
  92. * IWL_ANTENNA_MAIN - Force MAIN antenna
  93. * IWL_ANTENNA_AUX - Force AUX antenna
  94. */
  95. __le32 iwl3945_get_antenna_flags(const struct iwl_priv *priv)
  96. {
  97. struct iwl3945_eeprom *eeprom = (struct iwl3945_eeprom *)priv->eeprom;
  98. switch (iwl3945_mod_params.antenna) {
  99. case IWL_ANTENNA_DIVERSITY:
  100. return 0;
  101. case IWL_ANTENNA_MAIN:
  102. if (eeprom->antenna_switch_type)
  103. return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_B_MSK;
  104. return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_A_MSK;
  105. case IWL_ANTENNA_AUX:
  106. if (eeprom->antenna_switch_type)
  107. return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_A_MSK;
  108. return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_B_MSK;
  109. }
  110. /* bad antenna selector value */
  111. IWL_ERR(priv, "Bad antenna selector value (0x%x)\n",
  112. iwl3945_mod_params.antenna);
  113. return 0; /* "diversity" is default if error */
  114. }
  115. static int iwl3945_set_ccmp_dynamic_key_info(struct iwl_priv *priv,
  116. struct ieee80211_key_conf *keyconf,
  117. u8 sta_id)
  118. {
  119. unsigned long flags;
  120. __le16 key_flags = 0;
  121. int ret;
  122. key_flags |= (STA_KEY_FLG_CCMP | STA_KEY_FLG_MAP_KEY_MSK);
  123. key_flags |= cpu_to_le16(keyconf->keyidx << STA_KEY_FLG_KEYID_POS);
  124. if (sta_id == priv->hw_params.bcast_sta_id)
  125. key_flags |= STA_KEY_MULTICAST_MSK;
  126. keyconf->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
  127. keyconf->hw_key_idx = keyconf->keyidx;
  128. key_flags &= ~STA_KEY_FLG_INVALID;
  129. spin_lock_irqsave(&priv->sta_lock, flags);
  130. priv->stations[sta_id].keyinfo.alg = keyconf->alg;
  131. priv->stations[sta_id].keyinfo.keylen = keyconf->keylen;
  132. memcpy(priv->stations[sta_id].keyinfo.key, keyconf->key,
  133. keyconf->keylen);
  134. memcpy(priv->stations[sta_id].sta.key.key, keyconf->key,
  135. keyconf->keylen);
  136. if ((priv->stations[sta_id].sta.key.key_flags & STA_KEY_FLG_ENCRYPT_MSK)
  137. == STA_KEY_FLG_NO_ENC)
  138. priv->stations[sta_id].sta.key.key_offset =
  139. iwl_get_free_ucode_key_index(priv);
  140. /* else, we are overriding an existing key => no need to allocated room
  141. * in uCode. */
  142. WARN(priv->stations[sta_id].sta.key.key_offset == WEP_INVALID_OFFSET,
  143. "no space for a new key");
  144. priv->stations[sta_id].sta.key.key_flags = key_flags;
  145. priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
  146. priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
  147. IWL_DEBUG_INFO(priv, "hwcrypto: modify ucode station key info\n");
  148. ret = iwl_send_add_sta(priv, &priv->stations[sta_id].sta, CMD_ASYNC);
  149. spin_unlock_irqrestore(&priv->sta_lock, flags);
  150. return ret;
  151. }
  152. static int iwl3945_set_tkip_dynamic_key_info(struct iwl_priv *priv,
  153. struct ieee80211_key_conf *keyconf,
  154. u8 sta_id)
  155. {
  156. return -EOPNOTSUPP;
  157. }
  158. static int iwl3945_set_wep_dynamic_key_info(struct iwl_priv *priv,
  159. struct ieee80211_key_conf *keyconf,
  160. u8 sta_id)
  161. {
  162. return -EOPNOTSUPP;
  163. }
  164. static int iwl3945_clear_sta_key_info(struct iwl_priv *priv, u8 sta_id)
  165. {
  166. unsigned long flags;
  167. struct iwl_addsta_cmd sta_cmd;
  168. spin_lock_irqsave(&priv->sta_lock, flags);
  169. memset(&priv->stations[sta_id].keyinfo, 0, sizeof(struct iwl_hw_key));
  170. memset(&priv->stations[sta_id].sta.key, 0,
  171. sizeof(struct iwl4965_keyinfo));
  172. priv->stations[sta_id].sta.key.key_flags = STA_KEY_FLG_NO_ENC;
  173. priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
  174. priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
  175. memcpy(&sta_cmd, &priv->stations[sta_id].sta, sizeof(struct iwl_addsta_cmd));
  176. spin_unlock_irqrestore(&priv->sta_lock, flags);
  177. IWL_DEBUG_INFO(priv, "hwcrypto: clear ucode station key info\n");
  178. return iwl_send_add_sta(priv, &sta_cmd, CMD_SYNC);
  179. }
  180. static int iwl3945_set_dynamic_key(struct iwl_priv *priv,
  181. struct ieee80211_key_conf *keyconf, u8 sta_id)
  182. {
  183. int ret = 0;
  184. keyconf->hw_key_idx = HW_KEY_DYNAMIC;
  185. switch (keyconf->alg) {
  186. case ALG_CCMP:
  187. ret = iwl3945_set_ccmp_dynamic_key_info(priv, keyconf, sta_id);
  188. break;
  189. case ALG_TKIP:
  190. ret = iwl3945_set_tkip_dynamic_key_info(priv, keyconf, sta_id);
  191. break;
  192. case ALG_WEP:
  193. ret = iwl3945_set_wep_dynamic_key_info(priv, keyconf, sta_id);
  194. break;
  195. default:
  196. IWL_ERR(priv, "Unknown alg: %s alg = %d\n", __func__, keyconf->alg);
  197. ret = -EINVAL;
  198. }
  199. IWL_DEBUG_WEP(priv, "Set dynamic key: alg= %d len=%d idx=%d sta=%d ret=%d\n",
  200. keyconf->alg, keyconf->keylen, keyconf->keyidx,
  201. sta_id, ret);
  202. return ret;
  203. }
  204. static int iwl3945_remove_static_key(struct iwl_priv *priv)
  205. {
  206. int ret = -EOPNOTSUPP;
  207. return ret;
  208. }
  209. static int iwl3945_set_static_key(struct iwl_priv *priv,
  210. struct ieee80211_key_conf *key)
  211. {
  212. if (key->alg == ALG_WEP)
  213. return -EOPNOTSUPP;
  214. IWL_ERR(priv, "Static key invalid: alg %d\n", key->alg);
  215. return -EINVAL;
  216. }
  217. static void iwl3945_clear_free_frames(struct iwl_priv *priv)
  218. {
  219. struct list_head *element;
  220. IWL_DEBUG_INFO(priv, "%d frames on pre-allocated heap on clear.\n",
  221. priv->frames_count);
  222. while (!list_empty(&priv->free_frames)) {
  223. element = priv->free_frames.next;
  224. list_del(element);
  225. kfree(list_entry(element, struct iwl3945_frame, list));
  226. priv->frames_count--;
  227. }
  228. if (priv->frames_count) {
  229. IWL_WARN(priv, "%d frames still in use. Did we lose one?\n",
  230. priv->frames_count);
  231. priv->frames_count = 0;
  232. }
  233. }
  234. static struct iwl3945_frame *iwl3945_get_free_frame(struct iwl_priv *priv)
  235. {
  236. struct iwl3945_frame *frame;
  237. struct list_head *element;
  238. if (list_empty(&priv->free_frames)) {
  239. frame = kzalloc(sizeof(*frame), GFP_KERNEL);
  240. if (!frame) {
  241. IWL_ERR(priv, "Could not allocate frame!\n");
  242. return NULL;
  243. }
  244. priv->frames_count++;
  245. return frame;
  246. }
  247. element = priv->free_frames.next;
  248. list_del(element);
  249. return list_entry(element, struct iwl3945_frame, list);
  250. }
  251. static void iwl3945_free_frame(struct iwl_priv *priv, struct iwl3945_frame *frame)
  252. {
  253. memset(frame, 0, sizeof(*frame));
  254. list_add(&frame->list, &priv->free_frames);
  255. }
  256. unsigned int iwl3945_fill_beacon_frame(struct iwl_priv *priv,
  257. struct ieee80211_hdr *hdr,
  258. int left)
  259. {
  260. if (!iwl_is_associated(priv) || !priv->ibss_beacon ||
  261. ((priv->iw_mode != NL80211_IFTYPE_ADHOC) &&
  262. (priv->iw_mode != NL80211_IFTYPE_AP)))
  263. return 0;
  264. if (priv->ibss_beacon->len > left)
  265. return 0;
  266. memcpy(hdr, priv->ibss_beacon->data, priv->ibss_beacon->len);
  267. return priv->ibss_beacon->len;
  268. }
  269. static int iwl3945_send_beacon_cmd(struct iwl_priv *priv)
  270. {
  271. struct iwl3945_frame *frame;
  272. unsigned int frame_size;
  273. int rc;
  274. u8 rate;
  275. frame = iwl3945_get_free_frame(priv);
  276. if (!frame) {
  277. IWL_ERR(priv, "Could not obtain free frame buffer for beacon "
  278. "command.\n");
  279. return -ENOMEM;
  280. }
  281. rate = iwl_rate_get_lowest_plcp(priv);
  282. frame_size = iwl3945_hw_get_beacon_cmd(priv, frame, rate);
  283. rc = iwl_send_cmd_pdu(priv, REPLY_TX_BEACON, frame_size,
  284. &frame->u.cmd[0]);
  285. iwl3945_free_frame(priv, frame);
  286. return rc;
  287. }
  288. static void iwl3945_unset_hw_params(struct iwl_priv *priv)
  289. {
  290. if (priv->_3945.shared_virt)
  291. dma_free_coherent(&priv->pci_dev->dev,
  292. sizeof(struct iwl3945_shared),
  293. priv->_3945.shared_virt,
  294. priv->_3945.shared_phys);
  295. }
  296. static void iwl3945_build_tx_cmd_hwcrypto(struct iwl_priv *priv,
  297. struct ieee80211_tx_info *info,
  298. struct iwl_device_cmd *cmd,
  299. struct sk_buff *skb_frag,
  300. int sta_id)
  301. {
  302. struct iwl3945_tx_cmd *tx_cmd = (struct iwl3945_tx_cmd *)cmd->cmd.payload;
  303. struct iwl_hw_key *keyinfo = &priv->stations[sta_id].keyinfo;
  304. switch (keyinfo->alg) {
  305. case ALG_CCMP:
  306. tx_cmd->sec_ctl = TX_CMD_SEC_CCM;
  307. memcpy(tx_cmd->key, keyinfo->key, keyinfo->keylen);
  308. IWL_DEBUG_TX(priv, "tx_cmd with AES hwcrypto\n");
  309. break;
  310. case ALG_TKIP:
  311. break;
  312. case ALG_WEP:
  313. tx_cmd->sec_ctl = TX_CMD_SEC_WEP |
  314. (info->control.hw_key->hw_key_idx & TX_CMD_SEC_MSK) << TX_CMD_SEC_SHIFT;
  315. if (keyinfo->keylen == 13)
  316. tx_cmd->sec_ctl |= TX_CMD_SEC_KEY128;
  317. memcpy(&tx_cmd->key[3], keyinfo->key, keyinfo->keylen);
  318. IWL_DEBUG_TX(priv, "Configuring packet for WEP encryption "
  319. "with key %d\n", info->control.hw_key->hw_key_idx);
  320. break;
  321. default:
  322. IWL_ERR(priv, "Unknown encode alg %d\n", keyinfo->alg);
  323. break;
  324. }
  325. }
  326. /*
  327. * handle build REPLY_TX command notification.
  328. */
  329. static void iwl3945_build_tx_cmd_basic(struct iwl_priv *priv,
  330. struct iwl_device_cmd *cmd,
  331. struct ieee80211_tx_info *info,
  332. struct ieee80211_hdr *hdr, u8 std_id)
  333. {
  334. struct iwl3945_tx_cmd *tx_cmd = (struct iwl3945_tx_cmd *)cmd->cmd.payload;
  335. __le32 tx_flags = tx_cmd->tx_flags;
  336. __le16 fc = hdr->frame_control;
  337. tx_cmd->stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
  338. if (!(info->flags & IEEE80211_TX_CTL_NO_ACK)) {
  339. tx_flags |= TX_CMD_FLG_ACK_MSK;
  340. if (ieee80211_is_mgmt(fc))
  341. tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
  342. if (ieee80211_is_probe_resp(fc) &&
  343. !(le16_to_cpu(hdr->seq_ctrl) & 0xf))
  344. tx_flags |= TX_CMD_FLG_TSF_MSK;
  345. } else {
  346. tx_flags &= (~TX_CMD_FLG_ACK_MSK);
  347. tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
  348. }
  349. tx_cmd->sta_id = std_id;
  350. if (ieee80211_has_morefrags(fc))
  351. tx_flags |= TX_CMD_FLG_MORE_FRAG_MSK;
  352. if (ieee80211_is_data_qos(fc)) {
  353. u8 *qc = ieee80211_get_qos_ctl(hdr);
  354. tx_cmd->tid_tspec = qc[0] & 0xf;
  355. tx_flags &= ~TX_CMD_FLG_SEQ_CTL_MSK;
  356. } else {
  357. tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
  358. }
  359. priv->cfg->ops->utils->rts_tx_cmd_flag(info, &tx_flags);
  360. if ((tx_flags & TX_CMD_FLG_RTS_MSK) || (tx_flags & TX_CMD_FLG_CTS_MSK))
  361. tx_flags |= TX_CMD_FLG_FULL_TXOP_PROT_MSK;
  362. tx_flags &= ~(TX_CMD_FLG_ANT_SEL_MSK);
  363. if (ieee80211_is_mgmt(fc)) {
  364. if (ieee80211_is_assoc_req(fc) || ieee80211_is_reassoc_req(fc))
  365. tx_cmd->timeout.pm_frame_timeout = cpu_to_le16(3);
  366. else
  367. tx_cmd->timeout.pm_frame_timeout = cpu_to_le16(2);
  368. } else {
  369. tx_cmd->timeout.pm_frame_timeout = 0;
  370. }
  371. tx_cmd->driver_txop = 0;
  372. tx_cmd->tx_flags = tx_flags;
  373. tx_cmd->next_frame_len = 0;
  374. }
  375. /*
  376. * start REPLY_TX command process
  377. */
  378. static int iwl3945_tx_skb(struct iwl_priv *priv, struct sk_buff *skb)
  379. {
  380. struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
  381. struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
  382. struct iwl3945_tx_cmd *tx_cmd;
  383. struct iwl_tx_queue *txq = NULL;
  384. struct iwl_queue *q = NULL;
  385. struct iwl_device_cmd *out_cmd;
  386. struct iwl_cmd_meta *out_meta;
  387. dma_addr_t phys_addr;
  388. dma_addr_t txcmd_phys;
  389. int txq_id = skb_get_queue_mapping(skb);
  390. u16 len, idx, len_org, hdr_len; /* TODO: len_org is not used */
  391. u8 id;
  392. u8 unicast;
  393. u8 sta_id;
  394. u8 tid = 0;
  395. __le16 fc;
  396. u8 wait_write_ptr = 0;
  397. unsigned long flags;
  398. spin_lock_irqsave(&priv->lock, flags);
  399. if (iwl_is_rfkill(priv)) {
  400. IWL_DEBUG_DROP(priv, "Dropping - RF KILL\n");
  401. goto drop_unlock;
  402. }
  403. if ((ieee80211_get_tx_rate(priv->hw, info)->hw_value & 0xFF) == IWL_INVALID_RATE) {
  404. IWL_ERR(priv, "ERROR: No TX rate available.\n");
  405. goto drop_unlock;
  406. }
  407. unicast = !is_multicast_ether_addr(hdr->addr1);
  408. id = 0;
  409. fc = hdr->frame_control;
  410. #ifdef CONFIG_IWLWIFI_DEBUG
  411. if (ieee80211_is_auth(fc))
  412. IWL_DEBUG_TX(priv, "Sending AUTH frame\n");
  413. else if (ieee80211_is_assoc_req(fc))
  414. IWL_DEBUG_TX(priv, "Sending ASSOC frame\n");
  415. else if (ieee80211_is_reassoc_req(fc))
  416. IWL_DEBUG_TX(priv, "Sending REASSOC frame\n");
  417. #endif
  418. spin_unlock_irqrestore(&priv->lock, flags);
  419. hdr_len = ieee80211_hdrlen(fc);
  420. /* Find index into station table for destination station */
  421. sta_id = iwl_sta_id_or_broadcast(priv, info->control.sta);
  422. if (sta_id == IWL_INVALID_STATION) {
  423. IWL_DEBUG_DROP(priv, "Dropping - INVALID STATION: %pM\n",
  424. hdr->addr1);
  425. goto drop;
  426. }
  427. IWL_DEBUG_RATE(priv, "station Id %d\n", sta_id);
  428. if (ieee80211_is_data_qos(fc)) {
  429. u8 *qc = ieee80211_get_qos_ctl(hdr);
  430. tid = qc[0] & IEEE80211_QOS_CTL_TID_MASK;
  431. if (unlikely(tid >= MAX_TID_COUNT))
  432. goto drop;
  433. }
  434. /* Descriptor for chosen Tx queue */
  435. txq = &priv->txq[txq_id];
  436. q = &txq->q;
  437. if ((iwl_queue_space(q) < q->high_mark))
  438. goto drop;
  439. spin_lock_irqsave(&priv->lock, flags);
  440. idx = get_cmd_index(q, q->write_ptr, 0);
  441. /* Set up driver data for this TFD */
  442. memset(&(txq->txb[q->write_ptr]), 0, sizeof(struct iwl_tx_info));
  443. txq->txb[q->write_ptr].skb[0] = skb;
  444. /* Init first empty entry in queue's array of Tx/cmd buffers */
  445. out_cmd = txq->cmd[idx];
  446. out_meta = &txq->meta[idx];
  447. tx_cmd = (struct iwl3945_tx_cmd *)out_cmd->cmd.payload;
  448. memset(&out_cmd->hdr, 0, sizeof(out_cmd->hdr));
  449. memset(tx_cmd, 0, sizeof(*tx_cmd));
  450. /*
  451. * Set up the Tx-command (not MAC!) header.
  452. * Store the chosen Tx queue and TFD index within the sequence field;
  453. * after Tx, uCode's Tx response will return this value so driver can
  454. * locate the frame within the tx queue and do post-tx processing.
  455. */
  456. out_cmd->hdr.cmd = REPLY_TX;
  457. out_cmd->hdr.sequence = cpu_to_le16((u16)(QUEUE_TO_SEQ(txq_id) |
  458. INDEX_TO_SEQ(q->write_ptr)));
  459. /* Copy MAC header from skb into command buffer */
  460. memcpy(tx_cmd->hdr, hdr, hdr_len);
  461. if (info->control.hw_key)
  462. iwl3945_build_tx_cmd_hwcrypto(priv, info, out_cmd, skb, sta_id);
  463. /* TODO need this for burst mode later on */
  464. iwl3945_build_tx_cmd_basic(priv, out_cmd, info, hdr, sta_id);
  465. /* set is_hcca to 0; it probably will never be implemented */
  466. iwl3945_hw_build_tx_cmd_rate(priv, out_cmd, info, hdr, sta_id, 0);
  467. /* Total # bytes to be transmitted */
  468. len = (u16)skb->len;
  469. tx_cmd->len = cpu_to_le16(len);
  470. iwl_dbg_log_tx_data_frame(priv, len, hdr);
  471. iwl_update_stats(priv, true, fc, len);
  472. tx_cmd->tx_flags &= ~TX_CMD_FLG_ANT_A_MSK;
  473. tx_cmd->tx_flags &= ~TX_CMD_FLG_ANT_B_MSK;
  474. if (!ieee80211_has_morefrags(hdr->frame_control)) {
  475. txq->need_update = 1;
  476. } else {
  477. wait_write_ptr = 1;
  478. txq->need_update = 0;
  479. }
  480. IWL_DEBUG_TX(priv, "sequence nr = 0X%x\n",
  481. le16_to_cpu(out_cmd->hdr.sequence));
  482. IWL_DEBUG_TX(priv, "tx_flags = 0X%x\n", le32_to_cpu(tx_cmd->tx_flags));
  483. iwl_print_hex_dump(priv, IWL_DL_TX, tx_cmd, sizeof(*tx_cmd));
  484. iwl_print_hex_dump(priv, IWL_DL_TX, (u8 *)tx_cmd->hdr,
  485. ieee80211_hdrlen(fc));
  486. /*
  487. * Use the first empty entry in this queue's command buffer array
  488. * to contain the Tx command and MAC header concatenated together
  489. * (payload data will be in another buffer).
  490. * Size of this varies, due to varying MAC header length.
  491. * If end is not dword aligned, we'll have 2 extra bytes at the end
  492. * of the MAC header (device reads on dword boundaries).
  493. * We'll tell device about this padding later.
  494. */
  495. len = sizeof(struct iwl3945_tx_cmd) +
  496. sizeof(struct iwl_cmd_header) + hdr_len;
  497. len_org = len;
  498. len = (len + 3) & ~3;
  499. if (len_org != len)
  500. len_org = 1;
  501. else
  502. len_org = 0;
  503. /* Physical address of this Tx command's header (not MAC header!),
  504. * within command buffer array. */
  505. txcmd_phys = pci_map_single(priv->pci_dev, &out_cmd->hdr,
  506. len, PCI_DMA_TODEVICE);
  507. /* we do not map meta data ... so we can safely access address to
  508. * provide to unmap command*/
  509. dma_unmap_addr_set(out_meta, mapping, txcmd_phys);
  510. dma_unmap_len_set(out_meta, len, len);
  511. /* Add buffer containing Tx command and MAC(!) header to TFD's
  512. * first entry */
  513. priv->cfg->ops->lib->txq_attach_buf_to_tfd(priv, txq,
  514. txcmd_phys, len, 1, 0);
  515. /* Set up TFD's 2nd entry to point directly to remainder of skb,
  516. * if any (802.11 null frames have no payload). */
  517. len = skb->len - hdr_len;
  518. if (len) {
  519. phys_addr = pci_map_single(priv->pci_dev, skb->data + hdr_len,
  520. len, PCI_DMA_TODEVICE);
  521. priv->cfg->ops->lib->txq_attach_buf_to_tfd(priv, txq,
  522. phys_addr, len,
  523. 0, U32_PAD(len));
  524. }
  525. /* Tell device the write index *just past* this latest filled TFD */
  526. q->write_ptr = iwl_queue_inc_wrap(q->write_ptr, q->n_bd);
  527. iwl_txq_update_write_ptr(priv, txq);
  528. spin_unlock_irqrestore(&priv->lock, flags);
  529. if ((iwl_queue_space(q) < q->high_mark)
  530. && priv->mac80211_registered) {
  531. if (wait_write_ptr) {
  532. spin_lock_irqsave(&priv->lock, flags);
  533. txq->need_update = 1;
  534. iwl_txq_update_write_ptr(priv, txq);
  535. spin_unlock_irqrestore(&priv->lock, flags);
  536. }
  537. iwl_stop_queue(priv, skb_get_queue_mapping(skb));
  538. }
  539. return 0;
  540. drop_unlock:
  541. spin_unlock_irqrestore(&priv->lock, flags);
  542. drop:
  543. return -1;
  544. }
  545. #define BEACON_TIME_MASK_LOW 0x00FFFFFF
  546. #define BEACON_TIME_MASK_HIGH 0xFF000000
  547. #define TIME_UNIT 1024
  548. /*
  549. * extended beacon time format
  550. * time in usec will be changed into a 32-bit value in 8:24 format
  551. * the high 1 byte is the beacon counts
  552. * the lower 3 bytes is the time in usec within one beacon interval
  553. */
  554. static u32 iwl3945_usecs_to_beacons(u32 usec, u32 beacon_interval)
  555. {
  556. u32 quot;
  557. u32 rem;
  558. u32 interval = beacon_interval * 1024;
  559. if (!interval || !usec)
  560. return 0;
  561. quot = (usec / interval) & (BEACON_TIME_MASK_HIGH >> 24);
  562. rem = (usec % interval) & BEACON_TIME_MASK_LOW;
  563. return (quot << 24) + rem;
  564. }
  565. /* base is usually what we get from ucode with each received frame,
  566. * the same as HW timer counter counting down
  567. */
  568. static __le32 iwl3945_add_beacon_time(u32 base, u32 addon, u32 beacon_interval)
  569. {
  570. u32 base_low = base & BEACON_TIME_MASK_LOW;
  571. u32 addon_low = addon & BEACON_TIME_MASK_LOW;
  572. u32 interval = beacon_interval * TIME_UNIT;
  573. u32 res = (base & BEACON_TIME_MASK_HIGH) +
  574. (addon & BEACON_TIME_MASK_HIGH);
  575. if (base_low > addon_low)
  576. res += base_low - addon_low;
  577. else if (base_low < addon_low) {
  578. res += interval + base_low - addon_low;
  579. res += (1 << 24);
  580. } else
  581. res += (1 << 24);
  582. return cpu_to_le32(res);
  583. }
  584. static int iwl3945_get_measurement(struct iwl_priv *priv,
  585. struct ieee80211_measurement_params *params,
  586. u8 type)
  587. {
  588. struct iwl_spectrum_cmd spectrum;
  589. struct iwl_rx_packet *pkt;
  590. struct iwl_host_cmd cmd = {
  591. .id = REPLY_SPECTRUM_MEASUREMENT_CMD,
  592. .data = (void *)&spectrum,
  593. .flags = CMD_WANT_SKB,
  594. };
  595. u32 add_time = le64_to_cpu(params->start_time);
  596. int rc;
  597. int spectrum_resp_status;
  598. int duration = le16_to_cpu(params->duration);
  599. if (iwl_is_associated(priv))
  600. add_time =
  601. iwl3945_usecs_to_beacons(
  602. le64_to_cpu(params->start_time) - priv->_3945.last_tsf,
  603. le16_to_cpu(priv->rxon_timing.beacon_interval));
  604. memset(&spectrum, 0, sizeof(spectrum));
  605. spectrum.channel_count = cpu_to_le16(1);
  606. spectrum.flags =
  607. RXON_FLG_TSF2HOST_MSK | RXON_FLG_ANT_A_MSK | RXON_FLG_DIS_DIV_MSK;
  608. spectrum.filter_flags = MEASUREMENT_FILTER_FLAG;
  609. cmd.len = sizeof(spectrum);
  610. spectrum.len = cpu_to_le16(cmd.len - sizeof(spectrum.len));
  611. if (iwl_is_associated(priv))
  612. spectrum.start_time =
  613. iwl3945_add_beacon_time(priv->_3945.last_beacon_time,
  614. add_time,
  615. le16_to_cpu(priv->rxon_timing.beacon_interval));
  616. else
  617. spectrum.start_time = 0;
  618. spectrum.channels[0].duration = cpu_to_le32(duration * TIME_UNIT);
  619. spectrum.channels[0].channel = params->channel;
  620. spectrum.channels[0].type = type;
  621. if (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK)
  622. spectrum.flags |= RXON_FLG_BAND_24G_MSK |
  623. RXON_FLG_AUTO_DETECT_MSK | RXON_FLG_TGG_PROTECT_MSK;
  624. rc = iwl_send_cmd_sync(priv, &cmd);
  625. if (rc)
  626. return rc;
  627. pkt = (struct iwl_rx_packet *)cmd.reply_page;
  628. if (pkt->hdr.flags & IWL_CMD_FAILED_MSK) {
  629. IWL_ERR(priv, "Bad return from REPLY_RX_ON_ASSOC command\n");
  630. rc = -EIO;
  631. }
  632. spectrum_resp_status = le16_to_cpu(pkt->u.spectrum.status);
  633. switch (spectrum_resp_status) {
  634. case 0: /* Command will be handled */
  635. if (pkt->u.spectrum.id != 0xff) {
  636. IWL_DEBUG_INFO(priv, "Replaced existing measurement: %d\n",
  637. pkt->u.spectrum.id);
  638. priv->measurement_status &= ~MEASUREMENT_READY;
  639. }
  640. priv->measurement_status |= MEASUREMENT_ACTIVE;
  641. rc = 0;
  642. break;
  643. case 1: /* Command will not be handled */
  644. rc = -EAGAIN;
  645. break;
  646. }
  647. iwl_free_pages(priv, cmd.reply_page);
  648. return rc;
  649. }
  650. static void iwl3945_rx_reply_alive(struct iwl_priv *priv,
  651. struct iwl_rx_mem_buffer *rxb)
  652. {
  653. struct iwl_rx_packet *pkt = rxb_addr(rxb);
  654. struct iwl_alive_resp *palive;
  655. struct delayed_work *pwork;
  656. palive = &pkt->u.alive_frame;
  657. IWL_DEBUG_INFO(priv, "Alive ucode status 0x%08X revision "
  658. "0x%01X 0x%01X\n",
  659. palive->is_valid, palive->ver_type,
  660. palive->ver_subtype);
  661. if (palive->ver_subtype == INITIALIZE_SUBTYPE) {
  662. IWL_DEBUG_INFO(priv, "Initialization Alive received.\n");
  663. memcpy(&priv->card_alive_init, &pkt->u.alive_frame,
  664. sizeof(struct iwl_alive_resp));
  665. pwork = &priv->init_alive_start;
  666. } else {
  667. IWL_DEBUG_INFO(priv, "Runtime Alive received.\n");
  668. memcpy(&priv->card_alive, &pkt->u.alive_frame,
  669. sizeof(struct iwl_alive_resp));
  670. pwork = &priv->alive_start;
  671. iwl3945_disable_events(priv);
  672. }
  673. /* We delay the ALIVE response by 5ms to
  674. * give the HW RF Kill time to activate... */
  675. if (palive->is_valid == UCODE_VALID_OK)
  676. queue_delayed_work(priv->workqueue, pwork,
  677. msecs_to_jiffies(5));
  678. else
  679. IWL_WARN(priv, "uCode did not respond OK.\n");
  680. }
  681. static void iwl3945_rx_reply_add_sta(struct iwl_priv *priv,
  682. struct iwl_rx_mem_buffer *rxb)
  683. {
  684. #ifdef CONFIG_IWLWIFI_DEBUG
  685. struct iwl_rx_packet *pkt = rxb_addr(rxb);
  686. #endif
  687. IWL_DEBUG_RX(priv, "Received REPLY_ADD_STA: 0x%02X\n", pkt->u.status);
  688. }
  689. static void iwl3945_bg_beacon_update(struct work_struct *work)
  690. {
  691. struct iwl_priv *priv =
  692. container_of(work, struct iwl_priv, beacon_update);
  693. struct sk_buff *beacon;
  694. /* Pull updated AP beacon from mac80211. will fail if not in AP mode */
  695. beacon = ieee80211_beacon_get(priv->hw, priv->vif);
  696. if (!beacon) {
  697. IWL_ERR(priv, "update beacon failed\n");
  698. return;
  699. }
  700. mutex_lock(&priv->mutex);
  701. /* new beacon skb is allocated every time; dispose previous.*/
  702. if (priv->ibss_beacon)
  703. dev_kfree_skb(priv->ibss_beacon);
  704. priv->ibss_beacon = beacon;
  705. mutex_unlock(&priv->mutex);
  706. iwl3945_send_beacon_cmd(priv);
  707. }
  708. static void iwl3945_rx_beacon_notif(struct iwl_priv *priv,
  709. struct iwl_rx_mem_buffer *rxb)
  710. {
  711. #ifdef CONFIG_IWLWIFI_DEBUG
  712. struct iwl_rx_packet *pkt = rxb_addr(rxb);
  713. struct iwl3945_beacon_notif *beacon = &(pkt->u.beacon_status);
  714. u8 rate = beacon->beacon_notify_hdr.rate;
  715. IWL_DEBUG_RX(priv, "beacon status %x retries %d iss %d "
  716. "tsf %d %d rate %d\n",
  717. le32_to_cpu(beacon->beacon_notify_hdr.status) & TX_STATUS_MSK,
  718. beacon->beacon_notify_hdr.failure_frame,
  719. le32_to_cpu(beacon->ibss_mgr_status),
  720. le32_to_cpu(beacon->high_tsf),
  721. le32_to_cpu(beacon->low_tsf), rate);
  722. #endif
  723. if ((priv->iw_mode == NL80211_IFTYPE_AP) &&
  724. (!test_bit(STATUS_EXIT_PENDING, &priv->status)))
  725. queue_work(priv->workqueue, &priv->beacon_update);
  726. }
  727. /* Handle notification from uCode that card's power state is changing
  728. * due to software, hardware, or critical temperature RFKILL */
  729. static void iwl3945_rx_card_state_notif(struct iwl_priv *priv,
  730. struct iwl_rx_mem_buffer *rxb)
  731. {
  732. struct iwl_rx_packet *pkt = rxb_addr(rxb);
  733. u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags);
  734. unsigned long status = priv->status;
  735. IWL_WARN(priv, "Card state received: HW:%s SW:%s\n",
  736. (flags & HW_CARD_DISABLED) ? "Kill" : "On",
  737. (flags & SW_CARD_DISABLED) ? "Kill" : "On");
  738. iwl_write32(priv, CSR_UCODE_DRV_GP1_SET,
  739. CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
  740. if (flags & HW_CARD_DISABLED)
  741. set_bit(STATUS_RF_KILL_HW, &priv->status);
  742. else
  743. clear_bit(STATUS_RF_KILL_HW, &priv->status);
  744. iwl_scan_cancel(priv);
  745. if ((test_bit(STATUS_RF_KILL_HW, &status) !=
  746. test_bit(STATUS_RF_KILL_HW, &priv->status)))
  747. wiphy_rfkill_set_hw_state(priv->hw->wiphy,
  748. test_bit(STATUS_RF_KILL_HW, &priv->status));
  749. else
  750. wake_up_interruptible(&priv->wait_command_queue);
  751. }
  752. /**
  753. * iwl3945_setup_rx_handlers - Initialize Rx handler callbacks
  754. *
  755. * Setup the RX handlers for each of the reply types sent from the uCode
  756. * to the host.
  757. *
  758. * This function chains into the hardware specific files for them to setup
  759. * any hardware specific handlers as well.
  760. */
  761. static void iwl3945_setup_rx_handlers(struct iwl_priv *priv)
  762. {
  763. priv->rx_handlers[REPLY_ALIVE] = iwl3945_rx_reply_alive;
  764. priv->rx_handlers[REPLY_ADD_STA] = iwl3945_rx_reply_add_sta;
  765. priv->rx_handlers[REPLY_ERROR] = iwl_rx_reply_error;
  766. priv->rx_handlers[CHANNEL_SWITCH_NOTIFICATION] = iwl_rx_csa;
  767. priv->rx_handlers[SPECTRUM_MEASURE_NOTIFICATION] =
  768. iwl_rx_spectrum_measure_notif;
  769. priv->rx_handlers[PM_SLEEP_NOTIFICATION] = iwl_rx_pm_sleep_notif;
  770. priv->rx_handlers[PM_DEBUG_STATISTIC_NOTIFIC] =
  771. iwl_rx_pm_debug_statistics_notif;
  772. priv->rx_handlers[BEACON_NOTIFICATION] = iwl3945_rx_beacon_notif;
  773. /*
  774. * The same handler is used for both the REPLY to a discrete
  775. * statistics request from the host as well as for the periodic
  776. * statistics notifications (after received beacons) from the uCode.
  777. */
  778. priv->rx_handlers[REPLY_STATISTICS_CMD] = iwl3945_reply_statistics;
  779. priv->rx_handlers[STATISTICS_NOTIFICATION] = iwl3945_hw_rx_statistics;
  780. iwl_setup_rx_scan_handlers(priv);
  781. priv->rx_handlers[CARD_STATE_NOTIFICATION] = iwl3945_rx_card_state_notif;
  782. /* Set up hardware specific Rx handlers */
  783. iwl3945_hw_rx_handler_setup(priv);
  784. }
  785. /************************** RX-FUNCTIONS ****************************/
  786. /*
  787. * Rx theory of operation
  788. *
  789. * The host allocates 32 DMA target addresses and passes the host address
  790. * to the firmware at register IWL_RFDS_TABLE_LOWER + N * RFD_SIZE where N is
  791. * 0 to 31
  792. *
  793. * Rx Queue Indexes
  794. * The host/firmware share two index registers for managing the Rx buffers.
  795. *
  796. * The READ index maps to the first position that the firmware may be writing
  797. * to -- the driver can read up to (but not including) this position and get
  798. * good data.
  799. * The READ index is managed by the firmware once the card is enabled.
  800. *
  801. * The WRITE index maps to the last position the driver has read from -- the
  802. * position preceding WRITE is the last slot the firmware can place a packet.
  803. *
  804. * The queue is empty (no good data) if WRITE = READ - 1, and is full if
  805. * WRITE = READ.
  806. *
  807. * During initialization, the host sets up the READ queue position to the first
  808. * INDEX position, and WRITE to the last (READ - 1 wrapped)
  809. *
  810. * When the firmware places a packet in a buffer, it will advance the READ index
  811. * and fire the RX interrupt. The driver can then query the READ index and
  812. * process as many packets as possible, moving the WRITE index forward as it
  813. * resets the Rx queue buffers with new memory.
  814. *
  815. * The management in the driver is as follows:
  816. * + A list of pre-allocated SKBs is stored in iwl->rxq->rx_free. When
  817. * iwl->rxq->free_count drops to or below RX_LOW_WATERMARK, work is scheduled
  818. * to replenish the iwl->rxq->rx_free.
  819. * + In iwl3945_rx_replenish (scheduled) if 'processed' != 'read' then the
  820. * iwl->rxq is replenished and the READ INDEX is updated (updating the
  821. * 'processed' and 'read' driver indexes as well)
  822. * + A received packet is processed and handed to the kernel network stack,
  823. * detached from the iwl->rxq. The driver 'processed' index is updated.
  824. * + The Host/Firmware iwl->rxq is replenished at tasklet time from the rx_free
  825. * list. If there are no allocated buffers in iwl->rxq->rx_free, the READ
  826. * INDEX is not incremented and iwl->status(RX_STALLED) is set. If there
  827. * were enough free buffers and RX_STALLED is set it is cleared.
  828. *
  829. *
  830. * Driver sequence:
  831. *
  832. * iwl3945_rx_replenish() Replenishes rx_free list from rx_used, and calls
  833. * iwl3945_rx_queue_restock
  834. * iwl3945_rx_queue_restock() Moves available buffers from rx_free into Rx
  835. * queue, updates firmware pointers, and updates
  836. * the WRITE index. If insufficient rx_free buffers
  837. * are available, schedules iwl3945_rx_replenish
  838. *
  839. * -- enable interrupts --
  840. * ISR - iwl3945_rx() Detach iwl_rx_mem_buffers from pool up to the
  841. * READ INDEX, detaching the SKB from the pool.
  842. * Moves the packet buffer from queue to rx_used.
  843. * Calls iwl3945_rx_queue_restock to refill any empty
  844. * slots.
  845. * ...
  846. *
  847. */
  848. /**
  849. * iwl3945_dma_addr2rbd_ptr - convert a DMA address to a uCode read buffer ptr
  850. */
  851. static inline __le32 iwl3945_dma_addr2rbd_ptr(struct iwl_priv *priv,
  852. dma_addr_t dma_addr)
  853. {
  854. return cpu_to_le32((u32)dma_addr);
  855. }
  856. /**
  857. * iwl3945_rx_queue_restock - refill RX queue from pre-allocated pool
  858. *
  859. * If there are slots in the RX queue that need to be restocked,
  860. * and we have free pre-allocated buffers, fill the ranks as much
  861. * as we can, pulling from rx_free.
  862. *
  863. * This moves the 'write' index forward to catch up with 'processed', and
  864. * also updates the memory address in the firmware to reference the new
  865. * target buffer.
  866. */
  867. static void iwl3945_rx_queue_restock(struct iwl_priv *priv)
  868. {
  869. struct iwl_rx_queue *rxq = &priv->rxq;
  870. struct list_head *element;
  871. struct iwl_rx_mem_buffer *rxb;
  872. unsigned long flags;
  873. int write;
  874. spin_lock_irqsave(&rxq->lock, flags);
  875. write = rxq->write & ~0x7;
  876. while ((iwl_rx_queue_space(rxq) > 0) && (rxq->free_count)) {
  877. /* Get next free Rx buffer, remove from free list */
  878. element = rxq->rx_free.next;
  879. rxb = list_entry(element, struct iwl_rx_mem_buffer, list);
  880. list_del(element);
  881. /* Point to Rx buffer via next RBD in circular buffer */
  882. rxq->bd[rxq->write] = iwl3945_dma_addr2rbd_ptr(priv, rxb->page_dma);
  883. rxq->queue[rxq->write] = rxb;
  884. rxq->write = (rxq->write + 1) & RX_QUEUE_MASK;
  885. rxq->free_count--;
  886. }
  887. spin_unlock_irqrestore(&rxq->lock, flags);
  888. /* If the pre-allocated buffer pool is dropping low, schedule to
  889. * refill it */
  890. if (rxq->free_count <= RX_LOW_WATERMARK)
  891. queue_work(priv->workqueue, &priv->rx_replenish);
  892. /* If we've added more space for the firmware to place data, tell it.
  893. * Increment device's write pointer in multiples of 8. */
  894. if ((rxq->write_actual != (rxq->write & ~0x7))
  895. || (abs(rxq->write - rxq->read) > 7)) {
  896. spin_lock_irqsave(&rxq->lock, flags);
  897. rxq->need_update = 1;
  898. spin_unlock_irqrestore(&rxq->lock, flags);
  899. iwl_rx_queue_update_write_ptr(priv, rxq);
  900. }
  901. }
  902. /**
  903. * iwl3945_rx_replenish - Move all used packet from rx_used to rx_free
  904. *
  905. * When moving to rx_free an SKB is allocated for the slot.
  906. *
  907. * Also restock the Rx queue via iwl3945_rx_queue_restock.
  908. * This is called as a scheduled work item (except for during initialization)
  909. */
  910. static void iwl3945_rx_allocate(struct iwl_priv *priv, gfp_t priority)
  911. {
  912. struct iwl_rx_queue *rxq = &priv->rxq;
  913. struct list_head *element;
  914. struct iwl_rx_mem_buffer *rxb;
  915. struct page *page;
  916. unsigned long flags;
  917. gfp_t gfp_mask = priority;
  918. while (1) {
  919. spin_lock_irqsave(&rxq->lock, flags);
  920. if (list_empty(&rxq->rx_used)) {
  921. spin_unlock_irqrestore(&rxq->lock, flags);
  922. return;
  923. }
  924. spin_unlock_irqrestore(&rxq->lock, flags);
  925. if (rxq->free_count > RX_LOW_WATERMARK)
  926. gfp_mask |= __GFP_NOWARN;
  927. if (priv->hw_params.rx_page_order > 0)
  928. gfp_mask |= __GFP_COMP;
  929. /* Alloc a new receive buffer */
  930. page = alloc_pages(gfp_mask, priv->hw_params.rx_page_order);
  931. if (!page) {
  932. if (net_ratelimit())
  933. IWL_DEBUG_INFO(priv, "Failed to allocate SKB buffer.\n");
  934. if ((rxq->free_count <= RX_LOW_WATERMARK) &&
  935. net_ratelimit())
  936. IWL_CRIT(priv, "Failed to allocate SKB buffer with %s. Only %u free buffers remaining.\n",
  937. priority == GFP_ATOMIC ? "GFP_ATOMIC" : "GFP_KERNEL",
  938. rxq->free_count);
  939. /* We don't reschedule replenish work here -- we will
  940. * call the restock method and if it still needs
  941. * more buffers it will schedule replenish */
  942. break;
  943. }
  944. spin_lock_irqsave(&rxq->lock, flags);
  945. if (list_empty(&rxq->rx_used)) {
  946. spin_unlock_irqrestore(&rxq->lock, flags);
  947. __free_pages(page, priv->hw_params.rx_page_order);
  948. return;
  949. }
  950. element = rxq->rx_used.next;
  951. rxb = list_entry(element, struct iwl_rx_mem_buffer, list);
  952. list_del(element);
  953. spin_unlock_irqrestore(&rxq->lock, flags);
  954. rxb->page = page;
  955. /* Get physical address of RB/SKB */
  956. rxb->page_dma = pci_map_page(priv->pci_dev, page, 0,
  957. PAGE_SIZE << priv->hw_params.rx_page_order,
  958. PCI_DMA_FROMDEVICE);
  959. spin_lock_irqsave(&rxq->lock, flags);
  960. list_add_tail(&rxb->list, &rxq->rx_free);
  961. rxq->free_count++;
  962. priv->alloc_rxb_page++;
  963. spin_unlock_irqrestore(&rxq->lock, flags);
  964. }
  965. }
  966. void iwl3945_rx_queue_reset(struct iwl_priv *priv, struct iwl_rx_queue *rxq)
  967. {
  968. unsigned long flags;
  969. int i;
  970. spin_lock_irqsave(&rxq->lock, flags);
  971. INIT_LIST_HEAD(&rxq->rx_free);
  972. INIT_LIST_HEAD(&rxq->rx_used);
  973. /* Fill the rx_used queue with _all_ of the Rx buffers */
  974. for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++) {
  975. /* In the reset function, these buffers may have been allocated
  976. * to an SKB, so we need to unmap and free potential storage */
  977. if (rxq->pool[i].page != NULL) {
  978. pci_unmap_page(priv->pci_dev, rxq->pool[i].page_dma,
  979. PAGE_SIZE << priv->hw_params.rx_page_order,
  980. PCI_DMA_FROMDEVICE);
  981. __iwl_free_pages(priv, rxq->pool[i].page);
  982. rxq->pool[i].page = NULL;
  983. }
  984. list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
  985. }
  986. /* Set us so that we have processed and used all buffers, but have
  987. * not restocked the Rx queue with fresh buffers */
  988. rxq->read = rxq->write = 0;
  989. rxq->write_actual = 0;
  990. rxq->free_count = 0;
  991. spin_unlock_irqrestore(&rxq->lock, flags);
  992. }
  993. void iwl3945_rx_replenish(void *data)
  994. {
  995. struct iwl_priv *priv = data;
  996. unsigned long flags;
  997. iwl3945_rx_allocate(priv, GFP_KERNEL);
  998. spin_lock_irqsave(&priv->lock, flags);
  999. iwl3945_rx_queue_restock(priv);
  1000. spin_unlock_irqrestore(&priv->lock, flags);
  1001. }
  1002. static void iwl3945_rx_replenish_now(struct iwl_priv *priv)
  1003. {
  1004. iwl3945_rx_allocate(priv, GFP_ATOMIC);
  1005. iwl3945_rx_queue_restock(priv);
  1006. }
  1007. /* Assumes that the skb field of the buffers in 'pool' is kept accurate.
  1008. * If an SKB has been detached, the POOL needs to have its SKB set to NULL
  1009. * This free routine walks the list of POOL entries and if SKB is set to
  1010. * non NULL it is unmapped and freed
  1011. */
  1012. static void iwl3945_rx_queue_free(struct iwl_priv *priv, struct iwl_rx_queue *rxq)
  1013. {
  1014. int i;
  1015. for (i = 0; i < RX_QUEUE_SIZE + RX_FREE_BUFFERS; i++) {
  1016. if (rxq->pool[i].page != NULL) {
  1017. pci_unmap_page(priv->pci_dev, rxq->pool[i].page_dma,
  1018. PAGE_SIZE << priv->hw_params.rx_page_order,
  1019. PCI_DMA_FROMDEVICE);
  1020. __iwl_free_pages(priv, rxq->pool[i].page);
  1021. rxq->pool[i].page = NULL;
  1022. }
  1023. }
  1024. dma_free_coherent(&priv->pci_dev->dev, 4 * RX_QUEUE_SIZE, rxq->bd,
  1025. rxq->dma_addr);
  1026. dma_free_coherent(&priv->pci_dev->dev, sizeof(struct iwl_rb_status),
  1027. rxq->rb_stts, rxq->rb_stts_dma);
  1028. rxq->bd = NULL;
  1029. rxq->rb_stts = NULL;
  1030. }
  1031. /* Convert linear signal-to-noise ratio into dB */
  1032. static u8 ratio2dB[100] = {
  1033. /* 0 1 2 3 4 5 6 7 8 9 */
  1034. 0, 0, 6, 10, 12, 14, 16, 17, 18, 19, /* 00 - 09 */
  1035. 20, 21, 22, 22, 23, 23, 24, 25, 26, 26, /* 10 - 19 */
  1036. 26, 26, 26, 27, 27, 28, 28, 28, 29, 29, /* 20 - 29 */
  1037. 29, 30, 30, 30, 31, 31, 31, 31, 32, 32, /* 30 - 39 */
  1038. 32, 32, 32, 33, 33, 33, 33, 33, 34, 34, /* 40 - 49 */
  1039. 34, 34, 34, 34, 35, 35, 35, 35, 35, 35, /* 50 - 59 */
  1040. 36, 36, 36, 36, 36, 36, 36, 37, 37, 37, /* 60 - 69 */
  1041. 37, 37, 37, 37, 37, 38, 38, 38, 38, 38, /* 70 - 79 */
  1042. 38, 38, 38, 38, 38, 39, 39, 39, 39, 39, /* 80 - 89 */
  1043. 39, 39, 39, 39, 39, 40, 40, 40, 40, 40 /* 90 - 99 */
  1044. };
  1045. /* Calculates a relative dB value from a ratio of linear
  1046. * (i.e. not dB) signal levels.
  1047. * Conversion assumes that levels are voltages (20*log), not powers (10*log). */
  1048. int iwl3945_calc_db_from_ratio(int sig_ratio)
  1049. {
  1050. /* 1000:1 or higher just report as 60 dB */
  1051. if (sig_ratio >= 1000)
  1052. return 60;
  1053. /* 100:1 or higher, divide by 10 and use table,
  1054. * add 20 dB to make up for divide by 10 */
  1055. if (sig_ratio >= 100)
  1056. return 20 + (int)ratio2dB[sig_ratio/10];
  1057. /* We shouldn't see this */
  1058. if (sig_ratio < 1)
  1059. return 0;
  1060. /* Use table for ratios 1:1 - 99:1 */
  1061. return (int)ratio2dB[sig_ratio];
  1062. }
  1063. /**
  1064. * iwl3945_rx_handle - Main entry function for receiving responses from uCode
  1065. *
  1066. * Uses the priv->rx_handlers callback function array to invoke
  1067. * the appropriate handlers, including command responses,
  1068. * frame-received notifications, and other notifications.
  1069. */
  1070. static void iwl3945_rx_handle(struct iwl_priv *priv)
  1071. {
  1072. struct iwl_rx_mem_buffer *rxb;
  1073. struct iwl_rx_packet *pkt;
  1074. struct iwl_rx_queue *rxq = &priv->rxq;
  1075. u32 r, i;
  1076. int reclaim;
  1077. unsigned long flags;
  1078. u8 fill_rx = 0;
  1079. u32 count = 8;
  1080. int total_empty = 0;
  1081. /* uCode's read index (stored in shared DRAM) indicates the last Rx
  1082. * buffer that the driver may process (last buffer filled by ucode). */
  1083. r = le16_to_cpu(rxq->rb_stts->closed_rb_num) & 0x0FFF;
  1084. i = rxq->read;
  1085. /* calculate total frames need to be restock after handling RX */
  1086. total_empty = r - rxq->write_actual;
  1087. if (total_empty < 0)
  1088. total_empty += RX_QUEUE_SIZE;
  1089. if (total_empty > (RX_QUEUE_SIZE / 2))
  1090. fill_rx = 1;
  1091. /* Rx interrupt, but nothing sent from uCode */
  1092. if (i == r)
  1093. IWL_DEBUG_RX(priv, "r = %d, i = %d\n", r, i);
  1094. while (i != r) {
  1095. rxb = rxq->queue[i];
  1096. /* If an RXB doesn't have a Rx queue slot associated with it,
  1097. * then a bug has been introduced in the queue refilling
  1098. * routines -- catch it here */
  1099. BUG_ON(rxb == NULL);
  1100. rxq->queue[i] = NULL;
  1101. pci_unmap_page(priv->pci_dev, rxb->page_dma,
  1102. PAGE_SIZE << priv->hw_params.rx_page_order,
  1103. PCI_DMA_FROMDEVICE);
  1104. pkt = rxb_addr(rxb);
  1105. trace_iwlwifi_dev_rx(priv, pkt,
  1106. le32_to_cpu(pkt->len_n_flags) & FH_RSCSR_FRAME_SIZE_MSK);
  1107. /* Reclaim a command buffer only if this packet is a response
  1108. * to a (driver-originated) command.
  1109. * If the packet (e.g. Rx frame) originated from uCode,
  1110. * there is no command buffer to reclaim.
  1111. * Ucode should set SEQ_RX_FRAME bit if ucode-originated,
  1112. * but apparently a few don't get set; catch them here. */
  1113. reclaim = !(pkt->hdr.sequence & SEQ_RX_FRAME) &&
  1114. (pkt->hdr.cmd != STATISTICS_NOTIFICATION) &&
  1115. (pkt->hdr.cmd != REPLY_TX);
  1116. /* Based on type of command response or notification,
  1117. * handle those that need handling via function in
  1118. * rx_handlers table. See iwl3945_setup_rx_handlers() */
  1119. if (priv->rx_handlers[pkt->hdr.cmd]) {
  1120. IWL_DEBUG_RX(priv, "r = %d, i = %d, %s, 0x%02x\n", r, i,
  1121. get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
  1122. priv->isr_stats.rx_handlers[pkt->hdr.cmd]++;
  1123. priv->rx_handlers[pkt->hdr.cmd] (priv, rxb);
  1124. } else {
  1125. /* No handling needed */
  1126. IWL_DEBUG_RX(priv,
  1127. "r %d i %d No handler needed for %s, 0x%02x\n",
  1128. r, i, get_cmd_string(pkt->hdr.cmd),
  1129. pkt->hdr.cmd);
  1130. }
  1131. /*
  1132. * XXX: After here, we should always check rxb->page
  1133. * against NULL before touching it or its virtual
  1134. * memory (pkt). Because some rx_handler might have
  1135. * already taken or freed the pages.
  1136. */
  1137. if (reclaim) {
  1138. /* Invoke any callbacks, transfer the buffer to caller,
  1139. * and fire off the (possibly) blocking iwl_send_cmd()
  1140. * as we reclaim the driver command queue */
  1141. if (rxb->page)
  1142. iwl_tx_cmd_complete(priv, rxb);
  1143. else
  1144. IWL_WARN(priv, "Claim null rxb?\n");
  1145. }
  1146. /* Reuse the page if possible. For notification packets and
  1147. * SKBs that fail to Rx correctly, add them back into the
  1148. * rx_free list for reuse later. */
  1149. spin_lock_irqsave(&rxq->lock, flags);
  1150. if (rxb->page != NULL) {
  1151. rxb->page_dma = pci_map_page(priv->pci_dev, rxb->page,
  1152. 0, PAGE_SIZE << priv->hw_params.rx_page_order,
  1153. PCI_DMA_FROMDEVICE);
  1154. list_add_tail(&rxb->list, &rxq->rx_free);
  1155. rxq->free_count++;
  1156. } else
  1157. list_add_tail(&rxb->list, &rxq->rx_used);
  1158. spin_unlock_irqrestore(&rxq->lock, flags);
  1159. i = (i + 1) & RX_QUEUE_MASK;
  1160. /* If there are a lot of unused frames,
  1161. * restock the Rx queue so ucode won't assert. */
  1162. if (fill_rx) {
  1163. count++;
  1164. if (count >= 8) {
  1165. rxq->read = i;
  1166. iwl3945_rx_replenish_now(priv);
  1167. count = 0;
  1168. }
  1169. }
  1170. }
  1171. /* Backtrack one entry */
  1172. rxq->read = i;
  1173. if (fill_rx)
  1174. iwl3945_rx_replenish_now(priv);
  1175. else
  1176. iwl3945_rx_queue_restock(priv);
  1177. }
  1178. /* call this function to flush any scheduled tasklet */
  1179. static inline void iwl_synchronize_irq(struct iwl_priv *priv)
  1180. {
  1181. /* wait to make sure we flush pending tasklet*/
  1182. synchronize_irq(priv->pci_dev->irq);
  1183. tasklet_kill(&priv->irq_tasklet);
  1184. }
  1185. static const char *desc_lookup(int i)
  1186. {
  1187. switch (i) {
  1188. case 1:
  1189. return "FAIL";
  1190. case 2:
  1191. return "BAD_PARAM";
  1192. case 3:
  1193. return "BAD_CHECKSUM";
  1194. case 4:
  1195. return "NMI_INTERRUPT";
  1196. case 5:
  1197. return "SYSASSERT";
  1198. case 6:
  1199. return "FATAL_ERROR";
  1200. }
  1201. return "UNKNOWN";
  1202. }
  1203. #define ERROR_START_OFFSET (1 * sizeof(u32))
  1204. #define ERROR_ELEM_SIZE (7 * sizeof(u32))
  1205. void iwl3945_dump_nic_error_log(struct iwl_priv *priv)
  1206. {
  1207. u32 i;
  1208. u32 desc, time, count, base, data1;
  1209. u32 blink1, blink2, ilink1, ilink2;
  1210. base = le32_to_cpu(priv->card_alive.error_event_table_ptr);
  1211. if (!iwl3945_hw_valid_rtc_data_addr(base)) {
  1212. IWL_ERR(priv, "Not valid error log pointer 0x%08X\n", base);
  1213. return;
  1214. }
  1215. count = iwl_read_targ_mem(priv, base);
  1216. if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) {
  1217. IWL_ERR(priv, "Start IWL Error Log Dump:\n");
  1218. IWL_ERR(priv, "Status: 0x%08lX, count: %d\n",
  1219. priv->status, count);
  1220. }
  1221. IWL_ERR(priv, "Desc Time asrtPC blink2 "
  1222. "ilink1 nmiPC Line\n");
  1223. for (i = ERROR_START_OFFSET;
  1224. i < (count * ERROR_ELEM_SIZE) + ERROR_START_OFFSET;
  1225. i += ERROR_ELEM_SIZE) {
  1226. desc = iwl_read_targ_mem(priv, base + i);
  1227. time =
  1228. iwl_read_targ_mem(priv, base + i + 1 * sizeof(u32));
  1229. blink1 =
  1230. iwl_read_targ_mem(priv, base + i + 2 * sizeof(u32));
  1231. blink2 =
  1232. iwl_read_targ_mem(priv, base + i + 3 * sizeof(u32));
  1233. ilink1 =
  1234. iwl_read_targ_mem(priv, base + i + 4 * sizeof(u32));
  1235. ilink2 =
  1236. iwl_read_targ_mem(priv, base + i + 5 * sizeof(u32));
  1237. data1 =
  1238. iwl_read_targ_mem(priv, base + i + 6 * sizeof(u32));
  1239. IWL_ERR(priv,
  1240. "%-13s (#%d) %010u 0x%05X 0x%05X 0x%05X 0x%05X %u\n\n",
  1241. desc_lookup(desc), desc, time, blink1, blink2,
  1242. ilink1, ilink2, data1);
  1243. trace_iwlwifi_dev_ucode_error(priv, desc, time, data1, 0,
  1244. 0, blink1, blink2, ilink1, ilink2);
  1245. }
  1246. }
  1247. #define EVENT_START_OFFSET (6 * sizeof(u32))
  1248. /**
  1249. * iwl3945_print_event_log - Dump error event log to syslog
  1250. *
  1251. */
  1252. static int iwl3945_print_event_log(struct iwl_priv *priv, u32 start_idx,
  1253. u32 num_events, u32 mode,
  1254. int pos, char **buf, size_t bufsz)
  1255. {
  1256. u32 i;
  1257. u32 base; /* SRAM byte address of event log header */
  1258. u32 event_size; /* 2 u32s, or 3 u32s if timestamp recorded */
  1259. u32 ptr; /* SRAM byte address of log data */
  1260. u32 ev, time, data; /* event log data */
  1261. unsigned long reg_flags;
  1262. if (num_events == 0)
  1263. return pos;
  1264. base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
  1265. if (mode == 0)
  1266. event_size = 2 * sizeof(u32);
  1267. else
  1268. event_size = 3 * sizeof(u32);
  1269. ptr = base + EVENT_START_OFFSET + (start_idx * event_size);
  1270. /* Make sure device is powered up for SRAM reads */
  1271. spin_lock_irqsave(&priv->reg_lock, reg_flags);
  1272. iwl_grab_nic_access(priv);
  1273. /* Set starting address; reads will auto-increment */
  1274. _iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR, ptr);
  1275. rmb();
  1276. /* "time" is actually "data" for mode 0 (no timestamp).
  1277. * place event id # at far right for easier visual parsing. */
  1278. for (i = 0; i < num_events; i++) {
  1279. ev = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
  1280. time = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
  1281. if (mode == 0) {
  1282. /* data, ev */
  1283. if (bufsz) {
  1284. pos += scnprintf(*buf + pos, bufsz - pos,
  1285. "0x%08x:%04u\n",
  1286. time, ev);
  1287. } else {
  1288. IWL_ERR(priv, "0x%08x\t%04u\n", time, ev);
  1289. trace_iwlwifi_dev_ucode_event(priv, 0,
  1290. time, ev);
  1291. }
  1292. } else {
  1293. data = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
  1294. if (bufsz) {
  1295. pos += scnprintf(*buf + pos, bufsz - pos,
  1296. "%010u:0x%08x:%04u\n",
  1297. time, data, ev);
  1298. } else {
  1299. IWL_ERR(priv, "%010u\t0x%08x\t%04u\n",
  1300. time, data, ev);
  1301. trace_iwlwifi_dev_ucode_event(priv, time,
  1302. data, ev);
  1303. }
  1304. }
  1305. }
  1306. /* Allow device to power down */
  1307. iwl_release_nic_access(priv);
  1308. spin_unlock_irqrestore(&priv->reg_lock, reg_flags);
  1309. return pos;
  1310. }
  1311. /**
  1312. * iwl3945_print_last_event_logs - Dump the newest # of event log to syslog
  1313. */
  1314. static int iwl3945_print_last_event_logs(struct iwl_priv *priv, u32 capacity,
  1315. u32 num_wraps, u32 next_entry,
  1316. u32 size, u32 mode,
  1317. int pos, char **buf, size_t bufsz)
  1318. {
  1319. /*
  1320. * display the newest DEFAULT_LOG_ENTRIES entries
  1321. * i.e the entries just before the next ont that uCode would fill.
  1322. */
  1323. if (num_wraps) {
  1324. if (next_entry < size) {
  1325. pos = iwl3945_print_event_log(priv,
  1326. capacity - (size - next_entry),
  1327. size - next_entry, mode,
  1328. pos, buf, bufsz);
  1329. pos = iwl3945_print_event_log(priv, 0,
  1330. next_entry, mode,
  1331. pos, buf, bufsz);
  1332. } else
  1333. pos = iwl3945_print_event_log(priv, next_entry - size,
  1334. size, mode,
  1335. pos, buf, bufsz);
  1336. } else {
  1337. if (next_entry < size)
  1338. pos = iwl3945_print_event_log(priv, 0,
  1339. next_entry, mode,
  1340. pos, buf, bufsz);
  1341. else
  1342. pos = iwl3945_print_event_log(priv, next_entry - size,
  1343. size, mode,
  1344. pos, buf, bufsz);
  1345. }
  1346. return pos;
  1347. }
  1348. #define DEFAULT_IWL3945_DUMP_EVENT_LOG_ENTRIES (20)
  1349. int iwl3945_dump_nic_event_log(struct iwl_priv *priv, bool full_log,
  1350. char **buf, bool display)
  1351. {
  1352. u32 base; /* SRAM byte address of event log header */
  1353. u32 capacity; /* event log capacity in # entries */
  1354. u32 mode; /* 0 - no timestamp, 1 - timestamp recorded */
  1355. u32 num_wraps; /* # times uCode wrapped to top of log */
  1356. u32 next_entry; /* index of next entry to be written by uCode */
  1357. u32 size; /* # entries that we'll print */
  1358. int pos = 0;
  1359. size_t bufsz = 0;
  1360. base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
  1361. if (!iwl3945_hw_valid_rtc_data_addr(base)) {
  1362. IWL_ERR(priv, "Invalid event log pointer 0x%08X\n", base);
  1363. return -EINVAL;
  1364. }
  1365. /* event log header */
  1366. capacity = iwl_read_targ_mem(priv, base);
  1367. mode = iwl_read_targ_mem(priv, base + (1 * sizeof(u32)));
  1368. num_wraps = iwl_read_targ_mem(priv, base + (2 * sizeof(u32)));
  1369. next_entry = iwl_read_targ_mem(priv, base + (3 * sizeof(u32)));
  1370. if (capacity > priv->cfg->max_event_log_size) {
  1371. IWL_ERR(priv, "Log capacity %d is bogus, limit to %d entries\n",
  1372. capacity, priv->cfg->max_event_log_size);
  1373. capacity = priv->cfg->max_event_log_size;
  1374. }
  1375. if (next_entry > priv->cfg->max_event_log_size) {
  1376. IWL_ERR(priv, "Log write index %d is bogus, limit to %d\n",
  1377. next_entry, priv->cfg->max_event_log_size);
  1378. next_entry = priv->cfg->max_event_log_size;
  1379. }
  1380. size = num_wraps ? capacity : next_entry;
  1381. /* bail out if nothing in log */
  1382. if (size == 0) {
  1383. IWL_ERR(priv, "Start IWL Event Log Dump: nothing in log\n");
  1384. return pos;
  1385. }
  1386. #ifdef CONFIG_IWLWIFI_DEBUG
  1387. if (!(iwl_get_debug_level(priv) & IWL_DL_FW_ERRORS) && !full_log)
  1388. size = (size > DEFAULT_IWL3945_DUMP_EVENT_LOG_ENTRIES)
  1389. ? DEFAULT_IWL3945_DUMP_EVENT_LOG_ENTRIES : size;
  1390. #else
  1391. size = (size > DEFAULT_IWL3945_DUMP_EVENT_LOG_ENTRIES)
  1392. ? DEFAULT_IWL3945_DUMP_EVENT_LOG_ENTRIES : size;
  1393. #endif
  1394. IWL_ERR(priv, "Start IWL Event Log Dump: display last %d count\n",
  1395. size);
  1396. #ifdef CONFIG_IWLWIFI_DEBUG
  1397. if (display) {
  1398. if (full_log)
  1399. bufsz = capacity * 48;
  1400. else
  1401. bufsz = size * 48;
  1402. *buf = kmalloc(bufsz, GFP_KERNEL);
  1403. if (!*buf)
  1404. return -ENOMEM;
  1405. }
  1406. if ((iwl_get_debug_level(priv) & IWL_DL_FW_ERRORS) || full_log) {
  1407. /* if uCode has wrapped back to top of log,
  1408. * start at the oldest entry,
  1409. * i.e the next one that uCode would fill.
  1410. */
  1411. if (num_wraps)
  1412. pos = iwl3945_print_event_log(priv, next_entry,
  1413. capacity - next_entry, mode,
  1414. pos, buf, bufsz);
  1415. /* (then/else) start at top of log */
  1416. pos = iwl3945_print_event_log(priv, 0, next_entry, mode,
  1417. pos, buf, bufsz);
  1418. } else
  1419. pos = iwl3945_print_last_event_logs(priv, capacity, num_wraps,
  1420. next_entry, size, mode,
  1421. pos, buf, bufsz);
  1422. #else
  1423. pos = iwl3945_print_last_event_logs(priv, capacity, num_wraps,
  1424. next_entry, size, mode,
  1425. pos, buf, bufsz);
  1426. #endif
  1427. return pos;
  1428. }
  1429. static void iwl3945_irq_tasklet(struct iwl_priv *priv)
  1430. {
  1431. u32 inta, handled = 0;
  1432. u32 inta_fh;
  1433. unsigned long flags;
  1434. #ifdef CONFIG_IWLWIFI_DEBUG
  1435. u32 inta_mask;
  1436. #endif
  1437. spin_lock_irqsave(&priv->lock, flags);
  1438. /* Ack/clear/reset pending uCode interrupts.
  1439. * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
  1440. * and will clear only when CSR_FH_INT_STATUS gets cleared. */
  1441. inta = iwl_read32(priv, CSR_INT);
  1442. iwl_write32(priv, CSR_INT, inta);
  1443. /* Ack/clear/reset pending flow-handler (DMA) interrupts.
  1444. * Any new interrupts that happen after this, either while we're
  1445. * in this tasklet, or later, will show up in next ISR/tasklet. */
  1446. inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
  1447. iwl_write32(priv, CSR_FH_INT_STATUS, inta_fh);
  1448. #ifdef CONFIG_IWLWIFI_DEBUG
  1449. if (iwl_get_debug_level(priv) & IWL_DL_ISR) {
  1450. /* just for debug */
  1451. inta_mask = iwl_read32(priv, CSR_INT_MASK);
  1452. IWL_DEBUG_ISR(priv, "inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
  1453. inta, inta_mask, inta_fh);
  1454. }
  1455. #endif
  1456. spin_unlock_irqrestore(&priv->lock, flags);
  1457. /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not
  1458. * atomic, make sure that inta covers all the interrupts that
  1459. * we've discovered, even if FH interrupt came in just after
  1460. * reading CSR_INT. */
  1461. if (inta_fh & CSR39_FH_INT_RX_MASK)
  1462. inta |= CSR_INT_BIT_FH_RX;
  1463. if (inta_fh & CSR39_FH_INT_TX_MASK)
  1464. inta |= CSR_INT_BIT_FH_TX;
  1465. /* Now service all interrupt bits discovered above. */
  1466. if (inta & CSR_INT_BIT_HW_ERR) {
  1467. IWL_ERR(priv, "Hardware error detected. Restarting.\n");
  1468. /* Tell the device to stop sending interrupts */
  1469. iwl_disable_interrupts(priv);
  1470. priv->isr_stats.hw++;
  1471. iwl_irq_handle_error(priv);
  1472. handled |= CSR_INT_BIT_HW_ERR;
  1473. return;
  1474. }
  1475. #ifdef CONFIG_IWLWIFI_DEBUG
  1476. if (iwl_get_debug_level(priv) & (IWL_DL_ISR)) {
  1477. /* NIC fires this, but we don't use it, redundant with WAKEUP */
  1478. if (inta & CSR_INT_BIT_SCD) {
  1479. IWL_DEBUG_ISR(priv, "Scheduler finished to transmit "
  1480. "the frame/frames.\n");
  1481. priv->isr_stats.sch++;
  1482. }
  1483. /* Alive notification via Rx interrupt will do the real work */
  1484. if (inta & CSR_INT_BIT_ALIVE) {
  1485. IWL_DEBUG_ISR(priv, "Alive interrupt\n");
  1486. priv->isr_stats.alive++;
  1487. }
  1488. }
  1489. #endif
  1490. /* Safely ignore these bits for debug checks below */
  1491. inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
  1492. /* Error detected by uCode */
  1493. if (inta & CSR_INT_BIT_SW_ERR) {
  1494. IWL_ERR(priv, "Microcode SW error detected. "
  1495. "Restarting 0x%X.\n", inta);
  1496. priv->isr_stats.sw++;
  1497. priv->isr_stats.sw_err = inta;
  1498. iwl_irq_handle_error(priv);
  1499. handled |= CSR_INT_BIT_SW_ERR;
  1500. }
  1501. /* uCode wakes up after power-down sleep */
  1502. if (inta & CSR_INT_BIT_WAKEUP) {
  1503. IWL_DEBUG_ISR(priv, "Wakeup interrupt\n");
  1504. iwl_rx_queue_update_write_ptr(priv, &priv->rxq);
  1505. iwl_txq_update_write_ptr(priv, &priv->txq[0]);
  1506. iwl_txq_update_write_ptr(priv, &priv->txq[1]);
  1507. iwl_txq_update_write_ptr(priv, &priv->txq[2]);
  1508. iwl_txq_update_write_ptr(priv, &priv->txq[3]);
  1509. iwl_txq_update_write_ptr(priv, &priv->txq[4]);
  1510. iwl_txq_update_write_ptr(priv, &priv->txq[5]);
  1511. priv->isr_stats.wakeup++;
  1512. handled |= CSR_INT_BIT_WAKEUP;
  1513. }
  1514. /* All uCode command responses, including Tx command responses,
  1515. * Rx "responses" (frame-received notification), and other
  1516. * notifications from uCode come through here*/
  1517. if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
  1518. iwl3945_rx_handle(priv);
  1519. priv->isr_stats.rx++;
  1520. handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
  1521. }
  1522. if (inta & CSR_INT_BIT_FH_TX) {
  1523. IWL_DEBUG_ISR(priv, "Tx interrupt\n");
  1524. priv->isr_stats.tx++;
  1525. iwl_write32(priv, CSR_FH_INT_STATUS, (1 << 6));
  1526. iwl_write_direct32(priv, FH39_TCSR_CREDIT
  1527. (FH39_SRVC_CHNL), 0x0);
  1528. handled |= CSR_INT_BIT_FH_TX;
  1529. }
  1530. if (inta & ~handled) {
  1531. IWL_ERR(priv, "Unhandled INTA bits 0x%08x\n", inta & ~handled);
  1532. priv->isr_stats.unhandled++;
  1533. }
  1534. if (inta & ~priv->inta_mask) {
  1535. IWL_WARN(priv, "Disabled INTA bits 0x%08x were pending\n",
  1536. inta & ~priv->inta_mask);
  1537. IWL_WARN(priv, " with FH_INT = 0x%08x\n", inta_fh);
  1538. }
  1539. /* Re-enable all interrupts */
  1540. /* only Re-enable if disabled by irq */
  1541. if (test_bit(STATUS_INT_ENABLED, &priv->status))
  1542. iwl_enable_interrupts(priv);
  1543. #ifdef CONFIG_IWLWIFI_DEBUG
  1544. if (iwl_get_debug_level(priv) & (IWL_DL_ISR)) {
  1545. inta = iwl_read32(priv, CSR_INT);
  1546. inta_mask = iwl_read32(priv, CSR_INT_MASK);
  1547. inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
  1548. IWL_DEBUG_ISR(priv, "End inta 0x%08x, enabled 0x%08x, fh 0x%08x, "
  1549. "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags);
  1550. }
  1551. #endif
  1552. }
  1553. static int iwl3945_get_channels_for_scan(struct iwl_priv *priv,
  1554. enum ieee80211_band band,
  1555. u8 is_active, u8 n_probes,
  1556. struct iwl3945_scan_channel *scan_ch,
  1557. struct ieee80211_vif *vif)
  1558. {
  1559. struct ieee80211_channel *chan;
  1560. const struct ieee80211_supported_band *sband;
  1561. const struct iwl_channel_info *ch_info;
  1562. u16 passive_dwell = 0;
  1563. u16 active_dwell = 0;
  1564. int added, i;
  1565. sband = iwl_get_hw_mode(priv, band);
  1566. if (!sband)
  1567. return 0;
  1568. active_dwell = iwl_get_active_dwell_time(priv, band, n_probes);
  1569. passive_dwell = iwl_get_passive_dwell_time(priv, band, vif);
  1570. if (passive_dwell <= active_dwell)
  1571. passive_dwell = active_dwell + 1;
  1572. for (i = 0, added = 0; i < priv->scan_request->n_channels; i++) {
  1573. chan = priv->scan_request->channels[i];
  1574. if (chan->band != band)
  1575. continue;
  1576. scan_ch->channel = chan->hw_value;
  1577. ch_info = iwl_get_channel_info(priv, band, scan_ch->channel);
  1578. if (!is_channel_valid(ch_info)) {
  1579. IWL_DEBUG_SCAN(priv, "Channel %d is INVALID for this band.\n",
  1580. scan_ch->channel);
  1581. continue;
  1582. }
  1583. scan_ch->active_dwell = cpu_to_le16(active_dwell);
  1584. scan_ch->passive_dwell = cpu_to_le16(passive_dwell);
  1585. /* If passive , set up for auto-switch
  1586. * and use long active_dwell time.
  1587. */
  1588. if (!is_active || is_channel_passive(ch_info) ||
  1589. (chan->flags & IEEE80211_CHAN_PASSIVE_SCAN)) {
  1590. scan_ch->type = 0; /* passive */
  1591. if (IWL_UCODE_API(priv->ucode_ver) == 1)
  1592. scan_ch->active_dwell = cpu_to_le16(passive_dwell - 1);
  1593. } else {
  1594. scan_ch->type = 1; /* active */
  1595. }
  1596. /* Set direct probe bits. These may be used both for active
  1597. * scan channels (probes gets sent right away),
  1598. * or for passive channels (probes get se sent only after
  1599. * hearing clear Rx packet).*/
  1600. if (IWL_UCODE_API(priv->ucode_ver) >= 2) {
  1601. if (n_probes)
  1602. scan_ch->type |= IWL39_SCAN_PROBE_MASK(n_probes);
  1603. } else {
  1604. /* uCode v1 does not allow setting direct probe bits on
  1605. * passive channel. */
  1606. if ((scan_ch->type & 1) && n_probes)
  1607. scan_ch->type |= IWL39_SCAN_PROBE_MASK(n_probes);
  1608. }
  1609. /* Set txpower levels to defaults */
  1610. scan_ch->tpc.dsp_atten = 110;
  1611. /* scan_pwr_info->tpc.dsp_atten; */
  1612. /*scan_pwr_info->tpc.tx_gain; */
  1613. if (band == IEEE80211_BAND_5GHZ)
  1614. scan_ch->tpc.tx_gain = ((1 << 5) | (3 << 3)) | 3;
  1615. else {
  1616. scan_ch->tpc.tx_gain = ((1 << 5) | (5 << 3));
  1617. /* NOTE: if we were doing 6Mb OFDM for scans we'd use
  1618. * power level:
  1619. * scan_ch->tpc.tx_gain = ((1 << 5) | (2 << 3)) | 3;
  1620. */
  1621. }
  1622. IWL_DEBUG_SCAN(priv, "Scanning %d [%s %d]\n",
  1623. scan_ch->channel,
  1624. (scan_ch->type & 1) ? "ACTIVE" : "PASSIVE",
  1625. (scan_ch->type & 1) ?
  1626. active_dwell : passive_dwell);
  1627. scan_ch++;
  1628. added++;
  1629. }
  1630. IWL_DEBUG_SCAN(priv, "total channels to scan %d\n", added);
  1631. return added;
  1632. }
  1633. static void iwl3945_init_hw_rates(struct iwl_priv *priv,
  1634. struct ieee80211_rate *rates)
  1635. {
  1636. int i;
  1637. for (i = 0; i < IWL_RATE_COUNT_LEGACY; i++) {
  1638. rates[i].bitrate = iwl3945_rates[i].ieee * 5;
  1639. rates[i].hw_value = i; /* Rate scaling will work on indexes */
  1640. rates[i].hw_value_short = i;
  1641. rates[i].flags = 0;
  1642. if ((i > IWL39_LAST_OFDM_RATE) || (i < IWL_FIRST_OFDM_RATE)) {
  1643. /*
  1644. * If CCK != 1M then set short preamble rate flag.
  1645. */
  1646. rates[i].flags |= (iwl3945_rates[i].plcp == 10) ?
  1647. 0 : IEEE80211_RATE_SHORT_PREAMBLE;
  1648. }
  1649. }
  1650. }
  1651. /******************************************************************************
  1652. *
  1653. * uCode download functions
  1654. *
  1655. ******************************************************************************/
  1656. static void iwl3945_dealloc_ucode_pci(struct iwl_priv *priv)
  1657. {
  1658. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_code);
  1659. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data);
  1660. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
  1661. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init);
  1662. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init_data);
  1663. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_boot);
  1664. }
  1665. /**
  1666. * iwl3945_verify_inst_full - verify runtime uCode image in card vs. host,
  1667. * looking at all data.
  1668. */
  1669. static int iwl3945_verify_inst_full(struct iwl_priv *priv, __le32 *image, u32 len)
  1670. {
  1671. u32 val;
  1672. u32 save_len = len;
  1673. int rc = 0;
  1674. u32 errcnt;
  1675. IWL_DEBUG_INFO(priv, "ucode inst image size is %u\n", len);
  1676. iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR,
  1677. IWL39_RTC_INST_LOWER_BOUND);
  1678. errcnt = 0;
  1679. for (; len > 0; len -= sizeof(u32), image++) {
  1680. /* read data comes through single port, auto-incr addr */
  1681. /* NOTE: Use the debugless read so we don't flood kernel log
  1682. * if IWL_DL_IO is set */
  1683. val = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
  1684. if (val != le32_to_cpu(*image)) {
  1685. IWL_ERR(priv, "uCode INST section is invalid at "
  1686. "offset 0x%x, is 0x%x, s/b 0x%x\n",
  1687. save_len - len, val, le32_to_cpu(*image));
  1688. rc = -EIO;
  1689. errcnt++;
  1690. if (errcnt >= 20)
  1691. break;
  1692. }
  1693. }
  1694. if (!errcnt)
  1695. IWL_DEBUG_INFO(priv,
  1696. "ucode image in INSTRUCTION memory is good\n");
  1697. return rc;
  1698. }
  1699. /**
  1700. * iwl3945_verify_inst_sparse - verify runtime uCode image in card vs. host,
  1701. * using sample data 100 bytes apart. If these sample points are good,
  1702. * it's a pretty good bet that everything between them is good, too.
  1703. */
  1704. static int iwl3945_verify_inst_sparse(struct iwl_priv *priv, __le32 *image, u32 len)
  1705. {
  1706. u32 val;
  1707. int rc = 0;
  1708. u32 errcnt = 0;
  1709. u32 i;
  1710. IWL_DEBUG_INFO(priv, "ucode inst image size is %u\n", len);
  1711. for (i = 0; i < len; i += 100, image += 100/sizeof(u32)) {
  1712. /* read data comes through single port, auto-incr addr */
  1713. /* NOTE: Use the debugless read so we don't flood kernel log
  1714. * if IWL_DL_IO is set */
  1715. iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR,
  1716. i + IWL39_RTC_INST_LOWER_BOUND);
  1717. val = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
  1718. if (val != le32_to_cpu(*image)) {
  1719. #if 0 /* Enable this if you want to see details */
  1720. IWL_ERR(priv, "uCode INST section is invalid at "
  1721. "offset 0x%x, is 0x%x, s/b 0x%x\n",
  1722. i, val, *image);
  1723. #endif
  1724. rc = -EIO;
  1725. errcnt++;
  1726. if (errcnt >= 3)
  1727. break;
  1728. }
  1729. }
  1730. return rc;
  1731. }
  1732. /**
  1733. * iwl3945_verify_ucode - determine which instruction image is in SRAM,
  1734. * and verify its contents
  1735. */
  1736. static int iwl3945_verify_ucode(struct iwl_priv *priv)
  1737. {
  1738. __le32 *image;
  1739. u32 len;
  1740. int rc = 0;
  1741. /* Try bootstrap */
  1742. image = (__le32 *)priv->ucode_boot.v_addr;
  1743. len = priv->ucode_boot.len;
  1744. rc = iwl3945_verify_inst_sparse(priv, image, len);
  1745. if (rc == 0) {
  1746. IWL_DEBUG_INFO(priv, "Bootstrap uCode is good in inst SRAM\n");
  1747. return 0;
  1748. }
  1749. /* Try initialize */
  1750. image = (__le32 *)priv->ucode_init.v_addr;
  1751. len = priv->ucode_init.len;
  1752. rc = iwl3945_verify_inst_sparse(priv, image, len);
  1753. if (rc == 0) {
  1754. IWL_DEBUG_INFO(priv, "Initialize uCode is good in inst SRAM\n");
  1755. return 0;
  1756. }
  1757. /* Try runtime/protocol */
  1758. image = (__le32 *)priv->ucode_code.v_addr;
  1759. len = priv->ucode_code.len;
  1760. rc = iwl3945_verify_inst_sparse(priv, image, len);
  1761. if (rc == 0) {
  1762. IWL_DEBUG_INFO(priv, "Runtime uCode is good in inst SRAM\n");
  1763. return 0;
  1764. }
  1765. IWL_ERR(priv, "NO VALID UCODE IMAGE IN INSTRUCTION SRAM!!\n");
  1766. /* Since nothing seems to match, show first several data entries in
  1767. * instruction SRAM, so maybe visual inspection will give a clue.
  1768. * Selection of bootstrap image (vs. other images) is arbitrary. */
  1769. image = (__le32 *)priv->ucode_boot.v_addr;
  1770. len = priv->ucode_boot.len;
  1771. rc = iwl3945_verify_inst_full(priv, image, len);
  1772. return rc;
  1773. }
  1774. static void iwl3945_nic_start(struct iwl_priv *priv)
  1775. {
  1776. /* Remove all resets to allow NIC to operate */
  1777. iwl_write32(priv, CSR_RESET, 0);
  1778. }
  1779. #define IWL3945_UCODE_GET(item) \
  1780. static u32 iwl3945_ucode_get_##item(const struct iwl_ucode_header *ucode)\
  1781. { \
  1782. return le32_to_cpu(ucode->u.v1.item); \
  1783. }
  1784. static u32 iwl3945_ucode_get_header_size(u32 api_ver)
  1785. {
  1786. return 24;
  1787. }
  1788. static u8 *iwl3945_ucode_get_data(const struct iwl_ucode_header *ucode)
  1789. {
  1790. return (u8 *) ucode->u.v1.data;
  1791. }
  1792. IWL3945_UCODE_GET(inst_size);
  1793. IWL3945_UCODE_GET(data_size);
  1794. IWL3945_UCODE_GET(init_size);
  1795. IWL3945_UCODE_GET(init_data_size);
  1796. IWL3945_UCODE_GET(boot_size);
  1797. /**
  1798. * iwl3945_read_ucode - Read uCode images from disk file.
  1799. *
  1800. * Copy into buffers for card to fetch via bus-mastering
  1801. */
  1802. static int iwl3945_read_ucode(struct iwl_priv *priv)
  1803. {
  1804. const struct iwl_ucode_header *ucode;
  1805. int ret = -EINVAL, index;
  1806. const struct firmware *ucode_raw;
  1807. /* firmware file name contains uCode/driver compatibility version */
  1808. const char *name_pre = priv->cfg->fw_name_pre;
  1809. const unsigned int api_max = priv->cfg->ucode_api_max;
  1810. const unsigned int api_min = priv->cfg->ucode_api_min;
  1811. char buf[25];
  1812. u8 *src;
  1813. size_t len;
  1814. u32 api_ver, inst_size, data_size, init_size, init_data_size, boot_size;
  1815. /* Ask kernel firmware_class module to get the boot firmware off disk.
  1816. * request_firmware() is synchronous, file is in memory on return. */
  1817. for (index = api_max; index >= api_min; index--) {
  1818. sprintf(buf, "%s%u%s", name_pre, index, ".ucode");
  1819. ret = request_firmware(&ucode_raw, buf, &priv->pci_dev->dev);
  1820. if (ret < 0) {
  1821. IWL_ERR(priv, "%s firmware file req failed: %d\n",
  1822. buf, ret);
  1823. if (ret == -ENOENT)
  1824. continue;
  1825. else
  1826. goto error;
  1827. } else {
  1828. if (index < api_max)
  1829. IWL_ERR(priv, "Loaded firmware %s, "
  1830. "which is deprecated. "
  1831. " Please use API v%u instead.\n",
  1832. buf, api_max);
  1833. IWL_DEBUG_INFO(priv, "Got firmware '%s' file "
  1834. "(%zd bytes) from disk\n",
  1835. buf, ucode_raw->size);
  1836. break;
  1837. }
  1838. }
  1839. if (ret < 0)
  1840. goto error;
  1841. /* Make sure that we got at least our header! */
  1842. if (ucode_raw->size < iwl3945_ucode_get_header_size(1)) {
  1843. IWL_ERR(priv, "File size way too small!\n");
  1844. ret = -EINVAL;
  1845. goto err_release;
  1846. }
  1847. /* Data from ucode file: header followed by uCode images */
  1848. ucode = (struct iwl_ucode_header *)ucode_raw->data;
  1849. priv->ucode_ver = le32_to_cpu(ucode->ver);
  1850. api_ver = IWL_UCODE_API(priv->ucode_ver);
  1851. inst_size = iwl3945_ucode_get_inst_size(ucode);
  1852. data_size = iwl3945_ucode_get_data_size(ucode);
  1853. init_size = iwl3945_ucode_get_init_size(ucode);
  1854. init_data_size = iwl3945_ucode_get_init_data_size(ucode);
  1855. boot_size = iwl3945_ucode_get_boot_size(ucode);
  1856. src = iwl3945_ucode_get_data(ucode);
  1857. /* api_ver should match the api version forming part of the
  1858. * firmware filename ... but we don't check for that and only rely
  1859. * on the API version read from firmware header from here on forward */
  1860. if (api_ver < api_min || api_ver > api_max) {
  1861. IWL_ERR(priv, "Driver unable to support your firmware API. "
  1862. "Driver supports v%u, firmware is v%u.\n",
  1863. api_max, api_ver);
  1864. priv->ucode_ver = 0;
  1865. ret = -EINVAL;
  1866. goto err_release;
  1867. }
  1868. if (api_ver != api_max)
  1869. IWL_ERR(priv, "Firmware has old API version. Expected %u, "
  1870. "got %u. New firmware can be obtained "
  1871. "from http://www.intellinuxwireless.org.\n",
  1872. api_max, api_ver);
  1873. IWL_INFO(priv, "loaded firmware version %u.%u.%u.%u\n",
  1874. IWL_UCODE_MAJOR(priv->ucode_ver),
  1875. IWL_UCODE_MINOR(priv->ucode_ver),
  1876. IWL_UCODE_API(priv->ucode_ver),
  1877. IWL_UCODE_SERIAL(priv->ucode_ver));
  1878. snprintf(priv->hw->wiphy->fw_version,
  1879. sizeof(priv->hw->wiphy->fw_version),
  1880. "%u.%u.%u.%u",
  1881. IWL_UCODE_MAJOR(priv->ucode_ver),
  1882. IWL_UCODE_MINOR(priv->ucode_ver),
  1883. IWL_UCODE_API(priv->ucode_ver),
  1884. IWL_UCODE_SERIAL(priv->ucode_ver));
  1885. IWL_DEBUG_INFO(priv, "f/w package hdr ucode version raw = 0x%x\n",
  1886. priv->ucode_ver);
  1887. IWL_DEBUG_INFO(priv, "f/w package hdr runtime inst size = %u\n",
  1888. inst_size);
  1889. IWL_DEBUG_INFO(priv, "f/w package hdr runtime data size = %u\n",
  1890. data_size);
  1891. IWL_DEBUG_INFO(priv, "f/w package hdr init inst size = %u\n",
  1892. init_size);
  1893. IWL_DEBUG_INFO(priv, "f/w package hdr init data size = %u\n",
  1894. init_data_size);
  1895. IWL_DEBUG_INFO(priv, "f/w package hdr boot inst size = %u\n",
  1896. boot_size);
  1897. /* Verify size of file vs. image size info in file's header */
  1898. if (ucode_raw->size != iwl3945_ucode_get_header_size(api_ver) +
  1899. inst_size + data_size + init_size +
  1900. init_data_size + boot_size) {
  1901. IWL_DEBUG_INFO(priv,
  1902. "uCode file size %zd does not match expected size\n",
  1903. ucode_raw->size);
  1904. ret = -EINVAL;
  1905. goto err_release;
  1906. }
  1907. /* Verify that uCode images will fit in card's SRAM */
  1908. if (inst_size > IWL39_MAX_INST_SIZE) {
  1909. IWL_DEBUG_INFO(priv, "uCode instr len %d too large to fit in\n",
  1910. inst_size);
  1911. ret = -EINVAL;
  1912. goto err_release;
  1913. }
  1914. if (data_size > IWL39_MAX_DATA_SIZE) {
  1915. IWL_DEBUG_INFO(priv, "uCode data len %d too large to fit in\n",
  1916. data_size);
  1917. ret = -EINVAL;
  1918. goto err_release;
  1919. }
  1920. if (init_size > IWL39_MAX_INST_SIZE) {
  1921. IWL_DEBUG_INFO(priv,
  1922. "uCode init instr len %d too large to fit in\n",
  1923. init_size);
  1924. ret = -EINVAL;
  1925. goto err_release;
  1926. }
  1927. if (init_data_size > IWL39_MAX_DATA_SIZE) {
  1928. IWL_DEBUG_INFO(priv,
  1929. "uCode init data len %d too large to fit in\n",
  1930. init_data_size);
  1931. ret = -EINVAL;
  1932. goto err_release;
  1933. }
  1934. if (boot_size > IWL39_MAX_BSM_SIZE) {
  1935. IWL_DEBUG_INFO(priv,
  1936. "uCode boot instr len %d too large to fit in\n",
  1937. boot_size);
  1938. ret = -EINVAL;
  1939. goto err_release;
  1940. }
  1941. /* Allocate ucode buffers for card's bus-master loading ... */
  1942. /* Runtime instructions and 2 copies of data:
  1943. * 1) unmodified from disk
  1944. * 2) backup cache for save/restore during power-downs */
  1945. priv->ucode_code.len = inst_size;
  1946. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_code);
  1947. priv->ucode_data.len = data_size;
  1948. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data);
  1949. priv->ucode_data_backup.len = data_size;
  1950. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
  1951. if (!priv->ucode_code.v_addr || !priv->ucode_data.v_addr ||
  1952. !priv->ucode_data_backup.v_addr)
  1953. goto err_pci_alloc;
  1954. /* Initialization instructions and data */
  1955. if (init_size && init_data_size) {
  1956. priv->ucode_init.len = init_size;
  1957. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init);
  1958. priv->ucode_init_data.len = init_data_size;
  1959. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init_data);
  1960. if (!priv->ucode_init.v_addr || !priv->ucode_init_data.v_addr)
  1961. goto err_pci_alloc;
  1962. }
  1963. /* Bootstrap (instructions only, no data) */
  1964. if (boot_size) {
  1965. priv->ucode_boot.len = boot_size;
  1966. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_boot);
  1967. if (!priv->ucode_boot.v_addr)
  1968. goto err_pci_alloc;
  1969. }
  1970. /* Copy images into buffers for card's bus-master reads ... */
  1971. /* Runtime instructions (first block of data in file) */
  1972. len = inst_size;
  1973. IWL_DEBUG_INFO(priv,
  1974. "Copying (but not loading) uCode instr len %zd\n", len);
  1975. memcpy(priv->ucode_code.v_addr, src, len);
  1976. src += len;
  1977. IWL_DEBUG_INFO(priv, "uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n",
  1978. priv->ucode_code.v_addr, (u32)priv->ucode_code.p_addr);
  1979. /* Runtime data (2nd block)
  1980. * NOTE: Copy into backup buffer will be done in iwl3945_up() */
  1981. len = data_size;
  1982. IWL_DEBUG_INFO(priv,
  1983. "Copying (but not loading) uCode data len %zd\n", len);
  1984. memcpy(priv->ucode_data.v_addr, src, len);
  1985. memcpy(priv->ucode_data_backup.v_addr, src, len);
  1986. src += len;
  1987. /* Initialization instructions (3rd block) */
  1988. if (init_size) {
  1989. len = init_size;
  1990. IWL_DEBUG_INFO(priv,
  1991. "Copying (but not loading) init instr len %zd\n", len);
  1992. memcpy(priv->ucode_init.v_addr, src, len);
  1993. src += len;
  1994. }
  1995. /* Initialization data (4th block) */
  1996. if (init_data_size) {
  1997. len = init_data_size;
  1998. IWL_DEBUG_INFO(priv,
  1999. "Copying (but not loading) init data len %zd\n", len);
  2000. memcpy(priv->ucode_init_data.v_addr, src, len);
  2001. src += len;
  2002. }
  2003. /* Bootstrap instructions (5th block) */
  2004. len = boot_size;
  2005. IWL_DEBUG_INFO(priv,
  2006. "Copying (but not loading) boot instr len %zd\n", len);
  2007. memcpy(priv->ucode_boot.v_addr, src, len);
  2008. /* We have our copies now, allow OS release its copies */
  2009. release_firmware(ucode_raw);
  2010. return 0;
  2011. err_pci_alloc:
  2012. IWL_ERR(priv, "failed to allocate pci memory\n");
  2013. ret = -ENOMEM;
  2014. iwl3945_dealloc_ucode_pci(priv);
  2015. err_release:
  2016. release_firmware(ucode_raw);
  2017. error:
  2018. return ret;
  2019. }
  2020. /**
  2021. * iwl3945_set_ucode_ptrs - Set uCode address location
  2022. *
  2023. * Tell initialization uCode where to find runtime uCode.
  2024. *
  2025. * BSM registers initially contain pointers to initialization uCode.
  2026. * We need to replace them to load runtime uCode inst and data,
  2027. * and to save runtime data when powering down.
  2028. */
  2029. static int iwl3945_set_ucode_ptrs(struct iwl_priv *priv)
  2030. {
  2031. dma_addr_t pinst;
  2032. dma_addr_t pdata;
  2033. /* bits 31:0 for 3945 */
  2034. pinst = priv->ucode_code.p_addr;
  2035. pdata = priv->ucode_data_backup.p_addr;
  2036. /* Tell bootstrap uCode where to find image to load */
  2037. iwl_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
  2038. iwl_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
  2039. iwl_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG,
  2040. priv->ucode_data.len);
  2041. /* Inst byte count must be last to set up, bit 31 signals uCode
  2042. * that all new ptr/size info is in place */
  2043. iwl_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG,
  2044. priv->ucode_code.len | BSM_DRAM_INST_LOAD);
  2045. IWL_DEBUG_INFO(priv, "Runtime uCode pointers are set.\n");
  2046. return 0;
  2047. }
  2048. /**
  2049. * iwl3945_init_alive_start - Called after REPLY_ALIVE notification received
  2050. *
  2051. * Called after REPLY_ALIVE notification received from "initialize" uCode.
  2052. *
  2053. * Tell "initialize" uCode to go ahead and load the runtime uCode.
  2054. */
  2055. static void iwl3945_init_alive_start(struct iwl_priv *priv)
  2056. {
  2057. /* Check alive response for "valid" sign from uCode */
  2058. if (priv->card_alive_init.is_valid != UCODE_VALID_OK) {
  2059. /* We had an error bringing up the hardware, so take it
  2060. * all the way back down so we can try again */
  2061. IWL_DEBUG_INFO(priv, "Initialize Alive failed.\n");
  2062. goto restart;
  2063. }
  2064. /* Bootstrap uCode has loaded initialize uCode ... verify inst image.
  2065. * This is a paranoid check, because we would not have gotten the
  2066. * "initialize" alive if code weren't properly loaded. */
  2067. if (iwl3945_verify_ucode(priv)) {
  2068. /* Runtime instruction load was bad;
  2069. * take it all the way back down so we can try again */
  2070. IWL_DEBUG_INFO(priv, "Bad \"initialize\" uCode load.\n");
  2071. goto restart;
  2072. }
  2073. /* Send pointers to protocol/runtime uCode image ... init code will
  2074. * load and launch runtime uCode, which will send us another "Alive"
  2075. * notification. */
  2076. IWL_DEBUG_INFO(priv, "Initialization Alive received.\n");
  2077. if (iwl3945_set_ucode_ptrs(priv)) {
  2078. /* Runtime instruction load won't happen;
  2079. * take it all the way back down so we can try again */
  2080. IWL_DEBUG_INFO(priv, "Couldn't set up uCode pointers.\n");
  2081. goto restart;
  2082. }
  2083. return;
  2084. restart:
  2085. queue_work(priv->workqueue, &priv->restart);
  2086. }
  2087. /**
  2088. * iwl3945_alive_start - called after REPLY_ALIVE notification received
  2089. * from protocol/runtime uCode (initialization uCode's
  2090. * Alive gets handled by iwl3945_init_alive_start()).
  2091. */
  2092. static void iwl3945_alive_start(struct iwl_priv *priv)
  2093. {
  2094. int thermal_spin = 0;
  2095. u32 rfkill;
  2096. IWL_DEBUG_INFO(priv, "Runtime Alive received.\n");
  2097. if (priv->card_alive.is_valid != UCODE_VALID_OK) {
  2098. /* We had an error bringing up the hardware, so take it
  2099. * all the way back down so we can try again */
  2100. IWL_DEBUG_INFO(priv, "Alive failed.\n");
  2101. goto restart;
  2102. }
  2103. /* Initialize uCode has loaded Runtime uCode ... verify inst image.
  2104. * This is a paranoid check, because we would not have gotten the
  2105. * "runtime" alive if code weren't properly loaded. */
  2106. if (iwl3945_verify_ucode(priv)) {
  2107. /* Runtime instruction load was bad;
  2108. * take it all the way back down so we can try again */
  2109. IWL_DEBUG_INFO(priv, "Bad runtime uCode load.\n");
  2110. goto restart;
  2111. }
  2112. rfkill = iwl_read_prph(priv, APMG_RFKILL_REG);
  2113. IWL_DEBUG_INFO(priv, "RFKILL status: 0x%x\n", rfkill);
  2114. if (rfkill & 0x1) {
  2115. clear_bit(STATUS_RF_KILL_HW, &priv->status);
  2116. /* if RFKILL is not on, then wait for thermal
  2117. * sensor in adapter to kick in */
  2118. while (iwl3945_hw_get_temperature(priv) == 0) {
  2119. thermal_spin++;
  2120. udelay(10);
  2121. }
  2122. if (thermal_spin)
  2123. IWL_DEBUG_INFO(priv, "Thermal calibration took %dus\n",
  2124. thermal_spin * 10);
  2125. } else
  2126. set_bit(STATUS_RF_KILL_HW, &priv->status);
  2127. /* After the ALIVE response, we can send commands to 3945 uCode */
  2128. set_bit(STATUS_ALIVE, &priv->status);
  2129. if (priv->cfg->ops->lib->recover_from_tx_stall) {
  2130. /* Enable timer to monitor the driver queues */
  2131. mod_timer(&priv->monitor_recover,
  2132. jiffies +
  2133. msecs_to_jiffies(priv->cfg->monitor_recover_period));
  2134. }
  2135. if (iwl_is_rfkill(priv))
  2136. return;
  2137. ieee80211_wake_queues(priv->hw);
  2138. priv->active_rate = IWL_RATES_MASK;
  2139. iwl_power_update_mode(priv, true);
  2140. if (iwl_is_associated(priv)) {
  2141. struct iwl3945_rxon_cmd *active_rxon =
  2142. (struct iwl3945_rxon_cmd *)(&priv->active_rxon);
  2143. priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
  2144. active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  2145. } else {
  2146. /* Initialize our rx_config data */
  2147. iwl_connection_init_rx_config(priv, NULL);
  2148. }
  2149. /* Configure Bluetooth device coexistence support */
  2150. priv->cfg->ops->hcmd->send_bt_config(priv);
  2151. /* Configure the adapter for unassociated operation */
  2152. iwlcore_commit_rxon(priv);
  2153. iwl3945_reg_txpower_periodic(priv);
  2154. iwl_leds_init(priv);
  2155. IWL_DEBUG_INFO(priv, "ALIVE processing complete.\n");
  2156. set_bit(STATUS_READY, &priv->status);
  2157. wake_up_interruptible(&priv->wait_command_queue);
  2158. return;
  2159. restart:
  2160. queue_work(priv->workqueue, &priv->restart);
  2161. }
  2162. static void iwl3945_cancel_deferred_work(struct iwl_priv *priv);
  2163. static void __iwl3945_down(struct iwl_priv *priv)
  2164. {
  2165. unsigned long flags;
  2166. int exit_pending = test_bit(STATUS_EXIT_PENDING, &priv->status);
  2167. struct ieee80211_conf *conf = NULL;
  2168. IWL_DEBUG_INFO(priv, DRV_NAME " is going down\n");
  2169. conf = ieee80211_get_hw_conf(priv->hw);
  2170. if (!exit_pending)
  2171. set_bit(STATUS_EXIT_PENDING, &priv->status);
  2172. /* Station information will now be cleared in device */
  2173. iwl_clear_ucode_stations(priv);
  2174. iwl_dealloc_bcast_station(priv);
  2175. iwl_clear_driver_stations(priv);
  2176. /* Unblock any waiting calls */
  2177. wake_up_interruptible_all(&priv->wait_command_queue);
  2178. /* Wipe out the EXIT_PENDING status bit if we are not actually
  2179. * exiting the module */
  2180. if (!exit_pending)
  2181. clear_bit(STATUS_EXIT_PENDING, &priv->status);
  2182. /* stop and reset the on-board processor */
  2183. iwl_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
  2184. /* tell the device to stop sending interrupts */
  2185. spin_lock_irqsave(&priv->lock, flags);
  2186. iwl_disable_interrupts(priv);
  2187. spin_unlock_irqrestore(&priv->lock, flags);
  2188. iwl_synchronize_irq(priv);
  2189. if (priv->mac80211_registered)
  2190. ieee80211_stop_queues(priv->hw);
  2191. /* If we have not previously called iwl3945_init() then
  2192. * clear all bits but the RF Kill bits and return */
  2193. if (!iwl_is_init(priv)) {
  2194. priv->status = test_bit(STATUS_RF_KILL_HW, &priv->status) <<
  2195. STATUS_RF_KILL_HW |
  2196. test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
  2197. STATUS_GEO_CONFIGURED |
  2198. test_bit(STATUS_EXIT_PENDING, &priv->status) <<
  2199. STATUS_EXIT_PENDING;
  2200. goto exit;
  2201. }
  2202. /* ...otherwise clear out all the status bits but the RF Kill
  2203. * bit and continue taking the NIC down. */
  2204. priv->status &= test_bit(STATUS_RF_KILL_HW, &priv->status) <<
  2205. STATUS_RF_KILL_HW |
  2206. test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
  2207. STATUS_GEO_CONFIGURED |
  2208. test_bit(STATUS_FW_ERROR, &priv->status) <<
  2209. STATUS_FW_ERROR |
  2210. test_bit(STATUS_EXIT_PENDING, &priv->status) <<
  2211. STATUS_EXIT_PENDING;
  2212. iwl3945_hw_txq_ctx_stop(priv);
  2213. iwl3945_hw_rxq_stop(priv);
  2214. /* Power-down device's busmaster DMA clocks */
  2215. iwl_write_prph(priv, APMG_CLK_DIS_REG, APMG_CLK_VAL_DMA_CLK_RQT);
  2216. udelay(5);
  2217. /* Stop the device, and put it in low power state */
  2218. priv->cfg->ops->lib->apm_ops.stop(priv);
  2219. exit:
  2220. memset(&priv->card_alive, 0, sizeof(struct iwl_alive_resp));
  2221. if (priv->ibss_beacon)
  2222. dev_kfree_skb(priv->ibss_beacon);
  2223. priv->ibss_beacon = NULL;
  2224. /* clear out any free frames */
  2225. iwl3945_clear_free_frames(priv);
  2226. }
  2227. static void iwl3945_down(struct iwl_priv *priv)
  2228. {
  2229. mutex_lock(&priv->mutex);
  2230. __iwl3945_down(priv);
  2231. mutex_unlock(&priv->mutex);
  2232. iwl3945_cancel_deferred_work(priv);
  2233. }
  2234. #define MAX_HW_RESTARTS 5
  2235. static int __iwl3945_up(struct iwl_priv *priv)
  2236. {
  2237. int rc, i;
  2238. rc = iwl_alloc_bcast_station(priv, false);
  2239. if (rc)
  2240. return rc;
  2241. if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
  2242. IWL_WARN(priv, "Exit pending; will not bring the NIC up\n");
  2243. return -EIO;
  2244. }
  2245. if (!priv->ucode_data_backup.v_addr || !priv->ucode_data.v_addr) {
  2246. IWL_ERR(priv, "ucode not available for device bring up\n");
  2247. return -EIO;
  2248. }
  2249. /* If platform's RF_KILL switch is NOT set to KILL */
  2250. if (iwl_read32(priv, CSR_GP_CNTRL) &
  2251. CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
  2252. clear_bit(STATUS_RF_KILL_HW, &priv->status);
  2253. else {
  2254. set_bit(STATUS_RF_KILL_HW, &priv->status);
  2255. IWL_WARN(priv, "Radio disabled by HW RF Kill switch\n");
  2256. return -ENODEV;
  2257. }
  2258. iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
  2259. rc = iwl3945_hw_nic_init(priv);
  2260. if (rc) {
  2261. IWL_ERR(priv, "Unable to int nic\n");
  2262. return rc;
  2263. }
  2264. /* make sure rfkill handshake bits are cleared */
  2265. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  2266. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
  2267. CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
  2268. /* clear (again), then enable host interrupts */
  2269. iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
  2270. iwl_enable_interrupts(priv);
  2271. /* really make sure rfkill handshake bits are cleared */
  2272. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  2273. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  2274. /* Copy original ucode data image from disk into backup cache.
  2275. * This will be used to initialize the on-board processor's
  2276. * data SRAM for a clean start when the runtime program first loads. */
  2277. memcpy(priv->ucode_data_backup.v_addr, priv->ucode_data.v_addr,
  2278. priv->ucode_data.len);
  2279. /* We return success when we resume from suspend and rf_kill is on. */
  2280. if (test_bit(STATUS_RF_KILL_HW, &priv->status))
  2281. return 0;
  2282. for (i = 0; i < MAX_HW_RESTARTS; i++) {
  2283. /* load bootstrap state machine,
  2284. * load bootstrap program into processor's memory,
  2285. * prepare to load the "initialize" uCode */
  2286. rc = priv->cfg->ops->lib->load_ucode(priv);
  2287. if (rc) {
  2288. IWL_ERR(priv,
  2289. "Unable to set up bootstrap uCode: %d\n", rc);
  2290. continue;
  2291. }
  2292. /* start card; "initialize" will load runtime ucode */
  2293. iwl3945_nic_start(priv);
  2294. IWL_DEBUG_INFO(priv, DRV_NAME " is coming up\n");
  2295. return 0;
  2296. }
  2297. set_bit(STATUS_EXIT_PENDING, &priv->status);
  2298. __iwl3945_down(priv);
  2299. clear_bit(STATUS_EXIT_PENDING, &priv->status);
  2300. /* tried to restart and config the device for as long as our
  2301. * patience could withstand */
  2302. IWL_ERR(priv, "Unable to initialize device after %d attempts.\n", i);
  2303. return -EIO;
  2304. }
  2305. /*****************************************************************************
  2306. *
  2307. * Workqueue callbacks
  2308. *
  2309. *****************************************************************************/
  2310. static void iwl3945_bg_init_alive_start(struct work_struct *data)
  2311. {
  2312. struct iwl_priv *priv =
  2313. container_of(data, struct iwl_priv, init_alive_start.work);
  2314. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  2315. return;
  2316. mutex_lock(&priv->mutex);
  2317. iwl3945_init_alive_start(priv);
  2318. mutex_unlock(&priv->mutex);
  2319. }
  2320. static void iwl3945_bg_alive_start(struct work_struct *data)
  2321. {
  2322. struct iwl_priv *priv =
  2323. container_of(data, struct iwl_priv, alive_start.work);
  2324. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  2325. return;
  2326. mutex_lock(&priv->mutex);
  2327. iwl3945_alive_start(priv);
  2328. mutex_unlock(&priv->mutex);
  2329. }
  2330. /*
  2331. * 3945 cannot interrupt driver when hardware rf kill switch toggles;
  2332. * driver must poll CSR_GP_CNTRL_REG register for change. This register
  2333. * *is* readable even when device has been SW_RESET into low power mode
  2334. * (e.g. during RF KILL).
  2335. */
  2336. static void iwl3945_rfkill_poll(struct work_struct *data)
  2337. {
  2338. struct iwl_priv *priv =
  2339. container_of(data, struct iwl_priv, _3945.rfkill_poll.work);
  2340. bool old_rfkill = test_bit(STATUS_RF_KILL_HW, &priv->status);
  2341. bool new_rfkill = !(iwl_read32(priv, CSR_GP_CNTRL)
  2342. & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW);
  2343. if (new_rfkill != old_rfkill) {
  2344. if (new_rfkill)
  2345. set_bit(STATUS_RF_KILL_HW, &priv->status);
  2346. else
  2347. clear_bit(STATUS_RF_KILL_HW, &priv->status);
  2348. wiphy_rfkill_set_hw_state(priv->hw->wiphy, new_rfkill);
  2349. IWL_DEBUG_RF_KILL(priv, "RF_KILL bit toggled to %s.\n",
  2350. new_rfkill ? "disable radio" : "enable radio");
  2351. }
  2352. /* Keep this running, even if radio now enabled. This will be
  2353. * cancelled in mac_start() if system decides to start again */
  2354. queue_delayed_work(priv->workqueue, &priv->_3945.rfkill_poll,
  2355. round_jiffies_relative(2 * HZ));
  2356. }
  2357. void iwl3945_request_scan(struct iwl_priv *priv, struct ieee80211_vif *vif)
  2358. {
  2359. struct iwl_host_cmd cmd = {
  2360. .id = REPLY_SCAN_CMD,
  2361. .len = sizeof(struct iwl3945_scan_cmd),
  2362. .flags = CMD_SIZE_HUGE,
  2363. };
  2364. struct iwl3945_scan_cmd *scan;
  2365. struct ieee80211_conf *conf = NULL;
  2366. u8 n_probes = 0;
  2367. enum ieee80211_band band;
  2368. bool is_active = false;
  2369. conf = ieee80211_get_hw_conf(priv->hw);
  2370. cancel_delayed_work(&priv->scan_check);
  2371. if (!iwl_is_ready(priv)) {
  2372. IWL_WARN(priv, "request scan called when driver not ready.\n");
  2373. goto done;
  2374. }
  2375. /* Make sure the scan wasn't canceled before this queued work
  2376. * was given the chance to run... */
  2377. if (!test_bit(STATUS_SCANNING, &priv->status))
  2378. goto done;
  2379. /* This should never be called or scheduled if there is currently
  2380. * a scan active in the hardware. */
  2381. if (test_bit(STATUS_SCAN_HW, &priv->status)) {
  2382. IWL_DEBUG_INFO(priv, "Multiple concurrent scan requests "
  2383. "Ignoring second request.\n");
  2384. goto done;
  2385. }
  2386. if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
  2387. IWL_DEBUG_SCAN(priv, "Aborting scan due to device shutdown\n");
  2388. goto done;
  2389. }
  2390. if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
  2391. IWL_DEBUG_HC(priv,
  2392. "Scan request while abort pending. Queuing.\n");
  2393. goto done;
  2394. }
  2395. if (iwl_is_rfkill(priv)) {
  2396. IWL_DEBUG_HC(priv, "Aborting scan due to RF Kill activation\n");
  2397. goto done;
  2398. }
  2399. if (!test_bit(STATUS_READY, &priv->status)) {
  2400. IWL_DEBUG_HC(priv,
  2401. "Scan request while uninitialized. Queuing.\n");
  2402. goto done;
  2403. }
  2404. if (!priv->scan_cmd) {
  2405. priv->scan_cmd = kmalloc(sizeof(struct iwl3945_scan_cmd) +
  2406. IWL_MAX_SCAN_SIZE, GFP_KERNEL);
  2407. if (!priv->scan_cmd) {
  2408. IWL_DEBUG_SCAN(priv, "Fail to allocate scan memory\n");
  2409. goto done;
  2410. }
  2411. }
  2412. scan = priv->scan_cmd;
  2413. memset(scan, 0, sizeof(struct iwl3945_scan_cmd) + IWL_MAX_SCAN_SIZE);
  2414. scan->quiet_plcp_th = IWL_PLCP_QUIET_THRESH;
  2415. scan->quiet_time = IWL_ACTIVE_QUIET_TIME;
  2416. if (iwl_is_associated(priv)) {
  2417. u16 interval = 0;
  2418. u32 extra;
  2419. u32 suspend_time = 100;
  2420. u32 scan_suspend_time = 100;
  2421. unsigned long flags;
  2422. IWL_DEBUG_INFO(priv, "Scanning while associated...\n");
  2423. spin_lock_irqsave(&priv->lock, flags);
  2424. interval = vif ? vif->bss_conf.beacon_int : 0;
  2425. spin_unlock_irqrestore(&priv->lock, flags);
  2426. scan->suspend_time = 0;
  2427. scan->max_out_time = cpu_to_le32(200 * 1024);
  2428. if (!interval)
  2429. interval = suspend_time;
  2430. /*
  2431. * suspend time format:
  2432. * 0-19: beacon interval in usec (time before exec.)
  2433. * 20-23: 0
  2434. * 24-31: number of beacons (suspend between channels)
  2435. */
  2436. extra = (suspend_time / interval) << 24;
  2437. scan_suspend_time = 0xFF0FFFFF &
  2438. (extra | ((suspend_time % interval) * 1024));
  2439. scan->suspend_time = cpu_to_le32(scan_suspend_time);
  2440. IWL_DEBUG_SCAN(priv, "suspend_time 0x%X beacon interval %d\n",
  2441. scan_suspend_time, interval);
  2442. }
  2443. if (priv->is_internal_short_scan) {
  2444. IWL_DEBUG_SCAN(priv, "Start internal passive scan.\n");
  2445. } else if (priv->scan_request->n_ssids) {
  2446. int i, p = 0;
  2447. IWL_DEBUG_SCAN(priv, "Kicking off active scan\n");
  2448. for (i = 0; i < priv->scan_request->n_ssids; i++) {
  2449. /* always does wildcard anyway */
  2450. if (!priv->scan_request->ssids[i].ssid_len)
  2451. continue;
  2452. scan->direct_scan[p].id = WLAN_EID_SSID;
  2453. scan->direct_scan[p].len =
  2454. priv->scan_request->ssids[i].ssid_len;
  2455. memcpy(scan->direct_scan[p].ssid,
  2456. priv->scan_request->ssids[i].ssid,
  2457. priv->scan_request->ssids[i].ssid_len);
  2458. n_probes++;
  2459. p++;
  2460. }
  2461. is_active = true;
  2462. } else
  2463. IWL_DEBUG_SCAN(priv, "Kicking off passive scan.\n");
  2464. /* We don't build a direct scan probe request; the uCode will do
  2465. * that based on the direct_mask added to each channel entry */
  2466. scan->tx_cmd.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK;
  2467. scan->tx_cmd.sta_id = priv->hw_params.bcast_sta_id;
  2468. scan->tx_cmd.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
  2469. /* flags + rate selection */
  2470. switch (priv->scan_band) {
  2471. case IEEE80211_BAND_2GHZ:
  2472. scan->flags = RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK;
  2473. scan->tx_cmd.rate = IWL_RATE_1M_PLCP;
  2474. scan->good_CRC_th = 0;
  2475. band = IEEE80211_BAND_2GHZ;
  2476. break;
  2477. case IEEE80211_BAND_5GHZ:
  2478. scan->tx_cmd.rate = IWL_RATE_6M_PLCP;
  2479. /*
  2480. * If active scaning is requested but a certain channel
  2481. * is marked passive, we can do active scanning if we
  2482. * detect transmissions.
  2483. */
  2484. scan->good_CRC_th = is_active ? IWL_GOOD_CRC_TH_DEFAULT :
  2485. IWL_GOOD_CRC_TH_DISABLED;
  2486. band = IEEE80211_BAND_5GHZ;
  2487. break;
  2488. default:
  2489. IWL_WARN(priv, "Invalid scan band\n");
  2490. goto done;
  2491. }
  2492. if (!priv->is_internal_short_scan) {
  2493. scan->tx_cmd.len = cpu_to_le16(
  2494. iwl_fill_probe_req(priv,
  2495. (struct ieee80211_mgmt *)scan->data,
  2496. priv->scan_request->ie,
  2497. priv->scan_request->ie_len,
  2498. IWL_MAX_SCAN_SIZE - sizeof(*scan)));
  2499. } else {
  2500. scan->tx_cmd.len = cpu_to_le16(
  2501. iwl_fill_probe_req(priv,
  2502. (struct ieee80211_mgmt *)scan->data,
  2503. NULL, 0,
  2504. IWL_MAX_SCAN_SIZE - sizeof(*scan)));
  2505. }
  2506. /* select Rx antennas */
  2507. scan->flags |= iwl3945_get_antenna_flags(priv);
  2508. scan->channel_count =
  2509. iwl3945_get_channels_for_scan(priv, band, is_active, n_probes,
  2510. (void *)&scan->data[le16_to_cpu(scan->tx_cmd.len)], vif);
  2511. if (scan->channel_count == 0) {
  2512. IWL_DEBUG_SCAN(priv, "channel count %d\n", scan->channel_count);
  2513. goto done;
  2514. }
  2515. cmd.len += le16_to_cpu(scan->tx_cmd.len) +
  2516. scan->channel_count * sizeof(struct iwl3945_scan_channel);
  2517. cmd.data = scan;
  2518. scan->len = cpu_to_le16(cmd.len);
  2519. set_bit(STATUS_SCAN_HW, &priv->status);
  2520. if (iwl_send_cmd_sync(priv, &cmd))
  2521. goto done;
  2522. queue_delayed_work(priv->workqueue, &priv->scan_check,
  2523. IWL_SCAN_CHECK_WATCHDOG);
  2524. return;
  2525. done:
  2526. /* can not perform scan make sure we clear scanning
  2527. * bits from status so next scan request can be performed.
  2528. * if we dont clear scanning status bit here all next scan
  2529. * will fail
  2530. */
  2531. clear_bit(STATUS_SCAN_HW, &priv->status);
  2532. clear_bit(STATUS_SCANNING, &priv->status);
  2533. /* inform mac80211 scan aborted */
  2534. queue_work(priv->workqueue, &priv->scan_completed);
  2535. }
  2536. static void iwl3945_bg_restart(struct work_struct *data)
  2537. {
  2538. struct iwl_priv *priv = container_of(data, struct iwl_priv, restart);
  2539. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  2540. return;
  2541. if (test_and_clear_bit(STATUS_FW_ERROR, &priv->status)) {
  2542. mutex_lock(&priv->mutex);
  2543. priv->vif = NULL;
  2544. priv->is_open = 0;
  2545. mutex_unlock(&priv->mutex);
  2546. iwl3945_down(priv);
  2547. ieee80211_restart_hw(priv->hw);
  2548. } else {
  2549. iwl3945_down(priv);
  2550. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  2551. return;
  2552. mutex_lock(&priv->mutex);
  2553. __iwl3945_up(priv);
  2554. mutex_unlock(&priv->mutex);
  2555. }
  2556. }
  2557. static void iwl3945_bg_rx_replenish(struct work_struct *data)
  2558. {
  2559. struct iwl_priv *priv =
  2560. container_of(data, struct iwl_priv, rx_replenish);
  2561. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  2562. return;
  2563. mutex_lock(&priv->mutex);
  2564. iwl3945_rx_replenish(priv);
  2565. mutex_unlock(&priv->mutex);
  2566. }
  2567. void iwl3945_post_associate(struct iwl_priv *priv, struct ieee80211_vif *vif)
  2568. {
  2569. int rc = 0;
  2570. struct ieee80211_conf *conf = NULL;
  2571. if (!vif || !priv->is_open)
  2572. return;
  2573. if (vif->type == NL80211_IFTYPE_AP) {
  2574. IWL_ERR(priv, "%s Should not be called in AP mode\n", __func__);
  2575. return;
  2576. }
  2577. IWL_DEBUG_ASSOC(priv, "Associated as %d to: %pM\n",
  2578. vif->bss_conf.aid, priv->active_rxon.bssid_addr);
  2579. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  2580. return;
  2581. iwl_scan_cancel_timeout(priv, 200);
  2582. conf = ieee80211_get_hw_conf(priv->hw);
  2583. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  2584. iwlcore_commit_rxon(priv);
  2585. memset(&priv->rxon_timing, 0, sizeof(struct iwl_rxon_time_cmd));
  2586. iwl_setup_rxon_timing(priv, vif);
  2587. rc = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
  2588. sizeof(priv->rxon_timing), &priv->rxon_timing);
  2589. if (rc)
  2590. IWL_WARN(priv, "REPLY_RXON_TIMING failed - "
  2591. "Attempting to continue.\n");
  2592. priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
  2593. priv->staging_rxon.assoc_id = cpu_to_le16(vif->bss_conf.aid);
  2594. IWL_DEBUG_ASSOC(priv, "assoc id %d beacon interval %d\n",
  2595. vif->bss_conf.aid, vif->bss_conf.beacon_int);
  2596. if (vif->bss_conf.use_short_preamble)
  2597. priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
  2598. else
  2599. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
  2600. if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
  2601. if (vif->bss_conf.use_short_slot)
  2602. priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
  2603. else
  2604. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  2605. }
  2606. iwlcore_commit_rxon(priv);
  2607. switch (vif->type) {
  2608. case NL80211_IFTYPE_STATION:
  2609. iwl3945_rate_scale_init(priv->hw, IWL_AP_ID);
  2610. break;
  2611. case NL80211_IFTYPE_ADHOC:
  2612. iwl3945_send_beacon_cmd(priv);
  2613. break;
  2614. default:
  2615. IWL_ERR(priv, "%s Should not be called in %d mode\n",
  2616. __func__, vif->type);
  2617. break;
  2618. }
  2619. }
  2620. /*****************************************************************************
  2621. *
  2622. * mac80211 entry point functions
  2623. *
  2624. *****************************************************************************/
  2625. #define UCODE_READY_TIMEOUT (2 * HZ)
  2626. static int iwl3945_mac_start(struct ieee80211_hw *hw)
  2627. {
  2628. struct iwl_priv *priv = hw->priv;
  2629. int ret;
  2630. IWL_DEBUG_MAC80211(priv, "enter\n");
  2631. /* we should be verifying the device is ready to be opened */
  2632. mutex_lock(&priv->mutex);
  2633. /* fetch ucode file from disk, alloc and copy to bus-master buffers ...
  2634. * ucode filename and max sizes are card-specific. */
  2635. if (!priv->ucode_code.len) {
  2636. ret = iwl3945_read_ucode(priv);
  2637. if (ret) {
  2638. IWL_ERR(priv, "Could not read microcode: %d\n", ret);
  2639. mutex_unlock(&priv->mutex);
  2640. goto out_release_irq;
  2641. }
  2642. }
  2643. ret = __iwl3945_up(priv);
  2644. mutex_unlock(&priv->mutex);
  2645. if (ret)
  2646. goto out_release_irq;
  2647. IWL_DEBUG_INFO(priv, "Start UP work.\n");
  2648. /* Wait for START_ALIVE from ucode. Otherwise callbacks from
  2649. * mac80211 will not be run successfully. */
  2650. ret = wait_event_interruptible_timeout(priv->wait_command_queue,
  2651. test_bit(STATUS_READY, &priv->status),
  2652. UCODE_READY_TIMEOUT);
  2653. if (!ret) {
  2654. if (!test_bit(STATUS_READY, &priv->status)) {
  2655. IWL_ERR(priv,
  2656. "Wait for START_ALIVE timeout after %dms.\n",
  2657. jiffies_to_msecs(UCODE_READY_TIMEOUT));
  2658. ret = -ETIMEDOUT;
  2659. goto out_release_irq;
  2660. }
  2661. }
  2662. /* ucode is running and will send rfkill notifications,
  2663. * no need to poll the killswitch state anymore */
  2664. cancel_delayed_work(&priv->_3945.rfkill_poll);
  2665. iwl_led_start(priv);
  2666. priv->is_open = 1;
  2667. IWL_DEBUG_MAC80211(priv, "leave\n");
  2668. return 0;
  2669. out_release_irq:
  2670. priv->is_open = 0;
  2671. IWL_DEBUG_MAC80211(priv, "leave - failed\n");
  2672. return ret;
  2673. }
  2674. static void iwl3945_mac_stop(struct ieee80211_hw *hw)
  2675. {
  2676. struct iwl_priv *priv = hw->priv;
  2677. IWL_DEBUG_MAC80211(priv, "enter\n");
  2678. if (!priv->is_open) {
  2679. IWL_DEBUG_MAC80211(priv, "leave - skip\n");
  2680. return;
  2681. }
  2682. priv->is_open = 0;
  2683. if (iwl_is_ready_rf(priv)) {
  2684. /* stop mac, cancel any scan request and clear
  2685. * RXON_FILTER_ASSOC_MSK BIT
  2686. */
  2687. mutex_lock(&priv->mutex);
  2688. iwl_scan_cancel_timeout(priv, 100);
  2689. mutex_unlock(&priv->mutex);
  2690. }
  2691. iwl3945_down(priv);
  2692. flush_workqueue(priv->workqueue);
  2693. /* start polling the killswitch state again */
  2694. queue_delayed_work(priv->workqueue, &priv->_3945.rfkill_poll,
  2695. round_jiffies_relative(2 * HZ));
  2696. IWL_DEBUG_MAC80211(priv, "leave\n");
  2697. }
  2698. static int iwl3945_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
  2699. {
  2700. struct iwl_priv *priv = hw->priv;
  2701. IWL_DEBUG_MAC80211(priv, "enter\n");
  2702. IWL_DEBUG_TX(priv, "dev->xmit(%d bytes) at rate 0x%02x\n", skb->len,
  2703. ieee80211_get_tx_rate(hw, IEEE80211_SKB_CB(skb))->bitrate);
  2704. if (iwl3945_tx_skb(priv, skb))
  2705. dev_kfree_skb_any(skb);
  2706. IWL_DEBUG_MAC80211(priv, "leave\n");
  2707. return NETDEV_TX_OK;
  2708. }
  2709. void iwl3945_config_ap(struct iwl_priv *priv, struct ieee80211_vif *vif)
  2710. {
  2711. int rc = 0;
  2712. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  2713. return;
  2714. /* The following should be done only at AP bring up */
  2715. if (!(iwl_is_associated(priv))) {
  2716. /* RXON - unassoc (to set timing command) */
  2717. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  2718. iwlcore_commit_rxon(priv);
  2719. /* RXON Timing */
  2720. memset(&priv->rxon_timing, 0, sizeof(struct iwl_rxon_time_cmd));
  2721. iwl_setup_rxon_timing(priv, vif);
  2722. rc = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
  2723. sizeof(priv->rxon_timing),
  2724. &priv->rxon_timing);
  2725. if (rc)
  2726. IWL_WARN(priv, "REPLY_RXON_TIMING failed - "
  2727. "Attempting to continue.\n");
  2728. priv->staging_rxon.assoc_id = 0;
  2729. if (vif->bss_conf.use_short_preamble)
  2730. priv->staging_rxon.flags |=
  2731. RXON_FLG_SHORT_PREAMBLE_MSK;
  2732. else
  2733. priv->staging_rxon.flags &=
  2734. ~RXON_FLG_SHORT_PREAMBLE_MSK;
  2735. if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
  2736. if (vif->bss_conf.use_short_slot)
  2737. priv->staging_rxon.flags |=
  2738. RXON_FLG_SHORT_SLOT_MSK;
  2739. else
  2740. priv->staging_rxon.flags &=
  2741. ~RXON_FLG_SHORT_SLOT_MSK;
  2742. }
  2743. /* restore RXON assoc */
  2744. priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
  2745. iwlcore_commit_rxon(priv);
  2746. }
  2747. iwl3945_send_beacon_cmd(priv);
  2748. /* FIXME - we need to add code here to detect a totally new
  2749. * configuration, reset the AP, unassoc, rxon timing, assoc,
  2750. * clear sta table, add BCAST sta... */
  2751. }
  2752. static int iwl3945_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
  2753. struct ieee80211_vif *vif,
  2754. struct ieee80211_sta *sta,
  2755. struct ieee80211_key_conf *key)
  2756. {
  2757. struct iwl_priv *priv = hw->priv;
  2758. int ret = 0;
  2759. u8 sta_id = IWL_INVALID_STATION;
  2760. u8 static_key;
  2761. IWL_DEBUG_MAC80211(priv, "enter\n");
  2762. if (iwl3945_mod_params.sw_crypto) {
  2763. IWL_DEBUG_MAC80211(priv, "leave - hwcrypto disabled\n");
  2764. return -EOPNOTSUPP;
  2765. }
  2766. static_key = !iwl_is_associated(priv);
  2767. if (!static_key) {
  2768. sta_id = iwl_sta_id_or_broadcast(priv, sta);
  2769. if (sta_id == IWL_INVALID_STATION)
  2770. return -EINVAL;
  2771. }
  2772. mutex_lock(&priv->mutex);
  2773. iwl_scan_cancel_timeout(priv, 100);
  2774. switch (cmd) {
  2775. case SET_KEY:
  2776. if (static_key)
  2777. ret = iwl3945_set_static_key(priv, key);
  2778. else
  2779. ret = iwl3945_set_dynamic_key(priv, key, sta_id);
  2780. IWL_DEBUG_MAC80211(priv, "enable hwcrypto key\n");
  2781. break;
  2782. case DISABLE_KEY:
  2783. if (static_key)
  2784. ret = iwl3945_remove_static_key(priv);
  2785. else
  2786. ret = iwl3945_clear_sta_key_info(priv, sta_id);
  2787. IWL_DEBUG_MAC80211(priv, "disable hwcrypto key\n");
  2788. break;
  2789. default:
  2790. ret = -EINVAL;
  2791. }
  2792. mutex_unlock(&priv->mutex);
  2793. IWL_DEBUG_MAC80211(priv, "leave\n");
  2794. return ret;
  2795. }
  2796. static int iwl3945_mac_sta_add(struct ieee80211_hw *hw,
  2797. struct ieee80211_vif *vif,
  2798. struct ieee80211_sta *sta)
  2799. {
  2800. struct iwl_priv *priv = hw->priv;
  2801. struct iwl3945_sta_priv *sta_priv = (void *)sta->drv_priv;
  2802. int ret;
  2803. bool is_ap = vif->type == NL80211_IFTYPE_STATION;
  2804. u8 sta_id;
  2805. sta_priv->common.sta_id = IWL_INVALID_STATION;
  2806. IWL_DEBUG_INFO(priv, "received request to add station %pM\n",
  2807. sta->addr);
  2808. ret = iwl_add_station_common(priv, sta->addr, is_ap, &sta->ht_cap,
  2809. &sta_id);
  2810. if (ret) {
  2811. IWL_ERR(priv, "Unable to add station %pM (%d)\n",
  2812. sta->addr, ret);
  2813. /* Should we return success if return code is EEXIST ? */
  2814. return ret;
  2815. }
  2816. sta_priv->common.sta_id = sta_id;
  2817. /* Initialize rate scaling */
  2818. IWL_DEBUG_INFO(priv, "Initializing rate scaling for station %pM\n",
  2819. sta->addr);
  2820. iwl3945_rs_rate_init(priv, sta, sta_id);
  2821. return 0;
  2822. }
  2823. /*****************************************************************************
  2824. *
  2825. * sysfs attributes
  2826. *
  2827. *****************************************************************************/
  2828. #ifdef CONFIG_IWLWIFI_DEBUG
  2829. /*
  2830. * The following adds a new attribute to the sysfs representation
  2831. * of this device driver (i.e. a new file in /sys/bus/pci/drivers/iwl/)
  2832. * used for controlling the debug level.
  2833. *
  2834. * See the level definitions in iwl for details.
  2835. *
  2836. * The debug_level being managed using sysfs below is a per device debug
  2837. * level that is used instead of the global debug level if it (the per
  2838. * device debug level) is set.
  2839. */
  2840. static ssize_t show_debug_level(struct device *d,
  2841. struct device_attribute *attr, char *buf)
  2842. {
  2843. struct iwl_priv *priv = dev_get_drvdata(d);
  2844. return sprintf(buf, "0x%08X\n", iwl_get_debug_level(priv));
  2845. }
  2846. static ssize_t store_debug_level(struct device *d,
  2847. struct device_attribute *attr,
  2848. const char *buf, size_t count)
  2849. {
  2850. struct iwl_priv *priv = dev_get_drvdata(d);
  2851. unsigned long val;
  2852. int ret;
  2853. ret = strict_strtoul(buf, 0, &val);
  2854. if (ret)
  2855. IWL_INFO(priv, "%s is not in hex or decimal form.\n", buf);
  2856. else {
  2857. priv->debug_level = val;
  2858. if (iwl_alloc_traffic_mem(priv))
  2859. IWL_ERR(priv,
  2860. "Not enough memory to generate traffic log\n");
  2861. }
  2862. return strnlen(buf, count);
  2863. }
  2864. static DEVICE_ATTR(debug_level, S_IWUSR | S_IRUGO,
  2865. show_debug_level, store_debug_level);
  2866. #endif /* CONFIG_IWLWIFI_DEBUG */
  2867. static ssize_t show_temperature(struct device *d,
  2868. struct device_attribute *attr, char *buf)
  2869. {
  2870. struct iwl_priv *priv = dev_get_drvdata(d);
  2871. if (!iwl_is_alive(priv))
  2872. return -EAGAIN;
  2873. return sprintf(buf, "%d\n", iwl3945_hw_get_temperature(priv));
  2874. }
  2875. static DEVICE_ATTR(temperature, S_IRUGO, show_temperature, NULL);
  2876. static ssize_t show_tx_power(struct device *d,
  2877. struct device_attribute *attr, char *buf)
  2878. {
  2879. struct iwl_priv *priv = dev_get_drvdata(d);
  2880. return sprintf(buf, "%d\n", priv->tx_power_user_lmt);
  2881. }
  2882. static ssize_t store_tx_power(struct device *d,
  2883. struct device_attribute *attr,
  2884. const char *buf, size_t count)
  2885. {
  2886. struct iwl_priv *priv = dev_get_drvdata(d);
  2887. char *p = (char *)buf;
  2888. u32 val;
  2889. val = simple_strtoul(p, &p, 10);
  2890. if (p == buf)
  2891. IWL_INFO(priv, ": %s is not in decimal form.\n", buf);
  2892. else
  2893. iwl3945_hw_reg_set_txpower(priv, val);
  2894. return count;
  2895. }
  2896. static DEVICE_ATTR(tx_power, S_IWUSR | S_IRUGO, show_tx_power, store_tx_power);
  2897. static ssize_t show_flags(struct device *d,
  2898. struct device_attribute *attr, char *buf)
  2899. {
  2900. struct iwl_priv *priv = dev_get_drvdata(d);
  2901. return sprintf(buf, "0x%04X\n", priv->active_rxon.flags);
  2902. }
  2903. static ssize_t store_flags(struct device *d,
  2904. struct device_attribute *attr,
  2905. const char *buf, size_t count)
  2906. {
  2907. struct iwl_priv *priv = dev_get_drvdata(d);
  2908. u32 flags = simple_strtoul(buf, NULL, 0);
  2909. mutex_lock(&priv->mutex);
  2910. if (le32_to_cpu(priv->staging_rxon.flags) != flags) {
  2911. /* Cancel any currently running scans... */
  2912. if (iwl_scan_cancel_timeout(priv, 100))
  2913. IWL_WARN(priv, "Could not cancel scan.\n");
  2914. else {
  2915. IWL_DEBUG_INFO(priv, "Committing rxon.flags = 0x%04X\n",
  2916. flags);
  2917. priv->staging_rxon.flags = cpu_to_le32(flags);
  2918. iwlcore_commit_rxon(priv);
  2919. }
  2920. }
  2921. mutex_unlock(&priv->mutex);
  2922. return count;
  2923. }
  2924. static DEVICE_ATTR(flags, S_IWUSR | S_IRUGO, show_flags, store_flags);
  2925. static ssize_t show_filter_flags(struct device *d,
  2926. struct device_attribute *attr, char *buf)
  2927. {
  2928. struct iwl_priv *priv = dev_get_drvdata(d);
  2929. return sprintf(buf, "0x%04X\n",
  2930. le32_to_cpu(priv->active_rxon.filter_flags));
  2931. }
  2932. static ssize_t store_filter_flags(struct device *d,
  2933. struct device_attribute *attr,
  2934. const char *buf, size_t count)
  2935. {
  2936. struct iwl_priv *priv = dev_get_drvdata(d);
  2937. u32 filter_flags = simple_strtoul(buf, NULL, 0);
  2938. mutex_lock(&priv->mutex);
  2939. if (le32_to_cpu(priv->staging_rxon.filter_flags) != filter_flags) {
  2940. /* Cancel any currently running scans... */
  2941. if (iwl_scan_cancel_timeout(priv, 100))
  2942. IWL_WARN(priv, "Could not cancel scan.\n");
  2943. else {
  2944. IWL_DEBUG_INFO(priv, "Committing rxon.filter_flags = "
  2945. "0x%04X\n", filter_flags);
  2946. priv->staging_rxon.filter_flags =
  2947. cpu_to_le32(filter_flags);
  2948. iwlcore_commit_rxon(priv);
  2949. }
  2950. }
  2951. mutex_unlock(&priv->mutex);
  2952. return count;
  2953. }
  2954. static DEVICE_ATTR(filter_flags, S_IWUSR | S_IRUGO, show_filter_flags,
  2955. store_filter_flags);
  2956. static ssize_t show_measurement(struct device *d,
  2957. struct device_attribute *attr, char *buf)
  2958. {
  2959. struct iwl_priv *priv = dev_get_drvdata(d);
  2960. struct iwl_spectrum_notification measure_report;
  2961. u32 size = sizeof(measure_report), len = 0, ofs = 0;
  2962. u8 *data = (u8 *)&measure_report;
  2963. unsigned long flags;
  2964. spin_lock_irqsave(&priv->lock, flags);
  2965. if (!(priv->measurement_status & MEASUREMENT_READY)) {
  2966. spin_unlock_irqrestore(&priv->lock, flags);
  2967. return 0;
  2968. }
  2969. memcpy(&measure_report, &priv->measure_report, size);
  2970. priv->measurement_status = 0;
  2971. spin_unlock_irqrestore(&priv->lock, flags);
  2972. while (size && (PAGE_SIZE - len)) {
  2973. hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
  2974. PAGE_SIZE - len, 1);
  2975. len = strlen(buf);
  2976. if (PAGE_SIZE - len)
  2977. buf[len++] = '\n';
  2978. ofs += 16;
  2979. size -= min(size, 16U);
  2980. }
  2981. return len;
  2982. }
  2983. static ssize_t store_measurement(struct device *d,
  2984. struct device_attribute *attr,
  2985. const char *buf, size_t count)
  2986. {
  2987. struct iwl_priv *priv = dev_get_drvdata(d);
  2988. struct ieee80211_measurement_params params = {
  2989. .channel = le16_to_cpu(priv->active_rxon.channel),
  2990. .start_time = cpu_to_le64(priv->_3945.last_tsf),
  2991. .duration = cpu_to_le16(1),
  2992. };
  2993. u8 type = IWL_MEASURE_BASIC;
  2994. u8 buffer[32];
  2995. u8 channel;
  2996. if (count) {
  2997. char *p = buffer;
  2998. strncpy(buffer, buf, min(sizeof(buffer), count));
  2999. channel = simple_strtoul(p, NULL, 0);
  3000. if (channel)
  3001. params.channel = channel;
  3002. p = buffer;
  3003. while (*p && *p != ' ')
  3004. p++;
  3005. if (*p)
  3006. type = simple_strtoul(p + 1, NULL, 0);
  3007. }
  3008. IWL_DEBUG_INFO(priv, "Invoking measurement of type %d on "
  3009. "channel %d (for '%s')\n", type, params.channel, buf);
  3010. iwl3945_get_measurement(priv, &params, type);
  3011. return count;
  3012. }
  3013. static DEVICE_ATTR(measurement, S_IRUSR | S_IWUSR,
  3014. show_measurement, store_measurement);
  3015. static ssize_t store_retry_rate(struct device *d,
  3016. struct device_attribute *attr,
  3017. const char *buf, size_t count)
  3018. {
  3019. struct iwl_priv *priv = dev_get_drvdata(d);
  3020. priv->retry_rate = simple_strtoul(buf, NULL, 0);
  3021. if (priv->retry_rate <= 0)
  3022. priv->retry_rate = 1;
  3023. return count;
  3024. }
  3025. static ssize_t show_retry_rate(struct device *d,
  3026. struct device_attribute *attr, char *buf)
  3027. {
  3028. struct iwl_priv *priv = dev_get_drvdata(d);
  3029. return sprintf(buf, "%d", priv->retry_rate);
  3030. }
  3031. static DEVICE_ATTR(retry_rate, S_IWUSR | S_IRUSR, show_retry_rate,
  3032. store_retry_rate);
  3033. static ssize_t show_channels(struct device *d,
  3034. struct device_attribute *attr, char *buf)
  3035. {
  3036. /* all this shit doesn't belong into sysfs anyway */
  3037. return 0;
  3038. }
  3039. static DEVICE_ATTR(channels, S_IRUSR, show_channels, NULL);
  3040. static ssize_t show_antenna(struct device *d,
  3041. struct device_attribute *attr, char *buf)
  3042. {
  3043. struct iwl_priv *priv = dev_get_drvdata(d);
  3044. if (!iwl_is_alive(priv))
  3045. return -EAGAIN;
  3046. return sprintf(buf, "%d\n", iwl3945_mod_params.antenna);
  3047. }
  3048. static ssize_t store_antenna(struct device *d,
  3049. struct device_attribute *attr,
  3050. const char *buf, size_t count)
  3051. {
  3052. struct iwl_priv *priv __maybe_unused = dev_get_drvdata(d);
  3053. int ant;
  3054. if (count == 0)
  3055. return 0;
  3056. if (sscanf(buf, "%1i", &ant) != 1) {
  3057. IWL_DEBUG_INFO(priv, "not in hex or decimal form.\n");
  3058. return count;
  3059. }
  3060. if ((ant >= 0) && (ant <= 2)) {
  3061. IWL_DEBUG_INFO(priv, "Setting antenna select to %d.\n", ant);
  3062. iwl3945_mod_params.antenna = (enum iwl3945_antenna)ant;
  3063. } else
  3064. IWL_DEBUG_INFO(priv, "Bad antenna select value %d.\n", ant);
  3065. return count;
  3066. }
  3067. static DEVICE_ATTR(antenna, S_IWUSR | S_IRUGO, show_antenna, store_antenna);
  3068. static ssize_t show_status(struct device *d,
  3069. struct device_attribute *attr, char *buf)
  3070. {
  3071. struct iwl_priv *priv = dev_get_drvdata(d);
  3072. if (!iwl_is_alive(priv))
  3073. return -EAGAIN;
  3074. return sprintf(buf, "0x%08x\n", (int)priv->status);
  3075. }
  3076. static DEVICE_ATTR(status, S_IRUGO, show_status, NULL);
  3077. static ssize_t dump_error_log(struct device *d,
  3078. struct device_attribute *attr,
  3079. const char *buf, size_t count)
  3080. {
  3081. struct iwl_priv *priv = dev_get_drvdata(d);
  3082. char *p = (char *)buf;
  3083. if (p[0] == '1')
  3084. iwl3945_dump_nic_error_log(priv);
  3085. return strnlen(buf, count);
  3086. }
  3087. static DEVICE_ATTR(dump_errors, S_IWUSR, NULL, dump_error_log);
  3088. /*****************************************************************************
  3089. *
  3090. * driver setup and tear down
  3091. *
  3092. *****************************************************************************/
  3093. static void iwl3945_setup_deferred_work(struct iwl_priv *priv)
  3094. {
  3095. priv->workqueue = create_singlethread_workqueue(DRV_NAME);
  3096. init_waitqueue_head(&priv->wait_command_queue);
  3097. INIT_WORK(&priv->restart, iwl3945_bg_restart);
  3098. INIT_WORK(&priv->rx_replenish, iwl3945_bg_rx_replenish);
  3099. INIT_WORK(&priv->beacon_update, iwl3945_bg_beacon_update);
  3100. INIT_DELAYED_WORK(&priv->init_alive_start, iwl3945_bg_init_alive_start);
  3101. INIT_DELAYED_WORK(&priv->alive_start, iwl3945_bg_alive_start);
  3102. INIT_DELAYED_WORK(&priv->_3945.rfkill_poll, iwl3945_rfkill_poll);
  3103. INIT_WORK(&priv->scan_completed, iwl_bg_scan_completed);
  3104. INIT_WORK(&priv->abort_scan, iwl_bg_abort_scan);
  3105. INIT_WORK(&priv->start_internal_scan, iwl_bg_start_internal_scan);
  3106. INIT_DELAYED_WORK(&priv->scan_check, iwl_bg_scan_check);
  3107. iwl3945_hw_setup_deferred_work(priv);
  3108. if (priv->cfg->ops->lib->recover_from_tx_stall) {
  3109. init_timer(&priv->monitor_recover);
  3110. priv->monitor_recover.data = (unsigned long)priv;
  3111. priv->monitor_recover.function =
  3112. priv->cfg->ops->lib->recover_from_tx_stall;
  3113. }
  3114. tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
  3115. iwl3945_irq_tasklet, (unsigned long)priv);
  3116. }
  3117. static void iwl3945_cancel_deferred_work(struct iwl_priv *priv)
  3118. {
  3119. iwl3945_hw_cancel_deferred_work(priv);
  3120. cancel_delayed_work_sync(&priv->init_alive_start);
  3121. cancel_delayed_work(&priv->scan_check);
  3122. cancel_delayed_work(&priv->alive_start);
  3123. cancel_work_sync(&priv->start_internal_scan);
  3124. cancel_work_sync(&priv->beacon_update);
  3125. if (priv->cfg->ops->lib->recover_from_tx_stall)
  3126. del_timer_sync(&priv->monitor_recover);
  3127. }
  3128. static struct attribute *iwl3945_sysfs_entries[] = {
  3129. &dev_attr_antenna.attr,
  3130. &dev_attr_channels.attr,
  3131. &dev_attr_dump_errors.attr,
  3132. &dev_attr_flags.attr,
  3133. &dev_attr_filter_flags.attr,
  3134. &dev_attr_measurement.attr,
  3135. &dev_attr_retry_rate.attr,
  3136. &dev_attr_status.attr,
  3137. &dev_attr_temperature.attr,
  3138. &dev_attr_tx_power.attr,
  3139. #ifdef CONFIG_IWLWIFI_DEBUG
  3140. &dev_attr_debug_level.attr,
  3141. #endif
  3142. NULL
  3143. };
  3144. static struct attribute_group iwl3945_attribute_group = {
  3145. .name = NULL, /* put in device directory */
  3146. .attrs = iwl3945_sysfs_entries,
  3147. };
  3148. static struct ieee80211_ops iwl3945_hw_ops = {
  3149. .tx = iwl3945_mac_tx,
  3150. .start = iwl3945_mac_start,
  3151. .stop = iwl3945_mac_stop,
  3152. .add_interface = iwl_mac_add_interface,
  3153. .remove_interface = iwl_mac_remove_interface,
  3154. .config = iwl_mac_config,
  3155. .configure_filter = iwl_configure_filter,
  3156. .set_key = iwl3945_mac_set_key,
  3157. .conf_tx = iwl_mac_conf_tx,
  3158. .reset_tsf = iwl_mac_reset_tsf,
  3159. .bss_info_changed = iwl_bss_info_changed,
  3160. .hw_scan = iwl_mac_hw_scan,
  3161. .sta_add = iwl3945_mac_sta_add,
  3162. .sta_remove = iwl_mac_sta_remove,
  3163. };
  3164. static int iwl3945_init_drv(struct iwl_priv *priv)
  3165. {
  3166. int ret;
  3167. struct iwl3945_eeprom *eeprom = (struct iwl3945_eeprom *)priv->eeprom;
  3168. priv->retry_rate = 1;
  3169. priv->ibss_beacon = NULL;
  3170. spin_lock_init(&priv->sta_lock);
  3171. spin_lock_init(&priv->hcmd_lock);
  3172. INIT_LIST_HEAD(&priv->free_frames);
  3173. mutex_init(&priv->mutex);
  3174. mutex_init(&priv->sync_cmd_mutex);
  3175. priv->ieee_channels = NULL;
  3176. priv->ieee_rates = NULL;
  3177. priv->band = IEEE80211_BAND_2GHZ;
  3178. priv->iw_mode = NL80211_IFTYPE_STATION;
  3179. priv->missed_beacon_threshold = IWL_MISSED_BEACON_THRESHOLD_DEF;
  3180. priv->tx_power_user_lmt = IWL_DEFAULT_TX_POWER;
  3181. if (eeprom->version < EEPROM_3945_EEPROM_VERSION) {
  3182. IWL_WARN(priv, "Unsupported EEPROM version: 0x%04X\n",
  3183. eeprom->version);
  3184. ret = -EINVAL;
  3185. goto err;
  3186. }
  3187. ret = iwl_init_channel_map(priv);
  3188. if (ret) {
  3189. IWL_ERR(priv, "initializing regulatory failed: %d\n", ret);
  3190. goto err;
  3191. }
  3192. /* Set up txpower settings in driver for all channels */
  3193. if (iwl3945_txpower_set_from_eeprom(priv)) {
  3194. ret = -EIO;
  3195. goto err_free_channel_map;
  3196. }
  3197. ret = iwlcore_init_geos(priv);
  3198. if (ret) {
  3199. IWL_ERR(priv, "initializing geos failed: %d\n", ret);
  3200. goto err_free_channel_map;
  3201. }
  3202. iwl3945_init_hw_rates(priv, priv->ieee_rates);
  3203. return 0;
  3204. err_free_channel_map:
  3205. iwl_free_channel_map(priv);
  3206. err:
  3207. return ret;
  3208. }
  3209. #define IWL3945_MAX_PROBE_REQUEST 200
  3210. static int iwl3945_setup_mac(struct iwl_priv *priv)
  3211. {
  3212. int ret;
  3213. struct ieee80211_hw *hw = priv->hw;
  3214. hw->rate_control_algorithm = "iwl-3945-rs";
  3215. hw->sta_data_size = sizeof(struct iwl3945_sta_priv);
  3216. hw->vif_data_size = sizeof(struct iwl_vif_priv);
  3217. /* Tell mac80211 our characteristics */
  3218. hw->flags = IEEE80211_HW_SIGNAL_DBM |
  3219. IEEE80211_HW_SPECTRUM_MGMT;
  3220. if (!priv->cfg->broken_powersave)
  3221. hw->flags |= IEEE80211_HW_SUPPORTS_PS |
  3222. IEEE80211_HW_SUPPORTS_DYNAMIC_PS;
  3223. hw->wiphy->interface_modes =
  3224. BIT(NL80211_IFTYPE_STATION) |
  3225. BIT(NL80211_IFTYPE_ADHOC);
  3226. hw->wiphy->flags |= WIPHY_FLAG_CUSTOM_REGULATORY |
  3227. WIPHY_FLAG_DISABLE_BEACON_HINTS;
  3228. hw->wiphy->max_scan_ssids = PROBE_OPTION_MAX_3945;
  3229. /* we create the 802.11 header and a zero-length SSID element */
  3230. hw->wiphy->max_scan_ie_len = IWL3945_MAX_PROBE_REQUEST - 24 - 2;
  3231. /* Default value; 4 EDCA QOS priorities */
  3232. hw->queues = 4;
  3233. if (priv->bands[IEEE80211_BAND_2GHZ].n_channels)
  3234. priv->hw->wiphy->bands[IEEE80211_BAND_2GHZ] =
  3235. &priv->bands[IEEE80211_BAND_2GHZ];
  3236. if (priv->bands[IEEE80211_BAND_5GHZ].n_channels)
  3237. priv->hw->wiphy->bands[IEEE80211_BAND_5GHZ] =
  3238. &priv->bands[IEEE80211_BAND_5GHZ];
  3239. ret = ieee80211_register_hw(priv->hw);
  3240. if (ret) {
  3241. IWL_ERR(priv, "Failed to register hw (error %d)\n", ret);
  3242. return ret;
  3243. }
  3244. priv->mac80211_registered = 1;
  3245. return 0;
  3246. }
  3247. static int iwl3945_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
  3248. {
  3249. int err = 0;
  3250. struct iwl_priv *priv;
  3251. struct ieee80211_hw *hw;
  3252. struct iwl_cfg *cfg = (struct iwl_cfg *)(ent->driver_data);
  3253. struct iwl3945_eeprom *eeprom;
  3254. unsigned long flags;
  3255. /***********************
  3256. * 1. Allocating HW data
  3257. * ********************/
  3258. /* mac80211 allocates memory for this device instance, including
  3259. * space for this driver's private structure */
  3260. hw = iwl_alloc_all(cfg, &iwl3945_hw_ops);
  3261. if (hw == NULL) {
  3262. printk(KERN_ERR DRV_NAME "Can not allocate network device\n");
  3263. err = -ENOMEM;
  3264. goto out;
  3265. }
  3266. priv = hw->priv;
  3267. SET_IEEE80211_DEV(hw, &pdev->dev);
  3268. /*
  3269. * Disabling hardware scan means that mac80211 will perform scans
  3270. * "the hard way", rather than using device's scan.
  3271. */
  3272. if (iwl3945_mod_params.disable_hw_scan) {
  3273. IWL_DEBUG_INFO(priv, "Disabling hw_scan\n");
  3274. iwl3945_hw_ops.hw_scan = NULL;
  3275. }
  3276. IWL_DEBUG_INFO(priv, "*** LOAD DRIVER ***\n");
  3277. priv->cfg = cfg;
  3278. priv->pci_dev = pdev;
  3279. priv->inta_mask = CSR_INI_SET_MASK;
  3280. #ifdef CONFIG_IWLWIFI_DEBUG
  3281. atomic_set(&priv->restrict_refcnt, 0);
  3282. #endif
  3283. if (iwl_alloc_traffic_mem(priv))
  3284. IWL_ERR(priv, "Not enough memory to generate traffic log\n");
  3285. /***************************
  3286. * 2. Initializing PCI bus
  3287. * *************************/
  3288. if (pci_enable_device(pdev)) {
  3289. err = -ENODEV;
  3290. goto out_ieee80211_free_hw;
  3291. }
  3292. pci_set_master(pdev);
  3293. err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
  3294. if (!err)
  3295. err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
  3296. if (err) {
  3297. IWL_WARN(priv, "No suitable DMA available.\n");
  3298. goto out_pci_disable_device;
  3299. }
  3300. pci_set_drvdata(pdev, priv);
  3301. err = pci_request_regions(pdev, DRV_NAME);
  3302. if (err)
  3303. goto out_pci_disable_device;
  3304. /***********************
  3305. * 3. Read REV Register
  3306. * ********************/
  3307. priv->hw_base = pci_iomap(pdev, 0, 0);
  3308. if (!priv->hw_base) {
  3309. err = -ENODEV;
  3310. goto out_pci_release_regions;
  3311. }
  3312. IWL_DEBUG_INFO(priv, "pci_resource_len = 0x%08llx\n",
  3313. (unsigned long long) pci_resource_len(pdev, 0));
  3314. IWL_DEBUG_INFO(priv, "pci_resource_base = %p\n", priv->hw_base);
  3315. /* We disable the RETRY_TIMEOUT register (0x41) to keep
  3316. * PCI Tx retries from interfering with C3 CPU state */
  3317. pci_write_config_byte(pdev, 0x41, 0x00);
  3318. /* these spin locks will be used in apm_ops.init and EEPROM access
  3319. * we should init now
  3320. */
  3321. spin_lock_init(&priv->reg_lock);
  3322. spin_lock_init(&priv->lock);
  3323. /*
  3324. * stop and reset the on-board processor just in case it is in a
  3325. * strange state ... like being left stranded by a primary kernel
  3326. * and this is now the kdump kernel trying to start up
  3327. */
  3328. iwl_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
  3329. /***********************
  3330. * 4. Read EEPROM
  3331. * ********************/
  3332. /* Read the EEPROM */
  3333. err = iwl_eeprom_init(priv);
  3334. if (err) {
  3335. IWL_ERR(priv, "Unable to init EEPROM\n");
  3336. goto out_iounmap;
  3337. }
  3338. /* MAC Address location in EEPROM same for 3945/4965 */
  3339. eeprom = (struct iwl3945_eeprom *)priv->eeprom;
  3340. memcpy(priv->mac_addr, eeprom->mac_address, ETH_ALEN);
  3341. IWL_DEBUG_INFO(priv, "MAC address: %pM\n", priv->mac_addr);
  3342. SET_IEEE80211_PERM_ADDR(priv->hw, priv->mac_addr);
  3343. /***********************
  3344. * 5. Setup HW Constants
  3345. * ********************/
  3346. /* Device-specific setup */
  3347. if (iwl3945_hw_set_hw_params(priv)) {
  3348. IWL_ERR(priv, "failed to set hw settings\n");
  3349. goto out_eeprom_free;
  3350. }
  3351. /***********************
  3352. * 6. Setup priv
  3353. * ********************/
  3354. err = iwl3945_init_drv(priv);
  3355. if (err) {
  3356. IWL_ERR(priv, "initializing driver failed\n");
  3357. goto out_unset_hw_params;
  3358. }
  3359. IWL_INFO(priv, "Detected Intel Wireless WiFi Link %s\n",
  3360. priv->cfg->name);
  3361. /***********************
  3362. * 7. Setup Services
  3363. * ********************/
  3364. spin_lock_irqsave(&priv->lock, flags);
  3365. iwl_disable_interrupts(priv);
  3366. spin_unlock_irqrestore(&priv->lock, flags);
  3367. pci_enable_msi(priv->pci_dev);
  3368. err = request_irq(priv->pci_dev->irq, priv->cfg->ops->lib->isr,
  3369. IRQF_SHARED, DRV_NAME, priv);
  3370. if (err) {
  3371. IWL_ERR(priv, "Error allocating IRQ %d\n", priv->pci_dev->irq);
  3372. goto out_disable_msi;
  3373. }
  3374. err = sysfs_create_group(&pdev->dev.kobj, &iwl3945_attribute_group);
  3375. if (err) {
  3376. IWL_ERR(priv, "failed to create sysfs device attributes\n");
  3377. goto out_release_irq;
  3378. }
  3379. iwl_set_rxon_channel(priv,
  3380. &priv->bands[IEEE80211_BAND_2GHZ].channels[5]);
  3381. iwl3945_setup_deferred_work(priv);
  3382. iwl3945_setup_rx_handlers(priv);
  3383. iwl_power_initialize(priv);
  3384. /*********************************
  3385. * 8. Setup and Register mac80211
  3386. * *******************************/
  3387. iwl_enable_interrupts(priv);
  3388. err = iwl3945_setup_mac(priv);
  3389. if (err)
  3390. goto out_remove_sysfs;
  3391. err = iwl_dbgfs_register(priv, DRV_NAME);
  3392. if (err)
  3393. IWL_ERR(priv, "failed to create debugfs files. Ignoring error: %d\n", err);
  3394. /* Start monitoring the killswitch */
  3395. queue_delayed_work(priv->workqueue, &priv->_3945.rfkill_poll,
  3396. 2 * HZ);
  3397. return 0;
  3398. out_remove_sysfs:
  3399. destroy_workqueue(priv->workqueue);
  3400. priv->workqueue = NULL;
  3401. sysfs_remove_group(&pdev->dev.kobj, &iwl3945_attribute_group);
  3402. out_release_irq:
  3403. free_irq(priv->pci_dev->irq, priv);
  3404. out_disable_msi:
  3405. pci_disable_msi(priv->pci_dev);
  3406. iwlcore_free_geos(priv);
  3407. iwl_free_channel_map(priv);
  3408. out_unset_hw_params:
  3409. iwl3945_unset_hw_params(priv);
  3410. out_eeprom_free:
  3411. iwl_eeprom_free(priv);
  3412. out_iounmap:
  3413. pci_iounmap(pdev, priv->hw_base);
  3414. out_pci_release_regions:
  3415. pci_release_regions(pdev);
  3416. out_pci_disable_device:
  3417. pci_set_drvdata(pdev, NULL);
  3418. pci_disable_device(pdev);
  3419. out_ieee80211_free_hw:
  3420. iwl_free_traffic_mem(priv);
  3421. ieee80211_free_hw(priv->hw);
  3422. out:
  3423. return err;
  3424. }
  3425. static void __devexit iwl3945_pci_remove(struct pci_dev *pdev)
  3426. {
  3427. struct iwl_priv *priv = pci_get_drvdata(pdev);
  3428. unsigned long flags;
  3429. if (!priv)
  3430. return;
  3431. IWL_DEBUG_INFO(priv, "*** UNLOAD DRIVER ***\n");
  3432. iwl_dbgfs_unregister(priv);
  3433. set_bit(STATUS_EXIT_PENDING, &priv->status);
  3434. if (priv->mac80211_registered) {
  3435. ieee80211_unregister_hw(priv->hw);
  3436. priv->mac80211_registered = 0;
  3437. } else {
  3438. iwl3945_down(priv);
  3439. }
  3440. /*
  3441. * Make sure device is reset to low power before unloading driver.
  3442. * This may be redundant with iwl_down(), but there are paths to
  3443. * run iwl_down() without calling apm_ops.stop(), and there are
  3444. * paths to avoid running iwl_down() at all before leaving driver.
  3445. * This (inexpensive) call *makes sure* device is reset.
  3446. */
  3447. priv->cfg->ops->lib->apm_ops.stop(priv);
  3448. /* make sure we flush any pending irq or
  3449. * tasklet for the driver
  3450. */
  3451. spin_lock_irqsave(&priv->lock, flags);
  3452. iwl_disable_interrupts(priv);
  3453. spin_unlock_irqrestore(&priv->lock, flags);
  3454. iwl_synchronize_irq(priv);
  3455. sysfs_remove_group(&pdev->dev.kobj, &iwl3945_attribute_group);
  3456. cancel_delayed_work_sync(&priv->_3945.rfkill_poll);
  3457. iwl3945_dealloc_ucode_pci(priv);
  3458. if (priv->rxq.bd)
  3459. iwl3945_rx_queue_free(priv, &priv->rxq);
  3460. iwl3945_hw_txq_ctx_free(priv);
  3461. iwl3945_unset_hw_params(priv);
  3462. /*netif_stop_queue(dev); */
  3463. flush_workqueue(priv->workqueue);
  3464. /* ieee80211_unregister_hw calls iwl3945_mac_stop, which flushes
  3465. * priv->workqueue... so we can't take down the workqueue
  3466. * until now... */
  3467. destroy_workqueue(priv->workqueue);
  3468. priv->workqueue = NULL;
  3469. iwl_free_traffic_mem(priv);
  3470. free_irq(pdev->irq, priv);
  3471. pci_disable_msi(pdev);
  3472. pci_iounmap(pdev, priv->hw_base);
  3473. pci_release_regions(pdev);
  3474. pci_disable_device(pdev);
  3475. pci_set_drvdata(pdev, NULL);
  3476. iwl_free_channel_map(priv);
  3477. iwlcore_free_geos(priv);
  3478. kfree(priv->scan_cmd);
  3479. if (priv->ibss_beacon)
  3480. dev_kfree_skb(priv->ibss_beacon);
  3481. ieee80211_free_hw(priv->hw);
  3482. }
  3483. /*****************************************************************************
  3484. *
  3485. * driver and module entry point
  3486. *
  3487. *****************************************************************************/
  3488. static struct pci_driver iwl3945_driver = {
  3489. .name = DRV_NAME,
  3490. .id_table = iwl3945_hw_card_ids,
  3491. .probe = iwl3945_pci_probe,
  3492. .remove = __devexit_p(iwl3945_pci_remove),
  3493. #ifdef CONFIG_PM
  3494. .suspend = iwl_pci_suspend,
  3495. .resume = iwl_pci_resume,
  3496. #endif
  3497. };
  3498. static int __init iwl3945_init(void)
  3499. {
  3500. int ret;
  3501. printk(KERN_INFO DRV_NAME ": " DRV_DESCRIPTION ", " DRV_VERSION "\n");
  3502. printk(KERN_INFO DRV_NAME ": " DRV_COPYRIGHT "\n");
  3503. ret = iwl3945_rate_control_register();
  3504. if (ret) {
  3505. printk(KERN_ERR DRV_NAME
  3506. "Unable to register rate control algorithm: %d\n", ret);
  3507. return ret;
  3508. }
  3509. ret = pci_register_driver(&iwl3945_driver);
  3510. if (ret) {
  3511. printk(KERN_ERR DRV_NAME "Unable to initialize PCI module\n");
  3512. goto error_register;
  3513. }
  3514. return ret;
  3515. error_register:
  3516. iwl3945_rate_control_unregister();
  3517. return ret;
  3518. }
  3519. static void __exit iwl3945_exit(void)
  3520. {
  3521. pci_unregister_driver(&iwl3945_driver);
  3522. iwl3945_rate_control_unregister();
  3523. }
  3524. MODULE_FIRMWARE(IWL3945_MODULE_FIRMWARE(IWL3945_UCODE_API_MAX));
  3525. module_param_named(antenna, iwl3945_mod_params.antenna, int, S_IRUGO);
  3526. MODULE_PARM_DESC(antenna, "select antenna (1=Main, 2=Aux, default 0 [both])");
  3527. module_param_named(swcrypto, iwl3945_mod_params.sw_crypto, int, S_IRUGO);
  3528. MODULE_PARM_DESC(swcrypto,
  3529. "using software crypto (default 1 [software])\n");
  3530. #ifdef CONFIG_IWLWIFI_DEBUG
  3531. module_param_named(debug, iwl_debug_level, uint, S_IRUGO | S_IWUSR);
  3532. MODULE_PARM_DESC(debug, "debug output mask");
  3533. #endif
  3534. module_param_named(disable_hw_scan, iwl3945_mod_params.disable_hw_scan,
  3535. int, S_IRUGO);
  3536. MODULE_PARM_DESC(disable_hw_scan, "disable hardware scanning (default 0)");
  3537. module_param_named(fw_restart3945, iwl3945_mod_params.restart_fw, int, S_IRUGO);
  3538. MODULE_PARM_DESC(fw_restart3945, "restart firmware in case of error");
  3539. module_exit(iwl3945_exit);
  3540. module_init(iwl3945_init);