board-omap3evm.c 21 KB

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  1. /*
  2. * linux/arch/arm/mach-omap2/board-omap3evm.c
  3. *
  4. * Copyright (C) 2008 Texas Instruments
  5. *
  6. * Modified from mach-omap2/board-3430sdp.c
  7. *
  8. * Initial code: Syed Mohammed Khasim
  9. *
  10. * This program is free software; you can redistribute it and/or modify
  11. * it under the terms of the GNU General Public License version 2 as
  12. * published by the Free Software Foundation.
  13. */
  14. #include <linux/kernel.h>
  15. #include <linux/init.h>
  16. #include <linux/platform_device.h>
  17. #include <linux/delay.h>
  18. #include <linux/err.h>
  19. #include <linux/clk.h>
  20. #include <linux/gpio.h>
  21. #include <linux/input.h>
  22. #include <linux/input/matrix_keypad.h>
  23. #include <linux/leds.h>
  24. #include <linux/interrupt.h>
  25. #include <linux/mtd/mtd.h>
  26. #include <linux/mtd/partitions.h>
  27. #include <linux/mtd/nand.h>
  28. #include <linux/spi/spi.h>
  29. #include <linux/spi/ads7846.h>
  30. #include <linux/i2c/twl.h>
  31. #include <linux/usb/otg.h>
  32. #include <linux/usb/nop-usb-xceiv.h>
  33. #include <linux/smsc911x.h>
  34. #include <linux/wl12xx.h>
  35. #include <linux/regulator/fixed.h>
  36. #include <linux/regulator/machine.h>
  37. #include <linux/mmc/host.h>
  38. #include <linux/export.h>
  39. #include <asm/mach-types.h>
  40. #include <asm/mach/arch.h>
  41. #include <asm/mach/map.h>
  42. #include <plat/usb.h>
  43. #include <linux/platform_data/mtd-nand-omap2.h>
  44. #include "common.h"
  45. #include <linux/platform_data/spi-omap2-mcspi.h>
  46. #include <video/omapdss.h>
  47. #include <video/omap-panel-tfp410.h>
  48. #include "mux.h"
  49. #include "sdram-micron-mt46h32m32lf-6.h"
  50. #include "hsmmc.h"
  51. #include "common-board-devices.h"
  52. #include "board-flash.h"
  53. #define NAND_CS 0
  54. #define OMAP3_EVM_TS_GPIO 175
  55. #define OMAP3_EVM_EHCI_VBUS 22
  56. #define OMAP3_EVM_EHCI_SELECT 61
  57. #define OMAP3EVM_ETHR_START 0x2c000000
  58. #define OMAP3EVM_ETHR_SIZE 1024
  59. #define OMAP3EVM_ETHR_ID_REV 0x50
  60. #define OMAP3EVM_ETHR_GPIO_IRQ 176
  61. #define OMAP3EVM_SMSC911X_CS 5
  62. /*
  63. * Eth Reset signal
  64. * 64 = Generation 1 (<=RevD)
  65. * 7 = Generation 2 (>=RevE)
  66. */
  67. #define OMAP3EVM_GEN1_ETHR_GPIO_RST 64
  68. #define OMAP3EVM_GEN2_ETHR_GPIO_RST 7
  69. /*
  70. * OMAP35x EVM revision
  71. * Run time detection of EVM revision is done by reading Ethernet
  72. * PHY ID -
  73. * GEN_1 = 0x01150000
  74. * GEN_2 = 0x92200000
  75. */
  76. enum {
  77. OMAP3EVM_BOARD_GEN_1 = 0, /* EVM Rev between A - D */
  78. OMAP3EVM_BOARD_GEN_2, /* EVM Rev >= Rev E */
  79. };
  80. static u8 omap3_evm_version;
  81. static u8 get_omap3_evm_rev(void)
  82. {
  83. return omap3_evm_version;
  84. }
  85. static void __init omap3_evm_get_revision(void)
  86. {
  87. void __iomem *ioaddr;
  88. unsigned int smsc_id;
  89. /* Ethernet PHY ID is stored at ID_REV register */
  90. ioaddr = ioremap_nocache(OMAP3EVM_ETHR_START, SZ_1K);
  91. if (!ioaddr)
  92. return;
  93. smsc_id = readl(ioaddr + OMAP3EVM_ETHR_ID_REV) & 0xFFFF0000;
  94. iounmap(ioaddr);
  95. switch (smsc_id) {
  96. /*SMSC9115 chipset*/
  97. case 0x01150000:
  98. omap3_evm_version = OMAP3EVM_BOARD_GEN_1;
  99. break;
  100. /*SMSC 9220 chipset*/
  101. case 0x92200000:
  102. default:
  103. omap3_evm_version = OMAP3EVM_BOARD_GEN_2;
  104. }
  105. }
  106. #if defined(CONFIG_SMSC911X) || defined(CONFIG_SMSC911X_MODULE)
  107. #include "gpmc-smsc911x.h"
  108. static struct omap_smsc911x_platform_data smsc911x_cfg = {
  109. .cs = OMAP3EVM_SMSC911X_CS,
  110. .gpio_irq = OMAP3EVM_ETHR_GPIO_IRQ,
  111. .gpio_reset = -EINVAL,
  112. .flags = SMSC911X_USE_32BIT | SMSC911X_SAVE_MAC_ADDRESS,
  113. };
  114. static inline void __init omap3evm_init_smsc911x(void)
  115. {
  116. /* Configure ethernet controller reset gpio */
  117. if (cpu_is_omap3430()) {
  118. if (get_omap3_evm_rev() == OMAP3EVM_BOARD_GEN_1)
  119. smsc911x_cfg.gpio_reset = OMAP3EVM_GEN1_ETHR_GPIO_RST;
  120. else
  121. smsc911x_cfg.gpio_reset = OMAP3EVM_GEN2_ETHR_GPIO_RST;
  122. }
  123. gpmc_smsc911x_init(&smsc911x_cfg);
  124. }
  125. #else
  126. static inline void __init omap3evm_init_smsc911x(void) { return; }
  127. #endif
  128. /*
  129. * OMAP3EVM LCD Panel control signals
  130. */
  131. #define OMAP3EVM_LCD_PANEL_LR 2
  132. #define OMAP3EVM_LCD_PANEL_UD 3
  133. #define OMAP3EVM_LCD_PANEL_INI 152
  134. #define OMAP3EVM_LCD_PANEL_ENVDD 153
  135. #define OMAP3EVM_LCD_PANEL_QVGA 154
  136. #define OMAP3EVM_LCD_PANEL_RESB 155
  137. #define OMAP3EVM_LCD_PANEL_BKLIGHT_GPIO 210
  138. #define OMAP3EVM_DVI_PANEL_EN_GPIO 199
  139. static struct gpio omap3_evm_dss_gpios[] __initdata = {
  140. { OMAP3EVM_LCD_PANEL_RESB, GPIOF_OUT_INIT_HIGH, "lcd_panel_resb" },
  141. { OMAP3EVM_LCD_PANEL_INI, GPIOF_OUT_INIT_HIGH, "lcd_panel_ini" },
  142. { OMAP3EVM_LCD_PANEL_QVGA, GPIOF_OUT_INIT_LOW, "lcd_panel_qvga" },
  143. { OMAP3EVM_LCD_PANEL_LR, GPIOF_OUT_INIT_HIGH, "lcd_panel_lr" },
  144. { OMAP3EVM_LCD_PANEL_UD, GPIOF_OUT_INIT_HIGH, "lcd_panel_ud" },
  145. { OMAP3EVM_LCD_PANEL_ENVDD, GPIOF_OUT_INIT_LOW, "lcd_panel_envdd" },
  146. };
  147. static int lcd_enabled;
  148. static int dvi_enabled;
  149. static void __init omap3_evm_display_init(void)
  150. {
  151. int r;
  152. r = gpio_request_array(omap3_evm_dss_gpios,
  153. ARRAY_SIZE(omap3_evm_dss_gpios));
  154. if (r)
  155. printk(KERN_ERR "failed to get lcd_panel_* gpios\n");
  156. }
  157. static int omap3_evm_enable_lcd(struct omap_dss_device *dssdev)
  158. {
  159. if (dvi_enabled) {
  160. printk(KERN_ERR "cannot enable LCD, DVI is enabled\n");
  161. return -EINVAL;
  162. }
  163. gpio_set_value(OMAP3EVM_LCD_PANEL_ENVDD, 0);
  164. if (get_omap3_evm_rev() >= OMAP3EVM_BOARD_GEN_2)
  165. gpio_set_value_cansleep(OMAP3EVM_LCD_PANEL_BKLIGHT_GPIO, 0);
  166. else
  167. gpio_set_value_cansleep(OMAP3EVM_LCD_PANEL_BKLIGHT_GPIO, 1);
  168. lcd_enabled = 1;
  169. return 0;
  170. }
  171. static void omap3_evm_disable_lcd(struct omap_dss_device *dssdev)
  172. {
  173. gpio_set_value(OMAP3EVM_LCD_PANEL_ENVDD, 1);
  174. if (get_omap3_evm_rev() >= OMAP3EVM_BOARD_GEN_2)
  175. gpio_set_value_cansleep(OMAP3EVM_LCD_PANEL_BKLIGHT_GPIO, 1);
  176. else
  177. gpio_set_value_cansleep(OMAP3EVM_LCD_PANEL_BKLIGHT_GPIO, 0);
  178. lcd_enabled = 0;
  179. }
  180. static struct omap_dss_device omap3_evm_lcd_device = {
  181. .name = "lcd",
  182. .driver_name = "sharp_ls_panel",
  183. .type = OMAP_DISPLAY_TYPE_DPI,
  184. .phy.dpi.data_lines = 18,
  185. .platform_enable = omap3_evm_enable_lcd,
  186. .platform_disable = omap3_evm_disable_lcd,
  187. };
  188. static int omap3_evm_enable_tv(struct omap_dss_device *dssdev)
  189. {
  190. return 0;
  191. }
  192. static void omap3_evm_disable_tv(struct omap_dss_device *dssdev)
  193. {
  194. }
  195. static struct omap_dss_device omap3_evm_tv_device = {
  196. .name = "tv",
  197. .driver_name = "venc",
  198. .type = OMAP_DISPLAY_TYPE_VENC,
  199. .phy.venc.type = OMAP_DSS_VENC_TYPE_SVIDEO,
  200. .platform_enable = omap3_evm_enable_tv,
  201. .platform_disable = omap3_evm_disable_tv,
  202. };
  203. static struct tfp410_platform_data dvi_panel = {
  204. .power_down_gpio = OMAP3EVM_DVI_PANEL_EN_GPIO,
  205. };
  206. static struct omap_dss_device omap3_evm_dvi_device = {
  207. .name = "dvi",
  208. .type = OMAP_DISPLAY_TYPE_DPI,
  209. .driver_name = "tfp410",
  210. .data = &dvi_panel,
  211. .phy.dpi.data_lines = 24,
  212. };
  213. static struct omap_dss_device *omap3_evm_dss_devices[] = {
  214. &omap3_evm_lcd_device,
  215. &omap3_evm_tv_device,
  216. &omap3_evm_dvi_device,
  217. };
  218. static struct omap_dss_board_info omap3_evm_dss_data = {
  219. .num_devices = ARRAY_SIZE(omap3_evm_dss_devices),
  220. .devices = omap3_evm_dss_devices,
  221. .default_device = &omap3_evm_lcd_device,
  222. };
  223. static struct regulator_consumer_supply omap3evm_vmmc1_supply[] = {
  224. REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"),
  225. };
  226. static struct regulator_consumer_supply omap3evm_vsim_supply[] = {
  227. REGULATOR_SUPPLY("vmmc_aux", "omap_hsmmc.0"),
  228. };
  229. /* VMMC1 for MMC1 pins CMD, CLK, DAT0..DAT3 (20 mA, plus card == max 220 mA) */
  230. static struct regulator_init_data omap3evm_vmmc1 = {
  231. .constraints = {
  232. .min_uV = 1850000,
  233. .max_uV = 3150000,
  234. .valid_modes_mask = REGULATOR_MODE_NORMAL
  235. | REGULATOR_MODE_STANDBY,
  236. .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
  237. | REGULATOR_CHANGE_MODE
  238. | REGULATOR_CHANGE_STATUS,
  239. },
  240. .num_consumer_supplies = ARRAY_SIZE(omap3evm_vmmc1_supply),
  241. .consumer_supplies = omap3evm_vmmc1_supply,
  242. };
  243. /* VSIM for MMC1 pins DAT4..DAT7 (2 mA, plus card == max 50 mA) */
  244. static struct regulator_init_data omap3evm_vsim = {
  245. .constraints = {
  246. .min_uV = 1800000,
  247. .max_uV = 3000000,
  248. .valid_modes_mask = REGULATOR_MODE_NORMAL
  249. | REGULATOR_MODE_STANDBY,
  250. .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
  251. | REGULATOR_CHANGE_MODE
  252. | REGULATOR_CHANGE_STATUS,
  253. },
  254. .num_consumer_supplies = ARRAY_SIZE(omap3evm_vsim_supply),
  255. .consumer_supplies = omap3evm_vsim_supply,
  256. };
  257. static struct omap2_hsmmc_info mmc[] = {
  258. {
  259. .mmc = 1,
  260. .caps = MMC_CAP_4_BIT_DATA,
  261. .gpio_cd = -EINVAL,
  262. .gpio_wp = 63,
  263. .deferred = true,
  264. },
  265. #ifdef CONFIG_WL12XX_PLATFORM_DATA
  266. {
  267. .name = "wl1271",
  268. .mmc = 2,
  269. .caps = MMC_CAP_4_BIT_DATA | MMC_CAP_POWER_OFF_CARD,
  270. .gpio_wp = -EINVAL,
  271. .gpio_cd = -EINVAL,
  272. .nonremovable = true,
  273. },
  274. #endif
  275. {} /* Terminator */
  276. };
  277. static struct gpio_led gpio_leds[] = {
  278. {
  279. .name = "omap3evm::ledb",
  280. /* normally not visible (board underside) */
  281. .default_trigger = "default-on",
  282. .gpio = -EINVAL, /* gets replaced */
  283. .active_low = true,
  284. },
  285. };
  286. static struct gpio_led_platform_data gpio_led_info = {
  287. .leds = gpio_leds,
  288. .num_leds = ARRAY_SIZE(gpio_leds),
  289. };
  290. static struct platform_device leds_gpio = {
  291. .name = "leds-gpio",
  292. .id = -1,
  293. .dev = {
  294. .platform_data = &gpio_led_info,
  295. },
  296. };
  297. static int omap3evm_twl_gpio_setup(struct device *dev,
  298. unsigned gpio, unsigned ngpio)
  299. {
  300. int r, lcd_bl_en;
  301. /* gpio + 0 is "mmc0_cd" (input/IRQ) */
  302. mmc[0].gpio_cd = gpio + 0;
  303. omap_hsmmc_late_init(mmc);
  304. /*
  305. * Most GPIOs are for USB OTG. Some are mostly sent to
  306. * the P2 connector; notably LEDA for the LCD backlight.
  307. */
  308. /* TWL4030_GPIO_MAX + 0 == ledA, LCD Backlight control */
  309. lcd_bl_en = get_omap3_evm_rev() >= OMAP3EVM_BOARD_GEN_2 ?
  310. GPIOF_OUT_INIT_HIGH : GPIOF_OUT_INIT_LOW;
  311. r = gpio_request_one(gpio + TWL4030_GPIO_MAX, lcd_bl_en, "EN_LCD_BKL");
  312. if (r)
  313. printk(KERN_ERR "failed to get/set lcd_bkl gpio\n");
  314. /* gpio + 7 == DVI Enable */
  315. gpio_request_one(gpio + 7, GPIOF_OUT_INIT_LOW, "EN_DVI");
  316. /* TWL4030_GPIO_MAX + 1 == ledB (out, active low LED) */
  317. gpio_leds[0].gpio = gpio + TWL4030_GPIO_MAX + 1;
  318. platform_device_register(&leds_gpio);
  319. /* Enable VBUS switch by setting TWL4030.GPIO2DIR as output
  320. * for starting USB tranceiver
  321. */
  322. #ifdef CONFIG_TWL4030_CORE
  323. if (get_omap3_evm_rev() >= OMAP3EVM_BOARD_GEN_2) {
  324. u8 val;
  325. twl_i2c_read_u8(TWL4030_MODULE_GPIO, &val, REG_GPIODATADIR1);
  326. val |= 0x04; /* TWL4030.GPIO2DIR BIT at GPIODATADIR1(0x9B) */
  327. twl_i2c_write_u8(TWL4030_MODULE_GPIO, val, REG_GPIODATADIR1);
  328. }
  329. #endif
  330. return 0;
  331. }
  332. static struct twl4030_gpio_platform_data omap3evm_gpio_data = {
  333. .use_leds = true,
  334. .setup = omap3evm_twl_gpio_setup,
  335. };
  336. static uint32_t board_keymap[] = {
  337. KEY(0, 0, KEY_LEFT),
  338. KEY(0, 1, KEY_DOWN),
  339. KEY(0, 2, KEY_ENTER),
  340. KEY(0, 3, KEY_M),
  341. KEY(1, 0, KEY_RIGHT),
  342. KEY(1, 1, KEY_UP),
  343. KEY(1, 2, KEY_I),
  344. KEY(1, 3, KEY_N),
  345. KEY(2, 0, KEY_A),
  346. KEY(2, 1, KEY_E),
  347. KEY(2, 2, KEY_J),
  348. KEY(2, 3, KEY_O),
  349. KEY(3, 0, KEY_B),
  350. KEY(3, 1, KEY_F),
  351. KEY(3, 2, KEY_K),
  352. KEY(3, 3, KEY_P)
  353. };
  354. static struct matrix_keymap_data board_map_data = {
  355. .keymap = board_keymap,
  356. .keymap_size = ARRAY_SIZE(board_keymap),
  357. };
  358. static struct twl4030_keypad_data omap3evm_kp_data = {
  359. .keymap_data = &board_map_data,
  360. .rows = 4,
  361. .cols = 4,
  362. .rep = 1,
  363. };
  364. /* ads7846 on SPI */
  365. static struct regulator_consumer_supply omap3evm_vio_supply[] = {
  366. REGULATOR_SUPPLY("vcc", "spi1.0"),
  367. };
  368. /* VIO for ads7846 */
  369. static struct regulator_init_data omap3evm_vio = {
  370. .constraints = {
  371. .min_uV = 1800000,
  372. .max_uV = 1800000,
  373. .apply_uV = true,
  374. .valid_modes_mask = REGULATOR_MODE_NORMAL
  375. | REGULATOR_MODE_STANDBY,
  376. .valid_ops_mask = REGULATOR_CHANGE_MODE
  377. | REGULATOR_CHANGE_STATUS,
  378. },
  379. .num_consumer_supplies = ARRAY_SIZE(omap3evm_vio_supply),
  380. .consumer_supplies = omap3evm_vio_supply,
  381. };
  382. #ifdef CONFIG_WL12XX_PLATFORM_DATA
  383. #define OMAP3EVM_WLAN_PMENA_GPIO (150)
  384. #define OMAP3EVM_WLAN_IRQ_GPIO (149)
  385. static struct regulator_consumer_supply omap3evm_vmmc2_supply[] = {
  386. REGULATOR_SUPPLY("vmmc", "omap_hsmmc.1"),
  387. };
  388. /* VMMC2 for driving the WL12xx module */
  389. static struct regulator_init_data omap3evm_vmmc2 = {
  390. .constraints = {
  391. .valid_ops_mask = REGULATOR_CHANGE_STATUS,
  392. },
  393. .num_consumer_supplies = ARRAY_SIZE(omap3evm_vmmc2_supply),
  394. .consumer_supplies = omap3evm_vmmc2_supply,
  395. };
  396. static struct fixed_voltage_config omap3evm_vwlan = {
  397. .supply_name = "vwl1271",
  398. .microvolts = 1800000, /* 1.80V */
  399. .gpio = OMAP3EVM_WLAN_PMENA_GPIO,
  400. .startup_delay = 70000, /* 70ms */
  401. .enable_high = 1,
  402. .enabled_at_boot = 0,
  403. .init_data = &omap3evm_vmmc2,
  404. };
  405. static struct platform_device omap3evm_wlan_regulator = {
  406. .name = "reg-fixed-voltage",
  407. .id = 1,
  408. .dev = {
  409. .platform_data = &omap3evm_vwlan,
  410. },
  411. };
  412. struct wl12xx_platform_data omap3evm_wlan_data __initdata = {
  413. .board_ref_clock = WL12XX_REFCLOCK_38, /* 38.4 MHz */
  414. };
  415. #endif
  416. /* VAUX2 for USB */
  417. static struct regulator_consumer_supply omap3evm_vaux2_supplies[] = {
  418. REGULATOR_SUPPLY("VDD_CSIPHY1", "omap3isp"), /* OMAP ISP */
  419. REGULATOR_SUPPLY("VDD_CSIPHY2", "omap3isp"), /* OMAP ISP */
  420. REGULATOR_SUPPLY("hsusb1", "ehci-omap.0"),
  421. REGULATOR_SUPPLY("vaux2", NULL),
  422. };
  423. static struct regulator_init_data omap3evm_vaux2 = {
  424. .constraints = {
  425. .min_uV = 2800000,
  426. .max_uV = 2800000,
  427. .apply_uV = true,
  428. .valid_modes_mask = REGULATOR_MODE_NORMAL
  429. | REGULATOR_MODE_STANDBY,
  430. .valid_ops_mask = REGULATOR_CHANGE_MODE
  431. | REGULATOR_CHANGE_STATUS,
  432. },
  433. .num_consumer_supplies = ARRAY_SIZE(omap3evm_vaux2_supplies),
  434. .consumer_supplies = omap3evm_vaux2_supplies,
  435. };
  436. static struct twl4030_platform_data omap3evm_twldata = {
  437. /* platform_data for children goes here */
  438. .keypad = &omap3evm_kp_data,
  439. .gpio = &omap3evm_gpio_data,
  440. .vio = &omap3evm_vio,
  441. .vmmc1 = &omap3evm_vmmc1,
  442. .vsim = &omap3evm_vsim,
  443. };
  444. static int __init omap3_evm_i2c_init(void)
  445. {
  446. omap3_pmic_get_config(&omap3evm_twldata,
  447. TWL_COMMON_PDATA_USB | TWL_COMMON_PDATA_MADC |
  448. TWL_COMMON_PDATA_AUDIO,
  449. TWL_COMMON_REGULATOR_VDAC | TWL_COMMON_REGULATOR_VPLL2);
  450. omap3evm_twldata.vdac->constraints.apply_uV = true;
  451. omap3evm_twldata.vpll2->constraints.apply_uV = true;
  452. omap3_pmic_init("twl4030", &omap3evm_twldata);
  453. omap_register_i2c_bus(2, 400, NULL, 0);
  454. omap_register_i2c_bus(3, 400, NULL, 0);
  455. return 0;
  456. }
  457. static struct usbhs_omap_board_data usbhs_bdata __initdata = {
  458. .port_mode[0] = OMAP_USBHS_PORT_MODE_UNUSED,
  459. .port_mode[1] = OMAP_EHCI_PORT_MODE_PHY,
  460. .port_mode[2] = OMAP_USBHS_PORT_MODE_UNUSED,
  461. .phy_reset = true,
  462. /* PHY reset GPIO will be runtime programmed based on EVM version */
  463. .reset_gpio_port[0] = -EINVAL,
  464. .reset_gpio_port[1] = -EINVAL,
  465. .reset_gpio_port[2] = -EINVAL
  466. };
  467. #ifdef CONFIG_OMAP_MUX
  468. static struct omap_board_mux omap35x_board_mux[] __initdata = {
  469. OMAP3_MUX(SYS_NIRQ, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP |
  470. OMAP_PIN_OFF_INPUT_PULLUP | OMAP_PIN_OFF_OUTPUT_LOW |
  471. OMAP_PIN_OFF_WAKEUPENABLE),
  472. OMAP3_MUX(MCSPI1_CS1, OMAP_MUX_MODE4 | OMAP_PIN_INPUT_PULLUP |
  473. OMAP_PIN_OFF_INPUT_PULLUP | OMAP_PIN_OFF_OUTPUT_LOW |
  474. OMAP_PIN_OFF_WAKEUPENABLE),
  475. OMAP3_MUX(SYS_BOOT5, OMAP_MUX_MODE4 | OMAP_PIN_INPUT_PULLUP |
  476. OMAP_PIN_OFF_NONE),
  477. OMAP3_MUX(GPMC_WAIT2, OMAP_MUX_MODE4 | OMAP_PIN_INPUT_PULLUP |
  478. OMAP_PIN_OFF_NONE),
  479. #ifdef CONFIG_WL12XX_PLATFORM_DATA
  480. /* WLAN IRQ - GPIO 149 */
  481. OMAP3_MUX(UART1_RTS, OMAP_MUX_MODE4 | OMAP_PIN_INPUT),
  482. /* WLAN POWER ENABLE - GPIO 150 */
  483. OMAP3_MUX(UART1_CTS, OMAP_MUX_MODE4 | OMAP_PIN_OUTPUT),
  484. /* MMC2 SDIO pin muxes for WL12xx */
  485. OMAP3_MUX(SDMMC2_CLK, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP),
  486. OMAP3_MUX(SDMMC2_CMD, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP),
  487. OMAP3_MUX(SDMMC2_DAT0, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP),
  488. OMAP3_MUX(SDMMC2_DAT1, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP),
  489. OMAP3_MUX(SDMMC2_DAT2, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP),
  490. OMAP3_MUX(SDMMC2_DAT3, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP),
  491. #endif
  492. { .reg_offset = OMAP_MUX_TERMINATOR },
  493. };
  494. static struct omap_board_mux omap36x_board_mux[] __initdata = {
  495. OMAP3_MUX(SYS_NIRQ, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP |
  496. OMAP_PIN_OFF_INPUT_PULLUP | OMAP_PIN_OFF_OUTPUT_LOW |
  497. OMAP_PIN_OFF_WAKEUPENABLE),
  498. OMAP3_MUX(MCSPI1_CS1, OMAP_MUX_MODE4 | OMAP_PIN_INPUT_PULLUP |
  499. OMAP_PIN_OFF_INPUT_PULLUP | OMAP_PIN_OFF_OUTPUT_LOW |
  500. OMAP_PIN_OFF_WAKEUPENABLE),
  501. /* AM/DM37x EVM: DSS data bus muxed with sys_boot */
  502. OMAP3_MUX(DSS_DATA18, OMAP_MUX_MODE3 | OMAP_PIN_OFF_NONE),
  503. OMAP3_MUX(DSS_DATA19, OMAP_MUX_MODE3 | OMAP_PIN_OFF_NONE),
  504. OMAP3_MUX(DSS_DATA22, OMAP_MUX_MODE3 | OMAP_PIN_OFF_NONE),
  505. OMAP3_MUX(DSS_DATA21, OMAP_MUX_MODE3 | OMAP_PIN_OFF_NONE),
  506. OMAP3_MUX(DSS_DATA22, OMAP_MUX_MODE3 | OMAP_PIN_OFF_NONE),
  507. OMAP3_MUX(DSS_DATA23, OMAP_MUX_MODE3 | OMAP_PIN_OFF_NONE),
  508. OMAP3_MUX(SYS_BOOT0, OMAP_MUX_MODE3 | OMAP_PIN_OFF_NONE),
  509. OMAP3_MUX(SYS_BOOT1, OMAP_MUX_MODE3 | OMAP_PIN_OFF_NONE),
  510. OMAP3_MUX(SYS_BOOT3, OMAP_MUX_MODE3 | OMAP_PIN_OFF_NONE),
  511. OMAP3_MUX(SYS_BOOT4, OMAP_MUX_MODE3 | OMAP_PIN_OFF_NONE),
  512. OMAP3_MUX(SYS_BOOT5, OMAP_MUX_MODE3 | OMAP_PIN_OFF_NONE),
  513. OMAP3_MUX(SYS_BOOT6, OMAP_MUX_MODE3 | OMAP_PIN_OFF_NONE),
  514. #ifdef CONFIG_WL12XX_PLATFORM_DATA
  515. /* WLAN IRQ - GPIO 149 */
  516. OMAP3_MUX(UART1_RTS, OMAP_MUX_MODE4 | OMAP_PIN_INPUT),
  517. /* WLAN POWER ENABLE - GPIO 150 */
  518. OMAP3_MUX(UART1_CTS, OMAP_MUX_MODE4 | OMAP_PIN_OUTPUT),
  519. /* MMC2 SDIO pin muxes for WL12xx */
  520. OMAP3_MUX(SDMMC2_CLK, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP),
  521. OMAP3_MUX(SDMMC2_CMD, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP),
  522. OMAP3_MUX(SDMMC2_DAT0, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP),
  523. OMAP3_MUX(SDMMC2_DAT1, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP),
  524. OMAP3_MUX(SDMMC2_DAT2, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP),
  525. OMAP3_MUX(SDMMC2_DAT3, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP),
  526. #endif
  527. { .reg_offset = OMAP_MUX_TERMINATOR },
  528. };
  529. #else
  530. #define omap35x_board_mux NULL
  531. #define omap36x_board_mux NULL
  532. #endif
  533. static struct omap_musb_board_data musb_board_data = {
  534. .interface_type = MUSB_INTERFACE_ULPI,
  535. .mode = MUSB_OTG,
  536. .power = 100,
  537. };
  538. static struct gpio omap3_evm_ehci_gpios[] __initdata = {
  539. { OMAP3_EVM_EHCI_VBUS, GPIOF_OUT_INIT_HIGH, "enable EHCI VBUS" },
  540. { OMAP3_EVM_EHCI_SELECT, GPIOF_OUT_INIT_LOW, "select EHCI port" },
  541. };
  542. static void __init omap3_evm_wl12xx_init(void)
  543. {
  544. #ifdef CONFIG_WL12XX_PLATFORM_DATA
  545. int ret;
  546. /* WL12xx WLAN Init */
  547. omap3evm_wlan_data.irq = gpio_to_irq(OMAP3EVM_WLAN_IRQ_GPIO);
  548. ret = wl12xx_set_platform_data(&omap3evm_wlan_data);
  549. if (ret)
  550. pr_err("error setting wl12xx data: %d\n", ret);
  551. ret = platform_device_register(&omap3evm_wlan_regulator);
  552. if (ret)
  553. pr_err("error registering wl12xx device: %d\n", ret);
  554. #endif
  555. }
  556. static struct regulator_consumer_supply dummy_supplies[] = {
  557. REGULATOR_SUPPLY("vddvario", "smsc911x.0"),
  558. REGULATOR_SUPPLY("vdd33a", "smsc911x.0"),
  559. };
  560. static struct mtd_partition omap3evm_nand_partitions[] = {
  561. /* All the partition sizes are listed in terms of NAND block size */
  562. {
  563. .name = "X-Loader",
  564. .offset = 0,
  565. .size = 4*(SZ_128K),
  566. .mask_flags = MTD_WRITEABLE
  567. },
  568. {
  569. .name = "U-Boot",
  570. .offset = MTDPART_OFS_APPEND,
  571. .size = 14*(SZ_128K),
  572. .mask_flags = MTD_WRITEABLE
  573. },
  574. {
  575. .name = "U-Boot Env",
  576. .offset = MTDPART_OFS_APPEND,
  577. .size = 2*(SZ_128K)
  578. },
  579. {
  580. .name = "Kernel",
  581. .offset = MTDPART_OFS_APPEND,
  582. .size = 40*(SZ_128K)
  583. },
  584. {
  585. .name = "File system",
  586. .size = MTDPART_SIZ_FULL,
  587. .offset = MTDPART_OFS_APPEND,
  588. },
  589. };
  590. static void __init omap3_evm_init(void)
  591. {
  592. struct omap_board_mux *obm;
  593. omap3_evm_get_revision();
  594. regulator_register_fixed(0, dummy_supplies, ARRAY_SIZE(dummy_supplies));
  595. obm = (cpu_is_omap3630()) ? omap36x_board_mux : omap35x_board_mux;
  596. omap3_mux_init(obm, OMAP_PACKAGE_CBB);
  597. omap_mux_init_gpio(63, OMAP_PIN_INPUT);
  598. omap_hsmmc_init(mmc);
  599. if (get_omap3_evm_rev() >= OMAP3EVM_BOARD_GEN_2)
  600. omap3evm_twldata.vaux2 = &omap3evm_vaux2;
  601. omap3_evm_i2c_init();
  602. omap_display_init(&omap3_evm_dss_data);
  603. omap_serial_init();
  604. omap_sdrc_init(mt46h32m32lf6_sdrc_params, NULL);
  605. /* OMAP3EVM uses ISP1504 phy and so register nop transceiver */
  606. usb_nop_xceiv_register();
  607. if (get_omap3_evm_rev() >= OMAP3EVM_BOARD_GEN_2) {
  608. /* enable EHCI VBUS using GPIO22 */
  609. omap_mux_init_gpio(OMAP3_EVM_EHCI_VBUS, OMAP_PIN_INPUT_PULLUP);
  610. /* Select EHCI port on main board */
  611. omap_mux_init_gpio(OMAP3_EVM_EHCI_SELECT,
  612. OMAP_PIN_INPUT_PULLUP);
  613. gpio_request_array(omap3_evm_ehci_gpios,
  614. ARRAY_SIZE(omap3_evm_ehci_gpios));
  615. /* setup EHCI phy reset config */
  616. omap_mux_init_gpio(21, OMAP_PIN_INPUT_PULLUP);
  617. usbhs_bdata.reset_gpio_port[1] = 21;
  618. /* EVM REV >= E can supply 500mA with EXTVBUS programming */
  619. musb_board_data.power = 500;
  620. musb_board_data.extvbus = 1;
  621. } else {
  622. /* setup EHCI phy reset on MDC */
  623. omap_mux_init_gpio(135, OMAP_PIN_OUTPUT);
  624. usbhs_bdata.reset_gpio_port[1] = 135;
  625. }
  626. usb_musb_init(&musb_board_data);
  627. usbhs_init(&usbhs_bdata);
  628. board_nand_init(omap3evm_nand_partitions,
  629. ARRAY_SIZE(omap3evm_nand_partitions), NAND_CS,
  630. NAND_BUSWIDTH_16, NULL);
  631. omap_ads7846_init(1, OMAP3_EVM_TS_GPIO, 310, NULL);
  632. omap3evm_init_smsc911x();
  633. omap3_evm_display_init();
  634. omap3_evm_wl12xx_init();
  635. omap_twl4030_audio_init("omap3evm");
  636. }
  637. MACHINE_START(OMAP3EVM, "OMAP3 EVM")
  638. /* Maintainer: Syed Mohammed Khasim - Texas Instruments */
  639. .atag_offset = 0x100,
  640. .reserve = omap_reserve,
  641. .map_io = omap3_map_io,
  642. .init_early = omap35xx_init_early,
  643. .init_irq = omap3_init_irq,
  644. .handle_irq = omap3_intc_handle_irq,
  645. .init_machine = omap3_evm_init,
  646. .init_late = omap35xx_init_late,
  647. .timer = &omap3_timer,
  648. .restart = omap_prcm_restart,
  649. MACHINE_END