x86.c 80 KB

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  1. /*
  2. * Kernel-based Virtual Machine driver for Linux
  3. *
  4. * derived from drivers/kvm/kvm_main.c
  5. *
  6. * Copyright (C) 2006 Qumranet, Inc.
  7. *
  8. * Authors:
  9. * Avi Kivity <avi@qumranet.com>
  10. * Yaniv Kamay <yaniv@qumranet.com>
  11. *
  12. * This work is licensed under the terms of the GNU GPL, version 2. See
  13. * the COPYING file in the top-level directory.
  14. *
  15. */
  16. #include <linux/kvm_host.h>
  17. #include "irq.h"
  18. #include "mmu.h"
  19. #include <linux/clocksource.h>
  20. #include <linux/kvm.h>
  21. #include <linux/fs.h>
  22. #include <linux/vmalloc.h>
  23. #include <linux/module.h>
  24. #include <linux/mman.h>
  25. #include <linux/highmem.h>
  26. #include <asm/uaccess.h>
  27. #include <asm/msr.h>
  28. #include <asm/desc.h>
  29. #define MAX_IO_MSRS 256
  30. #define CR0_RESERVED_BITS \
  31. (~(unsigned long)(X86_CR0_PE | X86_CR0_MP | X86_CR0_EM | X86_CR0_TS \
  32. | X86_CR0_ET | X86_CR0_NE | X86_CR0_WP | X86_CR0_AM \
  33. | X86_CR0_NW | X86_CR0_CD | X86_CR0_PG))
  34. #define CR4_RESERVED_BITS \
  35. (~(unsigned long)(X86_CR4_VME | X86_CR4_PVI | X86_CR4_TSD | X86_CR4_DE\
  36. | X86_CR4_PSE | X86_CR4_PAE | X86_CR4_MCE \
  37. | X86_CR4_PGE | X86_CR4_PCE | X86_CR4_OSFXSR \
  38. | X86_CR4_OSXMMEXCPT | X86_CR4_VMXE))
  39. #define CR8_RESERVED_BITS (~(unsigned long)X86_CR8_TPR)
  40. /* EFER defaults:
  41. * - enable syscall per default because its emulated by KVM
  42. * - enable LME and LMA per default on 64 bit KVM
  43. */
  44. #ifdef CONFIG_X86_64
  45. static u64 __read_mostly efer_reserved_bits = 0xfffffffffffffafeULL;
  46. #else
  47. static u64 __read_mostly efer_reserved_bits = 0xfffffffffffffffeULL;
  48. #endif
  49. #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
  50. #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
  51. static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2 *cpuid,
  52. struct kvm_cpuid_entry2 __user *entries);
  53. struct kvm_x86_ops *kvm_x86_ops;
  54. struct kvm_stats_debugfs_item debugfs_entries[] = {
  55. { "pf_fixed", VCPU_STAT(pf_fixed) },
  56. { "pf_guest", VCPU_STAT(pf_guest) },
  57. { "tlb_flush", VCPU_STAT(tlb_flush) },
  58. { "invlpg", VCPU_STAT(invlpg) },
  59. { "exits", VCPU_STAT(exits) },
  60. { "io_exits", VCPU_STAT(io_exits) },
  61. { "mmio_exits", VCPU_STAT(mmio_exits) },
  62. { "signal_exits", VCPU_STAT(signal_exits) },
  63. { "irq_window", VCPU_STAT(irq_window_exits) },
  64. { "halt_exits", VCPU_STAT(halt_exits) },
  65. { "halt_wakeup", VCPU_STAT(halt_wakeup) },
  66. { "hypercalls", VCPU_STAT(hypercalls) },
  67. { "request_irq", VCPU_STAT(request_irq_exits) },
  68. { "irq_exits", VCPU_STAT(irq_exits) },
  69. { "host_state_reload", VCPU_STAT(host_state_reload) },
  70. { "efer_reload", VCPU_STAT(efer_reload) },
  71. { "fpu_reload", VCPU_STAT(fpu_reload) },
  72. { "insn_emulation", VCPU_STAT(insn_emulation) },
  73. { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail) },
  74. { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped) },
  75. { "mmu_pte_write", VM_STAT(mmu_pte_write) },
  76. { "mmu_pte_updated", VM_STAT(mmu_pte_updated) },
  77. { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped) },
  78. { "mmu_flooded", VM_STAT(mmu_flooded) },
  79. { "mmu_recycled", VM_STAT(mmu_recycled) },
  80. { "mmu_cache_miss", VM_STAT(mmu_cache_miss) },
  81. { "remote_tlb_flush", VM_STAT(remote_tlb_flush) },
  82. { NULL }
  83. };
  84. unsigned long segment_base(u16 selector)
  85. {
  86. struct descriptor_table gdt;
  87. struct desc_struct *d;
  88. unsigned long table_base;
  89. unsigned long v;
  90. if (selector == 0)
  91. return 0;
  92. asm("sgdt %0" : "=m"(gdt));
  93. table_base = gdt.base;
  94. if (selector & 4) { /* from ldt */
  95. u16 ldt_selector;
  96. asm("sldt %0" : "=g"(ldt_selector));
  97. table_base = segment_base(ldt_selector);
  98. }
  99. d = (struct desc_struct *)(table_base + (selector & ~7));
  100. v = d->base0 | ((unsigned long)d->base1 << 16) |
  101. ((unsigned long)d->base2 << 24);
  102. #ifdef CONFIG_X86_64
  103. if (d->s == 0 && (d->type == 2 || d->type == 9 || d->type == 11))
  104. v |= ((unsigned long)((struct ldttss_desc64 *)d)->base3) << 32;
  105. #endif
  106. return v;
  107. }
  108. EXPORT_SYMBOL_GPL(segment_base);
  109. u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
  110. {
  111. if (irqchip_in_kernel(vcpu->kvm))
  112. return vcpu->arch.apic_base;
  113. else
  114. return vcpu->arch.apic_base;
  115. }
  116. EXPORT_SYMBOL_GPL(kvm_get_apic_base);
  117. void kvm_set_apic_base(struct kvm_vcpu *vcpu, u64 data)
  118. {
  119. /* TODO: reserve bits check */
  120. if (irqchip_in_kernel(vcpu->kvm))
  121. kvm_lapic_set_base(vcpu, data);
  122. else
  123. vcpu->arch.apic_base = data;
  124. }
  125. EXPORT_SYMBOL_GPL(kvm_set_apic_base);
  126. void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
  127. {
  128. WARN_ON(vcpu->arch.exception.pending);
  129. vcpu->arch.exception.pending = true;
  130. vcpu->arch.exception.has_error_code = false;
  131. vcpu->arch.exception.nr = nr;
  132. }
  133. EXPORT_SYMBOL_GPL(kvm_queue_exception);
  134. void kvm_inject_page_fault(struct kvm_vcpu *vcpu, unsigned long addr,
  135. u32 error_code)
  136. {
  137. ++vcpu->stat.pf_guest;
  138. if (vcpu->arch.exception.pending && vcpu->arch.exception.nr == PF_VECTOR) {
  139. printk(KERN_DEBUG "kvm: inject_page_fault:"
  140. " double fault 0x%lx\n", addr);
  141. vcpu->arch.exception.nr = DF_VECTOR;
  142. vcpu->arch.exception.error_code = 0;
  143. return;
  144. }
  145. vcpu->arch.cr2 = addr;
  146. kvm_queue_exception_e(vcpu, PF_VECTOR, error_code);
  147. }
  148. void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
  149. {
  150. WARN_ON(vcpu->arch.exception.pending);
  151. vcpu->arch.exception.pending = true;
  152. vcpu->arch.exception.has_error_code = true;
  153. vcpu->arch.exception.nr = nr;
  154. vcpu->arch.exception.error_code = error_code;
  155. }
  156. EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
  157. static void __queue_exception(struct kvm_vcpu *vcpu)
  158. {
  159. kvm_x86_ops->queue_exception(vcpu, vcpu->arch.exception.nr,
  160. vcpu->arch.exception.has_error_code,
  161. vcpu->arch.exception.error_code);
  162. }
  163. /*
  164. * Load the pae pdptrs. Return true is they are all valid.
  165. */
  166. int load_pdptrs(struct kvm_vcpu *vcpu, unsigned long cr3)
  167. {
  168. gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
  169. unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
  170. int i;
  171. int ret;
  172. u64 pdpte[ARRAY_SIZE(vcpu->arch.pdptrs)];
  173. down_read(&vcpu->kvm->slots_lock);
  174. ret = kvm_read_guest_page(vcpu->kvm, pdpt_gfn, pdpte,
  175. offset * sizeof(u64), sizeof(pdpte));
  176. if (ret < 0) {
  177. ret = 0;
  178. goto out;
  179. }
  180. for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
  181. if ((pdpte[i] & 1) && (pdpte[i] & 0xfffffff0000001e6ull)) {
  182. ret = 0;
  183. goto out;
  184. }
  185. }
  186. ret = 1;
  187. memcpy(vcpu->arch.pdptrs, pdpte, sizeof(vcpu->arch.pdptrs));
  188. out:
  189. up_read(&vcpu->kvm->slots_lock);
  190. return ret;
  191. }
  192. EXPORT_SYMBOL_GPL(load_pdptrs);
  193. static bool pdptrs_changed(struct kvm_vcpu *vcpu)
  194. {
  195. u64 pdpte[ARRAY_SIZE(vcpu->arch.pdptrs)];
  196. bool changed = true;
  197. int r;
  198. if (is_long_mode(vcpu) || !is_pae(vcpu))
  199. return false;
  200. down_read(&vcpu->kvm->slots_lock);
  201. r = kvm_read_guest(vcpu->kvm, vcpu->arch.cr3 & ~31u, pdpte, sizeof(pdpte));
  202. if (r < 0)
  203. goto out;
  204. changed = memcmp(pdpte, vcpu->arch.pdptrs, sizeof(pdpte)) != 0;
  205. out:
  206. up_read(&vcpu->kvm->slots_lock);
  207. return changed;
  208. }
  209. void set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
  210. {
  211. if (cr0 & CR0_RESERVED_BITS) {
  212. printk(KERN_DEBUG "set_cr0: 0x%lx #GP, reserved bits 0x%lx\n",
  213. cr0, vcpu->arch.cr0);
  214. kvm_inject_gp(vcpu, 0);
  215. return;
  216. }
  217. if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD)) {
  218. printk(KERN_DEBUG "set_cr0: #GP, CD == 0 && NW == 1\n");
  219. kvm_inject_gp(vcpu, 0);
  220. return;
  221. }
  222. if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE)) {
  223. printk(KERN_DEBUG "set_cr0: #GP, set PG flag "
  224. "and a clear PE flag\n");
  225. kvm_inject_gp(vcpu, 0);
  226. return;
  227. }
  228. if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) {
  229. #ifdef CONFIG_X86_64
  230. if ((vcpu->arch.shadow_efer & EFER_LME)) {
  231. int cs_db, cs_l;
  232. if (!is_pae(vcpu)) {
  233. printk(KERN_DEBUG "set_cr0: #GP, start paging "
  234. "in long mode while PAE is disabled\n");
  235. kvm_inject_gp(vcpu, 0);
  236. return;
  237. }
  238. kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
  239. if (cs_l) {
  240. printk(KERN_DEBUG "set_cr0: #GP, start paging "
  241. "in long mode while CS.L == 1\n");
  242. kvm_inject_gp(vcpu, 0);
  243. return;
  244. }
  245. } else
  246. #endif
  247. if (is_pae(vcpu) && !load_pdptrs(vcpu, vcpu->arch.cr3)) {
  248. printk(KERN_DEBUG "set_cr0: #GP, pdptrs "
  249. "reserved bits\n");
  250. kvm_inject_gp(vcpu, 0);
  251. return;
  252. }
  253. }
  254. kvm_x86_ops->set_cr0(vcpu, cr0);
  255. vcpu->arch.cr0 = cr0;
  256. kvm_mmu_reset_context(vcpu);
  257. return;
  258. }
  259. EXPORT_SYMBOL_GPL(set_cr0);
  260. void lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
  261. {
  262. set_cr0(vcpu, (vcpu->arch.cr0 & ~0x0ful) | (msw & 0x0f));
  263. }
  264. EXPORT_SYMBOL_GPL(lmsw);
  265. void set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
  266. {
  267. if (cr4 & CR4_RESERVED_BITS) {
  268. printk(KERN_DEBUG "set_cr4: #GP, reserved bits\n");
  269. kvm_inject_gp(vcpu, 0);
  270. return;
  271. }
  272. if (is_long_mode(vcpu)) {
  273. if (!(cr4 & X86_CR4_PAE)) {
  274. printk(KERN_DEBUG "set_cr4: #GP, clearing PAE while "
  275. "in long mode\n");
  276. kvm_inject_gp(vcpu, 0);
  277. return;
  278. }
  279. } else if (is_paging(vcpu) && !is_pae(vcpu) && (cr4 & X86_CR4_PAE)
  280. && !load_pdptrs(vcpu, vcpu->arch.cr3)) {
  281. printk(KERN_DEBUG "set_cr4: #GP, pdptrs reserved bits\n");
  282. kvm_inject_gp(vcpu, 0);
  283. return;
  284. }
  285. if (cr4 & X86_CR4_VMXE) {
  286. printk(KERN_DEBUG "set_cr4: #GP, setting VMXE\n");
  287. kvm_inject_gp(vcpu, 0);
  288. return;
  289. }
  290. kvm_x86_ops->set_cr4(vcpu, cr4);
  291. vcpu->arch.cr4 = cr4;
  292. kvm_mmu_reset_context(vcpu);
  293. }
  294. EXPORT_SYMBOL_GPL(set_cr4);
  295. void set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
  296. {
  297. if (cr3 == vcpu->arch.cr3 && !pdptrs_changed(vcpu)) {
  298. kvm_mmu_flush_tlb(vcpu);
  299. return;
  300. }
  301. if (is_long_mode(vcpu)) {
  302. if (cr3 & CR3_L_MODE_RESERVED_BITS) {
  303. printk(KERN_DEBUG "set_cr3: #GP, reserved bits\n");
  304. kvm_inject_gp(vcpu, 0);
  305. return;
  306. }
  307. } else {
  308. if (is_pae(vcpu)) {
  309. if (cr3 & CR3_PAE_RESERVED_BITS) {
  310. printk(KERN_DEBUG
  311. "set_cr3: #GP, reserved bits\n");
  312. kvm_inject_gp(vcpu, 0);
  313. return;
  314. }
  315. if (is_paging(vcpu) && !load_pdptrs(vcpu, cr3)) {
  316. printk(KERN_DEBUG "set_cr3: #GP, pdptrs "
  317. "reserved bits\n");
  318. kvm_inject_gp(vcpu, 0);
  319. return;
  320. }
  321. }
  322. /*
  323. * We don't check reserved bits in nonpae mode, because
  324. * this isn't enforced, and VMware depends on this.
  325. */
  326. }
  327. down_read(&vcpu->kvm->slots_lock);
  328. /*
  329. * Does the new cr3 value map to physical memory? (Note, we
  330. * catch an invalid cr3 even in real-mode, because it would
  331. * cause trouble later on when we turn on paging anyway.)
  332. *
  333. * A real CPU would silently accept an invalid cr3 and would
  334. * attempt to use it - with largely undefined (and often hard
  335. * to debug) behavior on the guest side.
  336. */
  337. if (unlikely(!gfn_to_memslot(vcpu->kvm, cr3 >> PAGE_SHIFT)))
  338. kvm_inject_gp(vcpu, 0);
  339. else {
  340. vcpu->arch.cr3 = cr3;
  341. vcpu->arch.mmu.new_cr3(vcpu);
  342. }
  343. up_read(&vcpu->kvm->slots_lock);
  344. }
  345. EXPORT_SYMBOL_GPL(set_cr3);
  346. void set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
  347. {
  348. if (cr8 & CR8_RESERVED_BITS) {
  349. printk(KERN_DEBUG "set_cr8: #GP, reserved bits 0x%lx\n", cr8);
  350. kvm_inject_gp(vcpu, 0);
  351. return;
  352. }
  353. if (irqchip_in_kernel(vcpu->kvm))
  354. kvm_lapic_set_tpr(vcpu, cr8);
  355. else
  356. vcpu->arch.cr8 = cr8;
  357. }
  358. EXPORT_SYMBOL_GPL(set_cr8);
  359. unsigned long get_cr8(struct kvm_vcpu *vcpu)
  360. {
  361. if (irqchip_in_kernel(vcpu->kvm))
  362. return kvm_lapic_get_cr8(vcpu);
  363. else
  364. return vcpu->arch.cr8;
  365. }
  366. EXPORT_SYMBOL_GPL(get_cr8);
  367. /*
  368. * List of msr numbers which we expose to userspace through KVM_GET_MSRS
  369. * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
  370. *
  371. * This list is modified at module load time to reflect the
  372. * capabilities of the host cpu.
  373. */
  374. static u32 msrs_to_save[] = {
  375. MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
  376. MSR_K6_STAR,
  377. #ifdef CONFIG_X86_64
  378. MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
  379. #endif
  380. MSR_IA32_TIME_STAMP_COUNTER, MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
  381. MSR_IA32_PERF_STATUS,
  382. };
  383. static unsigned num_msrs_to_save;
  384. static u32 emulated_msrs[] = {
  385. MSR_IA32_MISC_ENABLE,
  386. };
  387. static void set_efer(struct kvm_vcpu *vcpu, u64 efer)
  388. {
  389. if (efer & efer_reserved_bits) {
  390. printk(KERN_DEBUG "set_efer: 0x%llx #GP, reserved bits\n",
  391. efer);
  392. kvm_inject_gp(vcpu, 0);
  393. return;
  394. }
  395. if (is_paging(vcpu)
  396. && (vcpu->arch.shadow_efer & EFER_LME) != (efer & EFER_LME)) {
  397. printk(KERN_DEBUG "set_efer: #GP, change LME while paging\n");
  398. kvm_inject_gp(vcpu, 0);
  399. return;
  400. }
  401. kvm_x86_ops->set_efer(vcpu, efer);
  402. efer &= ~EFER_LMA;
  403. efer |= vcpu->arch.shadow_efer & EFER_LMA;
  404. vcpu->arch.shadow_efer = efer;
  405. }
  406. void kvm_enable_efer_bits(u64 mask)
  407. {
  408. efer_reserved_bits &= ~mask;
  409. }
  410. EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
  411. /*
  412. * Writes msr value into into the appropriate "register".
  413. * Returns 0 on success, non-0 otherwise.
  414. * Assumes vcpu_load() was already called.
  415. */
  416. int kvm_set_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 data)
  417. {
  418. return kvm_x86_ops->set_msr(vcpu, msr_index, data);
  419. }
  420. /*
  421. * Adapt set_msr() to msr_io()'s calling convention
  422. */
  423. static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
  424. {
  425. return kvm_set_msr(vcpu, index, *data);
  426. }
  427. static void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock)
  428. {
  429. static int version;
  430. struct kvm_wall_clock wc;
  431. struct timespec wc_ts;
  432. if (!wall_clock)
  433. return;
  434. version++;
  435. down_read(&kvm->slots_lock);
  436. kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
  437. wc_ts = current_kernel_time();
  438. wc.wc_sec = wc_ts.tv_sec;
  439. wc.wc_nsec = wc_ts.tv_nsec;
  440. wc.wc_version = version;
  441. kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
  442. version++;
  443. kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
  444. up_read(&kvm->slots_lock);
  445. }
  446. static void kvm_write_guest_time(struct kvm_vcpu *v)
  447. {
  448. struct timespec ts;
  449. unsigned long flags;
  450. struct kvm_vcpu_arch *vcpu = &v->arch;
  451. void *shared_kaddr;
  452. if ((!vcpu->time_page))
  453. return;
  454. /* Keep irq disabled to prevent changes to the clock */
  455. local_irq_save(flags);
  456. kvm_get_msr(v, MSR_IA32_TIME_STAMP_COUNTER,
  457. &vcpu->hv_clock.tsc_timestamp);
  458. ktime_get_ts(&ts);
  459. local_irq_restore(flags);
  460. /* With all the info we got, fill in the values */
  461. vcpu->hv_clock.system_time = ts.tv_nsec +
  462. (NSEC_PER_SEC * (u64)ts.tv_sec);
  463. /*
  464. * The interface expects us to write an even number signaling that the
  465. * update is finished. Since the guest won't see the intermediate
  466. * state, we just write "2" at the end
  467. */
  468. vcpu->hv_clock.version = 2;
  469. shared_kaddr = kmap_atomic(vcpu->time_page, KM_USER0);
  470. memcpy(shared_kaddr + vcpu->time_offset, &vcpu->hv_clock,
  471. sizeof(vcpu->hv_clock));
  472. kunmap_atomic(shared_kaddr, KM_USER0);
  473. mark_page_dirty(v->kvm, vcpu->time >> PAGE_SHIFT);
  474. }
  475. int kvm_set_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 data)
  476. {
  477. switch (msr) {
  478. case MSR_EFER:
  479. set_efer(vcpu, data);
  480. break;
  481. case MSR_IA32_MC0_STATUS:
  482. pr_unimpl(vcpu, "%s: MSR_IA32_MC0_STATUS 0x%llx, nop\n",
  483. __FUNCTION__, data);
  484. break;
  485. case MSR_IA32_MCG_STATUS:
  486. pr_unimpl(vcpu, "%s: MSR_IA32_MCG_STATUS 0x%llx, nop\n",
  487. __FUNCTION__, data);
  488. break;
  489. case MSR_IA32_MCG_CTL:
  490. pr_unimpl(vcpu, "%s: MSR_IA32_MCG_CTL 0x%llx, nop\n",
  491. __FUNCTION__, data);
  492. break;
  493. case MSR_IA32_UCODE_REV:
  494. case MSR_IA32_UCODE_WRITE:
  495. case 0x200 ... 0x2ff: /* MTRRs */
  496. break;
  497. case MSR_IA32_APICBASE:
  498. kvm_set_apic_base(vcpu, data);
  499. break;
  500. case MSR_IA32_MISC_ENABLE:
  501. vcpu->arch.ia32_misc_enable_msr = data;
  502. break;
  503. case MSR_KVM_WALL_CLOCK:
  504. vcpu->kvm->arch.wall_clock = data;
  505. kvm_write_wall_clock(vcpu->kvm, data);
  506. break;
  507. case MSR_KVM_SYSTEM_TIME: {
  508. if (vcpu->arch.time_page) {
  509. kvm_release_page_dirty(vcpu->arch.time_page);
  510. vcpu->arch.time_page = NULL;
  511. }
  512. vcpu->arch.time = data;
  513. /* we verify if the enable bit is set... */
  514. if (!(data & 1))
  515. break;
  516. /* ...but clean it before doing the actual write */
  517. vcpu->arch.time_offset = data & ~(PAGE_MASK | 1);
  518. vcpu->arch.hv_clock.tsc_to_system_mul =
  519. clocksource_khz2mult(tsc_khz, 22);
  520. vcpu->arch.hv_clock.tsc_shift = 22;
  521. down_read(&current->mm->mmap_sem);
  522. down_read(&vcpu->kvm->slots_lock);
  523. vcpu->arch.time_page =
  524. gfn_to_page(vcpu->kvm, data >> PAGE_SHIFT);
  525. up_read(&vcpu->kvm->slots_lock);
  526. up_read(&current->mm->mmap_sem);
  527. if (is_error_page(vcpu->arch.time_page)) {
  528. kvm_release_page_clean(vcpu->arch.time_page);
  529. vcpu->arch.time_page = NULL;
  530. }
  531. kvm_write_guest_time(vcpu);
  532. break;
  533. }
  534. default:
  535. pr_unimpl(vcpu, "unhandled wrmsr: 0x%x data %llx\n", msr, data);
  536. return 1;
  537. }
  538. return 0;
  539. }
  540. EXPORT_SYMBOL_GPL(kvm_set_msr_common);
  541. /*
  542. * Reads an msr value (of 'msr_index') into 'pdata'.
  543. * Returns 0 on success, non-0 otherwise.
  544. * Assumes vcpu_load() was already called.
  545. */
  546. int kvm_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata)
  547. {
  548. return kvm_x86_ops->get_msr(vcpu, msr_index, pdata);
  549. }
  550. int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
  551. {
  552. u64 data;
  553. switch (msr) {
  554. case 0xc0010010: /* SYSCFG */
  555. case 0xc0010015: /* HWCR */
  556. case MSR_IA32_PLATFORM_ID:
  557. case MSR_IA32_P5_MC_ADDR:
  558. case MSR_IA32_P5_MC_TYPE:
  559. case MSR_IA32_MC0_CTL:
  560. case MSR_IA32_MCG_STATUS:
  561. case MSR_IA32_MCG_CAP:
  562. case MSR_IA32_MCG_CTL:
  563. case MSR_IA32_MC0_MISC:
  564. case MSR_IA32_MC0_MISC+4:
  565. case MSR_IA32_MC0_MISC+8:
  566. case MSR_IA32_MC0_MISC+12:
  567. case MSR_IA32_MC0_MISC+16:
  568. case MSR_IA32_UCODE_REV:
  569. case MSR_IA32_EBL_CR_POWERON:
  570. /* MTRR registers */
  571. case 0xfe:
  572. case 0x200 ... 0x2ff:
  573. data = 0;
  574. break;
  575. case 0xcd: /* fsb frequency */
  576. data = 3;
  577. break;
  578. case MSR_IA32_APICBASE:
  579. data = kvm_get_apic_base(vcpu);
  580. break;
  581. case MSR_IA32_MISC_ENABLE:
  582. data = vcpu->arch.ia32_misc_enable_msr;
  583. break;
  584. case MSR_IA32_PERF_STATUS:
  585. /* TSC increment by tick */
  586. data = 1000ULL;
  587. /* CPU multiplier */
  588. data |= (((uint64_t)4ULL) << 40);
  589. break;
  590. case MSR_EFER:
  591. data = vcpu->arch.shadow_efer;
  592. break;
  593. case MSR_KVM_WALL_CLOCK:
  594. data = vcpu->kvm->arch.wall_clock;
  595. break;
  596. case MSR_KVM_SYSTEM_TIME:
  597. data = vcpu->arch.time;
  598. break;
  599. default:
  600. pr_unimpl(vcpu, "unhandled rdmsr: 0x%x\n", msr);
  601. return 1;
  602. }
  603. *pdata = data;
  604. return 0;
  605. }
  606. EXPORT_SYMBOL_GPL(kvm_get_msr_common);
  607. /*
  608. * Read or write a bunch of msrs. All parameters are kernel addresses.
  609. *
  610. * @return number of msrs set successfully.
  611. */
  612. static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
  613. struct kvm_msr_entry *entries,
  614. int (*do_msr)(struct kvm_vcpu *vcpu,
  615. unsigned index, u64 *data))
  616. {
  617. int i;
  618. vcpu_load(vcpu);
  619. for (i = 0; i < msrs->nmsrs; ++i)
  620. if (do_msr(vcpu, entries[i].index, &entries[i].data))
  621. break;
  622. vcpu_put(vcpu);
  623. return i;
  624. }
  625. /*
  626. * Read or write a bunch of msrs. Parameters are user addresses.
  627. *
  628. * @return number of msrs set successfully.
  629. */
  630. static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
  631. int (*do_msr)(struct kvm_vcpu *vcpu,
  632. unsigned index, u64 *data),
  633. int writeback)
  634. {
  635. struct kvm_msrs msrs;
  636. struct kvm_msr_entry *entries;
  637. int r, n;
  638. unsigned size;
  639. r = -EFAULT;
  640. if (copy_from_user(&msrs, user_msrs, sizeof msrs))
  641. goto out;
  642. r = -E2BIG;
  643. if (msrs.nmsrs >= MAX_IO_MSRS)
  644. goto out;
  645. r = -ENOMEM;
  646. size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
  647. entries = vmalloc(size);
  648. if (!entries)
  649. goto out;
  650. r = -EFAULT;
  651. if (copy_from_user(entries, user_msrs->entries, size))
  652. goto out_free;
  653. r = n = __msr_io(vcpu, &msrs, entries, do_msr);
  654. if (r < 0)
  655. goto out_free;
  656. r = -EFAULT;
  657. if (writeback && copy_to_user(user_msrs->entries, entries, size))
  658. goto out_free;
  659. r = n;
  660. out_free:
  661. vfree(entries);
  662. out:
  663. return r;
  664. }
  665. /*
  666. * Make sure that a cpu that is being hot-unplugged does not have any vcpus
  667. * cached on it.
  668. */
  669. void decache_vcpus_on_cpu(int cpu)
  670. {
  671. struct kvm *vm;
  672. struct kvm_vcpu *vcpu;
  673. int i;
  674. spin_lock(&kvm_lock);
  675. list_for_each_entry(vm, &vm_list, vm_list)
  676. for (i = 0; i < KVM_MAX_VCPUS; ++i) {
  677. vcpu = vm->vcpus[i];
  678. if (!vcpu)
  679. continue;
  680. /*
  681. * If the vcpu is locked, then it is running on some
  682. * other cpu and therefore it is not cached on the
  683. * cpu in question.
  684. *
  685. * If it's not locked, check the last cpu it executed
  686. * on.
  687. */
  688. if (mutex_trylock(&vcpu->mutex)) {
  689. if (vcpu->cpu == cpu) {
  690. kvm_x86_ops->vcpu_decache(vcpu);
  691. vcpu->cpu = -1;
  692. }
  693. mutex_unlock(&vcpu->mutex);
  694. }
  695. }
  696. spin_unlock(&kvm_lock);
  697. }
  698. int kvm_dev_ioctl_check_extension(long ext)
  699. {
  700. int r;
  701. switch (ext) {
  702. case KVM_CAP_IRQCHIP:
  703. case KVM_CAP_HLT:
  704. case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
  705. case KVM_CAP_USER_MEMORY:
  706. case KVM_CAP_SET_TSS_ADDR:
  707. case KVM_CAP_EXT_CPUID:
  708. case KVM_CAP_CLOCKSOURCE:
  709. r = 1;
  710. break;
  711. case KVM_CAP_VAPIC:
  712. r = !kvm_x86_ops->cpu_has_accelerated_tpr();
  713. break;
  714. case KVM_CAP_NR_VCPUS:
  715. r = KVM_MAX_VCPUS;
  716. break;
  717. case KVM_CAP_NR_MEMSLOTS:
  718. r = KVM_MEMORY_SLOTS;
  719. break;
  720. default:
  721. r = 0;
  722. break;
  723. }
  724. return r;
  725. }
  726. long kvm_arch_dev_ioctl(struct file *filp,
  727. unsigned int ioctl, unsigned long arg)
  728. {
  729. void __user *argp = (void __user *)arg;
  730. long r;
  731. switch (ioctl) {
  732. case KVM_GET_MSR_INDEX_LIST: {
  733. struct kvm_msr_list __user *user_msr_list = argp;
  734. struct kvm_msr_list msr_list;
  735. unsigned n;
  736. r = -EFAULT;
  737. if (copy_from_user(&msr_list, user_msr_list, sizeof msr_list))
  738. goto out;
  739. n = msr_list.nmsrs;
  740. msr_list.nmsrs = num_msrs_to_save + ARRAY_SIZE(emulated_msrs);
  741. if (copy_to_user(user_msr_list, &msr_list, sizeof msr_list))
  742. goto out;
  743. r = -E2BIG;
  744. if (n < num_msrs_to_save)
  745. goto out;
  746. r = -EFAULT;
  747. if (copy_to_user(user_msr_list->indices, &msrs_to_save,
  748. num_msrs_to_save * sizeof(u32)))
  749. goto out;
  750. if (copy_to_user(user_msr_list->indices
  751. + num_msrs_to_save * sizeof(u32),
  752. &emulated_msrs,
  753. ARRAY_SIZE(emulated_msrs) * sizeof(u32)))
  754. goto out;
  755. r = 0;
  756. break;
  757. }
  758. case KVM_GET_SUPPORTED_CPUID: {
  759. struct kvm_cpuid2 __user *cpuid_arg = argp;
  760. struct kvm_cpuid2 cpuid;
  761. r = -EFAULT;
  762. if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
  763. goto out;
  764. r = kvm_dev_ioctl_get_supported_cpuid(&cpuid,
  765. cpuid_arg->entries);
  766. if (r)
  767. goto out;
  768. r = -EFAULT;
  769. if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
  770. goto out;
  771. r = 0;
  772. break;
  773. }
  774. default:
  775. r = -EINVAL;
  776. }
  777. out:
  778. return r;
  779. }
  780. void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
  781. {
  782. kvm_x86_ops->vcpu_load(vcpu, cpu);
  783. kvm_write_guest_time(vcpu);
  784. }
  785. void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
  786. {
  787. kvm_x86_ops->vcpu_put(vcpu);
  788. kvm_put_guest_fpu(vcpu);
  789. }
  790. static int is_efer_nx(void)
  791. {
  792. u64 efer;
  793. rdmsrl(MSR_EFER, efer);
  794. return efer & EFER_NX;
  795. }
  796. static void cpuid_fix_nx_cap(struct kvm_vcpu *vcpu)
  797. {
  798. int i;
  799. struct kvm_cpuid_entry2 *e, *entry;
  800. entry = NULL;
  801. for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
  802. e = &vcpu->arch.cpuid_entries[i];
  803. if (e->function == 0x80000001) {
  804. entry = e;
  805. break;
  806. }
  807. }
  808. if (entry && (entry->edx & (1 << 20)) && !is_efer_nx()) {
  809. entry->edx &= ~(1 << 20);
  810. printk(KERN_INFO "kvm: guest NX capability removed\n");
  811. }
  812. }
  813. /* when an old userspace process fills a new kernel module */
  814. static int kvm_vcpu_ioctl_set_cpuid(struct kvm_vcpu *vcpu,
  815. struct kvm_cpuid *cpuid,
  816. struct kvm_cpuid_entry __user *entries)
  817. {
  818. int r, i;
  819. struct kvm_cpuid_entry *cpuid_entries;
  820. r = -E2BIG;
  821. if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
  822. goto out;
  823. r = -ENOMEM;
  824. cpuid_entries = vmalloc(sizeof(struct kvm_cpuid_entry) * cpuid->nent);
  825. if (!cpuid_entries)
  826. goto out;
  827. r = -EFAULT;
  828. if (copy_from_user(cpuid_entries, entries,
  829. cpuid->nent * sizeof(struct kvm_cpuid_entry)))
  830. goto out_free;
  831. for (i = 0; i < cpuid->nent; i++) {
  832. vcpu->arch.cpuid_entries[i].function = cpuid_entries[i].function;
  833. vcpu->arch.cpuid_entries[i].eax = cpuid_entries[i].eax;
  834. vcpu->arch.cpuid_entries[i].ebx = cpuid_entries[i].ebx;
  835. vcpu->arch.cpuid_entries[i].ecx = cpuid_entries[i].ecx;
  836. vcpu->arch.cpuid_entries[i].edx = cpuid_entries[i].edx;
  837. vcpu->arch.cpuid_entries[i].index = 0;
  838. vcpu->arch.cpuid_entries[i].flags = 0;
  839. vcpu->arch.cpuid_entries[i].padding[0] = 0;
  840. vcpu->arch.cpuid_entries[i].padding[1] = 0;
  841. vcpu->arch.cpuid_entries[i].padding[2] = 0;
  842. }
  843. vcpu->arch.cpuid_nent = cpuid->nent;
  844. cpuid_fix_nx_cap(vcpu);
  845. r = 0;
  846. out_free:
  847. vfree(cpuid_entries);
  848. out:
  849. return r;
  850. }
  851. static int kvm_vcpu_ioctl_set_cpuid2(struct kvm_vcpu *vcpu,
  852. struct kvm_cpuid2 *cpuid,
  853. struct kvm_cpuid_entry2 __user *entries)
  854. {
  855. int r;
  856. r = -E2BIG;
  857. if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
  858. goto out;
  859. r = -EFAULT;
  860. if (copy_from_user(&vcpu->arch.cpuid_entries, entries,
  861. cpuid->nent * sizeof(struct kvm_cpuid_entry2)))
  862. goto out;
  863. vcpu->arch.cpuid_nent = cpuid->nent;
  864. return 0;
  865. out:
  866. return r;
  867. }
  868. static int kvm_vcpu_ioctl_get_cpuid2(struct kvm_vcpu *vcpu,
  869. struct kvm_cpuid2 *cpuid,
  870. struct kvm_cpuid_entry2 __user *entries)
  871. {
  872. int r;
  873. r = -E2BIG;
  874. if (cpuid->nent < vcpu->arch.cpuid_nent)
  875. goto out;
  876. r = -EFAULT;
  877. if (copy_to_user(entries, &vcpu->arch.cpuid_entries,
  878. vcpu->arch.cpuid_nent * sizeof(struct kvm_cpuid_entry2)))
  879. goto out;
  880. return 0;
  881. out:
  882. cpuid->nent = vcpu->arch.cpuid_nent;
  883. return r;
  884. }
  885. static inline u32 bit(int bitno)
  886. {
  887. return 1 << (bitno & 31);
  888. }
  889. static void do_cpuid_1_ent(struct kvm_cpuid_entry2 *entry, u32 function,
  890. u32 index)
  891. {
  892. entry->function = function;
  893. entry->index = index;
  894. cpuid_count(entry->function, entry->index,
  895. &entry->eax, &entry->ebx, &entry->ecx, &entry->edx);
  896. entry->flags = 0;
  897. }
  898. static void do_cpuid_ent(struct kvm_cpuid_entry2 *entry, u32 function,
  899. u32 index, int *nent, int maxnent)
  900. {
  901. const u32 kvm_supported_word0_x86_features = bit(X86_FEATURE_FPU) |
  902. bit(X86_FEATURE_VME) | bit(X86_FEATURE_DE) |
  903. bit(X86_FEATURE_PSE) | bit(X86_FEATURE_TSC) |
  904. bit(X86_FEATURE_MSR) | bit(X86_FEATURE_PAE) |
  905. bit(X86_FEATURE_CX8) | bit(X86_FEATURE_APIC) |
  906. bit(X86_FEATURE_SEP) | bit(X86_FEATURE_PGE) |
  907. bit(X86_FEATURE_CMOV) | bit(X86_FEATURE_PSE36) |
  908. bit(X86_FEATURE_CLFLSH) | bit(X86_FEATURE_MMX) |
  909. bit(X86_FEATURE_FXSR) | bit(X86_FEATURE_XMM) |
  910. bit(X86_FEATURE_XMM2) | bit(X86_FEATURE_SELFSNOOP);
  911. const u32 kvm_supported_word1_x86_features = bit(X86_FEATURE_FPU) |
  912. bit(X86_FEATURE_VME) | bit(X86_FEATURE_DE) |
  913. bit(X86_FEATURE_PSE) | bit(X86_FEATURE_TSC) |
  914. bit(X86_FEATURE_MSR) | bit(X86_FEATURE_PAE) |
  915. bit(X86_FEATURE_CX8) | bit(X86_FEATURE_APIC) |
  916. bit(X86_FEATURE_PGE) |
  917. bit(X86_FEATURE_CMOV) | bit(X86_FEATURE_PSE36) |
  918. bit(X86_FEATURE_MMX) | bit(X86_FEATURE_FXSR) |
  919. bit(X86_FEATURE_SYSCALL) |
  920. (bit(X86_FEATURE_NX) && is_efer_nx()) |
  921. #ifdef CONFIG_X86_64
  922. bit(X86_FEATURE_LM) |
  923. #endif
  924. bit(X86_FEATURE_MMXEXT) |
  925. bit(X86_FEATURE_3DNOWEXT) |
  926. bit(X86_FEATURE_3DNOW);
  927. const u32 kvm_supported_word3_x86_features =
  928. bit(X86_FEATURE_XMM3) | bit(X86_FEATURE_CX16);
  929. const u32 kvm_supported_word6_x86_features =
  930. bit(X86_FEATURE_LAHF_LM) | bit(X86_FEATURE_CMP_LEGACY);
  931. /* all func 2 cpuid_count() should be called on the same cpu */
  932. get_cpu();
  933. do_cpuid_1_ent(entry, function, index);
  934. ++*nent;
  935. switch (function) {
  936. case 0:
  937. entry->eax = min(entry->eax, (u32)0xb);
  938. break;
  939. case 1:
  940. entry->edx &= kvm_supported_word0_x86_features;
  941. entry->ecx &= kvm_supported_word3_x86_features;
  942. break;
  943. /* function 2 entries are STATEFUL. That is, repeated cpuid commands
  944. * may return different values. This forces us to get_cpu() before
  945. * issuing the first command, and also to emulate this annoying behavior
  946. * in kvm_emulate_cpuid() using KVM_CPUID_FLAG_STATE_READ_NEXT */
  947. case 2: {
  948. int t, times = entry->eax & 0xff;
  949. entry->flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
  950. for (t = 1; t < times && *nent < maxnent; ++t) {
  951. do_cpuid_1_ent(&entry[t], function, 0);
  952. entry[t].flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
  953. ++*nent;
  954. }
  955. break;
  956. }
  957. /* function 4 and 0xb have additional index. */
  958. case 4: {
  959. int i, cache_type;
  960. entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
  961. /* read more entries until cache_type is zero */
  962. for (i = 1; *nent < maxnent; ++i) {
  963. cache_type = entry[i - 1].eax & 0x1f;
  964. if (!cache_type)
  965. break;
  966. do_cpuid_1_ent(&entry[i], function, i);
  967. entry[i].flags |=
  968. KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
  969. ++*nent;
  970. }
  971. break;
  972. }
  973. case 0xb: {
  974. int i, level_type;
  975. entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
  976. /* read more entries until level_type is zero */
  977. for (i = 1; *nent < maxnent; ++i) {
  978. level_type = entry[i - 1].ecx & 0xff;
  979. if (!level_type)
  980. break;
  981. do_cpuid_1_ent(&entry[i], function, i);
  982. entry[i].flags |=
  983. KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
  984. ++*nent;
  985. }
  986. break;
  987. }
  988. case 0x80000000:
  989. entry->eax = min(entry->eax, 0x8000001a);
  990. break;
  991. case 0x80000001:
  992. entry->edx &= kvm_supported_word1_x86_features;
  993. entry->ecx &= kvm_supported_word6_x86_features;
  994. break;
  995. }
  996. put_cpu();
  997. }
  998. static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2 *cpuid,
  999. struct kvm_cpuid_entry2 __user *entries)
  1000. {
  1001. struct kvm_cpuid_entry2 *cpuid_entries;
  1002. int limit, nent = 0, r = -E2BIG;
  1003. u32 func;
  1004. if (cpuid->nent < 1)
  1005. goto out;
  1006. r = -ENOMEM;
  1007. cpuid_entries = vmalloc(sizeof(struct kvm_cpuid_entry2) * cpuid->nent);
  1008. if (!cpuid_entries)
  1009. goto out;
  1010. do_cpuid_ent(&cpuid_entries[0], 0, 0, &nent, cpuid->nent);
  1011. limit = cpuid_entries[0].eax;
  1012. for (func = 1; func <= limit && nent < cpuid->nent; ++func)
  1013. do_cpuid_ent(&cpuid_entries[nent], func, 0,
  1014. &nent, cpuid->nent);
  1015. r = -E2BIG;
  1016. if (nent >= cpuid->nent)
  1017. goto out_free;
  1018. do_cpuid_ent(&cpuid_entries[nent], 0x80000000, 0, &nent, cpuid->nent);
  1019. limit = cpuid_entries[nent - 1].eax;
  1020. for (func = 0x80000001; func <= limit && nent < cpuid->nent; ++func)
  1021. do_cpuid_ent(&cpuid_entries[nent], func, 0,
  1022. &nent, cpuid->nent);
  1023. r = -EFAULT;
  1024. if (copy_to_user(entries, cpuid_entries,
  1025. nent * sizeof(struct kvm_cpuid_entry2)))
  1026. goto out_free;
  1027. cpuid->nent = nent;
  1028. r = 0;
  1029. out_free:
  1030. vfree(cpuid_entries);
  1031. out:
  1032. return r;
  1033. }
  1034. static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
  1035. struct kvm_lapic_state *s)
  1036. {
  1037. vcpu_load(vcpu);
  1038. memcpy(s->regs, vcpu->arch.apic->regs, sizeof *s);
  1039. vcpu_put(vcpu);
  1040. return 0;
  1041. }
  1042. static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
  1043. struct kvm_lapic_state *s)
  1044. {
  1045. vcpu_load(vcpu);
  1046. memcpy(vcpu->arch.apic->regs, s->regs, sizeof *s);
  1047. kvm_apic_post_state_restore(vcpu);
  1048. vcpu_put(vcpu);
  1049. return 0;
  1050. }
  1051. static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
  1052. struct kvm_interrupt *irq)
  1053. {
  1054. if (irq->irq < 0 || irq->irq >= 256)
  1055. return -EINVAL;
  1056. if (irqchip_in_kernel(vcpu->kvm))
  1057. return -ENXIO;
  1058. vcpu_load(vcpu);
  1059. set_bit(irq->irq, vcpu->arch.irq_pending);
  1060. set_bit(irq->irq / BITS_PER_LONG, &vcpu->arch.irq_summary);
  1061. vcpu_put(vcpu);
  1062. return 0;
  1063. }
  1064. static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
  1065. struct kvm_tpr_access_ctl *tac)
  1066. {
  1067. if (tac->flags)
  1068. return -EINVAL;
  1069. vcpu->arch.tpr_access_reporting = !!tac->enabled;
  1070. return 0;
  1071. }
  1072. long kvm_arch_vcpu_ioctl(struct file *filp,
  1073. unsigned int ioctl, unsigned long arg)
  1074. {
  1075. struct kvm_vcpu *vcpu = filp->private_data;
  1076. void __user *argp = (void __user *)arg;
  1077. int r;
  1078. switch (ioctl) {
  1079. case KVM_GET_LAPIC: {
  1080. struct kvm_lapic_state lapic;
  1081. memset(&lapic, 0, sizeof lapic);
  1082. r = kvm_vcpu_ioctl_get_lapic(vcpu, &lapic);
  1083. if (r)
  1084. goto out;
  1085. r = -EFAULT;
  1086. if (copy_to_user(argp, &lapic, sizeof lapic))
  1087. goto out;
  1088. r = 0;
  1089. break;
  1090. }
  1091. case KVM_SET_LAPIC: {
  1092. struct kvm_lapic_state lapic;
  1093. r = -EFAULT;
  1094. if (copy_from_user(&lapic, argp, sizeof lapic))
  1095. goto out;
  1096. r = kvm_vcpu_ioctl_set_lapic(vcpu, &lapic);;
  1097. if (r)
  1098. goto out;
  1099. r = 0;
  1100. break;
  1101. }
  1102. case KVM_INTERRUPT: {
  1103. struct kvm_interrupt irq;
  1104. r = -EFAULT;
  1105. if (copy_from_user(&irq, argp, sizeof irq))
  1106. goto out;
  1107. r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
  1108. if (r)
  1109. goto out;
  1110. r = 0;
  1111. break;
  1112. }
  1113. case KVM_SET_CPUID: {
  1114. struct kvm_cpuid __user *cpuid_arg = argp;
  1115. struct kvm_cpuid cpuid;
  1116. r = -EFAULT;
  1117. if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
  1118. goto out;
  1119. r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
  1120. if (r)
  1121. goto out;
  1122. break;
  1123. }
  1124. case KVM_SET_CPUID2: {
  1125. struct kvm_cpuid2 __user *cpuid_arg = argp;
  1126. struct kvm_cpuid2 cpuid;
  1127. r = -EFAULT;
  1128. if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
  1129. goto out;
  1130. r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
  1131. cpuid_arg->entries);
  1132. if (r)
  1133. goto out;
  1134. break;
  1135. }
  1136. case KVM_GET_CPUID2: {
  1137. struct kvm_cpuid2 __user *cpuid_arg = argp;
  1138. struct kvm_cpuid2 cpuid;
  1139. r = -EFAULT;
  1140. if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
  1141. goto out;
  1142. r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
  1143. cpuid_arg->entries);
  1144. if (r)
  1145. goto out;
  1146. r = -EFAULT;
  1147. if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
  1148. goto out;
  1149. r = 0;
  1150. break;
  1151. }
  1152. case KVM_GET_MSRS:
  1153. r = msr_io(vcpu, argp, kvm_get_msr, 1);
  1154. break;
  1155. case KVM_SET_MSRS:
  1156. r = msr_io(vcpu, argp, do_set_msr, 0);
  1157. break;
  1158. case KVM_TPR_ACCESS_REPORTING: {
  1159. struct kvm_tpr_access_ctl tac;
  1160. r = -EFAULT;
  1161. if (copy_from_user(&tac, argp, sizeof tac))
  1162. goto out;
  1163. r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
  1164. if (r)
  1165. goto out;
  1166. r = -EFAULT;
  1167. if (copy_to_user(argp, &tac, sizeof tac))
  1168. goto out;
  1169. r = 0;
  1170. break;
  1171. };
  1172. case KVM_SET_VAPIC_ADDR: {
  1173. struct kvm_vapic_addr va;
  1174. r = -EINVAL;
  1175. if (!irqchip_in_kernel(vcpu->kvm))
  1176. goto out;
  1177. r = -EFAULT;
  1178. if (copy_from_user(&va, argp, sizeof va))
  1179. goto out;
  1180. r = 0;
  1181. kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
  1182. break;
  1183. }
  1184. default:
  1185. r = -EINVAL;
  1186. }
  1187. out:
  1188. return r;
  1189. }
  1190. static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
  1191. {
  1192. int ret;
  1193. if (addr > (unsigned int)(-3 * PAGE_SIZE))
  1194. return -1;
  1195. ret = kvm_x86_ops->set_tss_addr(kvm, addr);
  1196. return ret;
  1197. }
  1198. static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
  1199. u32 kvm_nr_mmu_pages)
  1200. {
  1201. if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
  1202. return -EINVAL;
  1203. down_write(&kvm->slots_lock);
  1204. kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
  1205. kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
  1206. up_write(&kvm->slots_lock);
  1207. return 0;
  1208. }
  1209. static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
  1210. {
  1211. return kvm->arch.n_alloc_mmu_pages;
  1212. }
  1213. gfn_t unalias_gfn(struct kvm *kvm, gfn_t gfn)
  1214. {
  1215. int i;
  1216. struct kvm_mem_alias *alias;
  1217. for (i = 0; i < kvm->arch.naliases; ++i) {
  1218. alias = &kvm->arch.aliases[i];
  1219. if (gfn >= alias->base_gfn
  1220. && gfn < alias->base_gfn + alias->npages)
  1221. return alias->target_gfn + gfn - alias->base_gfn;
  1222. }
  1223. return gfn;
  1224. }
  1225. /*
  1226. * Set a new alias region. Aliases map a portion of physical memory into
  1227. * another portion. This is useful for memory windows, for example the PC
  1228. * VGA region.
  1229. */
  1230. static int kvm_vm_ioctl_set_memory_alias(struct kvm *kvm,
  1231. struct kvm_memory_alias *alias)
  1232. {
  1233. int r, n;
  1234. struct kvm_mem_alias *p;
  1235. r = -EINVAL;
  1236. /* General sanity checks */
  1237. if (alias->memory_size & (PAGE_SIZE - 1))
  1238. goto out;
  1239. if (alias->guest_phys_addr & (PAGE_SIZE - 1))
  1240. goto out;
  1241. if (alias->slot >= KVM_ALIAS_SLOTS)
  1242. goto out;
  1243. if (alias->guest_phys_addr + alias->memory_size
  1244. < alias->guest_phys_addr)
  1245. goto out;
  1246. if (alias->target_phys_addr + alias->memory_size
  1247. < alias->target_phys_addr)
  1248. goto out;
  1249. down_write(&kvm->slots_lock);
  1250. p = &kvm->arch.aliases[alias->slot];
  1251. p->base_gfn = alias->guest_phys_addr >> PAGE_SHIFT;
  1252. p->npages = alias->memory_size >> PAGE_SHIFT;
  1253. p->target_gfn = alias->target_phys_addr >> PAGE_SHIFT;
  1254. for (n = KVM_ALIAS_SLOTS; n > 0; --n)
  1255. if (kvm->arch.aliases[n - 1].npages)
  1256. break;
  1257. kvm->arch.naliases = n;
  1258. kvm_mmu_zap_all(kvm);
  1259. up_write(&kvm->slots_lock);
  1260. return 0;
  1261. out:
  1262. return r;
  1263. }
  1264. static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
  1265. {
  1266. int r;
  1267. r = 0;
  1268. switch (chip->chip_id) {
  1269. case KVM_IRQCHIP_PIC_MASTER:
  1270. memcpy(&chip->chip.pic,
  1271. &pic_irqchip(kvm)->pics[0],
  1272. sizeof(struct kvm_pic_state));
  1273. break;
  1274. case KVM_IRQCHIP_PIC_SLAVE:
  1275. memcpy(&chip->chip.pic,
  1276. &pic_irqchip(kvm)->pics[1],
  1277. sizeof(struct kvm_pic_state));
  1278. break;
  1279. case KVM_IRQCHIP_IOAPIC:
  1280. memcpy(&chip->chip.ioapic,
  1281. ioapic_irqchip(kvm),
  1282. sizeof(struct kvm_ioapic_state));
  1283. break;
  1284. default:
  1285. r = -EINVAL;
  1286. break;
  1287. }
  1288. return r;
  1289. }
  1290. static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
  1291. {
  1292. int r;
  1293. r = 0;
  1294. switch (chip->chip_id) {
  1295. case KVM_IRQCHIP_PIC_MASTER:
  1296. memcpy(&pic_irqchip(kvm)->pics[0],
  1297. &chip->chip.pic,
  1298. sizeof(struct kvm_pic_state));
  1299. break;
  1300. case KVM_IRQCHIP_PIC_SLAVE:
  1301. memcpy(&pic_irqchip(kvm)->pics[1],
  1302. &chip->chip.pic,
  1303. sizeof(struct kvm_pic_state));
  1304. break;
  1305. case KVM_IRQCHIP_IOAPIC:
  1306. memcpy(ioapic_irqchip(kvm),
  1307. &chip->chip.ioapic,
  1308. sizeof(struct kvm_ioapic_state));
  1309. break;
  1310. default:
  1311. r = -EINVAL;
  1312. break;
  1313. }
  1314. kvm_pic_update_irq(pic_irqchip(kvm));
  1315. return r;
  1316. }
  1317. /*
  1318. * Get (and clear) the dirty memory log for a memory slot.
  1319. */
  1320. int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm,
  1321. struct kvm_dirty_log *log)
  1322. {
  1323. int r;
  1324. int n;
  1325. struct kvm_memory_slot *memslot;
  1326. int is_dirty = 0;
  1327. down_write(&kvm->slots_lock);
  1328. r = kvm_get_dirty_log(kvm, log, &is_dirty);
  1329. if (r)
  1330. goto out;
  1331. /* If nothing is dirty, don't bother messing with page tables. */
  1332. if (is_dirty) {
  1333. kvm_mmu_slot_remove_write_access(kvm, log->slot);
  1334. kvm_flush_remote_tlbs(kvm);
  1335. memslot = &kvm->memslots[log->slot];
  1336. n = ALIGN(memslot->npages, BITS_PER_LONG) / 8;
  1337. memset(memslot->dirty_bitmap, 0, n);
  1338. }
  1339. r = 0;
  1340. out:
  1341. up_write(&kvm->slots_lock);
  1342. return r;
  1343. }
  1344. long kvm_arch_vm_ioctl(struct file *filp,
  1345. unsigned int ioctl, unsigned long arg)
  1346. {
  1347. struct kvm *kvm = filp->private_data;
  1348. void __user *argp = (void __user *)arg;
  1349. int r = -EINVAL;
  1350. switch (ioctl) {
  1351. case KVM_SET_TSS_ADDR:
  1352. r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
  1353. if (r < 0)
  1354. goto out;
  1355. break;
  1356. case KVM_SET_MEMORY_REGION: {
  1357. struct kvm_memory_region kvm_mem;
  1358. struct kvm_userspace_memory_region kvm_userspace_mem;
  1359. r = -EFAULT;
  1360. if (copy_from_user(&kvm_mem, argp, sizeof kvm_mem))
  1361. goto out;
  1362. kvm_userspace_mem.slot = kvm_mem.slot;
  1363. kvm_userspace_mem.flags = kvm_mem.flags;
  1364. kvm_userspace_mem.guest_phys_addr = kvm_mem.guest_phys_addr;
  1365. kvm_userspace_mem.memory_size = kvm_mem.memory_size;
  1366. r = kvm_vm_ioctl_set_memory_region(kvm, &kvm_userspace_mem, 0);
  1367. if (r)
  1368. goto out;
  1369. break;
  1370. }
  1371. case KVM_SET_NR_MMU_PAGES:
  1372. r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
  1373. if (r)
  1374. goto out;
  1375. break;
  1376. case KVM_GET_NR_MMU_PAGES:
  1377. r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
  1378. break;
  1379. case KVM_SET_MEMORY_ALIAS: {
  1380. struct kvm_memory_alias alias;
  1381. r = -EFAULT;
  1382. if (copy_from_user(&alias, argp, sizeof alias))
  1383. goto out;
  1384. r = kvm_vm_ioctl_set_memory_alias(kvm, &alias);
  1385. if (r)
  1386. goto out;
  1387. break;
  1388. }
  1389. case KVM_CREATE_IRQCHIP:
  1390. r = -ENOMEM;
  1391. kvm->arch.vpic = kvm_create_pic(kvm);
  1392. if (kvm->arch.vpic) {
  1393. r = kvm_ioapic_init(kvm);
  1394. if (r) {
  1395. kfree(kvm->arch.vpic);
  1396. kvm->arch.vpic = NULL;
  1397. goto out;
  1398. }
  1399. } else
  1400. goto out;
  1401. break;
  1402. case KVM_IRQ_LINE: {
  1403. struct kvm_irq_level irq_event;
  1404. r = -EFAULT;
  1405. if (copy_from_user(&irq_event, argp, sizeof irq_event))
  1406. goto out;
  1407. if (irqchip_in_kernel(kvm)) {
  1408. mutex_lock(&kvm->lock);
  1409. if (irq_event.irq < 16)
  1410. kvm_pic_set_irq(pic_irqchip(kvm),
  1411. irq_event.irq,
  1412. irq_event.level);
  1413. kvm_ioapic_set_irq(kvm->arch.vioapic,
  1414. irq_event.irq,
  1415. irq_event.level);
  1416. mutex_unlock(&kvm->lock);
  1417. r = 0;
  1418. }
  1419. break;
  1420. }
  1421. case KVM_GET_IRQCHIP: {
  1422. /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
  1423. struct kvm_irqchip chip;
  1424. r = -EFAULT;
  1425. if (copy_from_user(&chip, argp, sizeof chip))
  1426. goto out;
  1427. r = -ENXIO;
  1428. if (!irqchip_in_kernel(kvm))
  1429. goto out;
  1430. r = kvm_vm_ioctl_get_irqchip(kvm, &chip);
  1431. if (r)
  1432. goto out;
  1433. r = -EFAULT;
  1434. if (copy_to_user(argp, &chip, sizeof chip))
  1435. goto out;
  1436. r = 0;
  1437. break;
  1438. }
  1439. case KVM_SET_IRQCHIP: {
  1440. /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
  1441. struct kvm_irqchip chip;
  1442. r = -EFAULT;
  1443. if (copy_from_user(&chip, argp, sizeof chip))
  1444. goto out;
  1445. r = -ENXIO;
  1446. if (!irqchip_in_kernel(kvm))
  1447. goto out;
  1448. r = kvm_vm_ioctl_set_irqchip(kvm, &chip);
  1449. if (r)
  1450. goto out;
  1451. r = 0;
  1452. break;
  1453. }
  1454. default:
  1455. ;
  1456. }
  1457. out:
  1458. return r;
  1459. }
  1460. static void kvm_init_msr_list(void)
  1461. {
  1462. u32 dummy[2];
  1463. unsigned i, j;
  1464. for (i = j = 0; i < ARRAY_SIZE(msrs_to_save); i++) {
  1465. if (rdmsr_safe(msrs_to_save[i], &dummy[0], &dummy[1]) < 0)
  1466. continue;
  1467. if (j < i)
  1468. msrs_to_save[j] = msrs_to_save[i];
  1469. j++;
  1470. }
  1471. num_msrs_to_save = j;
  1472. }
  1473. /*
  1474. * Only apic need an MMIO device hook, so shortcut now..
  1475. */
  1476. static struct kvm_io_device *vcpu_find_pervcpu_dev(struct kvm_vcpu *vcpu,
  1477. gpa_t addr)
  1478. {
  1479. struct kvm_io_device *dev;
  1480. if (vcpu->arch.apic) {
  1481. dev = &vcpu->arch.apic->dev;
  1482. if (dev->in_range(dev, addr))
  1483. return dev;
  1484. }
  1485. return NULL;
  1486. }
  1487. static struct kvm_io_device *vcpu_find_mmio_dev(struct kvm_vcpu *vcpu,
  1488. gpa_t addr)
  1489. {
  1490. struct kvm_io_device *dev;
  1491. dev = vcpu_find_pervcpu_dev(vcpu, addr);
  1492. if (dev == NULL)
  1493. dev = kvm_io_bus_find_dev(&vcpu->kvm->mmio_bus, addr);
  1494. return dev;
  1495. }
  1496. int emulator_read_std(unsigned long addr,
  1497. void *val,
  1498. unsigned int bytes,
  1499. struct kvm_vcpu *vcpu)
  1500. {
  1501. void *data = val;
  1502. int r = X86EMUL_CONTINUE;
  1503. down_read(&vcpu->kvm->slots_lock);
  1504. while (bytes) {
  1505. gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
  1506. unsigned offset = addr & (PAGE_SIZE-1);
  1507. unsigned tocopy = min(bytes, (unsigned)PAGE_SIZE - offset);
  1508. int ret;
  1509. if (gpa == UNMAPPED_GVA) {
  1510. r = X86EMUL_PROPAGATE_FAULT;
  1511. goto out;
  1512. }
  1513. ret = kvm_read_guest(vcpu->kvm, gpa, data, tocopy);
  1514. if (ret < 0) {
  1515. r = X86EMUL_UNHANDLEABLE;
  1516. goto out;
  1517. }
  1518. bytes -= tocopy;
  1519. data += tocopy;
  1520. addr += tocopy;
  1521. }
  1522. out:
  1523. up_read(&vcpu->kvm->slots_lock);
  1524. return r;
  1525. }
  1526. EXPORT_SYMBOL_GPL(emulator_read_std);
  1527. static int emulator_read_emulated(unsigned long addr,
  1528. void *val,
  1529. unsigned int bytes,
  1530. struct kvm_vcpu *vcpu)
  1531. {
  1532. struct kvm_io_device *mmio_dev;
  1533. gpa_t gpa;
  1534. if (vcpu->mmio_read_completed) {
  1535. memcpy(val, vcpu->mmio_data, bytes);
  1536. vcpu->mmio_read_completed = 0;
  1537. return X86EMUL_CONTINUE;
  1538. }
  1539. down_read(&vcpu->kvm->slots_lock);
  1540. gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
  1541. up_read(&vcpu->kvm->slots_lock);
  1542. /* For APIC access vmexit */
  1543. if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
  1544. goto mmio;
  1545. if (emulator_read_std(addr, val, bytes, vcpu)
  1546. == X86EMUL_CONTINUE)
  1547. return X86EMUL_CONTINUE;
  1548. if (gpa == UNMAPPED_GVA)
  1549. return X86EMUL_PROPAGATE_FAULT;
  1550. mmio:
  1551. /*
  1552. * Is this MMIO handled locally?
  1553. */
  1554. mutex_lock(&vcpu->kvm->lock);
  1555. mmio_dev = vcpu_find_mmio_dev(vcpu, gpa);
  1556. if (mmio_dev) {
  1557. kvm_iodevice_read(mmio_dev, gpa, bytes, val);
  1558. mutex_unlock(&vcpu->kvm->lock);
  1559. return X86EMUL_CONTINUE;
  1560. }
  1561. mutex_unlock(&vcpu->kvm->lock);
  1562. vcpu->mmio_needed = 1;
  1563. vcpu->mmio_phys_addr = gpa;
  1564. vcpu->mmio_size = bytes;
  1565. vcpu->mmio_is_write = 0;
  1566. return X86EMUL_UNHANDLEABLE;
  1567. }
  1568. static int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
  1569. const void *val, int bytes)
  1570. {
  1571. int ret;
  1572. down_read(&vcpu->kvm->slots_lock);
  1573. ret = kvm_write_guest(vcpu->kvm, gpa, val, bytes);
  1574. if (ret < 0) {
  1575. up_read(&vcpu->kvm->slots_lock);
  1576. return 0;
  1577. }
  1578. kvm_mmu_pte_write(vcpu, gpa, val, bytes);
  1579. up_read(&vcpu->kvm->slots_lock);
  1580. return 1;
  1581. }
  1582. static int emulator_write_emulated_onepage(unsigned long addr,
  1583. const void *val,
  1584. unsigned int bytes,
  1585. struct kvm_vcpu *vcpu)
  1586. {
  1587. struct kvm_io_device *mmio_dev;
  1588. gpa_t gpa;
  1589. down_read(&vcpu->kvm->slots_lock);
  1590. gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
  1591. up_read(&vcpu->kvm->slots_lock);
  1592. if (gpa == UNMAPPED_GVA) {
  1593. kvm_inject_page_fault(vcpu, addr, 2);
  1594. return X86EMUL_PROPAGATE_FAULT;
  1595. }
  1596. /* For APIC access vmexit */
  1597. if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
  1598. goto mmio;
  1599. if (emulator_write_phys(vcpu, gpa, val, bytes))
  1600. return X86EMUL_CONTINUE;
  1601. mmio:
  1602. /*
  1603. * Is this MMIO handled locally?
  1604. */
  1605. mutex_lock(&vcpu->kvm->lock);
  1606. mmio_dev = vcpu_find_mmio_dev(vcpu, gpa);
  1607. if (mmio_dev) {
  1608. kvm_iodevice_write(mmio_dev, gpa, bytes, val);
  1609. mutex_unlock(&vcpu->kvm->lock);
  1610. return X86EMUL_CONTINUE;
  1611. }
  1612. mutex_unlock(&vcpu->kvm->lock);
  1613. vcpu->mmio_needed = 1;
  1614. vcpu->mmio_phys_addr = gpa;
  1615. vcpu->mmio_size = bytes;
  1616. vcpu->mmio_is_write = 1;
  1617. memcpy(vcpu->mmio_data, val, bytes);
  1618. return X86EMUL_CONTINUE;
  1619. }
  1620. int emulator_write_emulated(unsigned long addr,
  1621. const void *val,
  1622. unsigned int bytes,
  1623. struct kvm_vcpu *vcpu)
  1624. {
  1625. /* Crossing a page boundary? */
  1626. if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
  1627. int rc, now;
  1628. now = -addr & ~PAGE_MASK;
  1629. rc = emulator_write_emulated_onepage(addr, val, now, vcpu);
  1630. if (rc != X86EMUL_CONTINUE)
  1631. return rc;
  1632. addr += now;
  1633. val += now;
  1634. bytes -= now;
  1635. }
  1636. return emulator_write_emulated_onepage(addr, val, bytes, vcpu);
  1637. }
  1638. EXPORT_SYMBOL_GPL(emulator_write_emulated);
  1639. static int emulator_cmpxchg_emulated(unsigned long addr,
  1640. const void *old,
  1641. const void *new,
  1642. unsigned int bytes,
  1643. struct kvm_vcpu *vcpu)
  1644. {
  1645. static int reported;
  1646. if (!reported) {
  1647. reported = 1;
  1648. printk(KERN_WARNING "kvm: emulating exchange as write\n");
  1649. }
  1650. #ifndef CONFIG_X86_64
  1651. /* guests cmpxchg8b have to be emulated atomically */
  1652. if (bytes == 8) {
  1653. gpa_t gpa;
  1654. struct page *page;
  1655. char *kaddr;
  1656. u64 val;
  1657. down_read(&vcpu->kvm->slots_lock);
  1658. gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
  1659. if (gpa == UNMAPPED_GVA ||
  1660. (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
  1661. goto emul_write;
  1662. if (((gpa + bytes - 1) & PAGE_MASK) != (gpa & PAGE_MASK))
  1663. goto emul_write;
  1664. val = *(u64 *)new;
  1665. down_read(&current->mm->mmap_sem);
  1666. page = gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT);
  1667. up_read(&current->mm->mmap_sem);
  1668. kaddr = kmap_atomic(page, KM_USER0);
  1669. set_64bit((u64 *)(kaddr + offset_in_page(gpa)), val);
  1670. kunmap_atomic(kaddr, KM_USER0);
  1671. kvm_release_page_dirty(page);
  1672. emul_write:
  1673. up_read(&vcpu->kvm->slots_lock);
  1674. }
  1675. #endif
  1676. return emulator_write_emulated(addr, new, bytes, vcpu);
  1677. }
  1678. static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
  1679. {
  1680. return kvm_x86_ops->get_segment_base(vcpu, seg);
  1681. }
  1682. int emulate_invlpg(struct kvm_vcpu *vcpu, gva_t address)
  1683. {
  1684. return X86EMUL_CONTINUE;
  1685. }
  1686. int emulate_clts(struct kvm_vcpu *vcpu)
  1687. {
  1688. kvm_x86_ops->set_cr0(vcpu, vcpu->arch.cr0 & ~X86_CR0_TS);
  1689. return X86EMUL_CONTINUE;
  1690. }
  1691. int emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long *dest)
  1692. {
  1693. struct kvm_vcpu *vcpu = ctxt->vcpu;
  1694. switch (dr) {
  1695. case 0 ... 3:
  1696. *dest = kvm_x86_ops->get_dr(vcpu, dr);
  1697. return X86EMUL_CONTINUE;
  1698. default:
  1699. pr_unimpl(vcpu, "%s: unexpected dr %u\n", __FUNCTION__, dr);
  1700. return X86EMUL_UNHANDLEABLE;
  1701. }
  1702. }
  1703. int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long value)
  1704. {
  1705. unsigned long mask = (ctxt->mode == X86EMUL_MODE_PROT64) ? ~0ULL : ~0U;
  1706. int exception;
  1707. kvm_x86_ops->set_dr(ctxt->vcpu, dr, value & mask, &exception);
  1708. if (exception) {
  1709. /* FIXME: better handling */
  1710. return X86EMUL_UNHANDLEABLE;
  1711. }
  1712. return X86EMUL_CONTINUE;
  1713. }
  1714. void kvm_report_emulation_failure(struct kvm_vcpu *vcpu, const char *context)
  1715. {
  1716. static int reported;
  1717. u8 opcodes[4];
  1718. unsigned long rip = vcpu->arch.rip;
  1719. unsigned long rip_linear;
  1720. rip_linear = rip + get_segment_base(vcpu, VCPU_SREG_CS);
  1721. if (reported)
  1722. return;
  1723. emulator_read_std(rip_linear, (void *)opcodes, 4, vcpu);
  1724. printk(KERN_ERR "emulation failed (%s) rip %lx %02x %02x %02x %02x\n",
  1725. context, rip, opcodes[0], opcodes[1], opcodes[2], opcodes[3]);
  1726. reported = 1;
  1727. }
  1728. EXPORT_SYMBOL_GPL(kvm_report_emulation_failure);
  1729. static struct x86_emulate_ops emulate_ops = {
  1730. .read_std = emulator_read_std,
  1731. .read_emulated = emulator_read_emulated,
  1732. .write_emulated = emulator_write_emulated,
  1733. .cmpxchg_emulated = emulator_cmpxchg_emulated,
  1734. };
  1735. int emulate_instruction(struct kvm_vcpu *vcpu,
  1736. struct kvm_run *run,
  1737. unsigned long cr2,
  1738. u16 error_code,
  1739. int emulation_type)
  1740. {
  1741. int r;
  1742. struct decode_cache *c;
  1743. vcpu->arch.mmio_fault_cr2 = cr2;
  1744. kvm_x86_ops->cache_regs(vcpu);
  1745. vcpu->mmio_is_write = 0;
  1746. vcpu->arch.pio.string = 0;
  1747. if (!(emulation_type & EMULTYPE_NO_DECODE)) {
  1748. int cs_db, cs_l;
  1749. kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
  1750. vcpu->arch.emulate_ctxt.vcpu = vcpu;
  1751. vcpu->arch.emulate_ctxt.eflags = kvm_x86_ops->get_rflags(vcpu);
  1752. vcpu->arch.emulate_ctxt.mode =
  1753. (vcpu->arch.emulate_ctxt.eflags & X86_EFLAGS_VM)
  1754. ? X86EMUL_MODE_REAL : cs_l
  1755. ? X86EMUL_MODE_PROT64 : cs_db
  1756. ? X86EMUL_MODE_PROT32 : X86EMUL_MODE_PROT16;
  1757. if (vcpu->arch.emulate_ctxt.mode == X86EMUL_MODE_PROT64) {
  1758. vcpu->arch.emulate_ctxt.cs_base = 0;
  1759. vcpu->arch.emulate_ctxt.ds_base = 0;
  1760. vcpu->arch.emulate_ctxt.es_base = 0;
  1761. vcpu->arch.emulate_ctxt.ss_base = 0;
  1762. } else {
  1763. vcpu->arch.emulate_ctxt.cs_base =
  1764. get_segment_base(vcpu, VCPU_SREG_CS);
  1765. vcpu->arch.emulate_ctxt.ds_base =
  1766. get_segment_base(vcpu, VCPU_SREG_DS);
  1767. vcpu->arch.emulate_ctxt.es_base =
  1768. get_segment_base(vcpu, VCPU_SREG_ES);
  1769. vcpu->arch.emulate_ctxt.ss_base =
  1770. get_segment_base(vcpu, VCPU_SREG_SS);
  1771. }
  1772. vcpu->arch.emulate_ctxt.gs_base =
  1773. get_segment_base(vcpu, VCPU_SREG_GS);
  1774. vcpu->arch.emulate_ctxt.fs_base =
  1775. get_segment_base(vcpu, VCPU_SREG_FS);
  1776. r = x86_decode_insn(&vcpu->arch.emulate_ctxt, &emulate_ops);
  1777. /* Reject the instructions other than VMCALL/VMMCALL when
  1778. * try to emulate invalid opcode */
  1779. c = &vcpu->arch.emulate_ctxt.decode;
  1780. if ((emulation_type & EMULTYPE_TRAP_UD) &&
  1781. (!(c->twobyte && c->b == 0x01 &&
  1782. (c->modrm_reg == 0 || c->modrm_reg == 3) &&
  1783. c->modrm_mod == 3 && c->modrm_rm == 1)))
  1784. return EMULATE_FAIL;
  1785. ++vcpu->stat.insn_emulation;
  1786. if (r) {
  1787. ++vcpu->stat.insn_emulation_fail;
  1788. if (kvm_mmu_unprotect_page_virt(vcpu, cr2))
  1789. return EMULATE_DONE;
  1790. return EMULATE_FAIL;
  1791. }
  1792. }
  1793. r = x86_emulate_insn(&vcpu->arch.emulate_ctxt, &emulate_ops);
  1794. if (vcpu->arch.pio.string)
  1795. return EMULATE_DO_MMIO;
  1796. if ((r || vcpu->mmio_is_write) && run) {
  1797. run->exit_reason = KVM_EXIT_MMIO;
  1798. run->mmio.phys_addr = vcpu->mmio_phys_addr;
  1799. memcpy(run->mmio.data, vcpu->mmio_data, 8);
  1800. run->mmio.len = vcpu->mmio_size;
  1801. run->mmio.is_write = vcpu->mmio_is_write;
  1802. }
  1803. if (r) {
  1804. if (kvm_mmu_unprotect_page_virt(vcpu, cr2))
  1805. return EMULATE_DONE;
  1806. if (!vcpu->mmio_needed) {
  1807. kvm_report_emulation_failure(vcpu, "mmio");
  1808. return EMULATE_FAIL;
  1809. }
  1810. return EMULATE_DO_MMIO;
  1811. }
  1812. kvm_x86_ops->decache_regs(vcpu);
  1813. kvm_x86_ops->set_rflags(vcpu, vcpu->arch.emulate_ctxt.eflags);
  1814. if (vcpu->mmio_is_write) {
  1815. vcpu->mmio_needed = 0;
  1816. return EMULATE_DO_MMIO;
  1817. }
  1818. return EMULATE_DONE;
  1819. }
  1820. EXPORT_SYMBOL_GPL(emulate_instruction);
  1821. static void free_pio_guest_pages(struct kvm_vcpu *vcpu)
  1822. {
  1823. int i;
  1824. for (i = 0; i < ARRAY_SIZE(vcpu->arch.pio.guest_pages); ++i)
  1825. if (vcpu->arch.pio.guest_pages[i]) {
  1826. kvm_release_page_dirty(vcpu->arch.pio.guest_pages[i]);
  1827. vcpu->arch.pio.guest_pages[i] = NULL;
  1828. }
  1829. }
  1830. static int pio_copy_data(struct kvm_vcpu *vcpu)
  1831. {
  1832. void *p = vcpu->arch.pio_data;
  1833. void *q;
  1834. unsigned bytes;
  1835. int nr_pages = vcpu->arch.pio.guest_pages[1] ? 2 : 1;
  1836. q = vmap(vcpu->arch.pio.guest_pages, nr_pages, VM_READ|VM_WRITE,
  1837. PAGE_KERNEL);
  1838. if (!q) {
  1839. free_pio_guest_pages(vcpu);
  1840. return -ENOMEM;
  1841. }
  1842. q += vcpu->arch.pio.guest_page_offset;
  1843. bytes = vcpu->arch.pio.size * vcpu->arch.pio.cur_count;
  1844. if (vcpu->arch.pio.in)
  1845. memcpy(q, p, bytes);
  1846. else
  1847. memcpy(p, q, bytes);
  1848. q -= vcpu->arch.pio.guest_page_offset;
  1849. vunmap(q);
  1850. free_pio_guest_pages(vcpu);
  1851. return 0;
  1852. }
  1853. int complete_pio(struct kvm_vcpu *vcpu)
  1854. {
  1855. struct kvm_pio_request *io = &vcpu->arch.pio;
  1856. long delta;
  1857. int r;
  1858. kvm_x86_ops->cache_regs(vcpu);
  1859. if (!io->string) {
  1860. if (io->in)
  1861. memcpy(&vcpu->arch.regs[VCPU_REGS_RAX], vcpu->arch.pio_data,
  1862. io->size);
  1863. } else {
  1864. if (io->in) {
  1865. r = pio_copy_data(vcpu);
  1866. if (r) {
  1867. kvm_x86_ops->cache_regs(vcpu);
  1868. return r;
  1869. }
  1870. }
  1871. delta = 1;
  1872. if (io->rep) {
  1873. delta *= io->cur_count;
  1874. /*
  1875. * The size of the register should really depend on
  1876. * current address size.
  1877. */
  1878. vcpu->arch.regs[VCPU_REGS_RCX] -= delta;
  1879. }
  1880. if (io->down)
  1881. delta = -delta;
  1882. delta *= io->size;
  1883. if (io->in)
  1884. vcpu->arch.regs[VCPU_REGS_RDI] += delta;
  1885. else
  1886. vcpu->arch.regs[VCPU_REGS_RSI] += delta;
  1887. }
  1888. kvm_x86_ops->decache_regs(vcpu);
  1889. io->count -= io->cur_count;
  1890. io->cur_count = 0;
  1891. return 0;
  1892. }
  1893. static void kernel_pio(struct kvm_io_device *pio_dev,
  1894. struct kvm_vcpu *vcpu,
  1895. void *pd)
  1896. {
  1897. /* TODO: String I/O for in kernel device */
  1898. mutex_lock(&vcpu->kvm->lock);
  1899. if (vcpu->arch.pio.in)
  1900. kvm_iodevice_read(pio_dev, vcpu->arch.pio.port,
  1901. vcpu->arch.pio.size,
  1902. pd);
  1903. else
  1904. kvm_iodevice_write(pio_dev, vcpu->arch.pio.port,
  1905. vcpu->arch.pio.size,
  1906. pd);
  1907. mutex_unlock(&vcpu->kvm->lock);
  1908. }
  1909. static void pio_string_write(struct kvm_io_device *pio_dev,
  1910. struct kvm_vcpu *vcpu)
  1911. {
  1912. struct kvm_pio_request *io = &vcpu->arch.pio;
  1913. void *pd = vcpu->arch.pio_data;
  1914. int i;
  1915. mutex_lock(&vcpu->kvm->lock);
  1916. for (i = 0; i < io->cur_count; i++) {
  1917. kvm_iodevice_write(pio_dev, io->port,
  1918. io->size,
  1919. pd);
  1920. pd += io->size;
  1921. }
  1922. mutex_unlock(&vcpu->kvm->lock);
  1923. }
  1924. static struct kvm_io_device *vcpu_find_pio_dev(struct kvm_vcpu *vcpu,
  1925. gpa_t addr)
  1926. {
  1927. return kvm_io_bus_find_dev(&vcpu->kvm->pio_bus, addr);
  1928. }
  1929. int kvm_emulate_pio(struct kvm_vcpu *vcpu, struct kvm_run *run, int in,
  1930. int size, unsigned port)
  1931. {
  1932. struct kvm_io_device *pio_dev;
  1933. vcpu->run->exit_reason = KVM_EXIT_IO;
  1934. vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
  1935. vcpu->run->io.size = vcpu->arch.pio.size = size;
  1936. vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
  1937. vcpu->run->io.count = vcpu->arch.pio.count = vcpu->arch.pio.cur_count = 1;
  1938. vcpu->run->io.port = vcpu->arch.pio.port = port;
  1939. vcpu->arch.pio.in = in;
  1940. vcpu->arch.pio.string = 0;
  1941. vcpu->arch.pio.down = 0;
  1942. vcpu->arch.pio.guest_page_offset = 0;
  1943. vcpu->arch.pio.rep = 0;
  1944. kvm_x86_ops->cache_regs(vcpu);
  1945. memcpy(vcpu->arch.pio_data, &vcpu->arch.regs[VCPU_REGS_RAX], 4);
  1946. kvm_x86_ops->decache_regs(vcpu);
  1947. kvm_x86_ops->skip_emulated_instruction(vcpu);
  1948. pio_dev = vcpu_find_pio_dev(vcpu, port);
  1949. if (pio_dev) {
  1950. kernel_pio(pio_dev, vcpu, vcpu->arch.pio_data);
  1951. complete_pio(vcpu);
  1952. return 1;
  1953. }
  1954. return 0;
  1955. }
  1956. EXPORT_SYMBOL_GPL(kvm_emulate_pio);
  1957. int kvm_emulate_pio_string(struct kvm_vcpu *vcpu, struct kvm_run *run, int in,
  1958. int size, unsigned long count, int down,
  1959. gva_t address, int rep, unsigned port)
  1960. {
  1961. unsigned now, in_page;
  1962. int i, ret = 0;
  1963. int nr_pages = 1;
  1964. struct page *page;
  1965. struct kvm_io_device *pio_dev;
  1966. vcpu->run->exit_reason = KVM_EXIT_IO;
  1967. vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
  1968. vcpu->run->io.size = vcpu->arch.pio.size = size;
  1969. vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
  1970. vcpu->run->io.count = vcpu->arch.pio.count = vcpu->arch.pio.cur_count = count;
  1971. vcpu->run->io.port = vcpu->arch.pio.port = port;
  1972. vcpu->arch.pio.in = in;
  1973. vcpu->arch.pio.string = 1;
  1974. vcpu->arch.pio.down = down;
  1975. vcpu->arch.pio.guest_page_offset = offset_in_page(address);
  1976. vcpu->arch.pio.rep = rep;
  1977. if (!count) {
  1978. kvm_x86_ops->skip_emulated_instruction(vcpu);
  1979. return 1;
  1980. }
  1981. if (!down)
  1982. in_page = PAGE_SIZE - offset_in_page(address);
  1983. else
  1984. in_page = offset_in_page(address) + size;
  1985. now = min(count, (unsigned long)in_page / size);
  1986. if (!now) {
  1987. /*
  1988. * String I/O straddles page boundary. Pin two guest pages
  1989. * so that we satisfy atomicity constraints. Do just one
  1990. * transaction to avoid complexity.
  1991. */
  1992. nr_pages = 2;
  1993. now = 1;
  1994. }
  1995. if (down) {
  1996. /*
  1997. * String I/O in reverse. Yuck. Kill the guest, fix later.
  1998. */
  1999. pr_unimpl(vcpu, "guest string pio down\n");
  2000. kvm_inject_gp(vcpu, 0);
  2001. return 1;
  2002. }
  2003. vcpu->run->io.count = now;
  2004. vcpu->arch.pio.cur_count = now;
  2005. if (vcpu->arch.pio.cur_count == vcpu->arch.pio.count)
  2006. kvm_x86_ops->skip_emulated_instruction(vcpu);
  2007. for (i = 0; i < nr_pages; ++i) {
  2008. down_read(&vcpu->kvm->slots_lock);
  2009. page = gva_to_page(vcpu, address + i * PAGE_SIZE);
  2010. vcpu->arch.pio.guest_pages[i] = page;
  2011. up_read(&vcpu->kvm->slots_lock);
  2012. if (!page) {
  2013. kvm_inject_gp(vcpu, 0);
  2014. free_pio_guest_pages(vcpu);
  2015. return 1;
  2016. }
  2017. }
  2018. pio_dev = vcpu_find_pio_dev(vcpu, port);
  2019. if (!vcpu->arch.pio.in) {
  2020. /* string PIO write */
  2021. ret = pio_copy_data(vcpu);
  2022. if (ret >= 0 && pio_dev) {
  2023. pio_string_write(pio_dev, vcpu);
  2024. complete_pio(vcpu);
  2025. if (vcpu->arch.pio.count == 0)
  2026. ret = 1;
  2027. }
  2028. } else if (pio_dev)
  2029. pr_unimpl(vcpu, "no string pio read support yet, "
  2030. "port %x size %d count %ld\n",
  2031. port, size, count);
  2032. return ret;
  2033. }
  2034. EXPORT_SYMBOL_GPL(kvm_emulate_pio_string);
  2035. int kvm_arch_init(void *opaque)
  2036. {
  2037. int r;
  2038. struct kvm_x86_ops *ops = (struct kvm_x86_ops *)opaque;
  2039. if (kvm_x86_ops) {
  2040. printk(KERN_ERR "kvm: already loaded the other module\n");
  2041. r = -EEXIST;
  2042. goto out;
  2043. }
  2044. if (!ops->cpu_has_kvm_support()) {
  2045. printk(KERN_ERR "kvm: no hardware support\n");
  2046. r = -EOPNOTSUPP;
  2047. goto out;
  2048. }
  2049. if (ops->disabled_by_bios()) {
  2050. printk(KERN_ERR "kvm: disabled by bios\n");
  2051. r = -EOPNOTSUPP;
  2052. goto out;
  2053. }
  2054. r = kvm_mmu_module_init();
  2055. if (r)
  2056. goto out;
  2057. kvm_init_msr_list();
  2058. kvm_x86_ops = ops;
  2059. kvm_mmu_set_nonpresent_ptes(0ull, 0ull);
  2060. return 0;
  2061. out:
  2062. return r;
  2063. }
  2064. void kvm_arch_exit(void)
  2065. {
  2066. kvm_x86_ops = NULL;
  2067. kvm_mmu_module_exit();
  2068. }
  2069. int kvm_emulate_halt(struct kvm_vcpu *vcpu)
  2070. {
  2071. ++vcpu->stat.halt_exits;
  2072. if (irqchip_in_kernel(vcpu->kvm)) {
  2073. vcpu->arch.mp_state = VCPU_MP_STATE_HALTED;
  2074. kvm_vcpu_block(vcpu);
  2075. if (vcpu->arch.mp_state != VCPU_MP_STATE_RUNNABLE)
  2076. return -EINTR;
  2077. return 1;
  2078. } else {
  2079. vcpu->run->exit_reason = KVM_EXIT_HLT;
  2080. return 0;
  2081. }
  2082. }
  2083. EXPORT_SYMBOL_GPL(kvm_emulate_halt);
  2084. int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
  2085. {
  2086. unsigned long nr, a0, a1, a2, a3, ret;
  2087. kvm_x86_ops->cache_regs(vcpu);
  2088. nr = vcpu->arch.regs[VCPU_REGS_RAX];
  2089. a0 = vcpu->arch.regs[VCPU_REGS_RBX];
  2090. a1 = vcpu->arch.regs[VCPU_REGS_RCX];
  2091. a2 = vcpu->arch.regs[VCPU_REGS_RDX];
  2092. a3 = vcpu->arch.regs[VCPU_REGS_RSI];
  2093. if (!is_long_mode(vcpu)) {
  2094. nr &= 0xFFFFFFFF;
  2095. a0 &= 0xFFFFFFFF;
  2096. a1 &= 0xFFFFFFFF;
  2097. a2 &= 0xFFFFFFFF;
  2098. a3 &= 0xFFFFFFFF;
  2099. }
  2100. switch (nr) {
  2101. case KVM_HC_VAPIC_POLL_IRQ:
  2102. ret = 0;
  2103. break;
  2104. default:
  2105. ret = -KVM_ENOSYS;
  2106. break;
  2107. }
  2108. vcpu->arch.regs[VCPU_REGS_RAX] = ret;
  2109. kvm_x86_ops->decache_regs(vcpu);
  2110. ++vcpu->stat.hypercalls;
  2111. return 0;
  2112. }
  2113. EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
  2114. int kvm_fix_hypercall(struct kvm_vcpu *vcpu)
  2115. {
  2116. char instruction[3];
  2117. int ret = 0;
  2118. /*
  2119. * Blow out the MMU to ensure that no other VCPU has an active mapping
  2120. * to ensure that the updated hypercall appears atomically across all
  2121. * VCPUs.
  2122. */
  2123. kvm_mmu_zap_all(vcpu->kvm);
  2124. kvm_x86_ops->cache_regs(vcpu);
  2125. kvm_x86_ops->patch_hypercall(vcpu, instruction);
  2126. if (emulator_write_emulated(vcpu->arch.rip, instruction, 3, vcpu)
  2127. != X86EMUL_CONTINUE)
  2128. ret = -EFAULT;
  2129. return ret;
  2130. }
  2131. static u64 mk_cr_64(u64 curr_cr, u32 new_val)
  2132. {
  2133. return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
  2134. }
  2135. void realmode_lgdt(struct kvm_vcpu *vcpu, u16 limit, unsigned long base)
  2136. {
  2137. struct descriptor_table dt = { limit, base };
  2138. kvm_x86_ops->set_gdt(vcpu, &dt);
  2139. }
  2140. void realmode_lidt(struct kvm_vcpu *vcpu, u16 limit, unsigned long base)
  2141. {
  2142. struct descriptor_table dt = { limit, base };
  2143. kvm_x86_ops->set_idt(vcpu, &dt);
  2144. }
  2145. void realmode_lmsw(struct kvm_vcpu *vcpu, unsigned long msw,
  2146. unsigned long *rflags)
  2147. {
  2148. lmsw(vcpu, msw);
  2149. *rflags = kvm_x86_ops->get_rflags(vcpu);
  2150. }
  2151. unsigned long realmode_get_cr(struct kvm_vcpu *vcpu, int cr)
  2152. {
  2153. kvm_x86_ops->decache_cr4_guest_bits(vcpu);
  2154. switch (cr) {
  2155. case 0:
  2156. return vcpu->arch.cr0;
  2157. case 2:
  2158. return vcpu->arch.cr2;
  2159. case 3:
  2160. return vcpu->arch.cr3;
  2161. case 4:
  2162. return vcpu->arch.cr4;
  2163. case 8:
  2164. return get_cr8(vcpu);
  2165. default:
  2166. vcpu_printf(vcpu, "%s: unexpected cr %u\n", __FUNCTION__, cr);
  2167. return 0;
  2168. }
  2169. }
  2170. void realmode_set_cr(struct kvm_vcpu *vcpu, int cr, unsigned long val,
  2171. unsigned long *rflags)
  2172. {
  2173. switch (cr) {
  2174. case 0:
  2175. set_cr0(vcpu, mk_cr_64(vcpu->arch.cr0, val));
  2176. *rflags = kvm_x86_ops->get_rflags(vcpu);
  2177. break;
  2178. case 2:
  2179. vcpu->arch.cr2 = val;
  2180. break;
  2181. case 3:
  2182. set_cr3(vcpu, val);
  2183. break;
  2184. case 4:
  2185. set_cr4(vcpu, mk_cr_64(vcpu->arch.cr4, val));
  2186. break;
  2187. case 8:
  2188. set_cr8(vcpu, val & 0xfUL);
  2189. break;
  2190. default:
  2191. vcpu_printf(vcpu, "%s: unexpected cr %u\n", __FUNCTION__, cr);
  2192. }
  2193. }
  2194. static int move_to_next_stateful_cpuid_entry(struct kvm_vcpu *vcpu, int i)
  2195. {
  2196. struct kvm_cpuid_entry2 *e = &vcpu->arch.cpuid_entries[i];
  2197. int j, nent = vcpu->arch.cpuid_nent;
  2198. e->flags &= ~KVM_CPUID_FLAG_STATE_READ_NEXT;
  2199. /* when no next entry is found, the current entry[i] is reselected */
  2200. for (j = i + 1; j == i; j = (j + 1) % nent) {
  2201. struct kvm_cpuid_entry2 *ej = &vcpu->arch.cpuid_entries[j];
  2202. if (ej->function == e->function) {
  2203. ej->flags |= KVM_CPUID_FLAG_STATE_READ_NEXT;
  2204. return j;
  2205. }
  2206. }
  2207. return 0; /* silence gcc, even though control never reaches here */
  2208. }
  2209. /* find an entry with matching function, matching index (if needed), and that
  2210. * should be read next (if it's stateful) */
  2211. static int is_matching_cpuid_entry(struct kvm_cpuid_entry2 *e,
  2212. u32 function, u32 index)
  2213. {
  2214. if (e->function != function)
  2215. return 0;
  2216. if ((e->flags & KVM_CPUID_FLAG_SIGNIFCANT_INDEX) && e->index != index)
  2217. return 0;
  2218. if ((e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC) &&
  2219. !(e->flags & KVM_CPUID_FLAG_STATE_READ_NEXT))
  2220. return 0;
  2221. return 1;
  2222. }
  2223. void kvm_emulate_cpuid(struct kvm_vcpu *vcpu)
  2224. {
  2225. int i;
  2226. u32 function, index;
  2227. struct kvm_cpuid_entry2 *e, *best;
  2228. kvm_x86_ops->cache_regs(vcpu);
  2229. function = vcpu->arch.regs[VCPU_REGS_RAX];
  2230. index = vcpu->arch.regs[VCPU_REGS_RCX];
  2231. vcpu->arch.regs[VCPU_REGS_RAX] = 0;
  2232. vcpu->arch.regs[VCPU_REGS_RBX] = 0;
  2233. vcpu->arch.regs[VCPU_REGS_RCX] = 0;
  2234. vcpu->arch.regs[VCPU_REGS_RDX] = 0;
  2235. best = NULL;
  2236. for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
  2237. e = &vcpu->arch.cpuid_entries[i];
  2238. if (is_matching_cpuid_entry(e, function, index)) {
  2239. if (e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC)
  2240. move_to_next_stateful_cpuid_entry(vcpu, i);
  2241. best = e;
  2242. break;
  2243. }
  2244. /*
  2245. * Both basic or both extended?
  2246. */
  2247. if (((e->function ^ function) & 0x80000000) == 0)
  2248. if (!best || e->function > best->function)
  2249. best = e;
  2250. }
  2251. if (best) {
  2252. vcpu->arch.regs[VCPU_REGS_RAX] = best->eax;
  2253. vcpu->arch.regs[VCPU_REGS_RBX] = best->ebx;
  2254. vcpu->arch.regs[VCPU_REGS_RCX] = best->ecx;
  2255. vcpu->arch.regs[VCPU_REGS_RDX] = best->edx;
  2256. }
  2257. kvm_x86_ops->decache_regs(vcpu);
  2258. kvm_x86_ops->skip_emulated_instruction(vcpu);
  2259. }
  2260. EXPORT_SYMBOL_GPL(kvm_emulate_cpuid);
  2261. /*
  2262. * Check if userspace requested an interrupt window, and that the
  2263. * interrupt window is open.
  2264. *
  2265. * No need to exit to userspace if we already have an interrupt queued.
  2266. */
  2267. static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu,
  2268. struct kvm_run *kvm_run)
  2269. {
  2270. return (!vcpu->arch.irq_summary &&
  2271. kvm_run->request_interrupt_window &&
  2272. vcpu->arch.interrupt_window_open &&
  2273. (kvm_x86_ops->get_rflags(vcpu) & X86_EFLAGS_IF));
  2274. }
  2275. static void post_kvm_run_save(struct kvm_vcpu *vcpu,
  2276. struct kvm_run *kvm_run)
  2277. {
  2278. kvm_run->if_flag = (kvm_x86_ops->get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
  2279. kvm_run->cr8 = get_cr8(vcpu);
  2280. kvm_run->apic_base = kvm_get_apic_base(vcpu);
  2281. if (irqchip_in_kernel(vcpu->kvm))
  2282. kvm_run->ready_for_interrupt_injection = 1;
  2283. else
  2284. kvm_run->ready_for_interrupt_injection =
  2285. (vcpu->arch.interrupt_window_open &&
  2286. vcpu->arch.irq_summary == 0);
  2287. }
  2288. static void vapic_enter(struct kvm_vcpu *vcpu)
  2289. {
  2290. struct kvm_lapic *apic = vcpu->arch.apic;
  2291. struct page *page;
  2292. if (!apic || !apic->vapic_addr)
  2293. return;
  2294. down_read(&current->mm->mmap_sem);
  2295. page = gfn_to_page(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
  2296. up_read(&current->mm->mmap_sem);
  2297. vcpu->arch.apic->vapic_page = page;
  2298. }
  2299. static void vapic_exit(struct kvm_vcpu *vcpu)
  2300. {
  2301. struct kvm_lapic *apic = vcpu->arch.apic;
  2302. if (!apic || !apic->vapic_addr)
  2303. return;
  2304. kvm_release_page_dirty(apic->vapic_page);
  2305. mark_page_dirty(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
  2306. }
  2307. static int __vcpu_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
  2308. {
  2309. int r;
  2310. if (unlikely(vcpu->arch.mp_state == VCPU_MP_STATE_SIPI_RECEIVED)) {
  2311. pr_debug("vcpu %d received sipi with vector # %x\n",
  2312. vcpu->vcpu_id, vcpu->arch.sipi_vector);
  2313. kvm_lapic_reset(vcpu);
  2314. r = kvm_x86_ops->vcpu_reset(vcpu);
  2315. if (r)
  2316. return r;
  2317. vcpu->arch.mp_state = VCPU_MP_STATE_RUNNABLE;
  2318. }
  2319. vapic_enter(vcpu);
  2320. preempted:
  2321. if (vcpu->guest_debug.enabled)
  2322. kvm_x86_ops->guest_debug_pre(vcpu);
  2323. again:
  2324. if (vcpu->requests)
  2325. if (test_and_clear_bit(KVM_REQ_MMU_RELOAD, &vcpu->requests))
  2326. kvm_mmu_unload(vcpu);
  2327. r = kvm_mmu_reload(vcpu);
  2328. if (unlikely(r))
  2329. goto out;
  2330. if (vcpu->requests) {
  2331. if (test_and_clear_bit(KVM_REQ_MIGRATE_TIMER, &vcpu->requests))
  2332. __kvm_migrate_apic_timer(vcpu);
  2333. if (test_and_clear_bit(KVM_REQ_REPORT_TPR_ACCESS,
  2334. &vcpu->requests)) {
  2335. kvm_run->exit_reason = KVM_EXIT_TPR_ACCESS;
  2336. r = 0;
  2337. goto out;
  2338. }
  2339. }
  2340. kvm_inject_pending_timer_irqs(vcpu);
  2341. preempt_disable();
  2342. kvm_x86_ops->prepare_guest_switch(vcpu);
  2343. kvm_load_guest_fpu(vcpu);
  2344. local_irq_disable();
  2345. if (need_resched()) {
  2346. local_irq_enable();
  2347. preempt_enable();
  2348. r = 1;
  2349. goto out;
  2350. }
  2351. if (vcpu->requests)
  2352. if (test_bit(KVM_REQ_MMU_RELOAD, &vcpu->requests)) {
  2353. local_irq_enable();
  2354. preempt_enable();
  2355. r = 1;
  2356. goto out;
  2357. }
  2358. if (signal_pending(current)) {
  2359. local_irq_enable();
  2360. preempt_enable();
  2361. r = -EINTR;
  2362. kvm_run->exit_reason = KVM_EXIT_INTR;
  2363. ++vcpu->stat.signal_exits;
  2364. goto out;
  2365. }
  2366. if (vcpu->arch.exception.pending)
  2367. __queue_exception(vcpu);
  2368. else if (irqchip_in_kernel(vcpu->kvm))
  2369. kvm_x86_ops->inject_pending_irq(vcpu);
  2370. else
  2371. kvm_x86_ops->inject_pending_vectors(vcpu, kvm_run);
  2372. kvm_lapic_sync_to_vapic(vcpu);
  2373. vcpu->guest_mode = 1;
  2374. kvm_guest_enter();
  2375. if (vcpu->requests)
  2376. if (test_and_clear_bit(KVM_REQ_TLB_FLUSH, &vcpu->requests))
  2377. kvm_x86_ops->tlb_flush(vcpu);
  2378. kvm_x86_ops->run(vcpu, kvm_run);
  2379. vcpu->guest_mode = 0;
  2380. local_irq_enable();
  2381. ++vcpu->stat.exits;
  2382. /*
  2383. * We must have an instruction between local_irq_enable() and
  2384. * kvm_guest_exit(), so the timer interrupt isn't delayed by
  2385. * the interrupt shadow. The stat.exits increment will do nicely.
  2386. * But we need to prevent reordering, hence this barrier():
  2387. */
  2388. barrier();
  2389. kvm_guest_exit();
  2390. preempt_enable();
  2391. /*
  2392. * Profile KVM exit RIPs:
  2393. */
  2394. if (unlikely(prof_on == KVM_PROFILING)) {
  2395. kvm_x86_ops->cache_regs(vcpu);
  2396. profile_hit(KVM_PROFILING, (void *)vcpu->arch.rip);
  2397. }
  2398. if (vcpu->arch.exception.pending && kvm_x86_ops->exception_injected(vcpu))
  2399. vcpu->arch.exception.pending = false;
  2400. kvm_lapic_sync_from_vapic(vcpu);
  2401. r = kvm_x86_ops->handle_exit(kvm_run, vcpu);
  2402. if (r > 0) {
  2403. if (dm_request_for_irq_injection(vcpu, kvm_run)) {
  2404. r = -EINTR;
  2405. kvm_run->exit_reason = KVM_EXIT_INTR;
  2406. ++vcpu->stat.request_irq_exits;
  2407. goto out;
  2408. }
  2409. if (!need_resched())
  2410. goto again;
  2411. }
  2412. out:
  2413. if (r > 0) {
  2414. kvm_resched(vcpu);
  2415. goto preempted;
  2416. }
  2417. post_kvm_run_save(vcpu, kvm_run);
  2418. vapic_exit(vcpu);
  2419. return r;
  2420. }
  2421. int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
  2422. {
  2423. int r;
  2424. sigset_t sigsaved;
  2425. vcpu_load(vcpu);
  2426. if (unlikely(vcpu->arch.mp_state == VCPU_MP_STATE_UNINITIALIZED)) {
  2427. kvm_vcpu_block(vcpu);
  2428. vcpu_put(vcpu);
  2429. return -EAGAIN;
  2430. }
  2431. if (vcpu->sigset_active)
  2432. sigprocmask(SIG_SETMASK, &vcpu->sigset, &sigsaved);
  2433. /* re-sync apic's tpr */
  2434. if (!irqchip_in_kernel(vcpu->kvm))
  2435. set_cr8(vcpu, kvm_run->cr8);
  2436. if (vcpu->arch.pio.cur_count) {
  2437. r = complete_pio(vcpu);
  2438. if (r)
  2439. goto out;
  2440. }
  2441. #if CONFIG_HAS_IOMEM
  2442. if (vcpu->mmio_needed) {
  2443. memcpy(vcpu->mmio_data, kvm_run->mmio.data, 8);
  2444. vcpu->mmio_read_completed = 1;
  2445. vcpu->mmio_needed = 0;
  2446. r = emulate_instruction(vcpu, kvm_run,
  2447. vcpu->arch.mmio_fault_cr2, 0,
  2448. EMULTYPE_NO_DECODE);
  2449. if (r == EMULATE_DO_MMIO) {
  2450. /*
  2451. * Read-modify-write. Back to userspace.
  2452. */
  2453. r = 0;
  2454. goto out;
  2455. }
  2456. }
  2457. #endif
  2458. if (kvm_run->exit_reason == KVM_EXIT_HYPERCALL) {
  2459. kvm_x86_ops->cache_regs(vcpu);
  2460. vcpu->arch.regs[VCPU_REGS_RAX] = kvm_run->hypercall.ret;
  2461. kvm_x86_ops->decache_regs(vcpu);
  2462. }
  2463. r = __vcpu_run(vcpu, kvm_run);
  2464. out:
  2465. if (vcpu->sigset_active)
  2466. sigprocmask(SIG_SETMASK, &sigsaved, NULL);
  2467. vcpu_put(vcpu);
  2468. return r;
  2469. }
  2470. int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
  2471. {
  2472. vcpu_load(vcpu);
  2473. kvm_x86_ops->cache_regs(vcpu);
  2474. regs->rax = vcpu->arch.regs[VCPU_REGS_RAX];
  2475. regs->rbx = vcpu->arch.regs[VCPU_REGS_RBX];
  2476. regs->rcx = vcpu->arch.regs[VCPU_REGS_RCX];
  2477. regs->rdx = vcpu->arch.regs[VCPU_REGS_RDX];
  2478. regs->rsi = vcpu->arch.regs[VCPU_REGS_RSI];
  2479. regs->rdi = vcpu->arch.regs[VCPU_REGS_RDI];
  2480. regs->rsp = vcpu->arch.regs[VCPU_REGS_RSP];
  2481. regs->rbp = vcpu->arch.regs[VCPU_REGS_RBP];
  2482. #ifdef CONFIG_X86_64
  2483. regs->r8 = vcpu->arch.regs[VCPU_REGS_R8];
  2484. regs->r9 = vcpu->arch.regs[VCPU_REGS_R9];
  2485. regs->r10 = vcpu->arch.regs[VCPU_REGS_R10];
  2486. regs->r11 = vcpu->arch.regs[VCPU_REGS_R11];
  2487. regs->r12 = vcpu->arch.regs[VCPU_REGS_R12];
  2488. regs->r13 = vcpu->arch.regs[VCPU_REGS_R13];
  2489. regs->r14 = vcpu->arch.regs[VCPU_REGS_R14];
  2490. regs->r15 = vcpu->arch.regs[VCPU_REGS_R15];
  2491. #endif
  2492. regs->rip = vcpu->arch.rip;
  2493. regs->rflags = kvm_x86_ops->get_rflags(vcpu);
  2494. /*
  2495. * Don't leak debug flags in case they were set for guest debugging
  2496. */
  2497. if (vcpu->guest_debug.enabled && vcpu->guest_debug.singlestep)
  2498. regs->rflags &= ~(X86_EFLAGS_TF | X86_EFLAGS_RF);
  2499. vcpu_put(vcpu);
  2500. return 0;
  2501. }
  2502. int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
  2503. {
  2504. vcpu_load(vcpu);
  2505. vcpu->arch.regs[VCPU_REGS_RAX] = regs->rax;
  2506. vcpu->arch.regs[VCPU_REGS_RBX] = regs->rbx;
  2507. vcpu->arch.regs[VCPU_REGS_RCX] = regs->rcx;
  2508. vcpu->arch.regs[VCPU_REGS_RDX] = regs->rdx;
  2509. vcpu->arch.regs[VCPU_REGS_RSI] = regs->rsi;
  2510. vcpu->arch.regs[VCPU_REGS_RDI] = regs->rdi;
  2511. vcpu->arch.regs[VCPU_REGS_RSP] = regs->rsp;
  2512. vcpu->arch.regs[VCPU_REGS_RBP] = regs->rbp;
  2513. #ifdef CONFIG_X86_64
  2514. vcpu->arch.regs[VCPU_REGS_R8] = regs->r8;
  2515. vcpu->arch.regs[VCPU_REGS_R9] = regs->r9;
  2516. vcpu->arch.regs[VCPU_REGS_R10] = regs->r10;
  2517. vcpu->arch.regs[VCPU_REGS_R11] = regs->r11;
  2518. vcpu->arch.regs[VCPU_REGS_R12] = regs->r12;
  2519. vcpu->arch.regs[VCPU_REGS_R13] = regs->r13;
  2520. vcpu->arch.regs[VCPU_REGS_R14] = regs->r14;
  2521. vcpu->arch.regs[VCPU_REGS_R15] = regs->r15;
  2522. #endif
  2523. vcpu->arch.rip = regs->rip;
  2524. kvm_x86_ops->set_rflags(vcpu, regs->rflags);
  2525. kvm_x86_ops->decache_regs(vcpu);
  2526. vcpu_put(vcpu);
  2527. return 0;
  2528. }
  2529. static void get_segment(struct kvm_vcpu *vcpu,
  2530. struct kvm_segment *var, int seg)
  2531. {
  2532. kvm_x86_ops->get_segment(vcpu, var, seg);
  2533. }
  2534. void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
  2535. {
  2536. struct kvm_segment cs;
  2537. get_segment(vcpu, &cs, VCPU_SREG_CS);
  2538. *db = cs.db;
  2539. *l = cs.l;
  2540. }
  2541. EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
  2542. int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
  2543. struct kvm_sregs *sregs)
  2544. {
  2545. struct descriptor_table dt;
  2546. int pending_vec;
  2547. vcpu_load(vcpu);
  2548. get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
  2549. get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
  2550. get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
  2551. get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
  2552. get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
  2553. get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
  2554. get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
  2555. get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
  2556. kvm_x86_ops->get_idt(vcpu, &dt);
  2557. sregs->idt.limit = dt.limit;
  2558. sregs->idt.base = dt.base;
  2559. kvm_x86_ops->get_gdt(vcpu, &dt);
  2560. sregs->gdt.limit = dt.limit;
  2561. sregs->gdt.base = dt.base;
  2562. kvm_x86_ops->decache_cr4_guest_bits(vcpu);
  2563. sregs->cr0 = vcpu->arch.cr0;
  2564. sregs->cr2 = vcpu->arch.cr2;
  2565. sregs->cr3 = vcpu->arch.cr3;
  2566. sregs->cr4 = vcpu->arch.cr4;
  2567. sregs->cr8 = get_cr8(vcpu);
  2568. sregs->efer = vcpu->arch.shadow_efer;
  2569. sregs->apic_base = kvm_get_apic_base(vcpu);
  2570. if (irqchip_in_kernel(vcpu->kvm)) {
  2571. memset(sregs->interrupt_bitmap, 0,
  2572. sizeof sregs->interrupt_bitmap);
  2573. pending_vec = kvm_x86_ops->get_irq(vcpu);
  2574. if (pending_vec >= 0)
  2575. set_bit(pending_vec,
  2576. (unsigned long *)sregs->interrupt_bitmap);
  2577. } else
  2578. memcpy(sregs->interrupt_bitmap, vcpu->arch.irq_pending,
  2579. sizeof sregs->interrupt_bitmap);
  2580. vcpu_put(vcpu);
  2581. return 0;
  2582. }
  2583. static void set_segment(struct kvm_vcpu *vcpu,
  2584. struct kvm_segment *var, int seg)
  2585. {
  2586. kvm_x86_ops->set_segment(vcpu, var, seg);
  2587. }
  2588. int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
  2589. struct kvm_sregs *sregs)
  2590. {
  2591. int mmu_reset_needed = 0;
  2592. int i, pending_vec, max_bits;
  2593. struct descriptor_table dt;
  2594. vcpu_load(vcpu);
  2595. dt.limit = sregs->idt.limit;
  2596. dt.base = sregs->idt.base;
  2597. kvm_x86_ops->set_idt(vcpu, &dt);
  2598. dt.limit = sregs->gdt.limit;
  2599. dt.base = sregs->gdt.base;
  2600. kvm_x86_ops->set_gdt(vcpu, &dt);
  2601. vcpu->arch.cr2 = sregs->cr2;
  2602. mmu_reset_needed |= vcpu->arch.cr3 != sregs->cr3;
  2603. vcpu->arch.cr3 = sregs->cr3;
  2604. set_cr8(vcpu, sregs->cr8);
  2605. mmu_reset_needed |= vcpu->arch.shadow_efer != sregs->efer;
  2606. kvm_x86_ops->set_efer(vcpu, sregs->efer);
  2607. kvm_set_apic_base(vcpu, sregs->apic_base);
  2608. kvm_x86_ops->decache_cr4_guest_bits(vcpu);
  2609. mmu_reset_needed |= vcpu->arch.cr0 != sregs->cr0;
  2610. kvm_x86_ops->set_cr0(vcpu, sregs->cr0);
  2611. vcpu->arch.cr0 = sregs->cr0;
  2612. mmu_reset_needed |= vcpu->arch.cr4 != sregs->cr4;
  2613. kvm_x86_ops->set_cr4(vcpu, sregs->cr4);
  2614. if (!is_long_mode(vcpu) && is_pae(vcpu))
  2615. load_pdptrs(vcpu, vcpu->arch.cr3);
  2616. if (mmu_reset_needed)
  2617. kvm_mmu_reset_context(vcpu);
  2618. if (!irqchip_in_kernel(vcpu->kvm)) {
  2619. memcpy(vcpu->arch.irq_pending, sregs->interrupt_bitmap,
  2620. sizeof vcpu->arch.irq_pending);
  2621. vcpu->arch.irq_summary = 0;
  2622. for (i = 0; i < ARRAY_SIZE(vcpu->arch.irq_pending); ++i)
  2623. if (vcpu->arch.irq_pending[i])
  2624. __set_bit(i, &vcpu->arch.irq_summary);
  2625. } else {
  2626. max_bits = (sizeof sregs->interrupt_bitmap) << 3;
  2627. pending_vec = find_first_bit(
  2628. (const unsigned long *)sregs->interrupt_bitmap,
  2629. max_bits);
  2630. /* Only pending external irq is handled here */
  2631. if (pending_vec < max_bits) {
  2632. kvm_x86_ops->set_irq(vcpu, pending_vec);
  2633. pr_debug("Set back pending irq %d\n",
  2634. pending_vec);
  2635. }
  2636. }
  2637. set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
  2638. set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
  2639. set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
  2640. set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
  2641. set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
  2642. set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
  2643. set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
  2644. set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
  2645. vcpu_put(vcpu);
  2646. return 0;
  2647. }
  2648. int kvm_arch_vcpu_ioctl_debug_guest(struct kvm_vcpu *vcpu,
  2649. struct kvm_debug_guest *dbg)
  2650. {
  2651. int r;
  2652. vcpu_load(vcpu);
  2653. r = kvm_x86_ops->set_guest_debug(vcpu, dbg);
  2654. vcpu_put(vcpu);
  2655. return r;
  2656. }
  2657. /*
  2658. * fxsave fpu state. Taken from x86_64/processor.h. To be killed when
  2659. * we have asm/x86/processor.h
  2660. */
  2661. struct fxsave {
  2662. u16 cwd;
  2663. u16 swd;
  2664. u16 twd;
  2665. u16 fop;
  2666. u64 rip;
  2667. u64 rdp;
  2668. u32 mxcsr;
  2669. u32 mxcsr_mask;
  2670. u32 st_space[32]; /* 8*16 bytes for each FP-reg = 128 bytes */
  2671. #ifdef CONFIG_X86_64
  2672. u32 xmm_space[64]; /* 16*16 bytes for each XMM-reg = 256 bytes */
  2673. #else
  2674. u32 xmm_space[32]; /* 8*16 bytes for each XMM-reg = 128 bytes */
  2675. #endif
  2676. };
  2677. /*
  2678. * Translate a guest virtual address to a guest physical address.
  2679. */
  2680. int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
  2681. struct kvm_translation *tr)
  2682. {
  2683. unsigned long vaddr = tr->linear_address;
  2684. gpa_t gpa;
  2685. vcpu_load(vcpu);
  2686. down_read(&vcpu->kvm->slots_lock);
  2687. gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, vaddr);
  2688. up_read(&vcpu->kvm->slots_lock);
  2689. tr->physical_address = gpa;
  2690. tr->valid = gpa != UNMAPPED_GVA;
  2691. tr->writeable = 1;
  2692. tr->usermode = 0;
  2693. vcpu_put(vcpu);
  2694. return 0;
  2695. }
  2696. int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
  2697. {
  2698. struct fxsave *fxsave = (struct fxsave *)&vcpu->arch.guest_fx_image;
  2699. vcpu_load(vcpu);
  2700. memcpy(fpu->fpr, fxsave->st_space, 128);
  2701. fpu->fcw = fxsave->cwd;
  2702. fpu->fsw = fxsave->swd;
  2703. fpu->ftwx = fxsave->twd;
  2704. fpu->last_opcode = fxsave->fop;
  2705. fpu->last_ip = fxsave->rip;
  2706. fpu->last_dp = fxsave->rdp;
  2707. memcpy(fpu->xmm, fxsave->xmm_space, sizeof fxsave->xmm_space);
  2708. vcpu_put(vcpu);
  2709. return 0;
  2710. }
  2711. int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
  2712. {
  2713. struct fxsave *fxsave = (struct fxsave *)&vcpu->arch.guest_fx_image;
  2714. vcpu_load(vcpu);
  2715. memcpy(fxsave->st_space, fpu->fpr, 128);
  2716. fxsave->cwd = fpu->fcw;
  2717. fxsave->swd = fpu->fsw;
  2718. fxsave->twd = fpu->ftwx;
  2719. fxsave->fop = fpu->last_opcode;
  2720. fxsave->rip = fpu->last_ip;
  2721. fxsave->rdp = fpu->last_dp;
  2722. memcpy(fxsave->xmm_space, fpu->xmm, sizeof fxsave->xmm_space);
  2723. vcpu_put(vcpu);
  2724. return 0;
  2725. }
  2726. void fx_init(struct kvm_vcpu *vcpu)
  2727. {
  2728. unsigned after_mxcsr_mask;
  2729. /* Initialize guest FPU by resetting ours and saving into guest's */
  2730. preempt_disable();
  2731. fx_save(&vcpu->arch.host_fx_image);
  2732. fpu_init();
  2733. fx_save(&vcpu->arch.guest_fx_image);
  2734. fx_restore(&vcpu->arch.host_fx_image);
  2735. preempt_enable();
  2736. vcpu->arch.cr0 |= X86_CR0_ET;
  2737. after_mxcsr_mask = offsetof(struct i387_fxsave_struct, st_space);
  2738. vcpu->arch.guest_fx_image.mxcsr = 0x1f80;
  2739. memset((void *)&vcpu->arch.guest_fx_image + after_mxcsr_mask,
  2740. 0, sizeof(struct i387_fxsave_struct) - after_mxcsr_mask);
  2741. }
  2742. EXPORT_SYMBOL_GPL(fx_init);
  2743. void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
  2744. {
  2745. if (!vcpu->fpu_active || vcpu->guest_fpu_loaded)
  2746. return;
  2747. vcpu->guest_fpu_loaded = 1;
  2748. fx_save(&vcpu->arch.host_fx_image);
  2749. fx_restore(&vcpu->arch.guest_fx_image);
  2750. }
  2751. EXPORT_SYMBOL_GPL(kvm_load_guest_fpu);
  2752. void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
  2753. {
  2754. if (!vcpu->guest_fpu_loaded)
  2755. return;
  2756. vcpu->guest_fpu_loaded = 0;
  2757. fx_save(&vcpu->arch.guest_fx_image);
  2758. fx_restore(&vcpu->arch.host_fx_image);
  2759. ++vcpu->stat.fpu_reload;
  2760. }
  2761. EXPORT_SYMBOL_GPL(kvm_put_guest_fpu);
  2762. void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)
  2763. {
  2764. kvm_x86_ops->vcpu_free(vcpu);
  2765. }
  2766. struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm,
  2767. unsigned int id)
  2768. {
  2769. return kvm_x86_ops->vcpu_create(kvm, id);
  2770. }
  2771. int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
  2772. {
  2773. int r;
  2774. /* We do fxsave: this must be aligned. */
  2775. BUG_ON((unsigned long)&vcpu->arch.host_fx_image & 0xF);
  2776. vcpu_load(vcpu);
  2777. r = kvm_arch_vcpu_reset(vcpu);
  2778. if (r == 0)
  2779. r = kvm_mmu_setup(vcpu);
  2780. vcpu_put(vcpu);
  2781. if (r < 0)
  2782. goto free_vcpu;
  2783. return 0;
  2784. free_vcpu:
  2785. kvm_x86_ops->vcpu_free(vcpu);
  2786. return r;
  2787. }
  2788. void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
  2789. {
  2790. vcpu_load(vcpu);
  2791. kvm_mmu_unload(vcpu);
  2792. vcpu_put(vcpu);
  2793. kvm_x86_ops->vcpu_free(vcpu);
  2794. }
  2795. int kvm_arch_vcpu_reset(struct kvm_vcpu *vcpu)
  2796. {
  2797. return kvm_x86_ops->vcpu_reset(vcpu);
  2798. }
  2799. void kvm_arch_hardware_enable(void *garbage)
  2800. {
  2801. kvm_x86_ops->hardware_enable(garbage);
  2802. }
  2803. void kvm_arch_hardware_disable(void *garbage)
  2804. {
  2805. kvm_x86_ops->hardware_disable(garbage);
  2806. }
  2807. int kvm_arch_hardware_setup(void)
  2808. {
  2809. return kvm_x86_ops->hardware_setup();
  2810. }
  2811. void kvm_arch_hardware_unsetup(void)
  2812. {
  2813. kvm_x86_ops->hardware_unsetup();
  2814. }
  2815. void kvm_arch_check_processor_compat(void *rtn)
  2816. {
  2817. kvm_x86_ops->check_processor_compatibility(rtn);
  2818. }
  2819. int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
  2820. {
  2821. struct page *page;
  2822. struct kvm *kvm;
  2823. int r;
  2824. BUG_ON(vcpu->kvm == NULL);
  2825. kvm = vcpu->kvm;
  2826. vcpu->arch.mmu.root_hpa = INVALID_PAGE;
  2827. if (!irqchip_in_kernel(kvm) || vcpu->vcpu_id == 0)
  2828. vcpu->arch.mp_state = VCPU_MP_STATE_RUNNABLE;
  2829. else
  2830. vcpu->arch.mp_state = VCPU_MP_STATE_UNINITIALIZED;
  2831. page = alloc_page(GFP_KERNEL | __GFP_ZERO);
  2832. if (!page) {
  2833. r = -ENOMEM;
  2834. goto fail;
  2835. }
  2836. vcpu->arch.pio_data = page_address(page);
  2837. r = kvm_mmu_create(vcpu);
  2838. if (r < 0)
  2839. goto fail_free_pio_data;
  2840. if (irqchip_in_kernel(kvm)) {
  2841. r = kvm_create_lapic(vcpu);
  2842. if (r < 0)
  2843. goto fail_mmu_destroy;
  2844. }
  2845. return 0;
  2846. fail_mmu_destroy:
  2847. kvm_mmu_destroy(vcpu);
  2848. fail_free_pio_data:
  2849. free_page((unsigned long)vcpu->arch.pio_data);
  2850. fail:
  2851. return r;
  2852. }
  2853. void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
  2854. {
  2855. kvm_free_lapic(vcpu);
  2856. kvm_mmu_destroy(vcpu);
  2857. free_page((unsigned long)vcpu->arch.pio_data);
  2858. }
  2859. struct kvm *kvm_arch_create_vm(void)
  2860. {
  2861. struct kvm *kvm = kzalloc(sizeof(struct kvm), GFP_KERNEL);
  2862. if (!kvm)
  2863. return ERR_PTR(-ENOMEM);
  2864. INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
  2865. return kvm;
  2866. }
  2867. static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
  2868. {
  2869. vcpu_load(vcpu);
  2870. kvm_mmu_unload(vcpu);
  2871. vcpu_put(vcpu);
  2872. }
  2873. static void kvm_free_vcpus(struct kvm *kvm)
  2874. {
  2875. unsigned int i;
  2876. /*
  2877. * Unpin any mmu pages first.
  2878. */
  2879. for (i = 0; i < KVM_MAX_VCPUS; ++i)
  2880. if (kvm->vcpus[i])
  2881. kvm_unload_vcpu_mmu(kvm->vcpus[i]);
  2882. for (i = 0; i < KVM_MAX_VCPUS; ++i) {
  2883. if (kvm->vcpus[i]) {
  2884. kvm_arch_vcpu_free(kvm->vcpus[i]);
  2885. kvm->vcpus[i] = NULL;
  2886. }
  2887. }
  2888. }
  2889. void kvm_arch_destroy_vm(struct kvm *kvm)
  2890. {
  2891. kfree(kvm->arch.vpic);
  2892. kfree(kvm->arch.vioapic);
  2893. kvm_free_vcpus(kvm);
  2894. kvm_free_physmem(kvm);
  2895. kfree(kvm);
  2896. }
  2897. int kvm_arch_set_memory_region(struct kvm *kvm,
  2898. struct kvm_userspace_memory_region *mem,
  2899. struct kvm_memory_slot old,
  2900. int user_alloc)
  2901. {
  2902. int npages = mem->memory_size >> PAGE_SHIFT;
  2903. struct kvm_memory_slot *memslot = &kvm->memslots[mem->slot];
  2904. /*To keep backward compatibility with older userspace,
  2905. *x86 needs to hanlde !user_alloc case.
  2906. */
  2907. if (!user_alloc) {
  2908. if (npages && !old.rmap) {
  2909. down_write(&current->mm->mmap_sem);
  2910. memslot->userspace_addr = do_mmap(NULL, 0,
  2911. npages * PAGE_SIZE,
  2912. PROT_READ | PROT_WRITE,
  2913. MAP_SHARED | MAP_ANONYMOUS,
  2914. 0);
  2915. up_write(&current->mm->mmap_sem);
  2916. if (IS_ERR((void *)memslot->userspace_addr))
  2917. return PTR_ERR((void *)memslot->userspace_addr);
  2918. } else {
  2919. if (!old.user_alloc && old.rmap) {
  2920. int ret;
  2921. down_write(&current->mm->mmap_sem);
  2922. ret = do_munmap(current->mm, old.userspace_addr,
  2923. old.npages * PAGE_SIZE);
  2924. up_write(&current->mm->mmap_sem);
  2925. if (ret < 0)
  2926. printk(KERN_WARNING
  2927. "kvm_vm_ioctl_set_memory_region: "
  2928. "failed to munmap memory\n");
  2929. }
  2930. }
  2931. }
  2932. if (!kvm->arch.n_requested_mmu_pages) {
  2933. unsigned int nr_mmu_pages = kvm_mmu_calculate_mmu_pages(kvm);
  2934. kvm_mmu_change_mmu_pages(kvm, nr_mmu_pages);
  2935. }
  2936. kvm_mmu_slot_remove_write_access(kvm, mem->slot);
  2937. kvm_flush_remote_tlbs(kvm);
  2938. return 0;
  2939. }
  2940. int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
  2941. {
  2942. return vcpu->arch.mp_state == VCPU_MP_STATE_RUNNABLE
  2943. || vcpu->arch.mp_state == VCPU_MP_STATE_SIPI_RECEIVED;
  2944. }
  2945. static void vcpu_kick_intr(void *info)
  2946. {
  2947. #ifdef DEBUG
  2948. struct kvm_vcpu *vcpu = (struct kvm_vcpu *)info;
  2949. printk(KERN_DEBUG "vcpu_kick_intr %p \n", vcpu);
  2950. #endif
  2951. }
  2952. void kvm_vcpu_kick(struct kvm_vcpu *vcpu)
  2953. {
  2954. int ipi_pcpu = vcpu->cpu;
  2955. if (waitqueue_active(&vcpu->wq)) {
  2956. wake_up_interruptible(&vcpu->wq);
  2957. ++vcpu->stat.halt_wakeup;
  2958. }
  2959. if (vcpu->guest_mode)
  2960. smp_call_function_single(ipi_pcpu, vcpu_kick_intr, vcpu, 0, 0);
  2961. }