dm.c 47 KB

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  1. /******************************************************************************
  2. *
  3. * Copyright(c) 2009-2012 Realtek Corporation.
  4. *
  5. * This program is free software; you can redistribute it and/or modify it
  6. * under the terms of version 2 of the GNU General Public License as
  7. * published by the Free Software Foundation.
  8. *
  9. * This program is distributed in the hope that it will be useful, but WITHOUT
  10. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  12. * more details.
  13. *
  14. * You should have received a copy of the GNU General Public License along with
  15. * this program; if not, write to the Free Software Foundation, Inc.,
  16. * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  17. *
  18. * The full GNU General Public License is included in this distribution in the
  19. * file called LICENSE.
  20. *
  21. * Contact Information:
  22. * wlanfae <wlanfae@realtek.com>
  23. * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
  24. * Hsinchu 300, Taiwan.
  25. *
  26. * Larry Finger <Larry.Finger@lwfinger.net>
  27. *
  28. *****************************************************************************/
  29. #include "../wifi.h"
  30. #include "../base.h"
  31. #include "reg.h"
  32. #include "def.h"
  33. #include "phy.h"
  34. #include "dm.h"
  35. #include "fw.h"
  36. #define UNDEC_SM_PWDB entry_min_undecoratedsmoothed_pwdb
  37. static const u32 ofdmswing_table[OFDM_TABLE_SIZE_92D] = {
  38. 0x7f8001fe, /* 0, +6.0dB */
  39. 0x788001e2, /* 1, +5.5dB */
  40. 0x71c001c7, /* 2, +5.0dB */
  41. 0x6b8001ae, /* 3, +4.5dB */
  42. 0x65400195, /* 4, +4.0dB */
  43. 0x5fc0017f, /* 5, +3.5dB */
  44. 0x5a400169, /* 6, +3.0dB */
  45. 0x55400155, /* 7, +2.5dB */
  46. 0x50800142, /* 8, +2.0dB */
  47. 0x4c000130, /* 9, +1.5dB */
  48. 0x47c0011f, /* 10, +1.0dB */
  49. 0x43c0010f, /* 11, +0.5dB */
  50. 0x40000100, /* 12, +0dB */
  51. 0x3c8000f2, /* 13, -0.5dB */
  52. 0x390000e4, /* 14, -1.0dB */
  53. 0x35c000d7, /* 15, -1.5dB */
  54. 0x32c000cb, /* 16, -2.0dB */
  55. 0x300000c0, /* 17, -2.5dB */
  56. 0x2d4000b5, /* 18, -3.0dB */
  57. 0x2ac000ab, /* 19, -3.5dB */
  58. 0x288000a2, /* 20, -4.0dB */
  59. 0x26000098, /* 21, -4.5dB */
  60. 0x24000090, /* 22, -5.0dB */
  61. 0x22000088, /* 23, -5.5dB */
  62. 0x20000080, /* 24, -6.0dB */
  63. 0x1e400079, /* 25, -6.5dB */
  64. 0x1c800072, /* 26, -7.0dB */
  65. 0x1b00006c, /* 27. -7.5dB */
  66. 0x19800066, /* 28, -8.0dB */
  67. 0x18000060, /* 29, -8.5dB */
  68. 0x16c0005b, /* 30, -9.0dB */
  69. 0x15800056, /* 31, -9.5dB */
  70. 0x14400051, /* 32, -10.0dB */
  71. 0x1300004c, /* 33, -10.5dB */
  72. 0x12000048, /* 34, -11.0dB */
  73. 0x11000044, /* 35, -11.5dB */
  74. 0x10000040, /* 36, -12.0dB */
  75. 0x0f00003c, /* 37, -12.5dB */
  76. 0x0e400039, /* 38, -13.0dB */
  77. 0x0d800036, /* 39, -13.5dB */
  78. 0x0cc00033, /* 40, -14.0dB */
  79. 0x0c000030, /* 41, -14.5dB */
  80. 0x0b40002d, /* 42, -15.0dB */
  81. };
  82. static const u8 cckswing_table_ch1ch13[CCK_TABLE_SIZE][8] = {
  83. {0x36, 0x35, 0x2e, 0x25, 0x1c, 0x12, 0x09, 0x04}, /* 0, +0dB */
  84. {0x33, 0x32, 0x2b, 0x23, 0x1a, 0x11, 0x08, 0x04}, /* 1, -0.5dB */
  85. {0x30, 0x2f, 0x29, 0x21, 0x19, 0x10, 0x08, 0x03}, /* 2, -1.0dB */
  86. {0x2d, 0x2d, 0x27, 0x1f, 0x18, 0x0f, 0x08, 0x03}, /* 3, -1.5dB */
  87. {0x2b, 0x2a, 0x25, 0x1e, 0x16, 0x0e, 0x07, 0x03}, /* 4, -2.0dB */
  88. {0x28, 0x28, 0x22, 0x1c, 0x15, 0x0d, 0x07, 0x03}, /* 5, -2.5dB */
  89. {0x26, 0x25, 0x21, 0x1b, 0x14, 0x0d, 0x06, 0x03}, /* 6, -3.0dB */
  90. {0x24, 0x23, 0x1f, 0x19, 0x13, 0x0c, 0x06, 0x03}, /* 7, -3.5dB */
  91. {0x22, 0x21, 0x1d, 0x18, 0x11, 0x0b, 0x06, 0x02}, /* 8, -4.0dB */
  92. {0x20, 0x20, 0x1b, 0x16, 0x11, 0x08, 0x05, 0x02}, /* 9, -4.5dB */
  93. {0x1f, 0x1e, 0x1a, 0x15, 0x10, 0x0a, 0x05, 0x02}, /* 10, -5.0dB */
  94. {0x1d, 0x1c, 0x18, 0x14, 0x0f, 0x0a, 0x05, 0x02}, /* 11, -5.5dB */
  95. {0x1b, 0x1a, 0x17, 0x13, 0x0e, 0x09, 0x04, 0x02}, /* 12, -6.0dB */
  96. {0x1a, 0x19, 0x16, 0x12, 0x0d, 0x09, 0x04, 0x02}, /* 13, -6.5dB */
  97. {0x18, 0x17, 0x15, 0x11, 0x0c, 0x08, 0x04, 0x02}, /* 14, -7.0dB */
  98. {0x17, 0x16, 0x13, 0x10, 0x0c, 0x08, 0x04, 0x02}, /* 15, -7.5dB */
  99. {0x16, 0x15, 0x12, 0x0f, 0x0b, 0x07, 0x04, 0x01}, /* 16, -8.0dB */
  100. {0x14, 0x14, 0x11, 0x0e, 0x0b, 0x07, 0x03, 0x02}, /* 17, -8.5dB */
  101. {0x13, 0x13, 0x10, 0x0d, 0x0a, 0x06, 0x03, 0x01}, /* 18, -9.0dB */
  102. {0x12, 0x12, 0x0f, 0x0c, 0x09, 0x06, 0x03, 0x01}, /* 19, -9.5dB */
  103. {0x11, 0x11, 0x0f, 0x0c, 0x09, 0x06, 0x03, 0x01}, /* 20, -10.0dB */
  104. {0x10, 0x10, 0x0e, 0x0b, 0x08, 0x05, 0x03, 0x01}, /* 21, -10.5dB */
  105. {0x0f, 0x0f, 0x0d, 0x0b, 0x08, 0x05, 0x03, 0x01}, /* 22, -11.0dB */
  106. {0x0e, 0x0e, 0x0c, 0x0a, 0x08, 0x05, 0x02, 0x01}, /* 23, -11.5dB */
  107. {0x0d, 0x0d, 0x0c, 0x0a, 0x07, 0x05, 0x02, 0x01}, /* 24, -12.0dB */
  108. {0x0d, 0x0c, 0x0b, 0x09, 0x07, 0x04, 0x02, 0x01}, /* 25, -12.5dB */
  109. {0x0c, 0x0c, 0x0a, 0x09, 0x06, 0x04, 0x02, 0x01}, /* 26, -13.0dB */
  110. {0x0b, 0x0b, 0x0a, 0x08, 0x06, 0x04, 0x02, 0x01}, /* 27, -13.5dB */
  111. {0x0b, 0x0a, 0x09, 0x08, 0x06, 0x04, 0x02, 0x01}, /* 28, -14.0dB */
  112. {0x0a, 0x0a, 0x09, 0x07, 0x05, 0x03, 0x02, 0x01}, /* 29, -14.5dB */
  113. {0x0a, 0x09, 0x08, 0x07, 0x05, 0x03, 0x02, 0x01}, /* 30, -15.0dB */
  114. {0x09, 0x09, 0x08, 0x06, 0x05, 0x03, 0x01, 0x01}, /* 31, -15.5dB */
  115. {0x09, 0x08, 0x07, 0x06, 0x04, 0x03, 0x01, 0x01} /* 32, -16.0dB */
  116. };
  117. static const u8 cckswing_table_ch14[CCK_TABLE_SIZE][8] = {
  118. {0x36, 0x35, 0x2e, 0x1b, 0x00, 0x00, 0x00, 0x00}, /* 0, +0dB */
  119. {0x33, 0x32, 0x2b, 0x19, 0x00, 0x00, 0x00, 0x00}, /* 1, -0.5dB */
  120. {0x30, 0x2f, 0x29, 0x18, 0x00, 0x00, 0x00, 0x00}, /* 2, -1.0dB */
  121. {0x2d, 0x2d, 0x17, 0x17, 0x00, 0x00, 0x00, 0x00}, /* 3, -1.5dB */
  122. {0x2b, 0x2a, 0x25, 0x15, 0x00, 0x00, 0x00, 0x00}, /* 4, -2.0dB */
  123. {0x28, 0x28, 0x24, 0x14, 0x00, 0x00, 0x00, 0x00}, /* 5, -2.5dB */
  124. {0x26, 0x25, 0x21, 0x13, 0x00, 0x00, 0x00, 0x00}, /* 6, -3.0dB */
  125. {0x24, 0x23, 0x1f, 0x12, 0x00, 0x00, 0x00, 0x00}, /* 7, -3.5dB */
  126. {0x22, 0x21, 0x1d, 0x11, 0x00, 0x00, 0x00, 0x00}, /* 8, -4.0dB */
  127. {0x20, 0x20, 0x1b, 0x10, 0x00, 0x00, 0x00, 0x00}, /* 9, -4.5dB */
  128. {0x1f, 0x1e, 0x1a, 0x0f, 0x00, 0x00, 0x00, 0x00}, /* 10, -5.0dB */
  129. {0x1d, 0x1c, 0x18, 0x0e, 0x00, 0x00, 0x00, 0x00}, /* 11, -5.5dB */
  130. {0x1b, 0x1a, 0x17, 0x0e, 0x00, 0x00, 0x00, 0x00}, /* 12, -6.0dB */
  131. {0x1a, 0x19, 0x16, 0x0d, 0x00, 0x00, 0x00, 0x00}, /* 13, -6.5dB */
  132. {0x18, 0x17, 0x15, 0x0c, 0x00, 0x00, 0x00, 0x00}, /* 14, -7.0dB */
  133. {0x17, 0x16, 0x13, 0x0b, 0x00, 0x00, 0x00, 0x00}, /* 15, -7.5dB */
  134. {0x16, 0x15, 0x12, 0x0b, 0x00, 0x00, 0x00, 0x00}, /* 16, -8.0dB */
  135. {0x14, 0x14, 0x11, 0x0a, 0x00, 0x00, 0x00, 0x00}, /* 17, -8.5dB */
  136. {0x13, 0x13, 0x10, 0x0a, 0x00, 0x00, 0x00, 0x00}, /* 18, -9.0dB */
  137. {0x12, 0x12, 0x0f, 0x09, 0x00, 0x00, 0x00, 0x00}, /* 19, -9.5dB */
  138. {0x11, 0x11, 0x0f, 0x09, 0x00, 0x00, 0x00, 0x00}, /* 20, -10.0dB */
  139. {0x10, 0x10, 0x0e, 0x08, 0x00, 0x00, 0x00, 0x00}, /* 21, -10.5dB */
  140. {0x0f, 0x0f, 0x0d, 0x08, 0x00, 0x00, 0x00, 0x00}, /* 22, -11.0dB */
  141. {0x0e, 0x0e, 0x0c, 0x07, 0x00, 0x00, 0x00, 0x00}, /* 23, -11.5dB */
  142. {0x0d, 0x0d, 0x0c, 0x07, 0x00, 0x00, 0x00, 0x00}, /* 24, -12.0dB */
  143. {0x0d, 0x0c, 0x0b, 0x06, 0x00, 0x00, 0x00, 0x00}, /* 25, -12.5dB */
  144. {0x0c, 0x0c, 0x0a, 0x06, 0x00, 0x00, 0x00, 0x00}, /* 26, -13.0dB */
  145. {0x0b, 0x0b, 0x0a, 0x06, 0x00, 0x00, 0x00, 0x00}, /* 27, -13.5dB */
  146. {0x0b, 0x0a, 0x09, 0x05, 0x00, 0x00, 0x00, 0x00}, /* 28, -14.0dB */
  147. {0x0a, 0x0a, 0x09, 0x05, 0x00, 0x00, 0x00, 0x00}, /* 29, -14.5dB */
  148. {0x0a, 0x09, 0x08, 0x05, 0x00, 0x00, 0x00, 0x00}, /* 30, -15.0dB */
  149. {0x09, 0x09, 0x08, 0x05, 0x00, 0x00, 0x00, 0x00}, /* 31, -15.5dB */
  150. {0x09, 0x08, 0x07, 0x04, 0x00, 0x00, 0x00, 0x00} /* 32, -16.0dB */
  151. };
  152. static void rtl92d_dm_diginit(struct ieee80211_hw *hw)
  153. {
  154. struct rtl_priv *rtlpriv = rtl_priv(hw);
  155. struct dig_t *de_digtable = &rtlpriv->dm_digtable;
  156. de_digtable->dig_enable_flag = true;
  157. de_digtable->dig_ext_port_stage = DIG_EXT_PORT_STAGE_MAX;
  158. de_digtable->cur_igvalue = 0x20;
  159. de_digtable->pre_igvalue = 0x0;
  160. de_digtable->cursta_connectctate = DIG_STA_DISCONNECT;
  161. de_digtable->presta_connectstate = DIG_STA_DISCONNECT;
  162. de_digtable->curmultista_connectstate = DIG_MULTISTA_DISCONNECT;
  163. de_digtable->rssi_lowthresh = DM_DIG_THRESH_LOW;
  164. de_digtable->rssi_highthresh = DM_DIG_THRESH_HIGH;
  165. de_digtable->fa_lowthresh = DM_FALSEALARM_THRESH_LOW;
  166. de_digtable->fa_highthresh = DM_FALSEALARM_THRESH_HIGH;
  167. de_digtable->rx_gain_range_max = DM_DIG_FA_UPPER;
  168. de_digtable->rx_gain_range_min = DM_DIG_FA_LOWER;
  169. de_digtable->backoff_val = DM_DIG_BACKOFF_DEFAULT;
  170. de_digtable->backoff_val_range_max = DM_DIG_BACKOFF_MAX;
  171. de_digtable->backoff_val_range_min = DM_DIG_BACKOFF_MIN;
  172. de_digtable->pre_cck_pd_state = CCK_PD_STAGE_LOWRSSI;
  173. de_digtable->cur_cck_pd_state = CCK_PD_STAGE_MAX;
  174. de_digtable->large_fa_hit = 0;
  175. de_digtable->recover_cnt = 0;
  176. de_digtable->forbidden_igi = DM_DIG_FA_LOWER;
  177. }
  178. static void rtl92d_dm_false_alarm_counter_statistics(struct ieee80211_hw *hw)
  179. {
  180. u32 ret_value;
  181. struct rtl_priv *rtlpriv = rtl_priv(hw);
  182. struct false_alarm_statistics *falsealm_cnt = &(rtlpriv->falsealm_cnt);
  183. unsigned long flag = 0;
  184. /* hold ofdm counter */
  185. rtl_set_bbreg(hw, ROFDM0_LSTF, BIT(31), 1); /* hold page C counter */
  186. rtl_set_bbreg(hw, ROFDM1_LSTF, BIT(31), 1); /*hold page D counter */
  187. ret_value = rtl_get_bbreg(hw, ROFDM0_FRAMESYNC, BMASKDWORD);
  188. falsealm_cnt->cnt_fast_fsync_fail = (ret_value & 0xffff);
  189. falsealm_cnt->cnt_sb_search_fail = ((ret_value & 0xffff0000) >> 16);
  190. ret_value = rtl_get_bbreg(hw, ROFDM_PHYCOUNTER1, BMASKDWORD);
  191. falsealm_cnt->cnt_parity_fail = ((ret_value & 0xffff0000) >> 16);
  192. ret_value = rtl_get_bbreg(hw, ROFDM_PHYCOUNTER2, BMASKDWORD);
  193. falsealm_cnt->cnt_rate_illegal = (ret_value & 0xffff);
  194. falsealm_cnt->cnt_crc8_fail = ((ret_value & 0xffff0000) >> 16);
  195. ret_value = rtl_get_bbreg(hw, ROFDM_PHYCOUNTER3, BMASKDWORD);
  196. falsealm_cnt->cnt_mcs_fail = (ret_value & 0xffff);
  197. falsealm_cnt->cnt_ofdm_fail = falsealm_cnt->cnt_parity_fail +
  198. falsealm_cnt->cnt_rate_illegal +
  199. falsealm_cnt->cnt_crc8_fail +
  200. falsealm_cnt->cnt_mcs_fail +
  201. falsealm_cnt->cnt_fast_fsync_fail +
  202. falsealm_cnt->cnt_sb_search_fail;
  203. if (rtlpriv->rtlhal.current_bandtype != BAND_ON_5G) {
  204. /* hold cck counter */
  205. rtl92d_acquire_cckandrw_pagea_ctl(hw, &flag);
  206. ret_value = rtl_get_bbreg(hw, RCCK0_FACOUNTERLOWER, BMASKBYTE0);
  207. falsealm_cnt->cnt_cck_fail = ret_value;
  208. ret_value = rtl_get_bbreg(hw, RCCK0_FACOUNTERUPPER, BMASKBYTE3);
  209. falsealm_cnt->cnt_cck_fail += (ret_value & 0xff) << 8;
  210. rtl92d_release_cckandrw_pagea_ctl(hw, &flag);
  211. } else {
  212. falsealm_cnt->cnt_cck_fail = 0;
  213. }
  214. /* reset false alarm counter registers */
  215. falsealm_cnt->cnt_all = falsealm_cnt->cnt_fast_fsync_fail +
  216. falsealm_cnt->cnt_sb_search_fail +
  217. falsealm_cnt->cnt_parity_fail +
  218. falsealm_cnt->cnt_rate_illegal +
  219. falsealm_cnt->cnt_crc8_fail +
  220. falsealm_cnt->cnt_mcs_fail +
  221. falsealm_cnt->cnt_cck_fail;
  222. rtl_set_bbreg(hw, ROFDM1_LSTF, 0x08000000, 1);
  223. /* update ofdm counter */
  224. rtl_set_bbreg(hw, ROFDM1_LSTF, 0x08000000, 0);
  225. /* update page C counter */
  226. rtl_set_bbreg(hw, ROFDM0_LSTF, BIT(31), 0);
  227. /* update page D counter */
  228. rtl_set_bbreg(hw, ROFDM1_LSTF, BIT(31), 0);
  229. if (rtlpriv->rtlhal.current_bandtype != BAND_ON_5G) {
  230. /* reset cck counter */
  231. rtl92d_acquire_cckandrw_pagea_ctl(hw, &flag);
  232. rtl_set_bbreg(hw, RCCK0_FALSEALARMREPORT, 0x0000c000, 0);
  233. /* enable cck counter */
  234. rtl_set_bbreg(hw, RCCK0_FALSEALARMREPORT, 0x0000c000, 2);
  235. rtl92d_release_cckandrw_pagea_ctl(hw, &flag);
  236. }
  237. RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD,
  238. "Cnt_Fast_Fsync_fail = %x, Cnt_SB_Search_fail = %x\n",
  239. falsealm_cnt->cnt_fast_fsync_fail,
  240. falsealm_cnt->cnt_sb_search_fail);
  241. RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD,
  242. "Cnt_Parity_Fail = %x, Cnt_Rate_Illegal = %x, Cnt_Crc8_fail = %x, Cnt_Mcs_fail = %x\n",
  243. falsealm_cnt->cnt_parity_fail,
  244. falsealm_cnt->cnt_rate_illegal,
  245. falsealm_cnt->cnt_crc8_fail,
  246. falsealm_cnt->cnt_mcs_fail);
  247. RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD,
  248. "Cnt_Ofdm_fail = %x, Cnt_Cck_fail = %x, Cnt_all = %x\n",
  249. falsealm_cnt->cnt_ofdm_fail,
  250. falsealm_cnt->cnt_cck_fail,
  251. falsealm_cnt->cnt_all);
  252. }
  253. static void rtl92d_dm_find_minimum_rssi(struct ieee80211_hw *hw)
  254. {
  255. struct rtl_priv *rtlpriv = rtl_priv(hw);
  256. struct dig_t *de_digtable = &rtlpriv->dm_digtable;
  257. struct rtl_mac *mac = rtl_mac(rtlpriv);
  258. /* Determine the minimum RSSI */
  259. if ((mac->link_state < MAC80211_LINKED) &&
  260. (rtlpriv->dm.UNDEC_SM_PWDB == 0)) {
  261. de_digtable->min_undecorated_pwdb_for_dm = 0;
  262. RT_TRACE(rtlpriv, COMP_BB_POWERSAVING, DBG_LOUD,
  263. "Not connected to any\n");
  264. }
  265. if (mac->link_state >= MAC80211_LINKED) {
  266. if (mac->opmode == NL80211_IFTYPE_AP ||
  267. mac->opmode == NL80211_IFTYPE_ADHOC) {
  268. de_digtable->min_undecorated_pwdb_for_dm =
  269. rtlpriv->dm.UNDEC_SM_PWDB;
  270. RT_TRACE(rtlpriv, COMP_BB_POWERSAVING, DBG_LOUD,
  271. "AP Client PWDB = 0x%lx\n",
  272. rtlpriv->dm.UNDEC_SM_PWDB);
  273. } else {
  274. de_digtable->min_undecorated_pwdb_for_dm =
  275. rtlpriv->dm.undecorated_smoothed_pwdb;
  276. RT_TRACE(rtlpriv, COMP_BB_POWERSAVING, DBG_LOUD,
  277. "STA Default Port PWDB = 0x%x\n",
  278. de_digtable->min_undecorated_pwdb_for_dm);
  279. }
  280. } else {
  281. de_digtable->min_undecorated_pwdb_for_dm =
  282. rtlpriv->dm.UNDEC_SM_PWDB;
  283. RT_TRACE(rtlpriv, COMP_BB_POWERSAVING, DBG_LOUD,
  284. "AP Ext Port or disconnect PWDB = 0x%x\n",
  285. de_digtable->min_undecorated_pwdb_for_dm);
  286. }
  287. RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD, "MinUndecoratedPWDBForDM =%d\n",
  288. de_digtable->min_undecorated_pwdb_for_dm);
  289. }
  290. static void rtl92d_dm_cck_packet_detection_thresh(struct ieee80211_hw *hw)
  291. {
  292. struct rtl_priv *rtlpriv = rtl_priv(hw);
  293. struct dig_t *de_digtable = &rtlpriv->dm_digtable;
  294. unsigned long flag = 0;
  295. if (de_digtable->cursta_connectctate == DIG_STA_CONNECT) {
  296. if (de_digtable->pre_cck_pd_state == CCK_PD_STAGE_LOWRSSI) {
  297. if (de_digtable->min_undecorated_pwdb_for_dm <= 25)
  298. de_digtable->cur_cck_pd_state =
  299. CCK_PD_STAGE_LOWRSSI;
  300. else
  301. de_digtable->cur_cck_pd_state =
  302. CCK_PD_STAGE_HIGHRSSI;
  303. } else {
  304. if (de_digtable->min_undecorated_pwdb_for_dm <= 20)
  305. de_digtable->cur_cck_pd_state =
  306. CCK_PD_STAGE_LOWRSSI;
  307. else
  308. de_digtable->cur_cck_pd_state =
  309. CCK_PD_STAGE_HIGHRSSI;
  310. }
  311. } else {
  312. de_digtable->cur_cck_pd_state = CCK_PD_STAGE_LOWRSSI;
  313. }
  314. if (de_digtable->pre_cck_pd_state != de_digtable->cur_cck_pd_state) {
  315. if (de_digtable->cur_cck_pd_state == CCK_PD_STAGE_LOWRSSI) {
  316. rtl92d_acquire_cckandrw_pagea_ctl(hw, &flag);
  317. rtl_set_bbreg(hw, RCCK0_CCA, BMASKBYTE2, 0x83);
  318. rtl92d_release_cckandrw_pagea_ctl(hw, &flag);
  319. } else {
  320. rtl92d_acquire_cckandrw_pagea_ctl(hw, &flag);
  321. rtl_set_bbreg(hw, RCCK0_CCA, BMASKBYTE2, 0xcd);
  322. rtl92d_release_cckandrw_pagea_ctl(hw, &flag);
  323. }
  324. de_digtable->pre_cck_pd_state = de_digtable->cur_cck_pd_state;
  325. }
  326. RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD, "CurSTAConnectState=%s\n",
  327. de_digtable->cursta_connectctate == DIG_STA_CONNECT ?
  328. "DIG_STA_CONNECT " : "DIG_STA_DISCONNECT");
  329. RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD, "CCKPDStage=%s\n",
  330. de_digtable->cur_cck_pd_state == CCK_PD_STAGE_LOWRSSI ?
  331. "Low RSSI " : "High RSSI ");
  332. RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD, "is92d single phy =%x\n",
  333. IS_92D_SINGLEPHY(rtlpriv->rtlhal.version));
  334. }
  335. void rtl92d_dm_write_dig(struct ieee80211_hw *hw)
  336. {
  337. struct rtl_priv *rtlpriv = rtl_priv(hw);
  338. struct dig_t *de_digtable = &rtlpriv->dm_digtable;
  339. RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD,
  340. "cur_igvalue = 0x%x, pre_igvalue = 0x%x, backoff_val = %d\n",
  341. de_digtable->cur_igvalue, de_digtable->pre_igvalue,
  342. de_digtable->backoff_val);
  343. if (de_digtable->dig_enable_flag == false) {
  344. RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD, "DIG is disabled\n");
  345. de_digtable->pre_igvalue = 0x17;
  346. return;
  347. }
  348. if (de_digtable->pre_igvalue != de_digtable->cur_igvalue) {
  349. rtl_set_bbreg(hw, ROFDM0_XAAGCCORE1, 0x7f,
  350. de_digtable->cur_igvalue);
  351. rtl_set_bbreg(hw, ROFDM0_XBAGCCORE1, 0x7f,
  352. de_digtable->cur_igvalue);
  353. de_digtable->pre_igvalue = de_digtable->cur_igvalue;
  354. }
  355. }
  356. static void rtl92d_early_mode_enabled(struct rtl_priv *rtlpriv)
  357. {
  358. struct dig_t *de_digtable = &rtlpriv->dm_digtable;
  359. if ((rtlpriv->mac80211.link_state >= MAC80211_LINKED) &&
  360. (rtlpriv->mac80211.vendor == PEER_CISCO)) {
  361. RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD, "IOT_PEER = CISCO\n");
  362. if (de_digtable->last_min_undecorated_pwdb_for_dm >= 50
  363. && de_digtable->min_undecorated_pwdb_for_dm < 50) {
  364. rtl_write_byte(rtlpriv, REG_EARLY_MODE_CONTROL, 0x00);
  365. RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD,
  366. "Early Mode Off\n");
  367. } else if (de_digtable->last_min_undecorated_pwdb_for_dm <= 55 &&
  368. de_digtable->min_undecorated_pwdb_for_dm > 55) {
  369. rtl_write_byte(rtlpriv, REG_EARLY_MODE_CONTROL, 0x0f);
  370. RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD,
  371. "Early Mode On\n");
  372. }
  373. } else if (!(rtl_read_byte(rtlpriv, REG_EARLY_MODE_CONTROL) & 0xf)) {
  374. rtl_write_byte(rtlpriv, REG_EARLY_MODE_CONTROL, 0x0f);
  375. RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD, "Early Mode On\n");
  376. }
  377. }
  378. static void rtl92d_dm_dig(struct ieee80211_hw *hw)
  379. {
  380. struct rtl_priv *rtlpriv = rtl_priv(hw);
  381. struct dig_t *de_digtable = &rtlpriv->dm_digtable;
  382. u8 value_igi = de_digtable->cur_igvalue;
  383. struct false_alarm_statistics *falsealm_cnt = &(rtlpriv->falsealm_cnt);
  384. RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD, "==>\n");
  385. if (rtlpriv->rtlhal.earlymode_enable) {
  386. rtl92d_early_mode_enabled(rtlpriv);
  387. de_digtable->last_min_undecorated_pwdb_for_dm =
  388. de_digtable->min_undecorated_pwdb_for_dm;
  389. }
  390. if (!rtlpriv->dm.dm_initialgain_enable)
  391. return;
  392. /* because we will send data pkt when scanning
  393. * this will cause some ap like gear-3700 wep TP
  394. * lower if we retrun here, this is the diff of
  395. * mac80211 driver vs ieee80211 driver */
  396. /* if (rtlpriv->mac80211.act_scanning)
  397. * return; */
  398. /* Not STA mode return tmp */
  399. if (rtlpriv->mac80211.opmode != NL80211_IFTYPE_STATION)
  400. return;
  401. RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD, "progress\n");
  402. /* Decide the current status and if modify initial gain or not */
  403. if (rtlpriv->mac80211.link_state >= MAC80211_LINKED)
  404. de_digtable->cursta_connectctate = DIG_STA_CONNECT;
  405. else
  406. de_digtable->cursta_connectctate = DIG_STA_DISCONNECT;
  407. /* adjust initial gain according to false alarm counter */
  408. if (falsealm_cnt->cnt_all < DM_DIG_FA_TH0)
  409. value_igi--;
  410. else if (falsealm_cnt->cnt_all < DM_DIG_FA_TH1)
  411. value_igi += 0;
  412. else if (falsealm_cnt->cnt_all < DM_DIG_FA_TH2)
  413. value_igi++;
  414. else if (falsealm_cnt->cnt_all >= DM_DIG_FA_TH2)
  415. value_igi += 2;
  416. RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD,
  417. "dm_DIG() Before: large_fa_hit=%d, forbidden_igi=%x\n",
  418. de_digtable->large_fa_hit, de_digtable->forbidden_igi);
  419. RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD,
  420. "dm_DIG() Before: Recover_cnt=%d, rx_gain_range_min=%x\n",
  421. de_digtable->recover_cnt, de_digtable->rx_gain_range_min);
  422. /* deal with abnorally large false alarm */
  423. if (falsealm_cnt->cnt_all > 10000) {
  424. RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD,
  425. "dm_DIG(): Abnormally false alarm case\n");
  426. de_digtable->large_fa_hit++;
  427. if (de_digtable->forbidden_igi < de_digtable->cur_igvalue) {
  428. de_digtable->forbidden_igi = de_digtable->cur_igvalue;
  429. de_digtable->large_fa_hit = 1;
  430. }
  431. if (de_digtable->large_fa_hit >= 3) {
  432. if ((de_digtable->forbidden_igi + 1) > DM_DIG_MAX)
  433. de_digtable->rx_gain_range_min = DM_DIG_MAX;
  434. else
  435. de_digtable->rx_gain_range_min =
  436. (de_digtable->forbidden_igi + 1);
  437. de_digtable->recover_cnt = 3600; /* 3600=2hr */
  438. }
  439. } else {
  440. /* Recovery mechanism for IGI lower bound */
  441. if (de_digtable->recover_cnt != 0) {
  442. de_digtable->recover_cnt--;
  443. } else {
  444. if (de_digtable->large_fa_hit == 0) {
  445. if ((de_digtable->forbidden_igi - 1) <
  446. DM_DIG_FA_LOWER) {
  447. de_digtable->forbidden_igi =
  448. DM_DIG_FA_LOWER;
  449. de_digtable->rx_gain_range_min =
  450. DM_DIG_FA_LOWER;
  451. } else {
  452. de_digtable->forbidden_igi--;
  453. de_digtable->rx_gain_range_min =
  454. (de_digtable->forbidden_igi + 1);
  455. }
  456. } else if (de_digtable->large_fa_hit == 3) {
  457. de_digtable->large_fa_hit = 0;
  458. }
  459. }
  460. }
  461. RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD,
  462. "dm_DIG() After: large_fa_hit=%d, forbidden_igi=%x\n",
  463. de_digtable->large_fa_hit, de_digtable->forbidden_igi);
  464. RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD,
  465. "dm_DIG() After: recover_cnt=%d, rx_gain_range_min=%x\n",
  466. de_digtable->recover_cnt, de_digtable->rx_gain_range_min);
  467. if (value_igi > DM_DIG_MAX)
  468. value_igi = DM_DIG_MAX;
  469. else if (value_igi < de_digtable->rx_gain_range_min)
  470. value_igi = de_digtable->rx_gain_range_min;
  471. de_digtable->cur_igvalue = value_igi;
  472. rtl92d_dm_write_dig(hw);
  473. if (rtlpriv->rtlhal.current_bandtype != BAND_ON_5G)
  474. rtl92d_dm_cck_packet_detection_thresh(hw);
  475. RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD, "<<==\n");
  476. }
  477. static void rtl92d_dm_init_dynamic_txpower(struct ieee80211_hw *hw)
  478. {
  479. struct rtl_priv *rtlpriv = rtl_priv(hw);
  480. rtlpriv->dm.dynamic_txpower_enable = true;
  481. rtlpriv->dm.last_dtp_lvl = TXHIGHPWRLEVEL_NORMAL;
  482. rtlpriv->dm.dynamic_txhighpower_lvl = TXHIGHPWRLEVEL_NORMAL;
  483. }
  484. static void rtl92d_dm_dynamic_txpower(struct ieee80211_hw *hw)
  485. {
  486. struct rtl_priv *rtlpriv = rtl_priv(hw);
  487. struct rtl_phy *rtlphy = &(rtlpriv->phy);
  488. struct rtl_hal *rtlhal = rtl_hal(rtlpriv);
  489. struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
  490. long undecorated_smoothed_pwdb;
  491. if ((!rtlpriv->dm.dynamic_txpower_enable)
  492. || rtlpriv->dm.dm_flag & HAL_DM_HIPWR_DISABLE) {
  493. rtlpriv->dm.dynamic_txhighpower_lvl = TXHIGHPWRLEVEL_NORMAL;
  494. return;
  495. }
  496. if ((mac->link_state < MAC80211_LINKED) &&
  497. (rtlpriv->dm.UNDEC_SM_PWDB == 0)) {
  498. RT_TRACE(rtlpriv, COMP_POWER, DBG_TRACE,
  499. "Not connected to any\n");
  500. rtlpriv->dm.dynamic_txhighpower_lvl = TXHIGHPWRLEVEL_NORMAL;
  501. rtlpriv->dm.last_dtp_lvl = TXHIGHPWRLEVEL_NORMAL;
  502. return;
  503. }
  504. if (mac->link_state >= MAC80211_LINKED) {
  505. if (mac->opmode == NL80211_IFTYPE_ADHOC) {
  506. undecorated_smoothed_pwdb =
  507. rtlpriv->dm.UNDEC_SM_PWDB;
  508. RT_TRACE(rtlpriv, COMP_POWER, DBG_LOUD,
  509. "IBSS Client PWDB = 0x%lx\n",
  510. undecorated_smoothed_pwdb);
  511. } else {
  512. undecorated_smoothed_pwdb =
  513. rtlpriv->dm.undecorated_smoothed_pwdb;
  514. RT_TRACE(rtlpriv, COMP_POWER, DBG_LOUD,
  515. "STA Default Port PWDB = 0x%lx\n",
  516. undecorated_smoothed_pwdb);
  517. }
  518. } else {
  519. undecorated_smoothed_pwdb =
  520. rtlpriv->dm.UNDEC_SM_PWDB;
  521. RT_TRACE(rtlpriv, COMP_POWER, DBG_LOUD,
  522. "AP Ext Port PWDB = 0x%lx\n",
  523. undecorated_smoothed_pwdb);
  524. }
  525. if (rtlhal->current_bandtype == BAND_ON_5G) {
  526. if (undecorated_smoothed_pwdb >= 0x33) {
  527. rtlpriv->dm.dynamic_txhighpower_lvl =
  528. TXHIGHPWRLEVEL_LEVEL2;
  529. RT_TRACE(rtlpriv, COMP_HIPWR, DBG_LOUD,
  530. "5G:TxHighPwrLevel_Level2 (TxPwr=0x0)\n");
  531. } else if ((undecorated_smoothed_pwdb < 0x33)
  532. && (undecorated_smoothed_pwdb >= 0x2b)) {
  533. rtlpriv->dm.dynamic_txhighpower_lvl =
  534. TXHIGHPWRLEVEL_LEVEL1;
  535. RT_TRACE(rtlpriv, COMP_HIPWR, DBG_LOUD,
  536. "5G:TxHighPwrLevel_Level1 (TxPwr=0x10)\n");
  537. } else if (undecorated_smoothed_pwdb < 0x2b) {
  538. rtlpriv->dm.dynamic_txhighpower_lvl =
  539. TXHIGHPWRLEVEL_NORMAL;
  540. RT_TRACE(rtlpriv, COMP_HIPWR, DBG_LOUD,
  541. "5G:TxHighPwrLevel_Normal\n");
  542. }
  543. } else {
  544. if (undecorated_smoothed_pwdb >=
  545. TX_POWER_NEAR_FIELD_THRESH_LVL2) {
  546. rtlpriv->dm.dynamic_txhighpower_lvl =
  547. TXHIGHPWRLEVEL_LEVEL2;
  548. RT_TRACE(rtlpriv, COMP_POWER, DBG_LOUD,
  549. "TXHIGHPWRLEVEL_LEVEL1 (TxPwr=0x0)\n");
  550. } else
  551. if ((undecorated_smoothed_pwdb <
  552. (TX_POWER_NEAR_FIELD_THRESH_LVL2 - 3))
  553. && (undecorated_smoothed_pwdb >=
  554. TX_POWER_NEAR_FIELD_THRESH_LVL1)) {
  555. rtlpriv->dm.dynamic_txhighpower_lvl =
  556. TXHIGHPWRLEVEL_LEVEL1;
  557. RT_TRACE(rtlpriv, COMP_POWER, DBG_LOUD,
  558. "TXHIGHPWRLEVEL_LEVEL1 (TxPwr=0x10)\n");
  559. } else if (undecorated_smoothed_pwdb <
  560. (TX_POWER_NEAR_FIELD_THRESH_LVL1 - 5)) {
  561. rtlpriv->dm.dynamic_txhighpower_lvl =
  562. TXHIGHPWRLEVEL_NORMAL;
  563. RT_TRACE(rtlpriv, COMP_POWER, DBG_LOUD,
  564. "TXHIGHPWRLEVEL_NORMAL\n");
  565. }
  566. }
  567. if ((rtlpriv->dm.dynamic_txhighpower_lvl != rtlpriv->dm.last_dtp_lvl)) {
  568. RT_TRACE(rtlpriv, COMP_POWER, DBG_LOUD,
  569. "PHY_SetTxPowerLevel8192S() Channel = %d\n",
  570. rtlphy->current_channel);
  571. rtl92d_phy_set_txpower_level(hw, rtlphy->current_channel);
  572. }
  573. rtlpriv->dm.last_dtp_lvl = rtlpriv->dm.dynamic_txhighpower_lvl;
  574. }
  575. static void rtl92d_dm_pwdb_monitor(struct ieee80211_hw *hw)
  576. {
  577. struct rtl_priv *rtlpriv = rtl_priv(hw);
  578. /* AP & ADHOC & MESH will return tmp */
  579. if (rtlpriv->mac80211.opmode != NL80211_IFTYPE_STATION)
  580. return;
  581. /* Indicate Rx signal strength to FW. */
  582. if (rtlpriv->dm.useramask) {
  583. u32 temp = rtlpriv->dm.undecorated_smoothed_pwdb;
  584. temp <<= 16;
  585. temp |= 0x100;
  586. /* fw v12 cmdid 5:use max macid ,for nic ,
  587. * default macid is 0 ,max macid is 1 */
  588. rtl92d_fill_h2c_cmd(hw, H2C_RSSI_REPORT, 3, (u8 *) (&temp));
  589. } else {
  590. rtl_write_byte(rtlpriv, 0x4fe,
  591. (u8) rtlpriv->dm.undecorated_smoothed_pwdb);
  592. }
  593. }
  594. void rtl92d_dm_init_edca_turbo(struct ieee80211_hw *hw)
  595. {
  596. struct rtl_priv *rtlpriv = rtl_priv(hw);
  597. rtlpriv->dm.current_turbo_edca = false;
  598. rtlpriv->dm.is_any_nonbepkts = false;
  599. rtlpriv->dm.is_cur_rdlstate = false;
  600. }
  601. static void rtl92d_dm_check_edca_turbo(struct ieee80211_hw *hw)
  602. {
  603. struct rtl_priv *rtlpriv = rtl_priv(hw);
  604. struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
  605. static u64 last_txok_cnt;
  606. static u64 last_rxok_cnt;
  607. u64 cur_txok_cnt;
  608. u64 cur_rxok_cnt;
  609. u32 edca_be_ul = 0x5ea42b;
  610. u32 edca_be_dl = 0x5ea42b;
  611. if (mac->link_state != MAC80211_LINKED) {
  612. rtlpriv->dm.current_turbo_edca = false;
  613. goto exit;
  614. }
  615. /* Enable BEQ TxOP limit configuration in wireless G-mode. */
  616. /* To check whether we shall force turn on TXOP configuration. */
  617. if ((!rtlpriv->dm.disable_framebursting) &&
  618. (rtlpriv->sec.pairwise_enc_algorithm == WEP40_ENCRYPTION ||
  619. rtlpriv->sec.pairwise_enc_algorithm == WEP104_ENCRYPTION ||
  620. rtlpriv->sec.pairwise_enc_algorithm == TKIP_ENCRYPTION)) {
  621. /* Force TxOP limit to 0x005e for UL. */
  622. if (!(edca_be_ul & 0xffff0000))
  623. edca_be_ul |= 0x005e0000;
  624. /* Force TxOP limit to 0x005e for DL. */
  625. if (!(edca_be_dl & 0xffff0000))
  626. edca_be_dl |= 0x005e0000;
  627. }
  628. if ((!rtlpriv->dm.is_any_nonbepkts) &&
  629. (!rtlpriv->dm.disable_framebursting)) {
  630. cur_txok_cnt = rtlpriv->stats.txbytesunicast - last_txok_cnt;
  631. cur_rxok_cnt = rtlpriv->stats.rxbytesunicast - last_rxok_cnt;
  632. if (cur_rxok_cnt > 4 * cur_txok_cnt) {
  633. if (!rtlpriv->dm.is_cur_rdlstate ||
  634. !rtlpriv->dm.current_turbo_edca) {
  635. rtl_write_dword(rtlpriv, REG_EDCA_BE_PARAM,
  636. edca_be_dl);
  637. rtlpriv->dm.is_cur_rdlstate = true;
  638. }
  639. } else {
  640. if (rtlpriv->dm.is_cur_rdlstate ||
  641. !rtlpriv->dm.current_turbo_edca) {
  642. rtl_write_dword(rtlpriv, REG_EDCA_BE_PARAM,
  643. edca_be_ul);
  644. rtlpriv->dm.is_cur_rdlstate = false;
  645. }
  646. }
  647. rtlpriv->dm.current_turbo_edca = true;
  648. } else {
  649. if (rtlpriv->dm.current_turbo_edca) {
  650. u8 tmp = AC0_BE;
  651. rtlpriv->cfg->ops->set_hw_reg(hw, HW_VAR_AC_PARAM,
  652. (u8 *) (&tmp));
  653. rtlpriv->dm.current_turbo_edca = false;
  654. }
  655. }
  656. exit:
  657. rtlpriv->dm.is_any_nonbepkts = false;
  658. last_txok_cnt = rtlpriv->stats.txbytesunicast;
  659. last_rxok_cnt = rtlpriv->stats.rxbytesunicast;
  660. }
  661. static void rtl92d_dm_rxgain_tracking_thermalmeter(struct ieee80211_hw *hw)
  662. {
  663. struct rtl_priv *rtlpriv = rtl_priv(hw);
  664. u8 index_mapping[RX_INDEX_MAPPING_NUM] = {
  665. 0x0f, 0x0f, 0x0d, 0x0c, 0x0b,
  666. 0x0a, 0x09, 0x08, 0x07, 0x06,
  667. 0x05, 0x04, 0x04, 0x03, 0x02
  668. };
  669. int i;
  670. u32 u4tmp;
  671. u4tmp = (index_mapping[(rtlpriv->efuse.eeprom_thermalmeter -
  672. rtlpriv->dm.thermalvalue_rxgain)]) << 12;
  673. RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
  674. "===> Rx Gain %x\n", u4tmp);
  675. for (i = RF90_PATH_A; i < rtlpriv->phy.num_total_rfpath; i++)
  676. rtl_set_rfreg(hw, i, 0x3C, BRFREGOFFSETMASK,
  677. (rtlpriv->phy.reg_rf3c[i] & (~(0xF000))) | u4tmp);
  678. }
  679. static void rtl92d_bandtype_2_4G(struct ieee80211_hw *hw, long *temp_cckg,
  680. u8 *cck_index_old)
  681. {
  682. struct rtl_priv *rtlpriv = rtl_priv(hw);
  683. int i;
  684. unsigned long flag = 0;
  685. long temp_cck;
  686. /* Query CCK default setting From 0xa24 */
  687. rtl92d_acquire_cckandrw_pagea_ctl(hw, &flag);
  688. temp_cck = rtl_get_bbreg(hw, RCCK0_TXFILTER2,
  689. BMASKDWORD) & BMASKCCK;
  690. rtl92d_release_cckandrw_pagea_ctl(hw, &flag);
  691. for (i = 0; i < CCK_TABLE_LENGTH; i++) {
  692. if (rtlpriv->dm.cck_inch14) {
  693. if (!memcmp((void *)&temp_cck,
  694. (void *)&cckswing_table_ch14[i][2], 4)) {
  695. *cck_index_old = (u8) i;
  696. RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
  697. "Initial reg0x%x = 0x%lx, cck_index=0x%x, ch 14 %d\n",
  698. RCCK0_TXFILTER2, temp_cck,
  699. *cck_index_old,
  700. rtlpriv->dm.cck_inch14);
  701. break;
  702. }
  703. } else {
  704. if (!memcmp((void *) &temp_cck,
  705. &cckswing_table_ch1ch13[i][2], 4)) {
  706. *cck_index_old = (u8) i;
  707. RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
  708. "Initial reg0x%x = 0x%lx, cck_index = 0x%x, ch14 %d\n",
  709. RCCK0_TXFILTER2, temp_cck,
  710. *cck_index_old,
  711. rtlpriv->dm.cck_inch14);
  712. break;
  713. }
  714. }
  715. }
  716. *temp_cckg = temp_cck;
  717. }
  718. static void rtl92d_bandtype_5G(struct rtl_hal *rtlhal, u8 *ofdm_index,
  719. bool *internal_pa, u8 thermalvalue, u8 delta,
  720. u8 rf, struct rtl_efuse *rtlefuse,
  721. struct rtl_priv *rtlpriv, struct rtl_phy *rtlphy,
  722. u8 index_mapping[5][INDEX_MAPPING_NUM],
  723. u8 index_mapping_pa[8][INDEX_MAPPING_NUM])
  724. {
  725. int i;
  726. u8 index;
  727. u8 offset = 0;
  728. for (i = 0; i < rf; i++) {
  729. if (rtlhal->macphymode == DUALMAC_DUALPHY &&
  730. rtlhal->interfaceindex == 1) /* MAC 1 5G */
  731. *internal_pa = rtlefuse->internal_pa_5g[1];
  732. else
  733. *internal_pa = rtlefuse->internal_pa_5g[i];
  734. if (*internal_pa) {
  735. if (rtlhal->interfaceindex == 1 || i == rf)
  736. offset = 4;
  737. else
  738. offset = 0;
  739. if (rtlphy->current_channel >= 100 &&
  740. rtlphy->current_channel <= 165)
  741. offset += 2;
  742. } else {
  743. if (rtlhal->interfaceindex == 1 || i == rf)
  744. offset = 2;
  745. else
  746. offset = 0;
  747. }
  748. if (thermalvalue > rtlefuse->eeprom_thermalmeter)
  749. offset++;
  750. if (*internal_pa) {
  751. if (delta > INDEX_MAPPING_NUM - 1)
  752. index = index_mapping_pa[offset]
  753. [INDEX_MAPPING_NUM - 1];
  754. else
  755. index =
  756. index_mapping_pa[offset][delta];
  757. } else {
  758. if (delta > INDEX_MAPPING_NUM - 1)
  759. index =
  760. index_mapping[offset][INDEX_MAPPING_NUM - 1];
  761. else
  762. index = index_mapping[offset][delta];
  763. }
  764. if (thermalvalue > rtlefuse->eeprom_thermalmeter) {
  765. if (*internal_pa && thermalvalue > 0x12) {
  766. ofdm_index[i] = rtlpriv->dm.ofdm_index[i] -
  767. ((delta / 2) * 3 + (delta % 2));
  768. } else {
  769. ofdm_index[i] -= index;
  770. }
  771. } else {
  772. ofdm_index[i] += index;
  773. }
  774. }
  775. }
  776. static void rtl92d_dm_txpower_tracking_callback_thermalmeter(
  777. struct ieee80211_hw *hw)
  778. {
  779. struct rtl_priv *rtlpriv = rtl_priv(hw);
  780. struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
  781. struct rtl_phy *rtlphy = &(rtlpriv->phy);
  782. struct rtl_efuse *rtlefuse = rtl_efuse(rtl_priv(hw));
  783. u8 thermalvalue, delta, delta_lck, delta_iqk, delta_rxgain;
  784. u8 offset, thermalvalue_avg_count = 0;
  785. u32 thermalvalue_avg = 0;
  786. bool internal_pa = false;
  787. long ele_a = 0, ele_d, temp_cck, val_x, value32;
  788. long val_y, ele_c = 0;
  789. u8 ofdm_index[2];
  790. u8 cck_index = 0;
  791. u8 ofdm_index_old[2];
  792. u8 cck_index_old = 0;
  793. u8 index;
  794. int i;
  795. bool is2t = IS_92D_SINGLEPHY(rtlhal->version);
  796. u8 ofdm_min_index = 6, ofdm_min_index_internal_pa = 3, rf;
  797. u8 indexforchannel =
  798. rtl92d_get_rightchnlplace_for_iqk(rtlphy->current_channel);
  799. u8 index_mapping[5][INDEX_MAPPING_NUM] = {
  800. /* 5G, path A/MAC 0, decrease power */
  801. {0, 1, 3, 6, 8, 9, 11, 13, 14, 16, 17, 18, 18},
  802. /* 5G, path A/MAC 0, increase power */
  803. {0, 2, 4, 5, 7, 10, 12, 14, 16, 18, 18, 18, 18},
  804. /* 5G, path B/MAC 1, decrease power */
  805. {0, 2, 3, 6, 8, 9, 11, 13, 14, 16, 17, 18, 18},
  806. /* 5G, path B/MAC 1, increase power */
  807. {0, 2, 4, 5, 7, 10, 13, 16, 16, 18, 18, 18, 18},
  808. /* 2.4G, for decreas power */
  809. {0, 1, 2, 3, 4, 5, 6, 7, 7, 8, 9, 10, 10},
  810. };
  811. u8 index_mapping_internal_pa[8][INDEX_MAPPING_NUM] = {
  812. /* 5G, path A/MAC 0, ch36-64, decrease power */
  813. {0, 1, 2, 4, 6, 7, 9, 11, 12, 14, 15, 16, 16},
  814. /* 5G, path A/MAC 0, ch36-64, increase power */
  815. {0, 2, 4, 5, 7, 10, 12, 14, 16, 18, 18, 18, 18},
  816. /* 5G, path A/MAC 0, ch100-165, decrease power */
  817. {0, 1, 2, 3, 5, 6, 8, 10, 11, 13, 14, 15, 15},
  818. /* 5G, path A/MAC 0, ch100-165, increase power */
  819. {0, 2, 4, 5, 7, 10, 12, 14, 16, 18, 18, 18, 18},
  820. /* 5G, path B/MAC 1, ch36-64, decrease power */
  821. {0, 1, 2, 4, 6, 7, 9, 11, 12, 14, 15, 16, 16},
  822. /* 5G, path B/MAC 1, ch36-64, increase power */
  823. {0, 2, 4, 5, 7, 10, 13, 16, 16, 18, 18, 18, 18},
  824. /* 5G, path B/MAC 1, ch100-165, decrease power */
  825. {0, 1, 2, 3, 5, 6, 8, 9, 10, 12, 13, 14, 14},
  826. /* 5G, path B/MAC 1, ch100-165, increase power */
  827. {0, 2, 4, 5, 7, 10, 13, 16, 16, 18, 18, 18, 18},
  828. };
  829. rtlpriv->dm.txpower_trackinginit = true;
  830. RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD, "\n");
  831. thermalvalue = (u8) rtl_get_rfreg(hw, RF90_PATH_A, RF_T_METER, 0xf800);
  832. RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
  833. "Readback Thermal Meter = 0x%x pre thermal meter 0x%x eeprom_thermalmeter 0x%x\n",
  834. thermalvalue,
  835. rtlpriv->dm.thermalvalue, rtlefuse->eeprom_thermalmeter);
  836. rtl92d_phy_ap_calibrate(hw, (thermalvalue -
  837. rtlefuse->eeprom_thermalmeter));
  838. if (is2t)
  839. rf = 2;
  840. else
  841. rf = 1;
  842. if (thermalvalue) {
  843. ele_d = rtl_get_bbreg(hw, ROFDM0_XATxIQIMBALANCE,
  844. BMASKDWORD) & BMASKOFDM_D;
  845. for (i = 0; i < OFDM_TABLE_SIZE_92D; i++) {
  846. if (ele_d == (ofdmswing_table[i] & BMASKOFDM_D)) {
  847. ofdm_index_old[0] = (u8) i;
  848. RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
  849. "Initial pathA ele_d reg0x%x = 0x%lx, ofdm_index=0x%x\n",
  850. ROFDM0_XATxIQIMBALANCE,
  851. ele_d, ofdm_index_old[0]);
  852. break;
  853. }
  854. }
  855. if (is2t) {
  856. ele_d = rtl_get_bbreg(hw, ROFDM0_XBTxIQIMBALANCE,
  857. BMASKDWORD) & BMASKOFDM_D;
  858. for (i = 0; i < OFDM_TABLE_SIZE_92D; i++) {
  859. if (ele_d ==
  860. (ofdmswing_table[i] & BMASKOFDM_D)) {
  861. ofdm_index_old[1] = (u8) i;
  862. RT_TRACE(rtlpriv, COMP_POWER_TRACKING,
  863. DBG_LOUD,
  864. "Initial pathB ele_d reg 0x%x = 0x%lx, ofdm_index = 0x%x\n",
  865. ROFDM0_XBTxIQIMBALANCE, ele_d,
  866. ofdm_index_old[1]);
  867. break;
  868. }
  869. }
  870. }
  871. if (rtlhal->current_bandtype == BAND_ON_2_4G) {
  872. rtl92d_bandtype_2_4G(hw, &temp_cck, &cck_index_old);
  873. } else {
  874. temp_cck = 0x090e1317;
  875. cck_index_old = 12;
  876. }
  877. if (!rtlpriv->dm.thermalvalue) {
  878. rtlpriv->dm.thermalvalue =
  879. rtlefuse->eeprom_thermalmeter;
  880. rtlpriv->dm.thermalvalue_lck = thermalvalue;
  881. rtlpriv->dm.thermalvalue_iqk = thermalvalue;
  882. rtlpriv->dm.thermalvalue_rxgain =
  883. rtlefuse->eeprom_thermalmeter;
  884. for (i = 0; i < rf; i++)
  885. rtlpriv->dm.ofdm_index[i] = ofdm_index_old[i];
  886. rtlpriv->dm.cck_index = cck_index_old;
  887. }
  888. if (rtlhal->reloadtxpowerindex) {
  889. for (i = 0; i < rf; i++)
  890. rtlpriv->dm.ofdm_index[i] = ofdm_index_old[i];
  891. rtlpriv->dm.cck_index = cck_index_old;
  892. RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
  893. "reload ofdm index for band switch\n");
  894. }
  895. rtlpriv->dm.thermalvalue_avg
  896. [rtlpriv->dm.thermalvalue_avg_index] = thermalvalue;
  897. rtlpriv->dm.thermalvalue_avg_index++;
  898. if (rtlpriv->dm.thermalvalue_avg_index == AVG_THERMAL_NUM)
  899. rtlpriv->dm.thermalvalue_avg_index = 0;
  900. for (i = 0; i < AVG_THERMAL_NUM; i++) {
  901. if (rtlpriv->dm.thermalvalue_avg[i]) {
  902. thermalvalue_avg +=
  903. rtlpriv->dm.thermalvalue_avg[i];
  904. thermalvalue_avg_count++;
  905. }
  906. }
  907. if (thermalvalue_avg_count)
  908. thermalvalue = (u8) (thermalvalue_avg /
  909. thermalvalue_avg_count);
  910. if (rtlhal->reloadtxpowerindex) {
  911. delta = (thermalvalue > rtlefuse->eeprom_thermalmeter) ?
  912. (thermalvalue - rtlefuse->eeprom_thermalmeter) :
  913. (rtlefuse->eeprom_thermalmeter - thermalvalue);
  914. rtlhal->reloadtxpowerindex = false;
  915. rtlpriv->dm.done_txpower = false;
  916. } else if (rtlpriv->dm.done_txpower) {
  917. delta = (thermalvalue > rtlpriv->dm.thermalvalue) ?
  918. (thermalvalue - rtlpriv->dm.thermalvalue) :
  919. (rtlpriv->dm.thermalvalue - thermalvalue);
  920. } else {
  921. delta = (thermalvalue > rtlefuse->eeprom_thermalmeter) ?
  922. (thermalvalue - rtlefuse->eeprom_thermalmeter) :
  923. (rtlefuse->eeprom_thermalmeter - thermalvalue);
  924. }
  925. delta_lck = (thermalvalue > rtlpriv->dm.thermalvalue_lck) ?
  926. (thermalvalue - rtlpriv->dm.thermalvalue_lck) :
  927. (rtlpriv->dm.thermalvalue_lck - thermalvalue);
  928. delta_iqk = (thermalvalue > rtlpriv->dm.thermalvalue_iqk) ?
  929. (thermalvalue - rtlpriv->dm.thermalvalue_iqk) :
  930. (rtlpriv->dm.thermalvalue_iqk - thermalvalue);
  931. delta_rxgain =
  932. (thermalvalue > rtlpriv->dm.thermalvalue_rxgain) ?
  933. (thermalvalue - rtlpriv->dm.thermalvalue_rxgain) :
  934. (rtlpriv->dm.thermalvalue_rxgain - thermalvalue);
  935. RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
  936. "Readback Thermal Meter = 0x%x pre thermal meter 0x%x eeprom_thermalmeter 0x%x delta 0x%x delta_lck 0x%x delta_iqk 0x%x\n",
  937. thermalvalue, rtlpriv->dm.thermalvalue,
  938. rtlefuse->eeprom_thermalmeter, delta, delta_lck,
  939. delta_iqk);
  940. if ((delta_lck > rtlefuse->delta_lck) &&
  941. (rtlefuse->delta_lck != 0)) {
  942. rtlpriv->dm.thermalvalue_lck = thermalvalue;
  943. rtl92d_phy_lc_calibrate(hw);
  944. }
  945. if (delta > 0 && rtlpriv->dm.txpower_track_control) {
  946. rtlpriv->dm.done_txpower = true;
  947. delta = (thermalvalue > rtlefuse->eeprom_thermalmeter) ?
  948. (thermalvalue - rtlefuse->eeprom_thermalmeter) :
  949. (rtlefuse->eeprom_thermalmeter - thermalvalue);
  950. if (rtlhal->current_bandtype == BAND_ON_2_4G) {
  951. offset = 4;
  952. if (delta > INDEX_MAPPING_NUM - 1)
  953. index = index_mapping[offset]
  954. [INDEX_MAPPING_NUM - 1];
  955. else
  956. index = index_mapping[offset][delta];
  957. if (thermalvalue > rtlpriv->dm.thermalvalue) {
  958. for (i = 0; i < rf; i++)
  959. ofdm_index[i] -= delta;
  960. cck_index -= delta;
  961. } else {
  962. for (i = 0; i < rf; i++)
  963. ofdm_index[i] += index;
  964. cck_index += index;
  965. }
  966. } else if (rtlhal->current_bandtype == BAND_ON_5G) {
  967. rtl92d_bandtype_5G(rtlhal, ofdm_index,
  968. &internal_pa, thermalvalue,
  969. delta, rf, rtlefuse, rtlpriv,
  970. rtlphy, index_mapping,
  971. index_mapping_internal_pa);
  972. }
  973. if (is2t) {
  974. RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
  975. "temp OFDM_A_index=0x%x, OFDM_B_index = 0x%x,cck_index=0x%x\n",
  976. rtlpriv->dm.ofdm_index[0],
  977. rtlpriv->dm.ofdm_index[1],
  978. rtlpriv->dm.cck_index);
  979. } else {
  980. RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
  981. "temp OFDM_A_index=0x%x,cck_index = 0x%x\n",
  982. rtlpriv->dm.ofdm_index[0],
  983. rtlpriv->dm.cck_index);
  984. }
  985. for (i = 0; i < rf; i++) {
  986. if (ofdm_index[i] > OFDM_TABLE_SIZE_92D - 1)
  987. ofdm_index[i] = OFDM_TABLE_SIZE_92D - 1;
  988. else if (ofdm_index[i] < ofdm_min_index)
  989. ofdm_index[i] = ofdm_min_index;
  990. }
  991. if (rtlhal->current_bandtype == BAND_ON_2_4G) {
  992. if (cck_index > CCK_TABLE_SIZE - 1) {
  993. cck_index = CCK_TABLE_SIZE - 1;
  994. } else if (internal_pa ||
  995. rtlhal->current_bandtype ==
  996. BAND_ON_2_4G) {
  997. if (ofdm_index[i] <
  998. ofdm_min_index_internal_pa)
  999. ofdm_index[i] =
  1000. ofdm_min_index_internal_pa;
  1001. } else if (cck_index < 0) {
  1002. cck_index = 0;
  1003. }
  1004. }
  1005. if (is2t) {
  1006. RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
  1007. "new OFDM_A_index=0x%x, OFDM_B_index = 0x%x, cck_index=0x%x\n",
  1008. ofdm_index[0], ofdm_index[1],
  1009. cck_index);
  1010. } else {
  1011. RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
  1012. "new OFDM_A_index=0x%x,cck_index = 0x%x\n",
  1013. ofdm_index[0], cck_index);
  1014. }
  1015. ele_d = (ofdmswing_table[(u8) ofdm_index[0]] &
  1016. 0xFFC00000) >> 22;
  1017. val_x = rtlphy->iqk_matrix_regsetting
  1018. [indexforchannel].value[0][0];
  1019. val_y = rtlphy->iqk_matrix_regsetting
  1020. [indexforchannel].value[0][1];
  1021. if (val_x != 0) {
  1022. if ((val_x & 0x00000200) != 0)
  1023. val_x = val_x | 0xFFFFFC00;
  1024. ele_a =
  1025. ((val_x * ele_d) >> 8) & 0x000003FF;
  1026. /* new element C = element D x Y */
  1027. if ((val_y & 0x00000200) != 0)
  1028. val_y = val_y | 0xFFFFFC00;
  1029. ele_c = ((val_y * ele_d) >> 8) & 0x000003FF;
  1030. /* wirte new elements A, C, D to regC80 and
  1031. * regC94, element B is always 0 */
  1032. value32 = (ele_d << 22) | ((ele_c & 0x3F) <<
  1033. 16) | ele_a;
  1034. rtl_set_bbreg(hw, ROFDM0_XATxIQIMBALANCE,
  1035. BMASKDWORD, value32);
  1036. value32 = (ele_c & 0x000003C0) >> 6;
  1037. rtl_set_bbreg(hw, ROFDM0_XCTxAFE, BMASKH4BITS,
  1038. value32);
  1039. value32 = ((val_x * ele_d) >> 7) & 0x01;
  1040. rtl_set_bbreg(hw, ROFDM0_ECCATHRESHOLD, BIT(24),
  1041. value32);
  1042. } else {
  1043. rtl_set_bbreg(hw, ROFDM0_XATxIQIMBALANCE,
  1044. BMASKDWORD,
  1045. ofdmswing_table
  1046. [(u8)ofdm_index[0]]);
  1047. rtl_set_bbreg(hw, ROFDM0_XCTxAFE, BMASKH4BITS,
  1048. 0x00);
  1049. rtl_set_bbreg(hw, ROFDM0_ECCATHRESHOLD,
  1050. BIT(24), 0x00);
  1051. }
  1052. RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
  1053. "TxPwrTracking for interface %d path A: X = 0x%lx, Y = 0x%lx ele_A = 0x%lx ele_C = 0x%lx ele_D = 0x%lx 0xe94 = 0x%lx 0xe9c = 0x%lx\n",
  1054. rtlhal->interfaceindex,
  1055. val_x, val_y, ele_a, ele_c, ele_d,
  1056. val_x, val_y);
  1057. if (rtlhal->current_bandtype == BAND_ON_2_4G) {
  1058. /* Adjust CCK according to IQK result */
  1059. if (!rtlpriv->dm.cck_inch14) {
  1060. rtl_write_byte(rtlpriv, 0xa22,
  1061. cckswing_table_ch1ch13
  1062. [(u8)cck_index][0]);
  1063. rtl_write_byte(rtlpriv, 0xa23,
  1064. cckswing_table_ch1ch13
  1065. [(u8)cck_index][1]);
  1066. rtl_write_byte(rtlpriv, 0xa24,
  1067. cckswing_table_ch1ch13
  1068. [(u8)cck_index][2]);
  1069. rtl_write_byte(rtlpriv, 0xa25,
  1070. cckswing_table_ch1ch13
  1071. [(u8)cck_index][3]);
  1072. rtl_write_byte(rtlpriv, 0xa26,
  1073. cckswing_table_ch1ch13
  1074. [(u8)cck_index][4]);
  1075. rtl_write_byte(rtlpriv, 0xa27,
  1076. cckswing_table_ch1ch13
  1077. [(u8)cck_index][5]);
  1078. rtl_write_byte(rtlpriv, 0xa28,
  1079. cckswing_table_ch1ch13
  1080. [(u8)cck_index][6]);
  1081. rtl_write_byte(rtlpriv, 0xa29,
  1082. cckswing_table_ch1ch13
  1083. [(u8)cck_index][7]);
  1084. } else {
  1085. rtl_write_byte(rtlpriv, 0xa22,
  1086. cckswing_table_ch14
  1087. [(u8)cck_index][0]);
  1088. rtl_write_byte(rtlpriv, 0xa23,
  1089. cckswing_table_ch14
  1090. [(u8)cck_index][1]);
  1091. rtl_write_byte(rtlpriv, 0xa24,
  1092. cckswing_table_ch14
  1093. [(u8)cck_index][2]);
  1094. rtl_write_byte(rtlpriv, 0xa25,
  1095. cckswing_table_ch14
  1096. [(u8)cck_index][3]);
  1097. rtl_write_byte(rtlpriv, 0xa26,
  1098. cckswing_table_ch14
  1099. [(u8)cck_index][4]);
  1100. rtl_write_byte(rtlpriv, 0xa27,
  1101. cckswing_table_ch14
  1102. [(u8)cck_index][5]);
  1103. rtl_write_byte(rtlpriv, 0xa28,
  1104. cckswing_table_ch14
  1105. [(u8)cck_index][6]);
  1106. rtl_write_byte(rtlpriv, 0xa29,
  1107. cckswing_table_ch14
  1108. [(u8)cck_index][7]);
  1109. }
  1110. }
  1111. if (is2t) {
  1112. ele_d = (ofdmswing_table[(u8) ofdm_index[1]] &
  1113. 0xFFC00000) >> 22;
  1114. val_x = rtlphy->iqk_matrix_regsetting
  1115. [indexforchannel].value[0][4];
  1116. val_y = rtlphy->iqk_matrix_regsetting
  1117. [indexforchannel].value[0][5];
  1118. if (val_x != 0) {
  1119. if ((val_x & 0x00000200) != 0)
  1120. /* consider minus */
  1121. val_x = val_x | 0xFFFFFC00;
  1122. ele_a = ((val_x * ele_d) >> 8) &
  1123. 0x000003FF;
  1124. /* new element C = element D x Y */
  1125. if ((val_y & 0x00000200) != 0)
  1126. val_y =
  1127. val_y | 0xFFFFFC00;
  1128. ele_c =
  1129. ((val_y *
  1130. ele_d) >> 8) & 0x00003FF;
  1131. /* write new elements A, C, D to regC88
  1132. * and regC9C, element B is always 0
  1133. */
  1134. value32 = (ele_d << 22) |
  1135. ((ele_c & 0x3F) << 16) |
  1136. ele_a;
  1137. rtl_set_bbreg(hw,
  1138. ROFDM0_XBTxIQIMBALANCE,
  1139. BMASKDWORD, value32);
  1140. value32 = (ele_c & 0x000003C0) >> 6;
  1141. rtl_set_bbreg(hw, ROFDM0_XDTxAFE,
  1142. BMASKH4BITS, value32);
  1143. value32 = ((val_x * ele_d) >> 7) & 0x01;
  1144. rtl_set_bbreg(hw, ROFDM0_ECCATHRESHOLD,
  1145. BIT(28), value32);
  1146. } else {
  1147. rtl_set_bbreg(hw,
  1148. ROFDM0_XBTxIQIMBALANCE,
  1149. BMASKDWORD,
  1150. ofdmswing_table
  1151. [(u8) ofdm_index[1]]);
  1152. rtl_set_bbreg(hw, ROFDM0_XDTxAFE,
  1153. BMASKH4BITS, 0x00);
  1154. rtl_set_bbreg(hw, ROFDM0_ECCATHRESHOLD,
  1155. BIT(28), 0x00);
  1156. }
  1157. RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
  1158. "TxPwrTracking path B: X = 0x%lx, Y = 0x%lx ele_A = 0x%lx ele_C = 0x%lx ele_D = 0x%lx 0xeb4 = 0x%lx 0xebc = 0x%lx\n",
  1159. val_x, val_y, ele_a, ele_c,
  1160. ele_d, val_x, val_y);
  1161. }
  1162. RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
  1163. "TxPwrTracking 0xc80 = 0x%x, 0xc94 = 0x%x RF 0x24 = 0x%x\n",
  1164. rtl_get_bbreg(hw, 0xc80, BMASKDWORD),
  1165. rtl_get_bbreg(hw, 0xc94, BMASKDWORD),
  1166. rtl_get_rfreg(hw, RF90_PATH_A, 0x24,
  1167. BRFREGOFFSETMASK));
  1168. }
  1169. if ((delta_iqk > rtlefuse->delta_iqk) &&
  1170. (rtlefuse->delta_iqk != 0)) {
  1171. rtl92d_phy_reset_iqk_result(hw);
  1172. rtlpriv->dm.thermalvalue_iqk = thermalvalue;
  1173. rtl92d_phy_iq_calibrate(hw);
  1174. }
  1175. if (delta_rxgain > 0 && rtlhal->current_bandtype == BAND_ON_5G
  1176. && thermalvalue <= rtlefuse->eeprom_thermalmeter) {
  1177. rtlpriv->dm.thermalvalue_rxgain = thermalvalue;
  1178. rtl92d_dm_rxgain_tracking_thermalmeter(hw);
  1179. }
  1180. if (rtlpriv->dm.txpower_track_control)
  1181. rtlpriv->dm.thermalvalue = thermalvalue;
  1182. }
  1183. RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD, "<===\n");
  1184. }
  1185. static void rtl92d_dm_initialize_txpower_tracking(struct ieee80211_hw *hw)
  1186. {
  1187. struct rtl_priv *rtlpriv = rtl_priv(hw);
  1188. rtlpriv->dm.txpower_tracking = true;
  1189. rtlpriv->dm.txpower_trackinginit = false;
  1190. rtlpriv->dm.txpower_track_control = true;
  1191. RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
  1192. "pMgntInfo->txpower_tracking = %d\n",
  1193. rtlpriv->dm.txpower_tracking);
  1194. }
  1195. void rtl92d_dm_check_txpower_tracking_thermal_meter(struct ieee80211_hw *hw)
  1196. {
  1197. struct rtl_priv *rtlpriv = rtl_priv(hw);
  1198. static u8 tm_trigger;
  1199. if (!rtlpriv->dm.txpower_tracking)
  1200. return;
  1201. if (!tm_trigger) {
  1202. rtl_set_rfreg(hw, RF90_PATH_A, RF_T_METER, BIT(17) |
  1203. BIT(16), 0x03);
  1204. RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
  1205. "Trigger 92S Thermal Meter!!\n");
  1206. tm_trigger = 1;
  1207. return;
  1208. } else {
  1209. RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
  1210. "Schedule TxPowerTracking direct call!!\n");
  1211. rtl92d_dm_txpower_tracking_callback_thermalmeter(hw);
  1212. tm_trigger = 0;
  1213. }
  1214. }
  1215. void rtl92d_dm_init_rate_adaptive_mask(struct ieee80211_hw *hw)
  1216. {
  1217. struct rtl_priv *rtlpriv = rtl_priv(hw);
  1218. struct rate_adaptive *ra = &(rtlpriv->ra);
  1219. ra->ratr_state = DM_RATR_STA_INIT;
  1220. ra->pre_ratr_state = DM_RATR_STA_INIT;
  1221. if (rtlpriv->dm.dm_type == DM_TYPE_BYDRIVER)
  1222. rtlpriv->dm.useramask = true;
  1223. else
  1224. rtlpriv->dm.useramask = false;
  1225. }
  1226. void rtl92d_dm_init(struct ieee80211_hw *hw)
  1227. {
  1228. struct rtl_priv *rtlpriv = rtl_priv(hw);
  1229. rtlpriv->dm.dm_type = DM_TYPE_BYDRIVER;
  1230. rtl92d_dm_diginit(hw);
  1231. rtl92d_dm_init_dynamic_txpower(hw);
  1232. rtl92d_dm_init_edca_turbo(hw);
  1233. rtl92d_dm_init_rate_adaptive_mask(hw);
  1234. rtl92d_dm_initialize_txpower_tracking(hw);
  1235. }
  1236. void rtl92d_dm_watchdog(struct ieee80211_hw *hw)
  1237. {
  1238. struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw));
  1239. bool fw_current_inpsmode = false;
  1240. bool fwps_awake = true;
  1241. /* 1. RF is OFF. (No need to do DM.)
  1242. * 2. Fw is under power saving mode for FwLPS.
  1243. * (Prevent from SW/FW I/O racing.)
  1244. * 3. IPS workitem is scheduled. (Prevent from IPS sequence
  1245. * to be swapped with DM.
  1246. * 4. RFChangeInProgress is TRUE.
  1247. * (Prevent from broken by IPS/HW/SW Rf off.) */
  1248. if ((ppsc->rfpwr_state == ERFON) && ((!fw_current_inpsmode) &&
  1249. fwps_awake) && (!ppsc->rfchange_inprogress)) {
  1250. rtl92d_dm_pwdb_monitor(hw);
  1251. rtl92d_dm_false_alarm_counter_statistics(hw);
  1252. rtl92d_dm_find_minimum_rssi(hw);
  1253. rtl92d_dm_dig(hw);
  1254. /* rtl92d_dm_dynamic_bb_powersaving(hw); */
  1255. rtl92d_dm_dynamic_txpower(hw);
  1256. /* rtl92d_dm_check_txpower_tracking_thermal_meter(hw); */
  1257. /* rtl92d_dm_refresh_rate_adaptive_mask(hw); */
  1258. /* rtl92d_dm_interrupt_migration(hw); */
  1259. rtl92d_dm_check_edca_turbo(hw);
  1260. }
  1261. }