rt2x00queue.c 34 KB

1234567891011121314151617181920212223242526272829303132333435363738394041424344454647484950515253545556575859606162636465666768697071727374757677787980818283848586878889909192939495969798991001011021031041051061071081091101111121131141151161171181191201211221231241251261271281291301311321331341351361371381391401411421431441451461471481491501511521531541551561571581591601611621631641651661671681691701711721731741751761771781791801811821831841851861871881891901911921931941951961971981992002012022032042052062072082092102112122132142152162172182192202212222232242252262272282292302312322332342352362372382392402412422432442452462472482492502512522532542552562572582592602612622632642652662672682692702712722732742752762772782792802812822832842852862872882892902912922932942952962972982993003013023033043053063073083093103113123133143153163173183193203213223233243253263273283293303313323333343353363373383393403413423433443453463473483493503513523533543553563573583593603613623633643653663673683693703713723733743753763773783793803813823833843853863873883893903913923933943953963973983994004014024034044054064074084094104114124134144154164174184194204214224234244254264274284294304314324334344354364374384394404414424434444454464474484494504514524534544554564574584594604614624634644654664674684694704714724734744754764774784794804814824834844854864874884894904914924934944954964974984995005015025035045055065075085095105115125135145155165175185195205215225235245255265275285295305315325335345355365375385395405415425435445455465475485495505515525535545555565575585595605615625635645655665675685695705715725735745755765775785795805815825835845855865875885895905915925935945955965975985996006016026036046056066076086096106116126136146156166176186196206216226236246256266276286296306316326336346356366376386396406416426436446456466476486496506516526536546556566576586596606616626636646656666676686696706716726736746756766776786796806816826836846856866876886896906916926936946956966976986997007017027037047057067077087097107117127137147157167177187197207217227237247257267277287297307317327337347357367377387397407417427437447457467477487497507517527537547557567577587597607617627637647657667677687697707717727737747757767777787797807817827837847857867877887897907917927937947957967977987998008018028038048058068078088098108118128138148158168178188198208218228238248258268278288298308318328338348358368378388398408418428438448458468478488498508518528538548558568578588598608618628638648658668678688698708718728738748758768778788798808818828838848858868878888898908918928938948958968978988999009019029039049059069079089099109119129139149159169179189199209219229239249259269279289299309319329339349359369379389399409419429439449459469479489499509519529539549559569579589599609619629639649659669679689699709719729739749759769779789799809819829839849859869879889899909919929939949959969979989991000100110021003100410051006100710081009101010111012101310141015101610171018101910201021102210231024102510261027102810291030103110321033103410351036103710381039104010411042104310441045104610471048104910501051105210531054105510561057105810591060106110621063106410651066106710681069107010711072107310741075107610771078107910801081108210831084108510861087108810891090109110921093109410951096109710981099110011011102110311041105110611071108110911101111111211131114111511161117111811191120112111221123112411251126112711281129113011311132113311341135113611371138113911401141114211431144114511461147114811491150115111521153115411551156115711581159116011611162116311641165116611671168116911701171117211731174117511761177117811791180118111821183118411851186118711881189119011911192119311941195119611971198119912001201120212031204120512061207120812091210121112121213121412151216121712181219122012211222122312241225122612271228122912301231123212331234123512361237123812391240124112421243124412451246124712481249125012511252125312541255125612571258125912601261126212631264126512661267126812691270127112721273127412751276127712781279128012811282128312841285128612871288128912901291129212931294129512961297129812991300
  1. /*
  2. Copyright (C) 2010 Willow Garage <http://www.willowgarage.com>
  3. Copyright (C) 2004 - 2010 Ivo van Doorn <IvDoorn@gmail.com>
  4. Copyright (C) 2004 - 2009 Gertjan van Wingerde <gwingerde@gmail.com>
  5. <http://rt2x00.serialmonkey.com>
  6. This program is free software; you can redistribute it and/or modify
  7. it under the terms of the GNU General Public License as published by
  8. the Free Software Foundation; either version 2 of the License, or
  9. (at your option) any later version.
  10. This program is distributed in the hope that it will be useful,
  11. but WITHOUT ANY WARRANTY; without even the implied warranty of
  12. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  13. GNU General Public License for more details.
  14. You should have received a copy of the GNU General Public License
  15. along with this program; if not, write to the
  16. Free Software Foundation, Inc.,
  17. 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  18. */
  19. /*
  20. Module: rt2x00lib
  21. Abstract: rt2x00 queue specific routines.
  22. */
  23. #include <linux/slab.h>
  24. #include <linux/kernel.h>
  25. #include <linux/module.h>
  26. #include <linux/dma-mapping.h>
  27. #include "rt2x00.h"
  28. #include "rt2x00lib.h"
  29. struct sk_buff *rt2x00queue_alloc_rxskb(struct queue_entry *entry, gfp_t gfp)
  30. {
  31. struct rt2x00_dev *rt2x00dev = entry->queue->rt2x00dev;
  32. struct sk_buff *skb;
  33. struct skb_frame_desc *skbdesc;
  34. unsigned int frame_size;
  35. unsigned int head_size = 0;
  36. unsigned int tail_size = 0;
  37. /*
  38. * The frame size includes descriptor size, because the
  39. * hardware directly receive the frame into the skbuffer.
  40. */
  41. frame_size = entry->queue->data_size + entry->queue->desc_size;
  42. /*
  43. * The payload should be aligned to a 4-byte boundary,
  44. * this means we need at least 3 bytes for moving the frame
  45. * into the correct offset.
  46. */
  47. head_size = 4;
  48. /*
  49. * For IV/EIV/ICV assembly we must make sure there is
  50. * at least 8 bytes bytes available in headroom for IV/EIV
  51. * and 8 bytes for ICV data as tailroon.
  52. */
  53. if (test_bit(CAPABILITY_HW_CRYPTO, &rt2x00dev->cap_flags)) {
  54. head_size += 8;
  55. tail_size += 8;
  56. }
  57. /*
  58. * Allocate skbuffer.
  59. */
  60. skb = __dev_alloc_skb(frame_size + head_size + tail_size, gfp);
  61. if (!skb)
  62. return NULL;
  63. /*
  64. * Make sure we not have a frame with the requested bytes
  65. * available in the head and tail.
  66. */
  67. skb_reserve(skb, head_size);
  68. skb_put(skb, frame_size);
  69. /*
  70. * Populate skbdesc.
  71. */
  72. skbdesc = get_skb_frame_desc(skb);
  73. memset(skbdesc, 0, sizeof(*skbdesc));
  74. skbdesc->entry = entry;
  75. if (test_bit(REQUIRE_DMA, &rt2x00dev->cap_flags)) {
  76. skbdesc->skb_dma = dma_map_single(rt2x00dev->dev,
  77. skb->data,
  78. skb->len,
  79. DMA_FROM_DEVICE);
  80. skbdesc->flags |= SKBDESC_DMA_MAPPED_RX;
  81. }
  82. return skb;
  83. }
  84. void rt2x00queue_map_txskb(struct queue_entry *entry)
  85. {
  86. struct device *dev = entry->queue->rt2x00dev->dev;
  87. struct skb_frame_desc *skbdesc = get_skb_frame_desc(entry->skb);
  88. skbdesc->skb_dma =
  89. dma_map_single(dev, entry->skb->data, entry->skb->len, DMA_TO_DEVICE);
  90. skbdesc->flags |= SKBDESC_DMA_MAPPED_TX;
  91. }
  92. EXPORT_SYMBOL_GPL(rt2x00queue_map_txskb);
  93. void rt2x00queue_unmap_skb(struct queue_entry *entry)
  94. {
  95. struct device *dev = entry->queue->rt2x00dev->dev;
  96. struct skb_frame_desc *skbdesc = get_skb_frame_desc(entry->skb);
  97. if (skbdesc->flags & SKBDESC_DMA_MAPPED_RX) {
  98. dma_unmap_single(dev, skbdesc->skb_dma, entry->skb->len,
  99. DMA_FROM_DEVICE);
  100. skbdesc->flags &= ~SKBDESC_DMA_MAPPED_RX;
  101. } else if (skbdesc->flags & SKBDESC_DMA_MAPPED_TX) {
  102. dma_unmap_single(dev, skbdesc->skb_dma, entry->skb->len,
  103. DMA_TO_DEVICE);
  104. skbdesc->flags &= ~SKBDESC_DMA_MAPPED_TX;
  105. }
  106. }
  107. EXPORT_SYMBOL_GPL(rt2x00queue_unmap_skb);
  108. void rt2x00queue_free_skb(struct queue_entry *entry)
  109. {
  110. if (!entry->skb)
  111. return;
  112. rt2x00queue_unmap_skb(entry);
  113. dev_kfree_skb_any(entry->skb);
  114. entry->skb = NULL;
  115. }
  116. void rt2x00queue_align_frame(struct sk_buff *skb)
  117. {
  118. unsigned int frame_length = skb->len;
  119. unsigned int align = ALIGN_SIZE(skb, 0);
  120. if (!align)
  121. return;
  122. skb_push(skb, align);
  123. memmove(skb->data, skb->data + align, frame_length);
  124. skb_trim(skb, frame_length);
  125. }
  126. void rt2x00queue_insert_l2pad(struct sk_buff *skb, unsigned int header_length)
  127. {
  128. unsigned int payload_length = skb->len - header_length;
  129. unsigned int header_align = ALIGN_SIZE(skb, 0);
  130. unsigned int payload_align = ALIGN_SIZE(skb, header_length);
  131. unsigned int l2pad = payload_length ? L2PAD_SIZE(header_length) : 0;
  132. /*
  133. * Adjust the header alignment if the payload needs to be moved more
  134. * than the header.
  135. */
  136. if (payload_align > header_align)
  137. header_align += 4;
  138. /* There is nothing to do if no alignment is needed */
  139. if (!header_align)
  140. return;
  141. /* Reserve the amount of space needed in front of the frame */
  142. skb_push(skb, header_align);
  143. /*
  144. * Move the header.
  145. */
  146. memmove(skb->data, skb->data + header_align, header_length);
  147. /* Move the payload, if present and if required */
  148. if (payload_length && payload_align)
  149. memmove(skb->data + header_length + l2pad,
  150. skb->data + header_length + l2pad + payload_align,
  151. payload_length);
  152. /* Trim the skb to the correct size */
  153. skb_trim(skb, header_length + l2pad + payload_length);
  154. }
  155. void rt2x00queue_remove_l2pad(struct sk_buff *skb, unsigned int header_length)
  156. {
  157. /*
  158. * L2 padding is only present if the skb contains more than just the
  159. * IEEE 802.11 header.
  160. */
  161. unsigned int l2pad = (skb->len > header_length) ?
  162. L2PAD_SIZE(header_length) : 0;
  163. if (!l2pad)
  164. return;
  165. memmove(skb->data + l2pad, skb->data, header_length);
  166. skb_pull(skb, l2pad);
  167. }
  168. static void rt2x00queue_create_tx_descriptor_seq(struct rt2x00_dev *rt2x00dev,
  169. struct sk_buff *skb,
  170. struct txentry_desc *txdesc)
  171. {
  172. struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb);
  173. struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
  174. struct rt2x00_intf *intf = vif_to_intf(tx_info->control.vif);
  175. if (!(tx_info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ))
  176. return;
  177. __set_bit(ENTRY_TXD_GENERATE_SEQ, &txdesc->flags);
  178. if (!test_bit(REQUIRE_SW_SEQNO, &rt2x00dev->cap_flags)) {
  179. /*
  180. * rt2800 has a H/W (or F/W) bug, device incorrectly increase
  181. * seqno on retransmited data (non-QOS) frames. To workaround
  182. * the problem let's generate seqno in software if QOS is
  183. * disabled.
  184. */
  185. if (test_bit(CONFIG_QOS_DISABLED, &rt2x00dev->flags))
  186. __clear_bit(ENTRY_TXD_GENERATE_SEQ, &txdesc->flags);
  187. else
  188. /* H/W will generate sequence number */
  189. return;
  190. }
  191. /*
  192. * The hardware is not able to insert a sequence number. Assign a
  193. * software generated one here.
  194. *
  195. * This is wrong because beacons are not getting sequence
  196. * numbers assigned properly.
  197. *
  198. * A secondary problem exists for drivers that cannot toggle
  199. * sequence counting per-frame, since those will override the
  200. * sequence counter given by mac80211.
  201. */
  202. spin_lock(&intf->seqlock);
  203. if (test_bit(ENTRY_TXD_FIRST_FRAGMENT, &txdesc->flags))
  204. intf->seqno += 0x10;
  205. hdr->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG);
  206. hdr->seq_ctrl |= cpu_to_le16(intf->seqno);
  207. spin_unlock(&intf->seqlock);
  208. }
  209. static void rt2x00queue_create_tx_descriptor_plcp(struct rt2x00_dev *rt2x00dev,
  210. struct sk_buff *skb,
  211. struct txentry_desc *txdesc,
  212. const struct rt2x00_rate *hwrate)
  213. {
  214. struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb);
  215. struct ieee80211_tx_rate *txrate = &tx_info->control.rates[0];
  216. unsigned int data_length;
  217. unsigned int duration;
  218. unsigned int residual;
  219. /*
  220. * Determine with what IFS priority this frame should be send.
  221. * Set ifs to IFS_SIFS when the this is not the first fragment,
  222. * or this fragment came after RTS/CTS.
  223. */
  224. if (test_bit(ENTRY_TXD_FIRST_FRAGMENT, &txdesc->flags))
  225. txdesc->u.plcp.ifs = IFS_BACKOFF;
  226. else
  227. txdesc->u.plcp.ifs = IFS_SIFS;
  228. /* Data length + CRC + Crypto overhead (IV/EIV/ICV/MIC) */
  229. data_length = skb->len + 4;
  230. data_length += rt2x00crypto_tx_overhead(rt2x00dev, skb);
  231. /*
  232. * PLCP setup
  233. * Length calculation depends on OFDM/CCK rate.
  234. */
  235. txdesc->u.plcp.signal = hwrate->plcp;
  236. txdesc->u.plcp.service = 0x04;
  237. if (hwrate->flags & DEV_RATE_OFDM) {
  238. txdesc->u.plcp.length_high = (data_length >> 6) & 0x3f;
  239. txdesc->u.plcp.length_low = data_length & 0x3f;
  240. } else {
  241. /*
  242. * Convert length to microseconds.
  243. */
  244. residual = GET_DURATION_RES(data_length, hwrate->bitrate);
  245. duration = GET_DURATION(data_length, hwrate->bitrate);
  246. if (residual != 0) {
  247. duration++;
  248. /*
  249. * Check if we need to set the Length Extension
  250. */
  251. if (hwrate->bitrate == 110 && residual <= 30)
  252. txdesc->u.plcp.service |= 0x80;
  253. }
  254. txdesc->u.plcp.length_high = (duration >> 8) & 0xff;
  255. txdesc->u.plcp.length_low = duration & 0xff;
  256. /*
  257. * When preamble is enabled we should set the
  258. * preamble bit for the signal.
  259. */
  260. if (txrate->flags & IEEE80211_TX_RC_USE_SHORT_PREAMBLE)
  261. txdesc->u.plcp.signal |= 0x08;
  262. }
  263. }
  264. static void rt2x00queue_create_tx_descriptor_ht(struct rt2x00_dev *rt2x00dev,
  265. struct sk_buff *skb,
  266. struct txentry_desc *txdesc,
  267. const struct rt2x00_rate *hwrate)
  268. {
  269. struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb);
  270. struct ieee80211_tx_rate *txrate = &tx_info->control.rates[0];
  271. struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
  272. struct rt2x00_sta *sta_priv = NULL;
  273. if (tx_info->control.sta) {
  274. txdesc->u.ht.mpdu_density =
  275. tx_info->control.sta->ht_cap.ampdu_density;
  276. sta_priv = sta_to_rt2x00_sta(tx_info->control.sta);
  277. txdesc->u.ht.wcid = sta_priv->wcid;
  278. }
  279. /*
  280. * If IEEE80211_TX_RC_MCS is set txrate->idx just contains the
  281. * mcs rate to be used
  282. */
  283. if (txrate->flags & IEEE80211_TX_RC_MCS) {
  284. txdesc->u.ht.mcs = txrate->idx;
  285. /*
  286. * MIMO PS should be set to 1 for STA's using dynamic SM PS
  287. * when using more then one tx stream (>MCS7).
  288. */
  289. if (tx_info->control.sta && txdesc->u.ht.mcs > 7 &&
  290. ((tx_info->control.sta->ht_cap.cap &
  291. IEEE80211_HT_CAP_SM_PS) >>
  292. IEEE80211_HT_CAP_SM_PS_SHIFT) ==
  293. WLAN_HT_CAP_SM_PS_DYNAMIC)
  294. __set_bit(ENTRY_TXD_HT_MIMO_PS, &txdesc->flags);
  295. } else {
  296. txdesc->u.ht.mcs = rt2x00_get_rate_mcs(hwrate->mcs);
  297. if (txrate->flags & IEEE80211_TX_RC_USE_SHORT_PREAMBLE)
  298. txdesc->u.ht.mcs |= 0x08;
  299. }
  300. if (test_bit(CONFIG_HT_DISABLED, &rt2x00dev->flags)) {
  301. if (!(tx_info->flags & IEEE80211_TX_CTL_FIRST_FRAGMENT))
  302. txdesc->u.ht.txop = TXOP_SIFS;
  303. else
  304. txdesc->u.ht.txop = TXOP_BACKOFF;
  305. /* Left zero on all other settings. */
  306. return;
  307. }
  308. txdesc->u.ht.ba_size = 7; /* FIXME: What value is needed? */
  309. /*
  310. * Only one STBC stream is supported for now.
  311. */
  312. if (tx_info->flags & IEEE80211_TX_CTL_STBC)
  313. txdesc->u.ht.stbc = 1;
  314. /*
  315. * This frame is eligible for an AMPDU, however, don't aggregate
  316. * frames that are intended to probe a specific tx rate.
  317. */
  318. if (tx_info->flags & IEEE80211_TX_CTL_AMPDU &&
  319. !(tx_info->flags & IEEE80211_TX_CTL_RATE_CTRL_PROBE))
  320. __set_bit(ENTRY_TXD_HT_AMPDU, &txdesc->flags);
  321. /*
  322. * Set 40Mhz mode if necessary (for legacy rates this will
  323. * duplicate the frame to both channels).
  324. */
  325. if (txrate->flags & IEEE80211_TX_RC_40_MHZ_WIDTH ||
  326. txrate->flags & IEEE80211_TX_RC_DUP_DATA)
  327. __set_bit(ENTRY_TXD_HT_BW_40, &txdesc->flags);
  328. if (txrate->flags & IEEE80211_TX_RC_SHORT_GI)
  329. __set_bit(ENTRY_TXD_HT_SHORT_GI, &txdesc->flags);
  330. /*
  331. * Determine IFS values
  332. * - Use TXOP_BACKOFF for management frames except beacons
  333. * - Use TXOP_SIFS for fragment bursts
  334. * - Use TXOP_HTTXOP for everything else
  335. *
  336. * Note: rt2800 devices won't use CTS protection (if used)
  337. * for frames not transmitted with TXOP_HTTXOP
  338. */
  339. if (ieee80211_is_mgmt(hdr->frame_control) &&
  340. !ieee80211_is_beacon(hdr->frame_control))
  341. txdesc->u.ht.txop = TXOP_BACKOFF;
  342. else if (!(tx_info->flags & IEEE80211_TX_CTL_FIRST_FRAGMENT))
  343. txdesc->u.ht.txop = TXOP_SIFS;
  344. else
  345. txdesc->u.ht.txop = TXOP_HTTXOP;
  346. }
  347. static void rt2x00queue_create_tx_descriptor(struct rt2x00_dev *rt2x00dev,
  348. struct sk_buff *skb,
  349. struct txentry_desc *txdesc)
  350. {
  351. struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb);
  352. struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
  353. struct ieee80211_tx_rate *txrate = &tx_info->control.rates[0];
  354. struct ieee80211_rate *rate;
  355. const struct rt2x00_rate *hwrate = NULL;
  356. memset(txdesc, 0, sizeof(*txdesc));
  357. /*
  358. * Header and frame information.
  359. */
  360. txdesc->length = skb->len;
  361. txdesc->header_length = ieee80211_get_hdrlen_from_skb(skb);
  362. /*
  363. * Check whether this frame is to be acked.
  364. */
  365. if (!(tx_info->flags & IEEE80211_TX_CTL_NO_ACK))
  366. __set_bit(ENTRY_TXD_ACK, &txdesc->flags);
  367. /*
  368. * Check if this is a RTS/CTS frame
  369. */
  370. if (ieee80211_is_rts(hdr->frame_control) ||
  371. ieee80211_is_cts(hdr->frame_control)) {
  372. __set_bit(ENTRY_TXD_BURST, &txdesc->flags);
  373. if (ieee80211_is_rts(hdr->frame_control))
  374. __set_bit(ENTRY_TXD_RTS_FRAME, &txdesc->flags);
  375. else
  376. __set_bit(ENTRY_TXD_CTS_FRAME, &txdesc->flags);
  377. if (tx_info->control.rts_cts_rate_idx >= 0)
  378. rate =
  379. ieee80211_get_rts_cts_rate(rt2x00dev->hw, tx_info);
  380. }
  381. /*
  382. * Determine retry information.
  383. */
  384. txdesc->retry_limit = tx_info->control.rates[0].count - 1;
  385. if (txdesc->retry_limit >= rt2x00dev->long_retry)
  386. __set_bit(ENTRY_TXD_RETRY_MODE, &txdesc->flags);
  387. /*
  388. * Check if more fragments are pending
  389. */
  390. if (ieee80211_has_morefrags(hdr->frame_control)) {
  391. __set_bit(ENTRY_TXD_BURST, &txdesc->flags);
  392. __set_bit(ENTRY_TXD_MORE_FRAG, &txdesc->flags);
  393. }
  394. /*
  395. * Check if more frames (!= fragments) are pending
  396. */
  397. if (tx_info->flags & IEEE80211_TX_CTL_MORE_FRAMES)
  398. __set_bit(ENTRY_TXD_BURST, &txdesc->flags);
  399. /*
  400. * Beacons and probe responses require the tsf timestamp
  401. * to be inserted into the frame.
  402. */
  403. if (ieee80211_is_beacon(hdr->frame_control) ||
  404. ieee80211_is_probe_resp(hdr->frame_control))
  405. __set_bit(ENTRY_TXD_REQ_TIMESTAMP, &txdesc->flags);
  406. if ((tx_info->flags & IEEE80211_TX_CTL_FIRST_FRAGMENT) &&
  407. !test_bit(ENTRY_TXD_RTS_FRAME, &txdesc->flags))
  408. __set_bit(ENTRY_TXD_FIRST_FRAGMENT, &txdesc->flags);
  409. /*
  410. * Determine rate modulation.
  411. */
  412. if (txrate->flags & IEEE80211_TX_RC_GREEN_FIELD)
  413. txdesc->rate_mode = RATE_MODE_HT_GREENFIELD;
  414. else if (txrate->flags & IEEE80211_TX_RC_MCS)
  415. txdesc->rate_mode = RATE_MODE_HT_MIX;
  416. else {
  417. rate = ieee80211_get_tx_rate(rt2x00dev->hw, tx_info);
  418. hwrate = rt2x00_get_rate(rate->hw_value);
  419. if (hwrate->flags & DEV_RATE_OFDM)
  420. txdesc->rate_mode = RATE_MODE_OFDM;
  421. else
  422. txdesc->rate_mode = RATE_MODE_CCK;
  423. }
  424. /*
  425. * Apply TX descriptor handling by components
  426. */
  427. rt2x00crypto_create_tx_descriptor(rt2x00dev, skb, txdesc);
  428. rt2x00queue_create_tx_descriptor_seq(rt2x00dev, skb, txdesc);
  429. if (test_bit(REQUIRE_HT_TX_DESC, &rt2x00dev->cap_flags))
  430. rt2x00queue_create_tx_descriptor_ht(rt2x00dev, skb, txdesc,
  431. hwrate);
  432. else
  433. rt2x00queue_create_tx_descriptor_plcp(rt2x00dev, skb, txdesc,
  434. hwrate);
  435. }
  436. static int rt2x00queue_write_tx_data(struct queue_entry *entry,
  437. struct txentry_desc *txdesc)
  438. {
  439. struct rt2x00_dev *rt2x00dev = entry->queue->rt2x00dev;
  440. /*
  441. * This should not happen, we already checked the entry
  442. * was ours. When the hardware disagrees there has been
  443. * a queue corruption!
  444. */
  445. if (unlikely(rt2x00dev->ops->lib->get_entry_state &&
  446. rt2x00dev->ops->lib->get_entry_state(entry))) {
  447. ERROR(rt2x00dev,
  448. "Corrupt queue %d, accessing entry which is not ours.\n"
  449. "Please file bug report to %s.\n",
  450. entry->queue->qid, DRV_PROJECT);
  451. return -EINVAL;
  452. }
  453. /*
  454. * Add the requested extra tx headroom in front of the skb.
  455. */
  456. skb_push(entry->skb, rt2x00dev->ops->extra_tx_headroom);
  457. memset(entry->skb->data, 0, rt2x00dev->ops->extra_tx_headroom);
  458. /*
  459. * Call the driver's write_tx_data function, if it exists.
  460. */
  461. if (rt2x00dev->ops->lib->write_tx_data)
  462. rt2x00dev->ops->lib->write_tx_data(entry, txdesc);
  463. /*
  464. * Map the skb to DMA.
  465. */
  466. if (test_bit(REQUIRE_DMA, &rt2x00dev->cap_flags))
  467. rt2x00queue_map_txskb(entry);
  468. return 0;
  469. }
  470. static void rt2x00queue_write_tx_descriptor(struct queue_entry *entry,
  471. struct txentry_desc *txdesc)
  472. {
  473. struct data_queue *queue = entry->queue;
  474. queue->rt2x00dev->ops->lib->write_tx_desc(entry, txdesc);
  475. /*
  476. * All processing on the frame has been completed, this means
  477. * it is now ready to be dumped to userspace through debugfs.
  478. */
  479. rt2x00debug_dump_frame(queue->rt2x00dev, DUMP_FRAME_TX, entry->skb);
  480. }
  481. static void rt2x00queue_kick_tx_queue(struct data_queue *queue,
  482. struct txentry_desc *txdesc)
  483. {
  484. /*
  485. * Check if we need to kick the queue, there are however a few rules
  486. * 1) Don't kick unless this is the last in frame in a burst.
  487. * When the burst flag is set, this frame is always followed
  488. * by another frame which in some way are related to eachother.
  489. * This is true for fragments, RTS or CTS-to-self frames.
  490. * 2) Rule 1 can be broken when the available entries
  491. * in the queue are less then a certain threshold.
  492. */
  493. if (rt2x00queue_threshold(queue) ||
  494. !test_bit(ENTRY_TXD_BURST, &txdesc->flags))
  495. queue->rt2x00dev->ops->lib->kick_queue(queue);
  496. }
  497. int rt2x00queue_write_tx_frame(struct data_queue *queue, struct sk_buff *skb,
  498. bool local)
  499. {
  500. struct ieee80211_tx_info *tx_info;
  501. struct queue_entry *entry;
  502. struct txentry_desc txdesc;
  503. struct skb_frame_desc *skbdesc;
  504. u8 rate_idx, rate_flags;
  505. int ret = 0;
  506. /*
  507. * Copy all TX descriptor information into txdesc,
  508. * after that we are free to use the skb->cb array
  509. * for our information.
  510. */
  511. rt2x00queue_create_tx_descriptor(queue->rt2x00dev, skb, &txdesc);
  512. /*
  513. * All information is retrieved from the skb->cb array,
  514. * now we should claim ownership of the driver part of that
  515. * array, preserving the bitrate index and flags.
  516. */
  517. tx_info = IEEE80211_SKB_CB(skb);
  518. rate_idx = tx_info->control.rates[0].idx;
  519. rate_flags = tx_info->control.rates[0].flags;
  520. skbdesc = get_skb_frame_desc(skb);
  521. memset(skbdesc, 0, sizeof(*skbdesc));
  522. skbdesc->tx_rate_idx = rate_idx;
  523. skbdesc->tx_rate_flags = rate_flags;
  524. if (local)
  525. skbdesc->flags |= SKBDESC_NOT_MAC80211;
  526. /*
  527. * When hardware encryption is supported, and this frame
  528. * is to be encrypted, we should strip the IV/EIV data from
  529. * the frame so we can provide it to the driver separately.
  530. */
  531. if (test_bit(ENTRY_TXD_ENCRYPT, &txdesc.flags) &&
  532. !test_bit(ENTRY_TXD_ENCRYPT_IV, &txdesc.flags)) {
  533. if (test_bit(REQUIRE_COPY_IV, &queue->rt2x00dev->cap_flags))
  534. rt2x00crypto_tx_copy_iv(skb, &txdesc);
  535. else
  536. rt2x00crypto_tx_remove_iv(skb, &txdesc);
  537. }
  538. /*
  539. * When DMA allocation is required we should guarantee to the
  540. * driver that the DMA is aligned to a 4-byte boundary.
  541. * However some drivers require L2 padding to pad the payload
  542. * rather then the header. This could be a requirement for
  543. * PCI and USB devices, while header alignment only is valid
  544. * for PCI devices.
  545. */
  546. if (test_bit(REQUIRE_L2PAD, &queue->rt2x00dev->cap_flags))
  547. rt2x00queue_insert_l2pad(skb, txdesc.header_length);
  548. else if (test_bit(REQUIRE_DMA, &queue->rt2x00dev->cap_flags))
  549. rt2x00queue_align_frame(skb);
  550. /*
  551. * That function must be called with bh disabled.
  552. */
  553. spin_lock(&queue->tx_lock);
  554. if (unlikely(rt2x00queue_full(queue))) {
  555. ERROR(queue->rt2x00dev,
  556. "Dropping frame due to full tx queue %d.\n", queue->qid);
  557. ret = -ENOBUFS;
  558. goto out;
  559. }
  560. entry = rt2x00queue_get_entry(queue, Q_INDEX);
  561. if (unlikely(test_and_set_bit(ENTRY_OWNER_DEVICE_DATA,
  562. &entry->flags))) {
  563. ERROR(queue->rt2x00dev,
  564. "Arrived at non-free entry in the non-full queue %d.\n"
  565. "Please file bug report to %s.\n",
  566. queue->qid, DRV_PROJECT);
  567. ret = -EINVAL;
  568. goto out;
  569. }
  570. skbdesc->entry = entry;
  571. entry->skb = skb;
  572. /*
  573. * It could be possible that the queue was corrupted and this
  574. * call failed. Since we always return NETDEV_TX_OK to mac80211,
  575. * this frame will simply be dropped.
  576. */
  577. if (unlikely(rt2x00queue_write_tx_data(entry, &txdesc))) {
  578. clear_bit(ENTRY_OWNER_DEVICE_DATA, &entry->flags);
  579. entry->skb = NULL;
  580. ret = -EIO;
  581. goto out;
  582. }
  583. set_bit(ENTRY_DATA_PENDING, &entry->flags);
  584. rt2x00queue_index_inc(entry, Q_INDEX);
  585. rt2x00queue_write_tx_descriptor(entry, &txdesc);
  586. rt2x00queue_kick_tx_queue(queue, &txdesc);
  587. out:
  588. spin_unlock(&queue->tx_lock);
  589. return ret;
  590. }
  591. int rt2x00queue_clear_beacon(struct rt2x00_dev *rt2x00dev,
  592. struct ieee80211_vif *vif)
  593. {
  594. struct rt2x00_intf *intf = vif_to_intf(vif);
  595. if (unlikely(!intf->beacon))
  596. return -ENOBUFS;
  597. mutex_lock(&intf->beacon_skb_mutex);
  598. /*
  599. * Clean up the beacon skb.
  600. */
  601. rt2x00queue_free_skb(intf->beacon);
  602. /*
  603. * Clear beacon (single bssid devices don't need to clear the beacon
  604. * since the beacon queue will get stopped anyway).
  605. */
  606. if (rt2x00dev->ops->lib->clear_beacon)
  607. rt2x00dev->ops->lib->clear_beacon(intf->beacon);
  608. mutex_unlock(&intf->beacon_skb_mutex);
  609. return 0;
  610. }
  611. int rt2x00queue_update_beacon_locked(struct rt2x00_dev *rt2x00dev,
  612. struct ieee80211_vif *vif)
  613. {
  614. struct rt2x00_intf *intf = vif_to_intf(vif);
  615. struct skb_frame_desc *skbdesc;
  616. struct txentry_desc txdesc;
  617. if (unlikely(!intf->beacon))
  618. return -ENOBUFS;
  619. /*
  620. * Clean up the beacon skb.
  621. */
  622. rt2x00queue_free_skb(intf->beacon);
  623. intf->beacon->skb = ieee80211_beacon_get(rt2x00dev->hw, vif);
  624. if (!intf->beacon->skb)
  625. return -ENOMEM;
  626. /*
  627. * Copy all TX descriptor information into txdesc,
  628. * after that we are free to use the skb->cb array
  629. * for our information.
  630. */
  631. rt2x00queue_create_tx_descriptor(rt2x00dev, intf->beacon->skb, &txdesc);
  632. /*
  633. * Fill in skb descriptor
  634. */
  635. skbdesc = get_skb_frame_desc(intf->beacon->skb);
  636. memset(skbdesc, 0, sizeof(*skbdesc));
  637. skbdesc->entry = intf->beacon;
  638. /*
  639. * Send beacon to hardware.
  640. */
  641. rt2x00dev->ops->lib->write_beacon(intf->beacon, &txdesc);
  642. return 0;
  643. }
  644. int rt2x00queue_update_beacon(struct rt2x00_dev *rt2x00dev,
  645. struct ieee80211_vif *vif)
  646. {
  647. struct rt2x00_intf *intf = vif_to_intf(vif);
  648. int ret;
  649. mutex_lock(&intf->beacon_skb_mutex);
  650. ret = rt2x00queue_update_beacon_locked(rt2x00dev, vif);
  651. mutex_unlock(&intf->beacon_skb_mutex);
  652. return ret;
  653. }
  654. bool rt2x00queue_for_each_entry(struct data_queue *queue,
  655. enum queue_index start,
  656. enum queue_index end,
  657. void *data,
  658. bool (*fn)(struct queue_entry *entry,
  659. void *data))
  660. {
  661. unsigned long irqflags;
  662. unsigned int index_start;
  663. unsigned int index_end;
  664. unsigned int i;
  665. if (unlikely(start >= Q_INDEX_MAX || end >= Q_INDEX_MAX)) {
  666. ERROR(queue->rt2x00dev,
  667. "Entry requested from invalid index range (%d - %d)\n",
  668. start, end);
  669. return true;
  670. }
  671. /*
  672. * Only protect the range we are going to loop over,
  673. * if during our loop a extra entry is set to pending
  674. * it should not be kicked during this run, since it
  675. * is part of another TX operation.
  676. */
  677. spin_lock_irqsave(&queue->index_lock, irqflags);
  678. index_start = queue->index[start];
  679. index_end = queue->index[end];
  680. spin_unlock_irqrestore(&queue->index_lock, irqflags);
  681. /*
  682. * Start from the TX done pointer, this guarantees that we will
  683. * send out all frames in the correct order.
  684. */
  685. if (index_start < index_end) {
  686. for (i = index_start; i < index_end; i++) {
  687. if (fn(&queue->entries[i], data))
  688. return true;
  689. }
  690. } else {
  691. for (i = index_start; i < queue->limit; i++) {
  692. if (fn(&queue->entries[i], data))
  693. return true;
  694. }
  695. for (i = 0; i < index_end; i++) {
  696. if (fn(&queue->entries[i], data))
  697. return true;
  698. }
  699. }
  700. return false;
  701. }
  702. EXPORT_SYMBOL_GPL(rt2x00queue_for_each_entry);
  703. struct queue_entry *rt2x00queue_get_entry(struct data_queue *queue,
  704. enum queue_index index)
  705. {
  706. struct queue_entry *entry;
  707. unsigned long irqflags;
  708. if (unlikely(index >= Q_INDEX_MAX)) {
  709. ERROR(queue->rt2x00dev,
  710. "Entry requested from invalid index type (%d)\n", index);
  711. return NULL;
  712. }
  713. spin_lock_irqsave(&queue->index_lock, irqflags);
  714. entry = &queue->entries[queue->index[index]];
  715. spin_unlock_irqrestore(&queue->index_lock, irqflags);
  716. return entry;
  717. }
  718. EXPORT_SYMBOL_GPL(rt2x00queue_get_entry);
  719. void rt2x00queue_index_inc(struct queue_entry *entry, enum queue_index index)
  720. {
  721. struct data_queue *queue = entry->queue;
  722. unsigned long irqflags;
  723. if (unlikely(index >= Q_INDEX_MAX)) {
  724. ERROR(queue->rt2x00dev,
  725. "Index change on invalid index type (%d)\n", index);
  726. return;
  727. }
  728. spin_lock_irqsave(&queue->index_lock, irqflags);
  729. queue->index[index]++;
  730. if (queue->index[index] >= queue->limit)
  731. queue->index[index] = 0;
  732. entry->last_action = jiffies;
  733. if (index == Q_INDEX) {
  734. queue->length++;
  735. } else if (index == Q_INDEX_DONE) {
  736. queue->length--;
  737. queue->count++;
  738. }
  739. spin_unlock_irqrestore(&queue->index_lock, irqflags);
  740. }
  741. void rt2x00queue_pause_queue(struct data_queue *queue)
  742. {
  743. if (!test_bit(DEVICE_STATE_PRESENT, &queue->rt2x00dev->flags) ||
  744. !test_bit(QUEUE_STARTED, &queue->flags) ||
  745. test_and_set_bit(QUEUE_PAUSED, &queue->flags))
  746. return;
  747. switch (queue->qid) {
  748. case QID_AC_VO:
  749. case QID_AC_VI:
  750. case QID_AC_BE:
  751. case QID_AC_BK:
  752. /*
  753. * For TX queues, we have to disable the queue
  754. * inside mac80211.
  755. */
  756. ieee80211_stop_queue(queue->rt2x00dev->hw, queue->qid);
  757. break;
  758. default:
  759. break;
  760. }
  761. }
  762. EXPORT_SYMBOL_GPL(rt2x00queue_pause_queue);
  763. void rt2x00queue_unpause_queue(struct data_queue *queue)
  764. {
  765. if (!test_bit(DEVICE_STATE_PRESENT, &queue->rt2x00dev->flags) ||
  766. !test_bit(QUEUE_STARTED, &queue->flags) ||
  767. !test_and_clear_bit(QUEUE_PAUSED, &queue->flags))
  768. return;
  769. switch (queue->qid) {
  770. case QID_AC_VO:
  771. case QID_AC_VI:
  772. case QID_AC_BE:
  773. case QID_AC_BK:
  774. /*
  775. * For TX queues, we have to enable the queue
  776. * inside mac80211.
  777. */
  778. ieee80211_wake_queue(queue->rt2x00dev->hw, queue->qid);
  779. break;
  780. case QID_RX:
  781. /*
  782. * For RX we need to kick the queue now in order to
  783. * receive frames.
  784. */
  785. queue->rt2x00dev->ops->lib->kick_queue(queue);
  786. default:
  787. break;
  788. }
  789. }
  790. EXPORT_SYMBOL_GPL(rt2x00queue_unpause_queue);
  791. void rt2x00queue_start_queue(struct data_queue *queue)
  792. {
  793. mutex_lock(&queue->status_lock);
  794. if (!test_bit(DEVICE_STATE_PRESENT, &queue->rt2x00dev->flags) ||
  795. test_and_set_bit(QUEUE_STARTED, &queue->flags)) {
  796. mutex_unlock(&queue->status_lock);
  797. return;
  798. }
  799. set_bit(QUEUE_PAUSED, &queue->flags);
  800. queue->rt2x00dev->ops->lib->start_queue(queue);
  801. rt2x00queue_unpause_queue(queue);
  802. mutex_unlock(&queue->status_lock);
  803. }
  804. EXPORT_SYMBOL_GPL(rt2x00queue_start_queue);
  805. void rt2x00queue_stop_queue(struct data_queue *queue)
  806. {
  807. mutex_lock(&queue->status_lock);
  808. if (!test_and_clear_bit(QUEUE_STARTED, &queue->flags)) {
  809. mutex_unlock(&queue->status_lock);
  810. return;
  811. }
  812. rt2x00queue_pause_queue(queue);
  813. queue->rt2x00dev->ops->lib->stop_queue(queue);
  814. mutex_unlock(&queue->status_lock);
  815. }
  816. EXPORT_SYMBOL_GPL(rt2x00queue_stop_queue);
  817. void rt2x00queue_flush_queue(struct data_queue *queue, bool drop)
  818. {
  819. bool started;
  820. bool tx_queue =
  821. (queue->qid == QID_AC_VO) ||
  822. (queue->qid == QID_AC_VI) ||
  823. (queue->qid == QID_AC_BE) ||
  824. (queue->qid == QID_AC_BK);
  825. mutex_lock(&queue->status_lock);
  826. /*
  827. * If the queue has been started, we must stop it temporarily
  828. * to prevent any new frames to be queued on the device. If
  829. * we are not dropping the pending frames, the queue must
  830. * only be stopped in the software and not the hardware,
  831. * otherwise the queue will never become empty on its own.
  832. */
  833. started = test_bit(QUEUE_STARTED, &queue->flags);
  834. if (started) {
  835. /*
  836. * Pause the queue
  837. */
  838. rt2x00queue_pause_queue(queue);
  839. /*
  840. * If we are not supposed to drop any pending
  841. * frames, this means we must force a start (=kick)
  842. * to the queue to make sure the hardware will
  843. * start transmitting.
  844. */
  845. if (!drop && tx_queue)
  846. queue->rt2x00dev->ops->lib->kick_queue(queue);
  847. }
  848. /*
  849. * Check if driver supports flushing, if that is the case we can
  850. * defer the flushing to the driver. Otherwise we must use the
  851. * alternative which just waits for the queue to become empty.
  852. */
  853. if (likely(queue->rt2x00dev->ops->lib->flush_queue))
  854. queue->rt2x00dev->ops->lib->flush_queue(queue, drop);
  855. /*
  856. * The queue flush has failed...
  857. */
  858. if (unlikely(!rt2x00queue_empty(queue)))
  859. WARNING(queue->rt2x00dev, "Queue %d failed to flush\n", queue->qid);
  860. /*
  861. * Restore the queue to the previous status
  862. */
  863. if (started)
  864. rt2x00queue_unpause_queue(queue);
  865. mutex_unlock(&queue->status_lock);
  866. }
  867. EXPORT_SYMBOL_GPL(rt2x00queue_flush_queue);
  868. void rt2x00queue_start_queues(struct rt2x00_dev *rt2x00dev)
  869. {
  870. struct data_queue *queue;
  871. /*
  872. * rt2x00queue_start_queue will call ieee80211_wake_queue
  873. * for each queue after is has been properly initialized.
  874. */
  875. tx_queue_for_each(rt2x00dev, queue)
  876. rt2x00queue_start_queue(queue);
  877. rt2x00queue_start_queue(rt2x00dev->rx);
  878. }
  879. EXPORT_SYMBOL_GPL(rt2x00queue_start_queues);
  880. void rt2x00queue_stop_queues(struct rt2x00_dev *rt2x00dev)
  881. {
  882. struct data_queue *queue;
  883. /*
  884. * rt2x00queue_stop_queue will call ieee80211_stop_queue
  885. * as well, but we are completely shutting doing everything
  886. * now, so it is much safer to stop all TX queues at once,
  887. * and use rt2x00queue_stop_queue for cleaning up.
  888. */
  889. ieee80211_stop_queues(rt2x00dev->hw);
  890. tx_queue_for_each(rt2x00dev, queue)
  891. rt2x00queue_stop_queue(queue);
  892. rt2x00queue_stop_queue(rt2x00dev->rx);
  893. }
  894. EXPORT_SYMBOL_GPL(rt2x00queue_stop_queues);
  895. void rt2x00queue_flush_queues(struct rt2x00_dev *rt2x00dev, bool drop)
  896. {
  897. struct data_queue *queue;
  898. tx_queue_for_each(rt2x00dev, queue)
  899. rt2x00queue_flush_queue(queue, drop);
  900. rt2x00queue_flush_queue(rt2x00dev->rx, drop);
  901. }
  902. EXPORT_SYMBOL_GPL(rt2x00queue_flush_queues);
  903. static void rt2x00queue_reset(struct data_queue *queue)
  904. {
  905. unsigned long irqflags;
  906. unsigned int i;
  907. spin_lock_irqsave(&queue->index_lock, irqflags);
  908. queue->count = 0;
  909. queue->length = 0;
  910. for (i = 0; i < Q_INDEX_MAX; i++)
  911. queue->index[i] = 0;
  912. spin_unlock_irqrestore(&queue->index_lock, irqflags);
  913. }
  914. void rt2x00queue_init_queues(struct rt2x00_dev *rt2x00dev)
  915. {
  916. struct data_queue *queue;
  917. unsigned int i;
  918. queue_for_each(rt2x00dev, queue) {
  919. rt2x00queue_reset(queue);
  920. for (i = 0; i < queue->limit; i++)
  921. rt2x00dev->ops->lib->clear_entry(&queue->entries[i]);
  922. }
  923. }
  924. static int rt2x00queue_alloc_entries(struct data_queue *queue,
  925. const struct data_queue_desc *qdesc)
  926. {
  927. struct queue_entry *entries;
  928. unsigned int entry_size;
  929. unsigned int i;
  930. rt2x00queue_reset(queue);
  931. queue->limit = qdesc->entry_num;
  932. queue->threshold = DIV_ROUND_UP(qdesc->entry_num, 10);
  933. queue->data_size = qdesc->data_size;
  934. queue->desc_size = qdesc->desc_size;
  935. /*
  936. * Allocate all queue entries.
  937. */
  938. entry_size = sizeof(*entries) + qdesc->priv_size;
  939. entries = kcalloc(queue->limit, entry_size, GFP_KERNEL);
  940. if (!entries)
  941. return -ENOMEM;
  942. #define QUEUE_ENTRY_PRIV_OFFSET(__base, __index, __limit, __esize, __psize) \
  943. (((char *)(__base)) + ((__limit) * (__esize)) + \
  944. ((__index) * (__psize)))
  945. for (i = 0; i < queue->limit; i++) {
  946. entries[i].flags = 0;
  947. entries[i].queue = queue;
  948. entries[i].skb = NULL;
  949. entries[i].entry_idx = i;
  950. entries[i].priv_data =
  951. QUEUE_ENTRY_PRIV_OFFSET(entries, i, queue->limit,
  952. sizeof(*entries), qdesc->priv_size);
  953. }
  954. #undef QUEUE_ENTRY_PRIV_OFFSET
  955. queue->entries = entries;
  956. return 0;
  957. }
  958. static void rt2x00queue_free_skbs(struct data_queue *queue)
  959. {
  960. unsigned int i;
  961. if (!queue->entries)
  962. return;
  963. for (i = 0; i < queue->limit; i++) {
  964. rt2x00queue_free_skb(&queue->entries[i]);
  965. }
  966. }
  967. static int rt2x00queue_alloc_rxskbs(struct data_queue *queue)
  968. {
  969. unsigned int i;
  970. struct sk_buff *skb;
  971. for (i = 0; i < queue->limit; i++) {
  972. skb = rt2x00queue_alloc_rxskb(&queue->entries[i], GFP_KERNEL);
  973. if (!skb)
  974. return -ENOMEM;
  975. queue->entries[i].skb = skb;
  976. }
  977. return 0;
  978. }
  979. int rt2x00queue_initialize(struct rt2x00_dev *rt2x00dev)
  980. {
  981. struct data_queue *queue;
  982. int status;
  983. status = rt2x00queue_alloc_entries(rt2x00dev->rx, rt2x00dev->ops->rx);
  984. if (status)
  985. goto exit;
  986. tx_queue_for_each(rt2x00dev, queue) {
  987. status = rt2x00queue_alloc_entries(queue, rt2x00dev->ops->tx);
  988. if (status)
  989. goto exit;
  990. }
  991. status = rt2x00queue_alloc_entries(rt2x00dev->bcn, rt2x00dev->ops->bcn);
  992. if (status)
  993. goto exit;
  994. if (test_bit(REQUIRE_ATIM_QUEUE, &rt2x00dev->cap_flags)) {
  995. status = rt2x00queue_alloc_entries(rt2x00dev->atim,
  996. rt2x00dev->ops->atim);
  997. if (status)
  998. goto exit;
  999. }
  1000. status = rt2x00queue_alloc_rxskbs(rt2x00dev->rx);
  1001. if (status)
  1002. goto exit;
  1003. return 0;
  1004. exit:
  1005. ERROR(rt2x00dev, "Queue entries allocation failed.\n");
  1006. rt2x00queue_uninitialize(rt2x00dev);
  1007. return status;
  1008. }
  1009. void rt2x00queue_uninitialize(struct rt2x00_dev *rt2x00dev)
  1010. {
  1011. struct data_queue *queue;
  1012. rt2x00queue_free_skbs(rt2x00dev->rx);
  1013. queue_for_each(rt2x00dev, queue) {
  1014. kfree(queue->entries);
  1015. queue->entries = NULL;
  1016. }
  1017. }
  1018. static void rt2x00queue_init(struct rt2x00_dev *rt2x00dev,
  1019. struct data_queue *queue, enum data_queue_qid qid)
  1020. {
  1021. mutex_init(&queue->status_lock);
  1022. spin_lock_init(&queue->tx_lock);
  1023. spin_lock_init(&queue->index_lock);
  1024. queue->rt2x00dev = rt2x00dev;
  1025. queue->qid = qid;
  1026. queue->txop = 0;
  1027. queue->aifs = 2;
  1028. queue->cw_min = 5;
  1029. queue->cw_max = 10;
  1030. }
  1031. int rt2x00queue_allocate(struct rt2x00_dev *rt2x00dev)
  1032. {
  1033. struct data_queue *queue;
  1034. enum data_queue_qid qid;
  1035. unsigned int req_atim =
  1036. !!test_bit(REQUIRE_ATIM_QUEUE, &rt2x00dev->cap_flags);
  1037. /*
  1038. * We need the following queues:
  1039. * RX: 1
  1040. * TX: ops->tx_queues
  1041. * Beacon: 1
  1042. * Atim: 1 (if required)
  1043. */
  1044. rt2x00dev->data_queues = 2 + rt2x00dev->ops->tx_queues + req_atim;
  1045. queue = kcalloc(rt2x00dev->data_queues, sizeof(*queue), GFP_KERNEL);
  1046. if (!queue) {
  1047. ERROR(rt2x00dev, "Queue allocation failed.\n");
  1048. return -ENOMEM;
  1049. }
  1050. /*
  1051. * Initialize pointers
  1052. */
  1053. rt2x00dev->rx = queue;
  1054. rt2x00dev->tx = &queue[1];
  1055. rt2x00dev->bcn = &queue[1 + rt2x00dev->ops->tx_queues];
  1056. rt2x00dev->atim = req_atim ? &queue[2 + rt2x00dev->ops->tx_queues] : NULL;
  1057. /*
  1058. * Initialize queue parameters.
  1059. * RX: qid = QID_RX
  1060. * TX: qid = QID_AC_VO + index
  1061. * TX: cw_min: 2^5 = 32.
  1062. * TX: cw_max: 2^10 = 1024.
  1063. * BCN: qid = QID_BEACON
  1064. * ATIM: qid = QID_ATIM
  1065. */
  1066. rt2x00queue_init(rt2x00dev, rt2x00dev->rx, QID_RX);
  1067. qid = QID_AC_VO;
  1068. tx_queue_for_each(rt2x00dev, queue)
  1069. rt2x00queue_init(rt2x00dev, queue, qid++);
  1070. rt2x00queue_init(rt2x00dev, rt2x00dev->bcn, QID_BEACON);
  1071. if (req_atim)
  1072. rt2x00queue_init(rt2x00dev, rt2x00dev->atim, QID_ATIM);
  1073. return 0;
  1074. }
  1075. void rt2x00queue_free(struct rt2x00_dev *rt2x00dev)
  1076. {
  1077. kfree(rt2x00dev->rx);
  1078. rt2x00dev->rx = NULL;
  1079. rt2x00dev->tx = NULL;
  1080. rt2x00dev->bcn = NULL;
  1081. }