ani.h 4.4 KB

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  1. /*
  2. * Copyright (c) 2008-2011 Atheros Communications Inc.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for any
  5. * purpose with or without fee is hereby granted, provided that the above
  6. * copyright notice and this permission notice appear in all copies.
  7. *
  8. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  9. * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10. * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  11. * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12. * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  13. * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  14. * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15. */
  16. #ifndef ANI_H
  17. #define ANI_H
  18. #define HAL_PROCESS_ANI 0x00000001
  19. #define DO_ANI(ah) (((ah)->proc_phyerr & HAL_PROCESS_ANI) && ah->curchan)
  20. #define BEACON_RSSI(ahp) (ahp->stats.avgbrssi)
  21. /* units are errors per second */
  22. #define ATH9K_ANI_OFDM_TRIG_HIGH_OLD 500
  23. #define ATH9K_ANI_OFDM_TRIG_HIGH_NEW 3500
  24. #define ATH9K_ANI_OFDM_TRIG_HIGH_BELOW_INI 1000
  25. /* units are errors per second */
  26. #define ATH9K_ANI_OFDM_TRIG_LOW_OLD 200
  27. #define ATH9K_ANI_OFDM_TRIG_LOW_NEW 400
  28. #define ATH9K_ANI_OFDM_TRIG_LOW_ABOVE_INI 900
  29. /* units are errors per second */
  30. #define ATH9K_ANI_CCK_TRIG_HIGH_OLD 200
  31. #define ATH9K_ANI_CCK_TRIG_HIGH_NEW 600
  32. /* units are errors per second */
  33. #define ATH9K_ANI_CCK_TRIG_LOW_OLD 100
  34. #define ATH9K_ANI_CCK_TRIG_LOW_NEW 300
  35. #define ATH9K_ANI_NOISE_IMMUNE_LVL 4
  36. #define ATH9K_ANI_USE_OFDM_WEAK_SIG true
  37. #define ATH9K_ANI_CCK_WEAK_SIG_THR false
  38. #define ATH9K_ANI_SPUR_IMMUNE_LVL_OLD 7
  39. #define ATH9K_ANI_SPUR_IMMUNE_LVL_NEW 3
  40. #define ATH9K_ANI_FIRSTEP_LVL_OLD 0
  41. #define ATH9K_ANI_FIRSTEP_LVL_NEW 2
  42. #define ATH9K_ANI_RSSI_THR_HIGH 40
  43. #define ATH9K_ANI_RSSI_THR_LOW 7
  44. #define ATH9K_ANI_PERIOD_OLD 100
  45. #define ATH9K_ANI_PERIOD_NEW 300
  46. /* in ms */
  47. #define ATH9K_ANI_POLLINTERVAL_OLD 100
  48. #define ATH9K_ANI_POLLINTERVAL_NEW 1000
  49. #define HAL_NOISE_IMMUNE_MAX 4
  50. #define HAL_SPUR_IMMUNE_MAX 7
  51. #define HAL_FIRST_STEP_MAX 2
  52. #define ATH9K_SIG_FIRSTEP_SETTING_MIN 0
  53. #define ATH9K_SIG_FIRSTEP_SETTING_MAX 20
  54. #define ATH9K_SIG_SPUR_IMM_SETTING_MIN 0
  55. #define ATH9K_SIG_SPUR_IMM_SETTING_MAX 22
  56. #define ATH9K_ANI_ENABLE_MRC_CCK true
  57. /* values here are relative to the INI */
  58. enum ath9k_ani_cmd {
  59. ATH9K_ANI_PRESENT = 0x1,
  60. ATH9K_ANI_NOISE_IMMUNITY_LEVEL = 0x2,
  61. ATH9K_ANI_OFDM_WEAK_SIGNAL_DETECTION = 0x4,
  62. ATH9K_ANI_CCK_WEAK_SIGNAL_THR = 0x8,
  63. ATH9K_ANI_FIRSTEP_LEVEL = 0x10,
  64. ATH9K_ANI_SPUR_IMMUNITY_LEVEL = 0x20,
  65. ATH9K_ANI_MODE = 0x40,
  66. ATH9K_ANI_PHYERR_RESET = 0x80,
  67. ATH9K_ANI_MRC_CCK = 0x100,
  68. ATH9K_ANI_ALL = 0xfff
  69. };
  70. struct ath9k_mib_stats {
  71. u32 ackrcv_bad;
  72. u32 rts_bad;
  73. u32 rts_good;
  74. u32 fcs_bad;
  75. u32 beacons;
  76. };
  77. /* INI default values for ANI registers */
  78. struct ath9k_ani_default {
  79. u16 m1ThreshLow;
  80. u16 m2ThreshLow;
  81. u16 m1Thresh;
  82. u16 m2Thresh;
  83. u16 m2CountThr;
  84. u16 m2CountThrLow;
  85. u16 m1ThreshLowExt;
  86. u16 m2ThreshLowExt;
  87. u16 m1ThreshExt;
  88. u16 m2ThreshExt;
  89. u16 firstep;
  90. u16 firstepLow;
  91. u16 cycpwrThr1;
  92. u16 cycpwrThr1Ext;
  93. };
  94. struct ar5416AniState {
  95. struct ath9k_channel *c;
  96. u8 noiseImmunityLevel;
  97. u8 ofdmNoiseImmunityLevel;
  98. u8 cckNoiseImmunityLevel;
  99. bool ofdmsTurn;
  100. u8 mrcCCKOff;
  101. u8 spurImmunityLevel;
  102. u8 firstepLevel;
  103. u8 ofdmWeakSigDetectOff;
  104. u8 cckWeakSigThreshold;
  105. bool update_ani;
  106. u32 listenTime;
  107. int32_t rssiThrLow;
  108. int32_t rssiThrHigh;
  109. u32 noiseFloor;
  110. u32 ofdmPhyErrCount;
  111. u32 cckPhyErrCount;
  112. int16_t pktRssi[2];
  113. int16_t ofdmErrRssi[2];
  114. int16_t cckErrRssi[2];
  115. struct ath9k_ani_default iniDef;
  116. };
  117. struct ar5416Stats {
  118. u32 ast_ani_niup;
  119. u32 ast_ani_nidown;
  120. u32 ast_ani_spurup;
  121. u32 ast_ani_spurdown;
  122. u32 ast_ani_ofdmon;
  123. u32 ast_ani_ofdmoff;
  124. u32 ast_ani_cckhigh;
  125. u32 ast_ani_ccklow;
  126. u32 ast_ani_stepup;
  127. u32 ast_ani_stepdown;
  128. u32 ast_ani_ofdmerrs;
  129. u32 ast_ani_cckerrs;
  130. u32 ast_ani_reset;
  131. u32 ast_ani_lneg_or_lzero;
  132. u32 avgbrssi;
  133. struct ath9k_mib_stats ast_mibstats;
  134. };
  135. #define ah_mibStats stats.ast_mibstats
  136. void ath9k_enable_mib_counters(struct ath_hw *ah);
  137. void ath9k_hw_disable_mib_counters(struct ath_hw *ah);
  138. void ath9k_hw_ani_setup(struct ath_hw *ah);
  139. void ath9k_hw_ani_init(struct ath_hw *ah);
  140. #endif /* ANI_H */