nic.h 13 KB

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  1. /****************************************************************************
  2. * Driver for Solarflare Solarstorm network controllers and boards
  3. * Copyright 2005-2006 Fen Systems Ltd.
  4. * Copyright 2006-2011 Solarflare Communications Inc.
  5. *
  6. * This program is free software; you can redistribute it and/or modify it
  7. * under the terms of the GNU General Public License version 2 as published
  8. * by the Free Software Foundation, incorporated herein by reference.
  9. */
  10. #ifndef EFX_NIC_H
  11. #define EFX_NIC_H
  12. #include <linux/i2c-algo-bit.h>
  13. #include "net_driver.h"
  14. #include "efx.h"
  15. #include "mcdi.h"
  16. #include "spi.h"
  17. /*
  18. * Falcon hardware control
  19. */
  20. enum {
  21. EFX_REV_FALCON_A0 = 0,
  22. EFX_REV_FALCON_A1 = 1,
  23. EFX_REV_FALCON_B0 = 2,
  24. EFX_REV_SIENA_A0 = 3,
  25. };
  26. static inline int efx_nic_rev(struct efx_nic *efx)
  27. {
  28. return efx->type->revision;
  29. }
  30. extern u32 efx_nic_fpga_ver(struct efx_nic *efx);
  31. /* NIC has two interlinked PCI functions for the same port. */
  32. static inline bool efx_nic_is_dual_func(struct efx_nic *efx)
  33. {
  34. return efx_nic_rev(efx) < EFX_REV_FALCON_B0;
  35. }
  36. enum {
  37. PHY_TYPE_NONE = 0,
  38. PHY_TYPE_TXC43128 = 1,
  39. PHY_TYPE_88E1111 = 2,
  40. PHY_TYPE_SFX7101 = 3,
  41. PHY_TYPE_QT2022C2 = 4,
  42. PHY_TYPE_PM8358 = 6,
  43. PHY_TYPE_SFT9001A = 8,
  44. PHY_TYPE_QT2025C = 9,
  45. PHY_TYPE_SFT9001B = 10,
  46. };
  47. #define FALCON_XMAC_LOOPBACKS \
  48. ((1 << LOOPBACK_XGMII) | \
  49. (1 << LOOPBACK_XGXS) | \
  50. (1 << LOOPBACK_XAUI))
  51. #define FALCON_GMAC_LOOPBACKS \
  52. (1 << LOOPBACK_GMAC)
  53. /* Alignment of PCIe DMA boundaries (4KB) */
  54. #define EFX_PAGE_SIZE 4096
  55. /* Size and alignment of buffer table entries (same) */
  56. #define EFX_BUF_SIZE EFX_PAGE_SIZE
  57. /**
  58. * struct falcon_board_type - board operations and type information
  59. * @id: Board type id, as found in NVRAM
  60. * @init: Allocate resources and initialise peripheral hardware
  61. * @init_phy: Do board-specific PHY initialisation
  62. * @fini: Shut down hardware and free resources
  63. * @set_id_led: Set state of identifying LED or revert to automatic function
  64. * @monitor: Board-specific health check function
  65. */
  66. struct falcon_board_type {
  67. u8 id;
  68. int (*init) (struct efx_nic *nic);
  69. void (*init_phy) (struct efx_nic *efx);
  70. void (*fini) (struct efx_nic *nic);
  71. void (*set_id_led) (struct efx_nic *efx, enum efx_led_mode mode);
  72. int (*monitor) (struct efx_nic *nic);
  73. };
  74. /**
  75. * struct falcon_board - board information
  76. * @type: Type of board
  77. * @major: Major rev. ('A', 'B' ...)
  78. * @minor: Minor rev. (0, 1, ...)
  79. * @i2c_adap: I2C adapter for on-board peripherals
  80. * @i2c_data: Data for bit-banging algorithm
  81. * @hwmon_client: I2C client for hardware monitor
  82. * @ioexp_client: I2C client for power/port control
  83. */
  84. struct falcon_board {
  85. const struct falcon_board_type *type;
  86. int major;
  87. int minor;
  88. struct i2c_adapter i2c_adap;
  89. struct i2c_algo_bit_data i2c_data;
  90. struct i2c_client *hwmon_client, *ioexp_client;
  91. };
  92. /**
  93. * struct falcon_nic_data - Falcon NIC state
  94. * @pci_dev2: Secondary function of Falcon A
  95. * @board: Board state and functions
  96. * @stats_disable_count: Nest count for disabling statistics fetches
  97. * @stats_pending: Is there a pending DMA of MAC statistics.
  98. * @stats_timer: A timer for regularly fetching MAC statistics.
  99. * @stats_dma_done: Pointer to the flag which indicates DMA completion.
  100. * @spi_flash: SPI flash device
  101. * @spi_eeprom: SPI EEPROM device
  102. * @spi_lock: SPI bus lock
  103. * @mdio_lock: MDIO bus lock
  104. * @xmac_poll_required: XMAC link state needs polling
  105. */
  106. struct falcon_nic_data {
  107. struct pci_dev *pci_dev2;
  108. struct falcon_board board;
  109. unsigned int stats_disable_count;
  110. bool stats_pending;
  111. struct timer_list stats_timer;
  112. u32 *stats_dma_done;
  113. struct efx_spi_device spi_flash;
  114. struct efx_spi_device spi_eeprom;
  115. struct mutex spi_lock;
  116. struct mutex mdio_lock;
  117. bool xmac_poll_required;
  118. };
  119. static inline struct falcon_board *falcon_board(struct efx_nic *efx)
  120. {
  121. struct falcon_nic_data *data = efx->nic_data;
  122. return &data->board;
  123. }
  124. /**
  125. * struct siena_nic_data - Siena NIC state
  126. * @mcdi: Management-Controller-to-Driver Interface
  127. * @wol_filter_id: Wake-on-LAN packet filter id
  128. * @hwmon: Hardware monitor state
  129. */
  130. struct siena_nic_data {
  131. struct efx_mcdi_iface mcdi;
  132. int wol_filter_id;
  133. #ifdef CONFIG_SFC_MCDI_MON
  134. struct efx_mcdi_mon hwmon;
  135. #endif
  136. };
  137. #ifdef CONFIG_SFC_MCDI_MON
  138. static inline struct efx_mcdi_mon *efx_mcdi_mon(struct efx_nic *efx)
  139. {
  140. struct siena_nic_data *nic_data;
  141. EFX_BUG_ON_PARANOID(efx_nic_rev(efx) < EFX_REV_SIENA_A0);
  142. nic_data = efx->nic_data;
  143. return &nic_data->hwmon;
  144. }
  145. #endif
  146. /*
  147. * On the SFC9000 family each port is associated with 1 PCI physical
  148. * function (PF) handled by sfc and a configurable number of virtual
  149. * functions (VFs) that may be handled by some other driver, often in
  150. * a VM guest. The queue pointer registers are mapped in both PF and
  151. * VF BARs such that an 8K region provides access to a single RX, TX
  152. * and event queue (collectively a Virtual Interface, VI or VNIC).
  153. *
  154. * The PF has access to all 1024 VIs while VFs are mapped to VIs
  155. * according to VI_BASE and VI_SCALE: VF i has access to VIs numbered
  156. * in range [VI_BASE + i << VI_SCALE, VI_BASE + i + 1 << VI_SCALE).
  157. * The number of VIs and the VI_SCALE value are configurable but must
  158. * be established at boot time by firmware.
  159. */
  160. /* Maximum VI_SCALE parameter supported by Siena */
  161. #define EFX_VI_SCALE_MAX 6
  162. /* Base VI to use for SR-IOV. Must be aligned to (1 << EFX_VI_SCALE_MAX),
  163. * so this is the smallest allowed value. */
  164. #define EFX_VI_BASE 128U
  165. /* Maximum number of VFs allowed */
  166. #define EFX_VF_COUNT_MAX 127
  167. /* Limit EVQs on VFs to be only 8k to reduce buffer table reservation */
  168. #define EFX_MAX_VF_EVQ_SIZE 8192UL
  169. /* The number of buffer table entries reserved for each VI on a VF */
  170. #define EFX_VF_BUFTBL_PER_VI \
  171. ((EFX_MAX_VF_EVQ_SIZE + 2 * EFX_MAX_DMAQ_SIZE) * \
  172. sizeof(efx_qword_t) / EFX_BUF_SIZE)
  173. #ifdef CONFIG_SFC_SRIOV
  174. static inline bool efx_sriov_wanted(struct efx_nic *efx)
  175. {
  176. return efx->vf_count != 0;
  177. }
  178. static inline bool efx_sriov_enabled(struct efx_nic *efx)
  179. {
  180. return efx->vf_init_count != 0;
  181. }
  182. static inline unsigned int efx_vf_size(struct efx_nic *efx)
  183. {
  184. return 1 << efx->vi_scale;
  185. }
  186. extern int efx_init_sriov(void);
  187. extern void efx_sriov_probe(struct efx_nic *efx);
  188. extern int efx_sriov_init(struct efx_nic *efx);
  189. extern void efx_sriov_mac_address_changed(struct efx_nic *efx);
  190. extern void efx_sriov_tx_flush_done(struct efx_nic *efx, efx_qword_t *event);
  191. extern void efx_sriov_rx_flush_done(struct efx_nic *efx, efx_qword_t *event);
  192. extern void efx_sriov_event(struct efx_channel *channel, efx_qword_t *event);
  193. extern void efx_sriov_desc_fetch_err(struct efx_nic *efx, unsigned dmaq);
  194. extern void efx_sriov_flr(struct efx_nic *efx, unsigned flr);
  195. extern void efx_sriov_reset(struct efx_nic *efx);
  196. extern void efx_sriov_fini(struct efx_nic *efx);
  197. extern void efx_fini_sriov(void);
  198. #else
  199. static inline bool efx_sriov_wanted(struct efx_nic *efx) { return false; }
  200. static inline bool efx_sriov_enabled(struct efx_nic *efx) { return false; }
  201. static inline unsigned int efx_vf_size(struct efx_nic *efx) { return 0; }
  202. static inline int efx_init_sriov(void) { return 0; }
  203. static inline void efx_sriov_probe(struct efx_nic *efx) {}
  204. static inline int efx_sriov_init(struct efx_nic *efx) { return -EOPNOTSUPP; }
  205. static inline void efx_sriov_mac_address_changed(struct efx_nic *efx) {}
  206. static inline void efx_sriov_tx_flush_done(struct efx_nic *efx,
  207. efx_qword_t *event) {}
  208. static inline void efx_sriov_rx_flush_done(struct efx_nic *efx,
  209. efx_qword_t *event) {}
  210. static inline void efx_sriov_event(struct efx_channel *channel,
  211. efx_qword_t *event) {}
  212. static inline void efx_sriov_desc_fetch_err(struct efx_nic *efx, unsigned dmaq) {}
  213. static inline void efx_sriov_flr(struct efx_nic *efx, unsigned flr) {}
  214. static inline void efx_sriov_reset(struct efx_nic *efx) {}
  215. static inline void efx_sriov_fini(struct efx_nic *efx) {}
  216. static inline void efx_fini_sriov(void) {}
  217. #endif
  218. extern int efx_sriov_set_vf_mac(struct net_device *dev, int vf, u8 *mac);
  219. extern int efx_sriov_set_vf_vlan(struct net_device *dev, int vf,
  220. u16 vlan, u8 qos);
  221. extern int efx_sriov_get_vf_config(struct net_device *dev, int vf,
  222. struct ifla_vf_info *ivf);
  223. extern int efx_sriov_set_vf_spoofchk(struct net_device *net_dev, int vf,
  224. bool spoofchk);
  225. extern const struct efx_nic_type falcon_a1_nic_type;
  226. extern const struct efx_nic_type falcon_b0_nic_type;
  227. extern const struct efx_nic_type siena_a0_nic_type;
  228. /**************************************************************************
  229. *
  230. * Externs
  231. *
  232. **************************************************************************
  233. */
  234. extern int falcon_probe_board(struct efx_nic *efx, u16 revision_info);
  235. /* TX data path */
  236. extern int efx_nic_probe_tx(struct efx_tx_queue *tx_queue);
  237. extern void efx_nic_init_tx(struct efx_tx_queue *tx_queue);
  238. extern void efx_nic_fini_tx(struct efx_tx_queue *tx_queue);
  239. extern void efx_nic_remove_tx(struct efx_tx_queue *tx_queue);
  240. extern void efx_nic_push_buffers(struct efx_tx_queue *tx_queue);
  241. /* RX data path */
  242. extern int efx_nic_probe_rx(struct efx_rx_queue *rx_queue);
  243. extern void efx_nic_init_rx(struct efx_rx_queue *rx_queue);
  244. extern void efx_nic_fini_rx(struct efx_rx_queue *rx_queue);
  245. extern void efx_nic_remove_rx(struct efx_rx_queue *rx_queue);
  246. extern void efx_nic_notify_rx_desc(struct efx_rx_queue *rx_queue);
  247. extern void efx_nic_generate_fill_event(struct efx_rx_queue *rx_queue);
  248. /* Event data path */
  249. extern int efx_nic_probe_eventq(struct efx_channel *channel);
  250. extern void efx_nic_init_eventq(struct efx_channel *channel);
  251. extern void efx_nic_fini_eventq(struct efx_channel *channel);
  252. extern void efx_nic_remove_eventq(struct efx_channel *channel);
  253. extern int efx_nic_process_eventq(struct efx_channel *channel, int rx_quota);
  254. extern void efx_nic_eventq_read_ack(struct efx_channel *channel);
  255. extern bool efx_nic_event_present(struct efx_channel *channel);
  256. /* MAC/PHY */
  257. extern void falcon_drain_tx_fifo(struct efx_nic *efx);
  258. extern void falcon_reconfigure_mac_wrapper(struct efx_nic *efx);
  259. extern bool falcon_xmac_check_fault(struct efx_nic *efx);
  260. extern int falcon_reconfigure_xmac(struct efx_nic *efx);
  261. extern void falcon_update_stats_xmac(struct efx_nic *efx);
  262. /* Interrupts and test events */
  263. extern int efx_nic_init_interrupt(struct efx_nic *efx);
  264. extern void efx_nic_enable_interrupts(struct efx_nic *efx);
  265. extern void efx_nic_event_test_start(struct efx_channel *channel);
  266. extern void efx_nic_irq_test_start(struct efx_nic *efx);
  267. extern void efx_nic_disable_interrupts(struct efx_nic *efx);
  268. extern void efx_nic_fini_interrupt(struct efx_nic *efx);
  269. extern irqreturn_t efx_nic_fatal_interrupt(struct efx_nic *efx);
  270. extern irqreturn_t falcon_legacy_interrupt_a1(int irq, void *dev_id);
  271. extern void falcon_irq_ack_a1(struct efx_nic *efx);
  272. static inline int efx_nic_event_test_irq_cpu(struct efx_channel *channel)
  273. {
  274. return ACCESS_ONCE(channel->event_test_cpu);
  275. }
  276. static inline int efx_nic_irq_test_irq_cpu(struct efx_nic *efx)
  277. {
  278. return ACCESS_ONCE(efx->last_irq_cpu);
  279. }
  280. /* Global Resources */
  281. extern int efx_nic_flush_queues(struct efx_nic *efx);
  282. extern void falcon_start_nic_stats(struct efx_nic *efx);
  283. extern void falcon_stop_nic_stats(struct efx_nic *efx);
  284. extern void falcon_setup_xaui(struct efx_nic *efx);
  285. extern int falcon_reset_xaui(struct efx_nic *efx);
  286. extern void
  287. efx_nic_dimension_resources(struct efx_nic *efx, unsigned sram_lim_qw);
  288. extern void efx_nic_init_common(struct efx_nic *efx);
  289. extern void efx_nic_push_rx_indir_table(struct efx_nic *efx);
  290. int efx_nic_alloc_buffer(struct efx_nic *efx, struct efx_buffer *buffer,
  291. unsigned int len);
  292. void efx_nic_free_buffer(struct efx_nic *efx, struct efx_buffer *buffer);
  293. /* Tests */
  294. struct efx_nic_register_test {
  295. unsigned address;
  296. efx_oword_t mask;
  297. };
  298. extern int efx_nic_test_registers(struct efx_nic *efx,
  299. const struct efx_nic_register_test *regs,
  300. size_t n_regs);
  301. extern size_t efx_nic_get_regs_len(struct efx_nic *efx);
  302. extern void efx_nic_get_regs(struct efx_nic *efx, void *buf);
  303. /**************************************************************************
  304. *
  305. * Falcon MAC stats
  306. *
  307. **************************************************************************
  308. */
  309. #define FALCON_STAT_OFFSET(falcon_stat) EFX_VAL(falcon_stat, offset)
  310. #define FALCON_STAT_WIDTH(falcon_stat) EFX_VAL(falcon_stat, WIDTH)
  311. /* Retrieve statistic from statistics block */
  312. #define FALCON_STAT(efx, falcon_stat, efx_stat) do { \
  313. if (FALCON_STAT_WIDTH(falcon_stat) == 16) \
  314. (efx)->mac_stats.efx_stat += le16_to_cpu( \
  315. *((__force __le16 *) \
  316. (efx->stats_buffer.addr + \
  317. FALCON_STAT_OFFSET(falcon_stat)))); \
  318. else if (FALCON_STAT_WIDTH(falcon_stat) == 32) \
  319. (efx)->mac_stats.efx_stat += le32_to_cpu( \
  320. *((__force __le32 *) \
  321. (efx->stats_buffer.addr + \
  322. FALCON_STAT_OFFSET(falcon_stat)))); \
  323. else \
  324. (efx)->mac_stats.efx_stat += le64_to_cpu( \
  325. *((__force __le64 *) \
  326. (efx->stats_buffer.addr + \
  327. FALCON_STAT_OFFSET(falcon_stat)))); \
  328. } while (0)
  329. #define FALCON_MAC_STATS_SIZE 0x100
  330. #define MAC_DATA_LBN 0
  331. #define MAC_DATA_WIDTH 32
  332. extern void efx_generate_event(struct efx_nic *efx, unsigned int evq,
  333. efx_qword_t *event);
  334. extern void falcon_poll_xmac(struct efx_nic *efx);
  335. #endif /* EFX_NIC_H */