sdio.c 24 KB

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  1. /*
  2. * Copyright (c) 2004-2011 Atheros Communications Inc.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for any
  5. * purpose with or without fee is hereby granted, provided that the above
  6. * copyright notice and this permission notice appear in all copies.
  7. *
  8. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  9. * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10. * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  11. * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12. * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  13. * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  14. * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15. */
  16. #include <linux/mmc/card.h>
  17. #include <linux/mmc/mmc.h>
  18. #include <linux/mmc/host.h>
  19. #include <linux/mmc/sdio_func.h>
  20. #include <linux/mmc/sdio_ids.h>
  21. #include <linux/mmc/sdio.h>
  22. #include <linux/mmc/sd.h>
  23. #include "hif.h"
  24. #include "hif-ops.h"
  25. #include "target.h"
  26. #include "debug.h"
  27. #include "cfg80211.h"
  28. struct ath6kl_sdio {
  29. struct sdio_func *func;
  30. spinlock_t lock;
  31. /* free list */
  32. struct list_head bus_req_freeq;
  33. /* available bus requests */
  34. struct bus_request bus_req[BUS_REQUEST_MAX_NUM];
  35. struct ath6kl *ar;
  36. u8 *dma_buffer;
  37. /* scatter request list head */
  38. struct list_head scat_req;
  39. spinlock_t scat_lock;
  40. bool is_disabled;
  41. atomic_t irq_handling;
  42. const struct sdio_device_id *id;
  43. struct work_struct wr_async_work;
  44. struct list_head wr_asyncq;
  45. spinlock_t wr_async_lock;
  46. };
  47. #define CMD53_ARG_READ 0
  48. #define CMD53_ARG_WRITE 1
  49. #define CMD53_ARG_BLOCK_BASIS 1
  50. #define CMD53_ARG_FIXED_ADDRESS 0
  51. #define CMD53_ARG_INCR_ADDRESS 1
  52. static inline struct ath6kl_sdio *ath6kl_sdio_priv(struct ath6kl *ar)
  53. {
  54. return ar->hif_priv;
  55. }
  56. /*
  57. * Macro to check if DMA buffer is WORD-aligned and DMA-able.
  58. * Most host controllers assume the buffer is DMA'able and will
  59. * bug-check otherwise (i.e. buffers on the stack). virt_addr_valid
  60. * check fails on stack memory.
  61. */
  62. static inline bool buf_needs_bounce(u8 *buf)
  63. {
  64. return ((unsigned long) buf & 0x3) || !virt_addr_valid(buf);
  65. }
  66. static void ath6kl_sdio_set_mbox_info(struct ath6kl *ar)
  67. {
  68. struct ath6kl_mbox_info *mbox_info = &ar->mbox_info;
  69. /* EP1 has an extended range */
  70. mbox_info->htc_addr = HIF_MBOX_BASE_ADDR;
  71. mbox_info->htc_ext_addr = HIF_MBOX0_EXT_BASE_ADDR;
  72. mbox_info->htc_ext_sz = HIF_MBOX0_EXT_WIDTH;
  73. mbox_info->block_size = HIF_MBOX_BLOCK_SIZE;
  74. mbox_info->gmbox_addr = HIF_GMBOX_BASE_ADDR;
  75. mbox_info->gmbox_sz = HIF_GMBOX_WIDTH;
  76. }
  77. static inline void ath6kl_sdio_set_cmd53_arg(u32 *arg, u8 rw, u8 func,
  78. u8 mode, u8 opcode, u32 addr,
  79. u16 blksz)
  80. {
  81. *arg = (((rw & 1) << 31) |
  82. ((func & 0x7) << 28) |
  83. ((mode & 1) << 27) |
  84. ((opcode & 1) << 26) |
  85. ((addr & 0x1FFFF) << 9) |
  86. (blksz & 0x1FF));
  87. }
  88. static inline void ath6kl_sdio_set_cmd52_arg(u32 *arg, u8 write, u8 raw,
  89. unsigned int address,
  90. unsigned char val)
  91. {
  92. const u8 func = 0;
  93. *arg = ((write & 1) << 31) |
  94. ((func & 0x7) << 28) |
  95. ((raw & 1) << 27) |
  96. (1 << 26) |
  97. ((address & 0x1FFFF) << 9) |
  98. (1 << 8) |
  99. (val & 0xFF);
  100. }
  101. static int ath6kl_sdio_func0_cmd52_wr_byte(struct mmc_card *card,
  102. unsigned int address,
  103. unsigned char byte)
  104. {
  105. struct mmc_command io_cmd;
  106. memset(&io_cmd, 0, sizeof(io_cmd));
  107. ath6kl_sdio_set_cmd52_arg(&io_cmd.arg, 1, 0, address, byte);
  108. io_cmd.opcode = SD_IO_RW_DIRECT;
  109. io_cmd.flags = MMC_RSP_R5 | MMC_CMD_AC;
  110. return mmc_wait_for_cmd(card->host, &io_cmd, 0);
  111. }
  112. static int ath6kl_sdio_io(struct sdio_func *func, u32 request, u32 addr,
  113. u8 *buf, u32 len)
  114. {
  115. int ret = 0;
  116. sdio_claim_host(func);
  117. if (request & HIF_WRITE) {
  118. /* FIXME: looks like ugly workaround for something */
  119. if (addr >= HIF_MBOX_BASE_ADDR &&
  120. addr <= HIF_MBOX_END_ADDR)
  121. addr += (HIF_MBOX_WIDTH - len);
  122. /* FIXME: this also looks like ugly workaround */
  123. if (addr == HIF_MBOX0_EXT_BASE_ADDR)
  124. addr += HIF_MBOX0_EXT_WIDTH - len;
  125. if (request & HIF_FIXED_ADDRESS)
  126. ret = sdio_writesb(func, addr, buf, len);
  127. else
  128. ret = sdio_memcpy_toio(func, addr, buf, len);
  129. } else {
  130. if (request & HIF_FIXED_ADDRESS)
  131. ret = sdio_readsb(func, buf, addr, len);
  132. else
  133. ret = sdio_memcpy_fromio(func, buf, addr, len);
  134. }
  135. sdio_release_host(func);
  136. ath6kl_dbg(ATH6KL_DBG_SDIO, "%s addr 0x%x%s buf 0x%p len %d\n",
  137. request & HIF_WRITE ? "wr" : "rd", addr,
  138. request & HIF_FIXED_ADDRESS ? " (fixed)" : "", buf, len);
  139. ath6kl_dbg_dump(ATH6KL_DBG_SDIO_DUMP, NULL, "sdio ", buf, len);
  140. return ret;
  141. }
  142. static struct bus_request *ath6kl_sdio_alloc_busreq(struct ath6kl_sdio *ar_sdio)
  143. {
  144. struct bus_request *bus_req;
  145. spin_lock_bh(&ar_sdio->lock);
  146. if (list_empty(&ar_sdio->bus_req_freeq)) {
  147. spin_unlock_bh(&ar_sdio->lock);
  148. return NULL;
  149. }
  150. bus_req = list_first_entry(&ar_sdio->bus_req_freeq,
  151. struct bus_request, list);
  152. list_del(&bus_req->list);
  153. spin_unlock_bh(&ar_sdio->lock);
  154. ath6kl_dbg(ATH6KL_DBG_SCATTER, "%s: bus request 0x%p\n",
  155. __func__, bus_req);
  156. return bus_req;
  157. }
  158. static void ath6kl_sdio_free_bus_req(struct ath6kl_sdio *ar_sdio,
  159. struct bus_request *bus_req)
  160. {
  161. ath6kl_dbg(ATH6KL_DBG_SCATTER, "%s: bus request 0x%p\n",
  162. __func__, bus_req);
  163. spin_lock_bh(&ar_sdio->lock);
  164. list_add_tail(&bus_req->list, &ar_sdio->bus_req_freeq);
  165. spin_unlock_bh(&ar_sdio->lock);
  166. }
  167. static void ath6kl_sdio_setup_scat_data(struct hif_scatter_req *scat_req,
  168. struct mmc_data *data)
  169. {
  170. struct scatterlist *sg;
  171. int i;
  172. data->blksz = HIF_MBOX_BLOCK_SIZE;
  173. data->blocks = scat_req->len / HIF_MBOX_BLOCK_SIZE;
  174. ath6kl_dbg(ATH6KL_DBG_SCATTER,
  175. "hif-scatter: (%s) addr: 0x%X, (block len: %d, block count: %d) , (tot:%d,sg:%d)\n",
  176. (scat_req->req & HIF_WRITE) ? "WR" : "RD", scat_req->addr,
  177. data->blksz, data->blocks, scat_req->len,
  178. scat_req->scat_entries);
  179. data->flags = (scat_req->req & HIF_WRITE) ? MMC_DATA_WRITE :
  180. MMC_DATA_READ;
  181. /* fill SG entries */
  182. sg = scat_req->sgentries;
  183. sg_init_table(sg, scat_req->scat_entries);
  184. /* assemble SG list */
  185. for (i = 0; i < scat_req->scat_entries; i++, sg++) {
  186. ath6kl_dbg(ATH6KL_DBG_SCATTER, "%d: addr:0x%p, len:%d\n",
  187. i, scat_req->scat_list[i].buf,
  188. scat_req->scat_list[i].len);
  189. sg_set_buf(sg, scat_req->scat_list[i].buf,
  190. scat_req->scat_list[i].len);
  191. }
  192. /* set scatter-gather table for request */
  193. data->sg = scat_req->sgentries;
  194. data->sg_len = scat_req->scat_entries;
  195. }
  196. static int ath6kl_sdio_scat_rw(struct ath6kl_sdio *ar_sdio,
  197. struct bus_request *req)
  198. {
  199. struct mmc_request mmc_req;
  200. struct mmc_command cmd;
  201. struct mmc_data data;
  202. struct hif_scatter_req *scat_req;
  203. u8 opcode, rw;
  204. int status, len;
  205. scat_req = req->scat_req;
  206. if (scat_req->virt_scat) {
  207. len = scat_req->len;
  208. if (scat_req->req & HIF_BLOCK_BASIS)
  209. len = round_down(len, HIF_MBOX_BLOCK_SIZE);
  210. status = ath6kl_sdio_io(ar_sdio->func, scat_req->req,
  211. scat_req->addr, scat_req->virt_dma_buf,
  212. len);
  213. goto scat_complete;
  214. }
  215. memset(&mmc_req, 0, sizeof(struct mmc_request));
  216. memset(&cmd, 0, sizeof(struct mmc_command));
  217. memset(&data, 0, sizeof(struct mmc_data));
  218. ath6kl_sdio_setup_scat_data(scat_req, &data);
  219. opcode = (scat_req->req & HIF_FIXED_ADDRESS) ?
  220. CMD53_ARG_FIXED_ADDRESS : CMD53_ARG_INCR_ADDRESS;
  221. rw = (scat_req->req & HIF_WRITE) ? CMD53_ARG_WRITE : CMD53_ARG_READ;
  222. /* Fixup the address so that the last byte will fall on MBOX EOM */
  223. if (scat_req->req & HIF_WRITE) {
  224. if (scat_req->addr == HIF_MBOX_BASE_ADDR)
  225. scat_req->addr += HIF_MBOX_WIDTH - scat_req->len;
  226. else
  227. /* Uses extended address range */
  228. scat_req->addr += HIF_MBOX0_EXT_WIDTH - scat_req->len;
  229. }
  230. /* set command argument */
  231. ath6kl_sdio_set_cmd53_arg(&cmd.arg, rw, ar_sdio->func->num,
  232. CMD53_ARG_BLOCK_BASIS, opcode, scat_req->addr,
  233. data.blocks);
  234. cmd.opcode = SD_IO_RW_EXTENDED;
  235. cmd.flags = MMC_RSP_SPI_R5 | MMC_RSP_R5 | MMC_CMD_ADTC;
  236. mmc_req.cmd = &cmd;
  237. mmc_req.data = &data;
  238. sdio_claim_host(ar_sdio->func);
  239. mmc_set_data_timeout(&data, ar_sdio->func->card);
  240. /* synchronous call to process request */
  241. mmc_wait_for_req(ar_sdio->func->card->host, &mmc_req);
  242. sdio_release_host(ar_sdio->func);
  243. status = cmd.error ? cmd.error : data.error;
  244. scat_complete:
  245. scat_req->status = status;
  246. if (scat_req->status)
  247. ath6kl_err("Scatter write request failed:%d\n",
  248. scat_req->status);
  249. if (scat_req->req & HIF_ASYNCHRONOUS)
  250. scat_req->complete(ar_sdio->ar->htc_target, scat_req);
  251. return status;
  252. }
  253. static int ath6kl_sdio_alloc_prep_scat_req(struct ath6kl_sdio *ar_sdio,
  254. int n_scat_entry, int n_scat_req,
  255. bool virt_scat)
  256. {
  257. struct hif_scatter_req *s_req;
  258. struct bus_request *bus_req;
  259. int i, scat_req_sz, scat_list_sz, sg_sz, buf_sz;
  260. u8 *virt_buf;
  261. scat_list_sz = (n_scat_entry - 1) * sizeof(struct hif_scatter_item);
  262. scat_req_sz = sizeof(*s_req) + scat_list_sz;
  263. if (!virt_scat)
  264. sg_sz = sizeof(struct scatterlist) * n_scat_entry;
  265. else
  266. buf_sz = 2 * L1_CACHE_BYTES +
  267. ATH6KL_MAX_TRANSFER_SIZE_PER_SCATTER;
  268. for (i = 0; i < n_scat_req; i++) {
  269. /* allocate the scatter request */
  270. s_req = kzalloc(scat_req_sz, GFP_KERNEL);
  271. if (!s_req)
  272. return -ENOMEM;
  273. if (virt_scat) {
  274. virt_buf = kzalloc(buf_sz, GFP_KERNEL);
  275. if (!virt_buf) {
  276. kfree(s_req);
  277. return -ENOMEM;
  278. }
  279. s_req->virt_dma_buf =
  280. (u8 *)L1_CACHE_ALIGN((unsigned long)virt_buf);
  281. } else {
  282. /* allocate sglist */
  283. s_req->sgentries = kzalloc(sg_sz, GFP_KERNEL);
  284. if (!s_req->sgentries) {
  285. kfree(s_req);
  286. return -ENOMEM;
  287. }
  288. }
  289. /* allocate a bus request for this scatter request */
  290. bus_req = ath6kl_sdio_alloc_busreq(ar_sdio);
  291. if (!bus_req) {
  292. kfree(s_req->sgentries);
  293. kfree(s_req->virt_dma_buf);
  294. kfree(s_req);
  295. return -ENOMEM;
  296. }
  297. /* assign the scatter request to this bus request */
  298. bus_req->scat_req = s_req;
  299. s_req->busrequest = bus_req;
  300. s_req->virt_scat = virt_scat;
  301. /* add it to the scatter pool */
  302. hif_scatter_req_add(ar_sdio->ar, s_req);
  303. }
  304. return 0;
  305. }
  306. static int ath6kl_sdio_read_write_sync(struct ath6kl *ar, u32 addr, u8 *buf,
  307. u32 len, u32 request)
  308. {
  309. struct ath6kl_sdio *ar_sdio = ath6kl_sdio_priv(ar);
  310. u8 *tbuf = NULL;
  311. int ret;
  312. bool bounced = false;
  313. if (request & HIF_BLOCK_BASIS)
  314. len = round_down(len, HIF_MBOX_BLOCK_SIZE);
  315. if (buf_needs_bounce(buf)) {
  316. if (!ar_sdio->dma_buffer)
  317. return -ENOMEM;
  318. tbuf = ar_sdio->dma_buffer;
  319. memcpy(tbuf, buf, len);
  320. bounced = true;
  321. } else
  322. tbuf = buf;
  323. ret = ath6kl_sdio_io(ar_sdio->func, request, addr, tbuf, len);
  324. if ((request & HIF_READ) && bounced)
  325. memcpy(buf, tbuf, len);
  326. return ret;
  327. }
  328. static void __ath6kl_sdio_write_async(struct ath6kl_sdio *ar_sdio,
  329. struct bus_request *req)
  330. {
  331. if (req->scat_req)
  332. ath6kl_sdio_scat_rw(ar_sdio, req);
  333. else {
  334. void *context;
  335. int status;
  336. status = ath6kl_sdio_read_write_sync(ar_sdio->ar, req->address,
  337. req->buffer, req->length,
  338. req->request);
  339. context = req->packet;
  340. ath6kl_sdio_free_bus_req(ar_sdio, req);
  341. ath6kl_hif_rw_comp_handler(context, status);
  342. }
  343. }
  344. static void ath6kl_sdio_write_async_work(struct work_struct *work)
  345. {
  346. struct ath6kl_sdio *ar_sdio;
  347. struct bus_request *req, *tmp_req;
  348. ar_sdio = container_of(work, struct ath6kl_sdio, wr_async_work);
  349. spin_lock_bh(&ar_sdio->wr_async_lock);
  350. list_for_each_entry_safe(req, tmp_req, &ar_sdio->wr_asyncq, list) {
  351. list_del(&req->list);
  352. spin_unlock_bh(&ar_sdio->wr_async_lock);
  353. __ath6kl_sdio_write_async(ar_sdio, req);
  354. spin_lock_bh(&ar_sdio->wr_async_lock);
  355. }
  356. spin_unlock_bh(&ar_sdio->wr_async_lock);
  357. }
  358. static void ath6kl_sdio_irq_handler(struct sdio_func *func)
  359. {
  360. int status;
  361. struct ath6kl_sdio *ar_sdio;
  362. ath6kl_dbg(ATH6KL_DBG_SDIO, "irq\n");
  363. ar_sdio = sdio_get_drvdata(func);
  364. atomic_set(&ar_sdio->irq_handling, 1);
  365. /*
  366. * Release the host during interrups so we can pick it back up when
  367. * we process commands.
  368. */
  369. sdio_release_host(ar_sdio->func);
  370. status = ath6kl_hif_intr_bh_handler(ar_sdio->ar);
  371. sdio_claim_host(ar_sdio->func);
  372. atomic_set(&ar_sdio->irq_handling, 0);
  373. WARN_ON(status && status != -ECANCELED);
  374. }
  375. static int ath6kl_sdio_power_on(struct ath6kl_sdio *ar_sdio)
  376. {
  377. struct sdio_func *func = ar_sdio->func;
  378. int ret = 0;
  379. if (!ar_sdio->is_disabled)
  380. return 0;
  381. sdio_claim_host(func);
  382. ret = sdio_enable_func(func);
  383. if (ret) {
  384. ath6kl_err("Unable to enable sdio func: %d)\n", ret);
  385. sdio_release_host(func);
  386. return ret;
  387. }
  388. sdio_release_host(func);
  389. /*
  390. * Wait for hardware to initialise. It should take a lot less than
  391. * 10 ms but let's be conservative here.
  392. */
  393. msleep(10);
  394. ar_sdio->is_disabled = false;
  395. return ret;
  396. }
  397. static int ath6kl_sdio_power_off(struct ath6kl_sdio *ar_sdio)
  398. {
  399. int ret;
  400. if (ar_sdio->is_disabled)
  401. return 0;
  402. /* Disable the card */
  403. sdio_claim_host(ar_sdio->func);
  404. ret = sdio_disable_func(ar_sdio->func);
  405. sdio_release_host(ar_sdio->func);
  406. if (ret)
  407. return ret;
  408. ar_sdio->is_disabled = true;
  409. return ret;
  410. }
  411. static int ath6kl_sdio_write_async(struct ath6kl *ar, u32 address, u8 *buffer,
  412. u32 length, u32 request,
  413. struct htc_packet *packet)
  414. {
  415. struct ath6kl_sdio *ar_sdio = ath6kl_sdio_priv(ar);
  416. struct bus_request *bus_req;
  417. bus_req = ath6kl_sdio_alloc_busreq(ar_sdio);
  418. if (!bus_req)
  419. return -ENOMEM;
  420. bus_req->address = address;
  421. bus_req->buffer = buffer;
  422. bus_req->length = length;
  423. bus_req->request = request;
  424. bus_req->packet = packet;
  425. spin_lock_bh(&ar_sdio->wr_async_lock);
  426. list_add_tail(&bus_req->list, &ar_sdio->wr_asyncq);
  427. spin_unlock_bh(&ar_sdio->wr_async_lock);
  428. queue_work(ar->ath6kl_wq, &ar_sdio->wr_async_work);
  429. return 0;
  430. }
  431. static void ath6kl_sdio_irq_enable(struct ath6kl *ar)
  432. {
  433. struct ath6kl_sdio *ar_sdio = ath6kl_sdio_priv(ar);
  434. int ret;
  435. sdio_claim_host(ar_sdio->func);
  436. /* Register the isr */
  437. ret = sdio_claim_irq(ar_sdio->func, ath6kl_sdio_irq_handler);
  438. if (ret)
  439. ath6kl_err("Failed to claim sdio irq: %d\n", ret);
  440. sdio_release_host(ar_sdio->func);
  441. }
  442. static void ath6kl_sdio_irq_disable(struct ath6kl *ar)
  443. {
  444. struct ath6kl_sdio *ar_sdio = ath6kl_sdio_priv(ar);
  445. int ret;
  446. sdio_claim_host(ar_sdio->func);
  447. /* Mask our function IRQ */
  448. while (atomic_read(&ar_sdio->irq_handling)) {
  449. sdio_release_host(ar_sdio->func);
  450. schedule_timeout(HZ / 10);
  451. sdio_claim_host(ar_sdio->func);
  452. }
  453. ret = sdio_release_irq(ar_sdio->func);
  454. if (ret)
  455. ath6kl_err("Failed to release sdio irq: %d\n", ret);
  456. sdio_release_host(ar_sdio->func);
  457. }
  458. static struct hif_scatter_req *ath6kl_sdio_scatter_req_get(struct ath6kl *ar)
  459. {
  460. struct ath6kl_sdio *ar_sdio = ath6kl_sdio_priv(ar);
  461. struct hif_scatter_req *node = NULL;
  462. spin_lock_bh(&ar_sdio->scat_lock);
  463. if (!list_empty(&ar_sdio->scat_req)) {
  464. node = list_first_entry(&ar_sdio->scat_req,
  465. struct hif_scatter_req, list);
  466. list_del(&node->list);
  467. }
  468. spin_unlock_bh(&ar_sdio->scat_lock);
  469. return node;
  470. }
  471. static void ath6kl_sdio_scatter_req_add(struct ath6kl *ar,
  472. struct hif_scatter_req *s_req)
  473. {
  474. struct ath6kl_sdio *ar_sdio = ath6kl_sdio_priv(ar);
  475. spin_lock_bh(&ar_sdio->scat_lock);
  476. list_add_tail(&s_req->list, &ar_sdio->scat_req);
  477. spin_unlock_bh(&ar_sdio->scat_lock);
  478. }
  479. /* scatter gather read write request */
  480. static int ath6kl_sdio_async_rw_scatter(struct ath6kl *ar,
  481. struct hif_scatter_req *scat_req)
  482. {
  483. struct ath6kl_sdio *ar_sdio = ath6kl_sdio_priv(ar);
  484. u32 request = scat_req->req;
  485. int status = 0;
  486. if (!scat_req->len)
  487. return -EINVAL;
  488. ath6kl_dbg(ATH6KL_DBG_SCATTER,
  489. "hif-scatter: total len: %d scatter entries: %d\n",
  490. scat_req->len, scat_req->scat_entries);
  491. if (request & HIF_SYNCHRONOUS)
  492. status = ath6kl_sdio_scat_rw(ar_sdio, scat_req->busrequest);
  493. else {
  494. spin_lock_bh(&ar_sdio->wr_async_lock);
  495. list_add_tail(&scat_req->busrequest->list, &ar_sdio->wr_asyncq);
  496. spin_unlock_bh(&ar_sdio->wr_async_lock);
  497. queue_work(ar->ath6kl_wq, &ar_sdio->wr_async_work);
  498. }
  499. return status;
  500. }
  501. /* clean up scatter support */
  502. static void ath6kl_sdio_cleanup_scatter(struct ath6kl *ar)
  503. {
  504. struct ath6kl_sdio *ar_sdio = ath6kl_sdio_priv(ar);
  505. struct hif_scatter_req *s_req, *tmp_req;
  506. /* empty the free list */
  507. spin_lock_bh(&ar_sdio->scat_lock);
  508. list_for_each_entry_safe(s_req, tmp_req, &ar_sdio->scat_req, list) {
  509. list_del(&s_req->list);
  510. spin_unlock_bh(&ar_sdio->scat_lock);
  511. if (s_req->busrequest)
  512. ath6kl_sdio_free_bus_req(ar_sdio, s_req->busrequest);
  513. kfree(s_req->virt_dma_buf);
  514. kfree(s_req->sgentries);
  515. kfree(s_req);
  516. spin_lock_bh(&ar_sdio->scat_lock);
  517. }
  518. spin_unlock_bh(&ar_sdio->scat_lock);
  519. }
  520. /* setup of HIF scatter resources */
  521. static int ath6kl_sdio_enable_scatter(struct ath6kl *ar)
  522. {
  523. struct ath6kl_sdio *ar_sdio = ath6kl_sdio_priv(ar);
  524. struct htc_target *target = ar->htc_target;
  525. int ret;
  526. bool virt_scat = false;
  527. /* check if host supports scatter and it meets our requirements */
  528. if (ar_sdio->func->card->host->max_segs < MAX_SCATTER_ENTRIES_PER_REQ) {
  529. ath6kl_err("host only supports scatter of :%d entries, need: %d\n",
  530. ar_sdio->func->card->host->max_segs,
  531. MAX_SCATTER_ENTRIES_PER_REQ);
  532. virt_scat = true;
  533. }
  534. if (!virt_scat) {
  535. ret = ath6kl_sdio_alloc_prep_scat_req(ar_sdio,
  536. MAX_SCATTER_ENTRIES_PER_REQ,
  537. MAX_SCATTER_REQUESTS, virt_scat);
  538. if (!ret) {
  539. ath6kl_dbg(ATH6KL_DBG_SCATTER,
  540. "hif-scatter enabled: max scatter req : %d entries: %d\n",
  541. MAX_SCATTER_REQUESTS,
  542. MAX_SCATTER_ENTRIES_PER_REQ);
  543. target->max_scat_entries = MAX_SCATTER_ENTRIES_PER_REQ;
  544. target->max_xfer_szper_scatreq =
  545. MAX_SCATTER_REQ_TRANSFER_SIZE;
  546. } else {
  547. ath6kl_sdio_cleanup_scatter(ar);
  548. ath6kl_warn("hif scatter resource setup failed, trying virtual scatter method\n");
  549. }
  550. }
  551. if (virt_scat || ret) {
  552. ret = ath6kl_sdio_alloc_prep_scat_req(ar_sdio,
  553. ATH6KL_SCATTER_ENTRIES_PER_REQ,
  554. ATH6KL_SCATTER_REQS, virt_scat);
  555. if (ret) {
  556. ath6kl_err("failed to alloc virtual scatter resources !\n");
  557. ath6kl_sdio_cleanup_scatter(ar);
  558. return ret;
  559. }
  560. ath6kl_dbg(ATH6KL_DBG_SCATTER,
  561. "Vitual scatter enabled, max_scat_req:%d, entries:%d\n",
  562. ATH6KL_SCATTER_REQS, ATH6KL_SCATTER_ENTRIES_PER_REQ);
  563. target->max_scat_entries = ATH6KL_SCATTER_ENTRIES_PER_REQ;
  564. target->max_xfer_szper_scatreq =
  565. ATH6KL_MAX_TRANSFER_SIZE_PER_SCATTER;
  566. }
  567. return 0;
  568. }
  569. static int ath6kl_sdio_suspend(struct ath6kl *ar)
  570. {
  571. struct ath6kl_sdio *ar_sdio = ath6kl_sdio_priv(ar);
  572. struct sdio_func *func = ar_sdio->func;
  573. mmc_pm_flag_t flags;
  574. int ret;
  575. flags = sdio_get_host_pm_caps(func);
  576. if (!(flags & MMC_PM_KEEP_POWER))
  577. /* as host doesn't support keep power we need to bail out */
  578. ath6kl_dbg(ATH6KL_DBG_SDIO,
  579. "func %d doesn't support MMC_PM_KEEP_POWER\n",
  580. func->num);
  581. return -EINVAL;
  582. ret = sdio_set_host_pm_flags(func, MMC_PM_KEEP_POWER);
  583. if (ret) {
  584. printk(KERN_ERR "ath6kl: set sdio pm flags failed: %d\n",
  585. ret);
  586. return ret;
  587. }
  588. ath6kl_deep_sleep_enable(ar);
  589. return 0;
  590. }
  591. static int ath6kl_sdio_resume(struct ath6kl *ar)
  592. {
  593. if (ar->wmi->pwr_mode != ar->wmi->saved_pwr_mode) {
  594. if (ath6kl_wmi_powermode_cmd(ar->wmi,
  595. ar->wmi->saved_pwr_mode) != 0)
  596. ath6kl_warn("ath6kl_sdio_resume: "
  597. "wmi_powermode_cmd failed\n");
  598. }
  599. return 0;
  600. }
  601. static const struct ath6kl_hif_ops ath6kl_sdio_ops = {
  602. .read_write_sync = ath6kl_sdio_read_write_sync,
  603. .write_async = ath6kl_sdio_write_async,
  604. .irq_enable = ath6kl_sdio_irq_enable,
  605. .irq_disable = ath6kl_sdio_irq_disable,
  606. .scatter_req_get = ath6kl_sdio_scatter_req_get,
  607. .scatter_req_add = ath6kl_sdio_scatter_req_add,
  608. .enable_scatter = ath6kl_sdio_enable_scatter,
  609. .scat_req_rw = ath6kl_sdio_async_rw_scatter,
  610. .cleanup_scatter = ath6kl_sdio_cleanup_scatter,
  611. .suspend = ath6kl_sdio_suspend,
  612. .resume = ath6kl_sdio_resume,
  613. };
  614. static int ath6kl_sdio_probe(struct sdio_func *func,
  615. const struct sdio_device_id *id)
  616. {
  617. int ret;
  618. struct ath6kl_sdio *ar_sdio;
  619. struct ath6kl *ar;
  620. int count;
  621. ath6kl_dbg(ATH6KL_DBG_SDIO,
  622. "new func %d vendor 0x%x device 0x%x block 0x%x/0x%x\n",
  623. func->num, func->vendor, func->device,
  624. func->max_blksize, func->cur_blksize);
  625. ar_sdio = kzalloc(sizeof(struct ath6kl_sdio), GFP_KERNEL);
  626. if (!ar_sdio)
  627. return -ENOMEM;
  628. ar_sdio->dma_buffer = kzalloc(HIF_DMA_BUFFER_SIZE, GFP_KERNEL);
  629. if (!ar_sdio->dma_buffer) {
  630. ret = -ENOMEM;
  631. goto err_hif;
  632. }
  633. ar_sdio->func = func;
  634. sdio_set_drvdata(func, ar_sdio);
  635. ar_sdio->id = id;
  636. ar_sdio->is_disabled = true;
  637. spin_lock_init(&ar_sdio->lock);
  638. spin_lock_init(&ar_sdio->scat_lock);
  639. spin_lock_init(&ar_sdio->wr_async_lock);
  640. INIT_LIST_HEAD(&ar_sdio->scat_req);
  641. INIT_LIST_HEAD(&ar_sdio->bus_req_freeq);
  642. INIT_LIST_HEAD(&ar_sdio->wr_asyncq);
  643. INIT_WORK(&ar_sdio->wr_async_work, ath6kl_sdio_write_async_work);
  644. for (count = 0; count < BUS_REQUEST_MAX_NUM; count++)
  645. ath6kl_sdio_free_bus_req(ar_sdio, &ar_sdio->bus_req[count]);
  646. ar = ath6kl_core_alloc(&ar_sdio->func->dev);
  647. if (!ar) {
  648. ath6kl_err("Failed to alloc ath6kl core\n");
  649. ret = -ENOMEM;
  650. goto err_dma;
  651. }
  652. ar_sdio->ar = ar;
  653. ar->hif_priv = ar_sdio;
  654. ar->hif_ops = &ath6kl_sdio_ops;
  655. ath6kl_sdio_set_mbox_info(ar);
  656. sdio_claim_host(func);
  657. if ((ar_sdio->id->device & MANUFACTURER_ID_ATH6KL_BASE_MASK) >=
  658. MANUFACTURER_ID_AR6003_BASE) {
  659. /* enable 4-bit ASYNC interrupt on AR6003 or later */
  660. ret = ath6kl_sdio_func0_cmd52_wr_byte(func->card,
  661. CCCR_SDIO_IRQ_MODE_REG,
  662. SDIO_IRQ_MODE_ASYNC_4BIT_IRQ);
  663. if (ret) {
  664. ath6kl_err("Failed to enable 4-bit async irq mode %d\n",
  665. ret);
  666. sdio_release_host(func);
  667. goto err_cfg80211;
  668. }
  669. ath6kl_dbg(ATH6KL_DBG_SDIO, "4-bit async irq mode enabled\n");
  670. }
  671. /* give us some time to enable, in ms */
  672. func->enable_timeout = 100;
  673. sdio_release_host(func);
  674. ret = ath6kl_sdio_power_on(ar_sdio);
  675. if (ret)
  676. goto err_cfg80211;
  677. sdio_claim_host(func);
  678. ret = sdio_set_block_size(func, HIF_MBOX_BLOCK_SIZE);
  679. if (ret) {
  680. ath6kl_err("Set sdio block size %d failed: %d)\n",
  681. HIF_MBOX_BLOCK_SIZE, ret);
  682. sdio_release_host(func);
  683. goto err_off;
  684. }
  685. sdio_release_host(func);
  686. ret = ath6kl_core_init(ar);
  687. if (ret) {
  688. ath6kl_err("Failed to init ath6kl core\n");
  689. goto err_off;
  690. }
  691. return ret;
  692. err_off:
  693. ath6kl_sdio_power_off(ar_sdio);
  694. err_cfg80211:
  695. ath6kl_cfg80211_deinit(ar_sdio->ar);
  696. err_dma:
  697. kfree(ar_sdio->dma_buffer);
  698. err_hif:
  699. kfree(ar_sdio);
  700. return ret;
  701. }
  702. static void ath6kl_sdio_remove(struct sdio_func *func)
  703. {
  704. struct ath6kl_sdio *ar_sdio;
  705. ath6kl_dbg(ATH6KL_DBG_SDIO,
  706. "removed func %d vendor 0x%x device 0x%x\n",
  707. func->num, func->vendor, func->device);
  708. ar_sdio = sdio_get_drvdata(func);
  709. ath6kl_stop_txrx(ar_sdio->ar);
  710. cancel_work_sync(&ar_sdio->wr_async_work);
  711. ath6kl_unavail_ev(ar_sdio->ar);
  712. ath6kl_sdio_power_off(ar_sdio);
  713. kfree(ar_sdio->dma_buffer);
  714. kfree(ar_sdio);
  715. }
  716. static const struct sdio_device_id ath6kl_sdio_devices[] = {
  717. {SDIO_DEVICE(MANUFACTURER_CODE, (MANUFACTURER_ID_AR6003_BASE | 0x0))},
  718. {SDIO_DEVICE(MANUFACTURER_CODE, (MANUFACTURER_ID_AR6003_BASE | 0x1))},
  719. {},
  720. };
  721. MODULE_DEVICE_TABLE(sdio, ath6kl_sdio_devices);
  722. static struct sdio_driver ath6kl_sdio_driver = {
  723. .name = "ath6kl_sdio",
  724. .id_table = ath6kl_sdio_devices,
  725. .probe = ath6kl_sdio_probe,
  726. .remove = ath6kl_sdio_remove,
  727. };
  728. static int __init ath6kl_sdio_init(void)
  729. {
  730. int ret;
  731. ret = sdio_register_driver(&ath6kl_sdio_driver);
  732. if (ret)
  733. ath6kl_err("sdio driver registration failed: %d\n", ret);
  734. return ret;
  735. }
  736. static void __exit ath6kl_sdio_exit(void)
  737. {
  738. sdio_unregister_driver(&ath6kl_sdio_driver);
  739. }
  740. module_init(ath6kl_sdio_init);
  741. module_exit(ath6kl_sdio_exit);
  742. MODULE_AUTHOR("Atheros Communications, Inc.");
  743. MODULE_DESCRIPTION("Driver support for Atheros AR600x SDIO devices");
  744. MODULE_LICENSE("Dual BSD/GPL");
  745. MODULE_FIRMWARE(AR6003_REV2_OTP_FILE);
  746. MODULE_FIRMWARE(AR6003_REV2_FIRMWARE_FILE);
  747. MODULE_FIRMWARE(AR6003_REV2_PATCH_FILE);
  748. MODULE_FIRMWARE(AR6003_REV2_BOARD_DATA_FILE);
  749. MODULE_FIRMWARE(AR6003_REV2_DEFAULT_BOARD_DATA_FILE);
  750. MODULE_FIRMWARE(AR6003_REV3_OTP_FILE);
  751. MODULE_FIRMWARE(AR6003_REV3_FIRMWARE_FILE);
  752. MODULE_FIRMWARE(AR6003_REV3_PATCH_FILE);
  753. MODULE_FIRMWARE(AR6003_REV3_BOARD_DATA_FILE);
  754. MODULE_FIRMWARE(AR6003_REV3_DEFAULT_BOARD_DATA_FILE);