processor_idle.c 30 KB

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  1. /*
  2. * processor_idle - idle state submodule to the ACPI processor driver
  3. *
  4. * Copyright (C) 2001, 2002 Andy Grover <andrew.grover@intel.com>
  5. * Copyright (C) 2001, 2002 Paul Diefenbaugh <paul.s.diefenbaugh@intel.com>
  6. * Copyright (C) 2004, 2005 Dominik Brodowski <linux@brodo.de>
  7. * Copyright (C) 2004 Anil S Keshavamurthy <anil.s.keshavamurthy@intel.com>
  8. * - Added processor hotplug support
  9. * Copyright (C) 2005 Venkatesh Pallipadi <venkatesh.pallipadi@intel.com>
  10. * - Added support for C3 on SMP
  11. *
  12. * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
  13. *
  14. * This program is free software; you can redistribute it and/or modify
  15. * it under the terms of the GNU General Public License as published by
  16. * the Free Software Foundation; either version 2 of the License, or (at
  17. * your option) any later version.
  18. *
  19. * This program is distributed in the hope that it will be useful, but
  20. * WITHOUT ANY WARRANTY; without even the implied warranty of
  21. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  22. * General Public License for more details.
  23. *
  24. * You should have received a copy of the GNU General Public License along
  25. * with this program; if not, write to the Free Software Foundation, Inc.,
  26. * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
  27. *
  28. * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
  29. */
  30. #include <linux/kernel.h>
  31. #include <linux/module.h>
  32. #include <linux/init.h>
  33. #include <linux/cpufreq.h>
  34. #include <linux/proc_fs.h>
  35. #include <linux/seq_file.h>
  36. #include <linux/acpi.h>
  37. #include <linux/dmi.h>
  38. #include <linux/moduleparam.h>
  39. #include <linux/sched.h> /* need_resched() */
  40. #include <linux/pm_qos_params.h>
  41. #include <linux/clockchips.h>
  42. #include <linux/cpuidle.h>
  43. #include <linux/irqflags.h>
  44. /*
  45. * Include the apic definitions for x86 to have the APIC timer related defines
  46. * available also for UP (on SMP it gets magically included via linux/smp.h).
  47. * asm/acpi.h is not an option, as it would require more include magic. Also
  48. * creating an empty asm-ia64/apic.h would just trade pest vs. cholera.
  49. */
  50. #ifdef CONFIG_X86
  51. #include <asm/apic.h>
  52. #endif
  53. #include <asm/io.h>
  54. #include <asm/uaccess.h>
  55. #include <acpi/acpi_bus.h>
  56. #include <acpi/processor.h>
  57. #include <asm/processor.h>
  58. #define ACPI_PROCESSOR_CLASS "processor"
  59. #define _COMPONENT ACPI_PROCESSOR_COMPONENT
  60. ACPI_MODULE_NAME("processor_idle");
  61. #define ACPI_PROCESSOR_FILE_POWER "power"
  62. #define PM_TIMER_TICK_NS (1000000000ULL/PM_TIMER_FREQUENCY)
  63. #define C2_OVERHEAD 1 /* 1us */
  64. #define C3_OVERHEAD 1 /* 1us */
  65. #define PM_TIMER_TICKS_TO_US(p) (((p) * 1000)/(PM_TIMER_FREQUENCY/1000))
  66. static unsigned int max_cstate __read_mostly = ACPI_PROCESSOR_MAX_POWER;
  67. module_param(max_cstate, uint, 0000);
  68. static unsigned int nocst __read_mostly;
  69. module_param(nocst, uint, 0000);
  70. static unsigned int latency_factor __read_mostly = 2;
  71. module_param(latency_factor, uint, 0644);
  72. static s64 us_to_pm_timer_ticks(s64 t)
  73. {
  74. return div64_u64(t * PM_TIMER_FREQUENCY, 1000000);
  75. }
  76. /*
  77. * IBM ThinkPad R40e crashes mysteriously when going into C2 or C3.
  78. * For now disable this. Probably a bug somewhere else.
  79. *
  80. * To skip this limit, boot/load with a large max_cstate limit.
  81. */
  82. static int set_max_cstate(const struct dmi_system_id *id)
  83. {
  84. if (max_cstate > ACPI_PROCESSOR_MAX_POWER)
  85. return 0;
  86. printk(KERN_NOTICE PREFIX "%s detected - limiting to C%ld max_cstate."
  87. " Override with \"processor.max_cstate=%d\"\n", id->ident,
  88. (long)id->driver_data, ACPI_PROCESSOR_MAX_POWER + 1);
  89. max_cstate = (long)id->driver_data;
  90. return 0;
  91. }
  92. /* Actually this shouldn't be __cpuinitdata, would be better to fix the
  93. callers to only run once -AK */
  94. static struct dmi_system_id __cpuinitdata processor_power_dmi_table[] = {
  95. { set_max_cstate, "Clevo 5600D", {
  96. DMI_MATCH(DMI_BIOS_VENDOR,"Phoenix Technologies LTD"),
  97. DMI_MATCH(DMI_BIOS_VERSION,"SHE845M0.86C.0013.D.0302131307")},
  98. (void *)2},
  99. {},
  100. };
  101. /*
  102. * Callers should disable interrupts before the call and enable
  103. * interrupts after return.
  104. */
  105. static void acpi_safe_halt(void)
  106. {
  107. current_thread_info()->status &= ~TS_POLLING;
  108. /*
  109. * TS_POLLING-cleared state must be visible before we
  110. * test NEED_RESCHED:
  111. */
  112. smp_mb();
  113. if (!need_resched()) {
  114. safe_halt();
  115. local_irq_disable();
  116. }
  117. current_thread_info()->status |= TS_POLLING;
  118. }
  119. #ifdef ARCH_APICTIMER_STOPS_ON_C3
  120. /*
  121. * Some BIOS implementations switch to C3 in the published C2 state.
  122. * This seems to be a common problem on AMD boxen, but other vendors
  123. * are affected too. We pick the most conservative approach: we assume
  124. * that the local APIC stops in both C2 and C3.
  125. */
  126. static void acpi_timer_check_state(int state, struct acpi_processor *pr,
  127. struct acpi_processor_cx *cx)
  128. {
  129. struct acpi_processor_power *pwr = &pr->power;
  130. u8 type = local_apic_timer_c2_ok ? ACPI_STATE_C3 : ACPI_STATE_C2;
  131. /*
  132. * Check, if one of the previous states already marked the lapic
  133. * unstable
  134. */
  135. if (pwr->timer_broadcast_on_state < state)
  136. return;
  137. if (cx->type >= type)
  138. pr->power.timer_broadcast_on_state = state;
  139. }
  140. static void acpi_propagate_timer_broadcast(struct acpi_processor *pr)
  141. {
  142. unsigned long reason;
  143. reason = pr->power.timer_broadcast_on_state < INT_MAX ?
  144. CLOCK_EVT_NOTIFY_BROADCAST_ON : CLOCK_EVT_NOTIFY_BROADCAST_OFF;
  145. clockevents_notify(reason, &pr->id);
  146. }
  147. /* Power(C) State timer broadcast control */
  148. static void acpi_state_timer_broadcast(struct acpi_processor *pr,
  149. struct acpi_processor_cx *cx,
  150. int broadcast)
  151. {
  152. int state = cx - pr->power.states;
  153. if (state >= pr->power.timer_broadcast_on_state) {
  154. unsigned long reason;
  155. reason = broadcast ? CLOCK_EVT_NOTIFY_BROADCAST_ENTER :
  156. CLOCK_EVT_NOTIFY_BROADCAST_EXIT;
  157. clockevents_notify(reason, &pr->id);
  158. }
  159. }
  160. #else
  161. static void acpi_timer_check_state(int state, struct acpi_processor *pr,
  162. struct acpi_processor_cx *cstate) { }
  163. static void acpi_propagate_timer_broadcast(struct acpi_processor *pr) { }
  164. static void acpi_state_timer_broadcast(struct acpi_processor *pr,
  165. struct acpi_processor_cx *cx,
  166. int broadcast)
  167. {
  168. }
  169. #endif
  170. /*
  171. * Suspend / resume control
  172. */
  173. static int acpi_idle_suspend;
  174. int acpi_processor_suspend(struct acpi_device * device, pm_message_t state)
  175. {
  176. acpi_idle_suspend = 1;
  177. return 0;
  178. }
  179. int acpi_processor_resume(struct acpi_device * device)
  180. {
  181. acpi_idle_suspend = 0;
  182. return 0;
  183. }
  184. #if defined (CONFIG_GENERIC_TIME) && defined (CONFIG_X86)
  185. static int tsc_halts_in_c(int state)
  186. {
  187. switch (boot_cpu_data.x86_vendor) {
  188. case X86_VENDOR_AMD:
  189. case X86_VENDOR_INTEL:
  190. /*
  191. * AMD Fam10h TSC will tick in all
  192. * C/P/S0/S1 states when this bit is set.
  193. */
  194. if (boot_cpu_has(X86_FEATURE_NONSTOP_TSC))
  195. return 0;
  196. /*FALL THROUGH*/
  197. default:
  198. return state > ACPI_STATE_C1;
  199. }
  200. }
  201. #endif
  202. static int acpi_processor_get_power_info_fadt(struct acpi_processor *pr)
  203. {
  204. if (!pr)
  205. return -EINVAL;
  206. if (!pr->pblk)
  207. return -ENODEV;
  208. /* if info is obtained from pblk/fadt, type equals state */
  209. pr->power.states[ACPI_STATE_C2].type = ACPI_STATE_C2;
  210. pr->power.states[ACPI_STATE_C3].type = ACPI_STATE_C3;
  211. #ifndef CONFIG_HOTPLUG_CPU
  212. /*
  213. * Check for P_LVL2_UP flag before entering C2 and above on
  214. * an SMP system.
  215. */
  216. if ((num_online_cpus() > 1) &&
  217. !(acpi_gbl_FADT.flags & ACPI_FADT_C2_MP_SUPPORTED))
  218. return -ENODEV;
  219. #endif
  220. /* determine C2 and C3 address from pblk */
  221. pr->power.states[ACPI_STATE_C2].address = pr->pblk + 4;
  222. pr->power.states[ACPI_STATE_C3].address = pr->pblk + 5;
  223. /* determine latencies from FADT */
  224. pr->power.states[ACPI_STATE_C2].latency = acpi_gbl_FADT.C2latency;
  225. pr->power.states[ACPI_STATE_C3].latency = acpi_gbl_FADT.C3latency;
  226. ACPI_DEBUG_PRINT((ACPI_DB_INFO,
  227. "lvl2[0x%08x] lvl3[0x%08x]\n",
  228. pr->power.states[ACPI_STATE_C2].address,
  229. pr->power.states[ACPI_STATE_C3].address));
  230. return 0;
  231. }
  232. static int acpi_processor_get_power_info_default(struct acpi_processor *pr)
  233. {
  234. if (!pr->power.states[ACPI_STATE_C1].valid) {
  235. /* set the first C-State to C1 */
  236. /* all processors need to support C1 */
  237. pr->power.states[ACPI_STATE_C1].type = ACPI_STATE_C1;
  238. pr->power.states[ACPI_STATE_C1].valid = 1;
  239. pr->power.states[ACPI_STATE_C1].entry_method = ACPI_CSTATE_HALT;
  240. }
  241. /* the C0 state only exists as a filler in our array */
  242. pr->power.states[ACPI_STATE_C0].valid = 1;
  243. return 0;
  244. }
  245. static int acpi_processor_get_power_info_cst(struct acpi_processor *pr)
  246. {
  247. acpi_status status = 0;
  248. acpi_integer count;
  249. int current_count;
  250. int i;
  251. struct acpi_buffer buffer = { ACPI_ALLOCATE_BUFFER, NULL };
  252. union acpi_object *cst;
  253. if (nocst)
  254. return -ENODEV;
  255. current_count = 0;
  256. status = acpi_evaluate_object(pr->handle, "_CST", NULL, &buffer);
  257. if (ACPI_FAILURE(status)) {
  258. ACPI_DEBUG_PRINT((ACPI_DB_INFO, "No _CST, giving up\n"));
  259. return -ENODEV;
  260. }
  261. cst = buffer.pointer;
  262. /* There must be at least 2 elements */
  263. if (!cst || (cst->type != ACPI_TYPE_PACKAGE) || cst->package.count < 2) {
  264. printk(KERN_ERR PREFIX "not enough elements in _CST\n");
  265. status = -EFAULT;
  266. goto end;
  267. }
  268. count = cst->package.elements[0].integer.value;
  269. /* Validate number of power states. */
  270. if (count < 1 || count != cst->package.count - 1) {
  271. printk(KERN_ERR PREFIX "count given by _CST is not valid\n");
  272. status = -EFAULT;
  273. goto end;
  274. }
  275. /* Tell driver that at least _CST is supported. */
  276. pr->flags.has_cst = 1;
  277. for (i = 1; i <= count; i++) {
  278. union acpi_object *element;
  279. union acpi_object *obj;
  280. struct acpi_power_register *reg;
  281. struct acpi_processor_cx cx;
  282. memset(&cx, 0, sizeof(cx));
  283. element = &(cst->package.elements[i]);
  284. if (element->type != ACPI_TYPE_PACKAGE)
  285. continue;
  286. if (element->package.count != 4)
  287. continue;
  288. obj = &(element->package.elements[0]);
  289. if (obj->type != ACPI_TYPE_BUFFER)
  290. continue;
  291. reg = (struct acpi_power_register *)obj->buffer.pointer;
  292. if (reg->space_id != ACPI_ADR_SPACE_SYSTEM_IO &&
  293. (reg->space_id != ACPI_ADR_SPACE_FIXED_HARDWARE))
  294. continue;
  295. /* There should be an easy way to extract an integer... */
  296. obj = &(element->package.elements[1]);
  297. if (obj->type != ACPI_TYPE_INTEGER)
  298. continue;
  299. cx.type = obj->integer.value;
  300. /*
  301. * Some buggy BIOSes won't list C1 in _CST -
  302. * Let acpi_processor_get_power_info_default() handle them later
  303. */
  304. if (i == 1 && cx.type != ACPI_STATE_C1)
  305. current_count++;
  306. cx.address = reg->address;
  307. cx.index = current_count + 1;
  308. cx.entry_method = ACPI_CSTATE_SYSTEMIO;
  309. if (reg->space_id == ACPI_ADR_SPACE_FIXED_HARDWARE) {
  310. if (acpi_processor_ffh_cstate_probe
  311. (pr->id, &cx, reg) == 0) {
  312. cx.entry_method = ACPI_CSTATE_FFH;
  313. } else if (cx.type == ACPI_STATE_C1) {
  314. /*
  315. * C1 is a special case where FIXED_HARDWARE
  316. * can be handled in non-MWAIT way as well.
  317. * In that case, save this _CST entry info.
  318. * Otherwise, ignore this info and continue.
  319. */
  320. cx.entry_method = ACPI_CSTATE_HALT;
  321. snprintf(cx.desc, ACPI_CX_DESC_LEN, "ACPI HLT");
  322. } else {
  323. continue;
  324. }
  325. if (cx.type == ACPI_STATE_C1 &&
  326. (idle_halt || idle_nomwait)) {
  327. /*
  328. * In most cases the C1 space_id obtained from
  329. * _CST object is FIXED_HARDWARE access mode.
  330. * But when the option of idle=halt is added,
  331. * the entry_method type should be changed from
  332. * CSTATE_FFH to CSTATE_HALT.
  333. * When the option of idle=nomwait is added,
  334. * the C1 entry_method type should be
  335. * CSTATE_HALT.
  336. */
  337. cx.entry_method = ACPI_CSTATE_HALT;
  338. snprintf(cx.desc, ACPI_CX_DESC_LEN, "ACPI HLT");
  339. }
  340. } else {
  341. snprintf(cx.desc, ACPI_CX_DESC_LEN, "ACPI IOPORT 0x%x",
  342. cx.address);
  343. }
  344. if (cx.type == ACPI_STATE_C1) {
  345. cx.valid = 1;
  346. }
  347. obj = &(element->package.elements[2]);
  348. if (obj->type != ACPI_TYPE_INTEGER)
  349. continue;
  350. cx.latency = obj->integer.value;
  351. obj = &(element->package.elements[3]);
  352. if (obj->type != ACPI_TYPE_INTEGER)
  353. continue;
  354. cx.power = obj->integer.value;
  355. current_count++;
  356. memcpy(&(pr->power.states[current_count]), &cx, sizeof(cx));
  357. /*
  358. * We support total ACPI_PROCESSOR_MAX_POWER - 1
  359. * (From 1 through ACPI_PROCESSOR_MAX_POWER - 1)
  360. */
  361. if (current_count >= (ACPI_PROCESSOR_MAX_POWER - 1)) {
  362. printk(KERN_WARNING
  363. "Limiting number of power states to max (%d)\n",
  364. ACPI_PROCESSOR_MAX_POWER);
  365. printk(KERN_WARNING
  366. "Please increase ACPI_PROCESSOR_MAX_POWER if needed.\n");
  367. break;
  368. }
  369. }
  370. ACPI_DEBUG_PRINT((ACPI_DB_INFO, "Found %d power states\n",
  371. current_count));
  372. /* Validate number of power states discovered */
  373. if (current_count < 2)
  374. status = -EFAULT;
  375. end:
  376. kfree(buffer.pointer);
  377. return status;
  378. }
  379. static void acpi_processor_power_verify_c2(struct acpi_processor_cx *cx)
  380. {
  381. if (!cx->address)
  382. return;
  383. /*
  384. * C2 latency must be less than or equal to 100
  385. * microseconds.
  386. */
  387. else if (cx->latency > ACPI_PROCESSOR_MAX_C2_LATENCY) {
  388. ACPI_DEBUG_PRINT((ACPI_DB_INFO,
  389. "latency too large [%d]\n", cx->latency));
  390. return;
  391. }
  392. /*
  393. * Otherwise we've met all of our C2 requirements.
  394. * Normalize the C2 latency to expidite policy
  395. */
  396. cx->valid = 1;
  397. cx->latency_ticks = cx->latency;
  398. return;
  399. }
  400. static void acpi_processor_power_verify_c3(struct acpi_processor *pr,
  401. struct acpi_processor_cx *cx)
  402. {
  403. static int bm_check_flag;
  404. if (!cx->address)
  405. return;
  406. /*
  407. * C3 latency must be less than or equal to 1000
  408. * microseconds.
  409. */
  410. else if (cx->latency > ACPI_PROCESSOR_MAX_C3_LATENCY) {
  411. ACPI_DEBUG_PRINT((ACPI_DB_INFO,
  412. "latency too large [%d]\n", cx->latency));
  413. return;
  414. }
  415. /*
  416. * PIIX4 Erratum #18: We don't support C3 when Type-F (fast)
  417. * DMA transfers are used by any ISA device to avoid livelock.
  418. * Note that we could disable Type-F DMA (as recommended by
  419. * the erratum), but this is known to disrupt certain ISA
  420. * devices thus we take the conservative approach.
  421. */
  422. else if (errata.piix4.fdma) {
  423. ACPI_DEBUG_PRINT((ACPI_DB_INFO,
  424. "C3 not supported on PIIX4 with Type-F DMA\n"));
  425. return;
  426. }
  427. /* All the logic here assumes flags.bm_check is same across all CPUs */
  428. if (!bm_check_flag) {
  429. /* Determine whether bm_check is needed based on CPU */
  430. acpi_processor_power_init_bm_check(&(pr->flags), pr->id);
  431. bm_check_flag = pr->flags.bm_check;
  432. } else {
  433. pr->flags.bm_check = bm_check_flag;
  434. }
  435. if (pr->flags.bm_check) {
  436. if (!pr->flags.bm_control) {
  437. if (pr->flags.has_cst != 1) {
  438. /* bus mastering control is necessary */
  439. ACPI_DEBUG_PRINT((ACPI_DB_INFO,
  440. "C3 support requires BM control\n"));
  441. return;
  442. } else {
  443. /* Here we enter C3 without bus mastering */
  444. ACPI_DEBUG_PRINT((ACPI_DB_INFO,
  445. "C3 support without BM control\n"));
  446. }
  447. }
  448. } else {
  449. /*
  450. * WBINVD should be set in fadt, for C3 state to be
  451. * supported on when bm_check is not required.
  452. */
  453. if (!(acpi_gbl_FADT.flags & ACPI_FADT_WBINVD)) {
  454. ACPI_DEBUG_PRINT((ACPI_DB_INFO,
  455. "Cache invalidation should work properly"
  456. " for C3 to be enabled on SMP systems\n"));
  457. return;
  458. }
  459. }
  460. /*
  461. * Otherwise we've met all of our C3 requirements.
  462. * Normalize the C3 latency to expidite policy. Enable
  463. * checking of bus mastering status (bm_check) so we can
  464. * use this in our C3 policy
  465. */
  466. cx->valid = 1;
  467. cx->latency_ticks = cx->latency;
  468. /*
  469. * On older chipsets, BM_RLD needs to be set
  470. * in order for Bus Master activity to wake the
  471. * system from C3. Newer chipsets handle DMA
  472. * during C3 automatically and BM_RLD is a NOP.
  473. * In either case, the proper way to
  474. * handle BM_RLD is to set it and leave it set.
  475. */
  476. acpi_write_bit_register(ACPI_BITREG_BUS_MASTER_RLD, 1);
  477. return;
  478. }
  479. static int acpi_processor_power_verify(struct acpi_processor *pr)
  480. {
  481. unsigned int i;
  482. unsigned int working = 0;
  483. pr->power.timer_broadcast_on_state = INT_MAX;
  484. for (i = 1; i < ACPI_PROCESSOR_MAX_POWER; i++) {
  485. struct acpi_processor_cx *cx = &pr->power.states[i];
  486. switch (cx->type) {
  487. case ACPI_STATE_C1:
  488. cx->valid = 1;
  489. break;
  490. case ACPI_STATE_C2:
  491. acpi_processor_power_verify_c2(cx);
  492. if (cx->valid)
  493. acpi_timer_check_state(i, pr, cx);
  494. break;
  495. case ACPI_STATE_C3:
  496. acpi_processor_power_verify_c3(pr, cx);
  497. if (cx->valid)
  498. acpi_timer_check_state(i, pr, cx);
  499. break;
  500. }
  501. if (cx->valid)
  502. working++;
  503. }
  504. acpi_propagate_timer_broadcast(pr);
  505. return (working);
  506. }
  507. static int acpi_processor_get_power_info(struct acpi_processor *pr)
  508. {
  509. unsigned int i;
  510. int result;
  511. /* NOTE: the idle thread may not be running while calling
  512. * this function */
  513. /* Zero initialize all the C-states info. */
  514. memset(pr->power.states, 0, sizeof(pr->power.states));
  515. result = acpi_processor_get_power_info_cst(pr);
  516. if (result == -ENODEV)
  517. result = acpi_processor_get_power_info_fadt(pr);
  518. if (result)
  519. return result;
  520. acpi_processor_get_power_info_default(pr);
  521. pr->power.count = acpi_processor_power_verify(pr);
  522. /*
  523. * if one state of type C2 or C3 is available, mark this
  524. * CPU as being "idle manageable"
  525. */
  526. for (i = 1; i < ACPI_PROCESSOR_MAX_POWER; i++) {
  527. if (pr->power.states[i].valid) {
  528. pr->power.count = i;
  529. if (pr->power.states[i].type >= ACPI_STATE_C2)
  530. pr->flags.power = 1;
  531. }
  532. }
  533. return 0;
  534. }
  535. static int acpi_processor_power_seq_show(struct seq_file *seq, void *offset)
  536. {
  537. struct acpi_processor *pr = seq->private;
  538. unsigned int i;
  539. if (!pr)
  540. goto end;
  541. seq_printf(seq, "active state: C%zd\n"
  542. "max_cstate: C%d\n"
  543. "bus master activity: %08x\n"
  544. "maximum allowed latency: %d usec\n",
  545. pr->power.state ? pr->power.state - pr->power.states : 0,
  546. max_cstate, (unsigned)pr->power.bm_activity,
  547. pm_qos_requirement(PM_QOS_CPU_DMA_LATENCY));
  548. seq_puts(seq, "states:\n");
  549. for (i = 1; i <= pr->power.count; i++) {
  550. seq_printf(seq, " %cC%d: ",
  551. (&pr->power.states[i] ==
  552. pr->power.state ? '*' : ' '), i);
  553. if (!pr->power.states[i].valid) {
  554. seq_puts(seq, "<not supported>\n");
  555. continue;
  556. }
  557. switch (pr->power.states[i].type) {
  558. case ACPI_STATE_C1:
  559. seq_printf(seq, "type[C1] ");
  560. break;
  561. case ACPI_STATE_C2:
  562. seq_printf(seq, "type[C2] ");
  563. break;
  564. case ACPI_STATE_C3:
  565. seq_printf(seq, "type[C3] ");
  566. break;
  567. default:
  568. seq_printf(seq, "type[--] ");
  569. break;
  570. }
  571. if (pr->power.states[i].promotion.state)
  572. seq_printf(seq, "promotion[C%zd] ",
  573. (pr->power.states[i].promotion.state -
  574. pr->power.states));
  575. else
  576. seq_puts(seq, "promotion[--] ");
  577. if (pr->power.states[i].demotion.state)
  578. seq_printf(seq, "demotion[C%zd] ",
  579. (pr->power.states[i].demotion.state -
  580. pr->power.states));
  581. else
  582. seq_puts(seq, "demotion[--] ");
  583. seq_printf(seq, "latency[%03d] usage[%08d] duration[%020llu]\n",
  584. pr->power.states[i].latency,
  585. pr->power.states[i].usage,
  586. (unsigned long long)pr->power.states[i].time);
  587. }
  588. end:
  589. return 0;
  590. }
  591. static int acpi_processor_power_open_fs(struct inode *inode, struct file *file)
  592. {
  593. return single_open(file, acpi_processor_power_seq_show,
  594. PDE(inode)->data);
  595. }
  596. static const struct file_operations acpi_processor_power_fops = {
  597. .owner = THIS_MODULE,
  598. .open = acpi_processor_power_open_fs,
  599. .read = seq_read,
  600. .llseek = seq_lseek,
  601. .release = single_release,
  602. };
  603. /**
  604. * acpi_idle_bm_check - checks if bus master activity was detected
  605. */
  606. static int acpi_idle_bm_check(void)
  607. {
  608. u32 bm_status = 0;
  609. acpi_read_bit_register(ACPI_BITREG_BUS_MASTER_STATUS, &bm_status);
  610. if (bm_status)
  611. acpi_write_bit_register(ACPI_BITREG_BUS_MASTER_STATUS, 1);
  612. /*
  613. * PIIX4 Erratum #18: Note that BM_STS doesn't always reflect
  614. * the true state of bus mastering activity; forcing us to
  615. * manually check the BMIDEA bit of each IDE channel.
  616. */
  617. else if (errata.piix4.bmisx) {
  618. if ((inb_p(errata.piix4.bmisx + 0x02) & 0x01)
  619. || (inb_p(errata.piix4.bmisx + 0x0A) & 0x01))
  620. bm_status = 1;
  621. }
  622. return bm_status;
  623. }
  624. /**
  625. * acpi_idle_do_entry - a helper function that does C2 and C3 type entry
  626. * @cx: cstate data
  627. *
  628. * Caller disables interrupt before call and enables interrupt after return.
  629. */
  630. static inline void acpi_idle_do_entry(struct acpi_processor_cx *cx)
  631. {
  632. /* Don't trace irqs off for idle */
  633. stop_critical_timings();
  634. if (cx->entry_method == ACPI_CSTATE_FFH) {
  635. /* Call into architectural FFH based C-state */
  636. acpi_processor_ffh_cstate_enter(cx);
  637. } else if (cx->entry_method == ACPI_CSTATE_HALT) {
  638. acpi_safe_halt();
  639. } else {
  640. int unused;
  641. /* IO port based C-state */
  642. inb(cx->address);
  643. /* Dummy wait op - must do something useless after P_LVL2 read
  644. because chipsets cannot guarantee that STPCLK# signal
  645. gets asserted in time to freeze execution properly. */
  646. unused = inl(acpi_gbl_FADT.xpm_timer_block.address);
  647. }
  648. start_critical_timings();
  649. }
  650. /**
  651. * acpi_idle_enter_c1 - enters an ACPI C1 state-type
  652. * @dev: the target CPU
  653. * @state: the state data
  654. *
  655. * This is equivalent to the HALT instruction.
  656. */
  657. static int acpi_idle_enter_c1(struct cpuidle_device *dev,
  658. struct cpuidle_state *state)
  659. {
  660. ktime_t kt1, kt2;
  661. s64 idle_time;
  662. struct acpi_processor *pr;
  663. struct acpi_processor_cx *cx = cpuidle_get_statedata(state);
  664. pr = __get_cpu_var(processors);
  665. if (unlikely(!pr))
  666. return 0;
  667. local_irq_disable();
  668. /* Do not access any ACPI IO ports in suspend path */
  669. if (acpi_idle_suspend) {
  670. acpi_safe_halt();
  671. local_irq_enable();
  672. return 0;
  673. }
  674. kt1 = ktime_get_real();
  675. acpi_idle_do_entry(cx);
  676. kt2 = ktime_get_real();
  677. idle_time = ktime_to_us(ktime_sub(kt2, kt1));
  678. local_irq_enable();
  679. cx->usage++;
  680. return idle_time;
  681. }
  682. /**
  683. * acpi_idle_enter_simple - enters an ACPI state without BM handling
  684. * @dev: the target CPU
  685. * @state: the state data
  686. */
  687. static int acpi_idle_enter_simple(struct cpuidle_device *dev,
  688. struct cpuidle_state *state)
  689. {
  690. struct acpi_processor *pr;
  691. struct acpi_processor_cx *cx = cpuidle_get_statedata(state);
  692. ktime_t kt1, kt2;
  693. s64 idle_time;
  694. s64 sleep_ticks = 0;
  695. pr = __get_cpu_var(processors);
  696. if (unlikely(!pr))
  697. return 0;
  698. if (acpi_idle_suspend)
  699. return(acpi_idle_enter_c1(dev, state));
  700. local_irq_disable();
  701. current_thread_info()->status &= ~TS_POLLING;
  702. /*
  703. * TS_POLLING-cleared state must be visible before we test
  704. * NEED_RESCHED:
  705. */
  706. smp_mb();
  707. if (unlikely(need_resched())) {
  708. current_thread_info()->status |= TS_POLLING;
  709. local_irq_enable();
  710. return 0;
  711. }
  712. /*
  713. * Must be done before busmaster disable as we might need to
  714. * access HPET !
  715. */
  716. acpi_state_timer_broadcast(pr, cx, 1);
  717. if (cx->type == ACPI_STATE_C3)
  718. ACPI_FLUSH_CPU_CACHE();
  719. kt1 = ktime_get_real();
  720. /* Tell the scheduler that we are going deep-idle: */
  721. sched_clock_idle_sleep_event();
  722. acpi_idle_do_entry(cx);
  723. kt2 = ktime_get_real();
  724. idle_time = ktime_to_us(ktime_sub(kt2, kt1));
  725. #if defined (CONFIG_GENERIC_TIME) && defined (CONFIG_X86)
  726. /* TSC could halt in idle, so notify users */
  727. if (tsc_halts_in_c(cx->type))
  728. mark_tsc_unstable("TSC halts in idle");;
  729. #endif
  730. sleep_ticks = us_to_pm_timer_ticks(idle_time);
  731. /* Tell the scheduler how much we idled: */
  732. sched_clock_idle_wakeup_event(sleep_ticks*PM_TIMER_TICK_NS);
  733. local_irq_enable();
  734. current_thread_info()->status |= TS_POLLING;
  735. cx->usage++;
  736. acpi_state_timer_broadcast(pr, cx, 0);
  737. cx->time += sleep_ticks;
  738. return idle_time;
  739. }
  740. static int c3_cpu_count;
  741. static DEFINE_SPINLOCK(c3_lock);
  742. /**
  743. * acpi_idle_enter_bm - enters C3 with proper BM handling
  744. * @dev: the target CPU
  745. * @state: the state data
  746. *
  747. * If BM is detected, the deepest non-C3 idle state is entered instead.
  748. */
  749. static int acpi_idle_enter_bm(struct cpuidle_device *dev,
  750. struct cpuidle_state *state)
  751. {
  752. struct acpi_processor *pr;
  753. struct acpi_processor_cx *cx = cpuidle_get_statedata(state);
  754. ktime_t kt1, kt2;
  755. s64 idle_time;
  756. s64 sleep_ticks = 0;
  757. pr = __get_cpu_var(processors);
  758. if (unlikely(!pr))
  759. return 0;
  760. if (acpi_idle_suspend)
  761. return(acpi_idle_enter_c1(dev, state));
  762. if (acpi_idle_bm_check()) {
  763. if (dev->safe_state) {
  764. dev->last_state = dev->safe_state;
  765. return dev->safe_state->enter(dev, dev->safe_state);
  766. } else {
  767. local_irq_disable();
  768. acpi_safe_halt();
  769. local_irq_enable();
  770. return 0;
  771. }
  772. }
  773. local_irq_disable();
  774. current_thread_info()->status &= ~TS_POLLING;
  775. /*
  776. * TS_POLLING-cleared state must be visible before we test
  777. * NEED_RESCHED:
  778. */
  779. smp_mb();
  780. if (unlikely(need_resched())) {
  781. current_thread_info()->status |= TS_POLLING;
  782. local_irq_enable();
  783. return 0;
  784. }
  785. acpi_unlazy_tlb(smp_processor_id());
  786. /* Tell the scheduler that we are going deep-idle: */
  787. sched_clock_idle_sleep_event();
  788. /*
  789. * Must be done before busmaster disable as we might need to
  790. * access HPET !
  791. */
  792. acpi_state_timer_broadcast(pr, cx, 1);
  793. /*
  794. * disable bus master
  795. * bm_check implies we need ARB_DIS
  796. * !bm_check implies we need cache flush
  797. * bm_control implies whether we can do ARB_DIS
  798. *
  799. * That leaves a case where bm_check is set and bm_control is
  800. * not set. In that case we cannot do much, we enter C3
  801. * without doing anything.
  802. */
  803. if (pr->flags.bm_check && pr->flags.bm_control) {
  804. spin_lock(&c3_lock);
  805. c3_cpu_count++;
  806. /* Disable bus master arbitration when all CPUs are in C3 */
  807. if (c3_cpu_count == num_online_cpus())
  808. acpi_write_bit_register(ACPI_BITREG_ARB_DISABLE, 1);
  809. spin_unlock(&c3_lock);
  810. } else if (!pr->flags.bm_check) {
  811. ACPI_FLUSH_CPU_CACHE();
  812. }
  813. kt1 = ktime_get_real();
  814. acpi_idle_do_entry(cx);
  815. kt2 = ktime_get_real();
  816. idle_time = ktime_to_us(ktime_sub(kt2, kt1));
  817. /* Re-enable bus master arbitration */
  818. if (pr->flags.bm_check && pr->flags.bm_control) {
  819. spin_lock(&c3_lock);
  820. acpi_write_bit_register(ACPI_BITREG_ARB_DISABLE, 0);
  821. c3_cpu_count--;
  822. spin_unlock(&c3_lock);
  823. }
  824. #if defined (CONFIG_GENERIC_TIME) && defined (CONFIG_X86)
  825. /* TSC could halt in idle, so notify users */
  826. if (tsc_halts_in_c(ACPI_STATE_C3))
  827. mark_tsc_unstable("TSC halts in idle");
  828. #endif
  829. sleep_ticks = us_to_pm_timer_ticks(idle_time);
  830. /* Tell the scheduler how much we idled: */
  831. sched_clock_idle_wakeup_event(sleep_ticks*PM_TIMER_TICK_NS);
  832. local_irq_enable();
  833. current_thread_info()->status |= TS_POLLING;
  834. cx->usage++;
  835. acpi_state_timer_broadcast(pr, cx, 0);
  836. cx->time += sleep_ticks;
  837. return idle_time;
  838. }
  839. struct cpuidle_driver acpi_idle_driver = {
  840. .name = "acpi_idle",
  841. .owner = THIS_MODULE,
  842. };
  843. /**
  844. * acpi_processor_setup_cpuidle - prepares and configures CPUIDLE
  845. * @pr: the ACPI processor
  846. */
  847. static int acpi_processor_setup_cpuidle(struct acpi_processor *pr)
  848. {
  849. int i, count = CPUIDLE_DRIVER_STATE_START;
  850. struct acpi_processor_cx *cx;
  851. struct cpuidle_state *state;
  852. struct cpuidle_device *dev = &pr->power.dev;
  853. if (!pr->flags.power_setup_done)
  854. return -EINVAL;
  855. if (pr->flags.power == 0) {
  856. return -EINVAL;
  857. }
  858. dev->cpu = pr->id;
  859. for (i = 0; i < CPUIDLE_STATE_MAX; i++) {
  860. dev->states[i].name[0] = '\0';
  861. dev->states[i].desc[0] = '\0';
  862. }
  863. for (i = 1; i < ACPI_PROCESSOR_MAX_POWER && i <= max_cstate; i++) {
  864. cx = &pr->power.states[i];
  865. state = &dev->states[count];
  866. if (!cx->valid)
  867. continue;
  868. #ifdef CONFIG_HOTPLUG_CPU
  869. if ((cx->type != ACPI_STATE_C1) && (num_online_cpus() > 1) &&
  870. !pr->flags.has_cst &&
  871. !(acpi_gbl_FADT.flags & ACPI_FADT_C2_MP_SUPPORTED))
  872. continue;
  873. #endif
  874. cpuidle_set_statedata(state, cx);
  875. snprintf(state->name, CPUIDLE_NAME_LEN, "C%d", i);
  876. strncpy(state->desc, cx->desc, CPUIDLE_DESC_LEN);
  877. state->exit_latency = cx->latency;
  878. state->target_residency = cx->latency * latency_factor;
  879. state->power_usage = cx->power;
  880. state->flags = 0;
  881. switch (cx->type) {
  882. case ACPI_STATE_C1:
  883. state->flags |= CPUIDLE_FLAG_SHALLOW;
  884. if (cx->entry_method == ACPI_CSTATE_FFH)
  885. state->flags |= CPUIDLE_FLAG_TIME_VALID;
  886. state->enter = acpi_idle_enter_c1;
  887. dev->safe_state = state;
  888. break;
  889. case ACPI_STATE_C2:
  890. state->flags |= CPUIDLE_FLAG_BALANCED;
  891. state->flags |= CPUIDLE_FLAG_TIME_VALID;
  892. state->enter = acpi_idle_enter_simple;
  893. dev->safe_state = state;
  894. break;
  895. case ACPI_STATE_C3:
  896. state->flags |= CPUIDLE_FLAG_DEEP;
  897. state->flags |= CPUIDLE_FLAG_TIME_VALID;
  898. state->flags |= CPUIDLE_FLAG_CHECK_BM;
  899. state->enter = pr->flags.bm_check ?
  900. acpi_idle_enter_bm :
  901. acpi_idle_enter_simple;
  902. break;
  903. }
  904. count++;
  905. if (count == CPUIDLE_STATE_MAX)
  906. break;
  907. }
  908. dev->state_count = count;
  909. if (!count)
  910. return -EINVAL;
  911. return 0;
  912. }
  913. int acpi_processor_cst_has_changed(struct acpi_processor *pr)
  914. {
  915. int ret = 0;
  916. if (boot_option_idle_override)
  917. return 0;
  918. if (!pr)
  919. return -EINVAL;
  920. if (nocst) {
  921. return -ENODEV;
  922. }
  923. if (!pr->flags.power_setup_done)
  924. return -ENODEV;
  925. cpuidle_pause_and_lock();
  926. cpuidle_disable_device(&pr->power.dev);
  927. acpi_processor_get_power_info(pr);
  928. if (pr->flags.power) {
  929. acpi_processor_setup_cpuidle(pr);
  930. ret = cpuidle_enable_device(&pr->power.dev);
  931. }
  932. cpuidle_resume_and_unlock();
  933. return ret;
  934. }
  935. int __cpuinit acpi_processor_power_init(struct acpi_processor *pr,
  936. struct acpi_device *device)
  937. {
  938. acpi_status status = 0;
  939. static int first_run;
  940. struct proc_dir_entry *entry = NULL;
  941. unsigned int i;
  942. if (boot_option_idle_override)
  943. return 0;
  944. if (!first_run) {
  945. if (idle_halt) {
  946. /*
  947. * When the boot option of "idle=halt" is added, halt
  948. * is used for CPU IDLE.
  949. * In such case C2/C3 is meaningless. So the max_cstate
  950. * is set to one.
  951. */
  952. max_cstate = 1;
  953. }
  954. dmi_check_system(processor_power_dmi_table);
  955. max_cstate = acpi_processor_cstate_check(max_cstate);
  956. if (max_cstate < ACPI_C_STATES_MAX)
  957. printk(KERN_NOTICE
  958. "ACPI: processor limited to max C-state %d\n",
  959. max_cstate);
  960. first_run++;
  961. }
  962. if (!pr)
  963. return -EINVAL;
  964. if (acpi_gbl_FADT.cst_control && !nocst) {
  965. status =
  966. acpi_os_write_port(acpi_gbl_FADT.smi_command, acpi_gbl_FADT.cst_control, 8);
  967. if (ACPI_FAILURE(status)) {
  968. ACPI_EXCEPTION((AE_INFO, status,
  969. "Notifying BIOS of _CST ability failed"));
  970. }
  971. }
  972. acpi_processor_get_power_info(pr);
  973. pr->flags.power_setup_done = 1;
  974. /*
  975. * Install the idle handler if processor power management is supported.
  976. * Note that we use previously set idle handler will be used on
  977. * platforms that only support C1.
  978. */
  979. if (pr->flags.power) {
  980. acpi_processor_setup_cpuidle(pr);
  981. if (cpuidle_register_device(&pr->power.dev))
  982. return -EIO;
  983. printk(KERN_INFO PREFIX "CPU%d (power states:", pr->id);
  984. for (i = 1; i <= pr->power.count; i++)
  985. if (pr->power.states[i].valid)
  986. printk(" C%d[C%d]", i,
  987. pr->power.states[i].type);
  988. printk(")\n");
  989. }
  990. /* 'power' [R] */
  991. entry = proc_create_data(ACPI_PROCESSOR_FILE_POWER,
  992. S_IRUGO, acpi_device_dir(device),
  993. &acpi_processor_power_fops,
  994. acpi_driver_data(device));
  995. if (!entry)
  996. return -EIO;
  997. return 0;
  998. }
  999. int acpi_processor_power_exit(struct acpi_processor *pr,
  1000. struct acpi_device *device)
  1001. {
  1002. if (boot_option_idle_override)
  1003. return 0;
  1004. cpuidle_unregister_device(&pr->power.dev);
  1005. pr->flags.power_setup_done = 0;
  1006. if (acpi_device_dir(device))
  1007. remove_proc_entry(ACPI_PROCESSOR_FILE_POWER,
  1008. acpi_device_dir(device));
  1009. return 0;
  1010. }