intel_lvds.c 31 KB

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  1. /*
  2. * Copyright © 2006-2007 Intel Corporation
  3. * Copyright (c) 2006 Dave Airlie <airlied@linux.ie>
  4. *
  5. * Permission is hereby granted, free of charge, to any person obtaining a
  6. * copy of this software and associated documentation files (the "Software"),
  7. * to deal in the Software without restriction, including without limitation
  8. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  9. * and/or sell copies of the Software, and to permit persons to whom the
  10. * Software is furnished to do so, subject to the following conditions:
  11. *
  12. * The above copyright notice and this permission notice (including the next
  13. * paragraph) shall be included in all copies or substantial portions of the
  14. * Software.
  15. *
  16. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  19. * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20. * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  21. * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  22. * DEALINGS IN THE SOFTWARE.
  23. *
  24. * Authors:
  25. * Eric Anholt <eric@anholt.net>
  26. * Dave Airlie <airlied@linux.ie>
  27. * Jesse Barnes <jesse.barnes@intel.com>
  28. */
  29. #include <acpi/button.h>
  30. #include <linux/dmi.h>
  31. #include <linux/i2c.h>
  32. #include <linux/slab.h>
  33. #include <drm/drmP.h>
  34. #include <drm/drm_crtc.h>
  35. #include <drm/drm_edid.h>
  36. #include "intel_drv.h"
  37. #include <drm/i915_drm.h>
  38. #include "i915_drv.h"
  39. #include <linux/acpi.h>
  40. /* Private structure for the integrated LVDS support */
  41. struct intel_lvds_connector {
  42. struct intel_connector base;
  43. struct notifier_block lid_notifier;
  44. };
  45. struct intel_lvds_encoder {
  46. struct intel_encoder base;
  47. bool is_dual_link;
  48. u32 reg;
  49. struct intel_lvds_connector *attached_connector;
  50. };
  51. static struct intel_lvds_encoder *to_lvds_encoder(struct drm_encoder *encoder)
  52. {
  53. return container_of(encoder, struct intel_lvds_encoder, base.base);
  54. }
  55. static struct intel_lvds_connector *to_lvds_connector(struct drm_connector *connector)
  56. {
  57. return container_of(connector, struct intel_lvds_connector, base.base);
  58. }
  59. static bool intel_lvds_get_hw_state(struct intel_encoder *encoder,
  60. enum pipe *pipe)
  61. {
  62. struct drm_device *dev = encoder->base.dev;
  63. struct drm_i915_private *dev_priv = dev->dev_private;
  64. struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base);
  65. u32 tmp;
  66. tmp = I915_READ(lvds_encoder->reg);
  67. if (!(tmp & LVDS_PORT_EN))
  68. return false;
  69. if (HAS_PCH_CPT(dev))
  70. *pipe = PORT_TO_PIPE_CPT(tmp);
  71. else
  72. *pipe = PORT_TO_PIPE(tmp);
  73. return true;
  74. }
  75. /* The LVDS pin pair needs to be on before the DPLLs are enabled.
  76. * This is an exception to the general rule that mode_set doesn't turn
  77. * things on.
  78. */
  79. static void intel_pre_pll_enable_lvds(struct intel_encoder *encoder)
  80. {
  81. struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base);
  82. struct drm_device *dev = encoder->base.dev;
  83. struct drm_i915_private *dev_priv = dev->dev_private;
  84. struct intel_crtc *intel_crtc = to_intel_crtc(encoder->base.crtc);
  85. struct drm_display_mode *fixed_mode =
  86. lvds_encoder->attached_connector->base.panel.fixed_mode;
  87. int pipe = intel_crtc->pipe;
  88. u32 temp;
  89. temp = I915_READ(lvds_encoder->reg);
  90. temp |= LVDS_PORT_EN | LVDS_A0A2_CLKA_POWER_UP;
  91. if (HAS_PCH_CPT(dev)) {
  92. temp &= ~PORT_TRANS_SEL_MASK;
  93. temp |= PORT_TRANS_SEL_CPT(pipe);
  94. } else {
  95. if (pipe == 1) {
  96. temp |= LVDS_PIPEB_SELECT;
  97. } else {
  98. temp &= ~LVDS_PIPEB_SELECT;
  99. }
  100. }
  101. /* set the corresponsding LVDS_BORDER bit */
  102. temp |= dev_priv->lvds_border_bits;
  103. /* Set the B0-B3 data pairs corresponding to whether we're going to
  104. * set the DPLLs for dual-channel mode or not.
  105. */
  106. if (lvds_encoder->is_dual_link)
  107. temp |= LVDS_B0B3_POWER_UP | LVDS_CLKB_POWER_UP;
  108. else
  109. temp &= ~(LVDS_B0B3_POWER_UP | LVDS_CLKB_POWER_UP);
  110. /* It would be nice to set 24 vs 18-bit mode (LVDS_A3_POWER_UP)
  111. * appropriately here, but we need to look more thoroughly into how
  112. * panels behave in the two modes.
  113. */
  114. /* Set the dithering flag on LVDS as needed, note that there is no
  115. * special lvds dither control bit on pch-split platforms, dithering is
  116. * only controlled through the PIPECONF reg. */
  117. if (INTEL_INFO(dev)->gen == 4) {
  118. /* Bspec wording suggests that LVDS port dithering only exists
  119. * for 18bpp panels. */
  120. if (intel_crtc->config.dither &&
  121. intel_crtc->config.pipe_bpp == 18)
  122. temp |= LVDS_ENABLE_DITHER;
  123. else
  124. temp &= ~LVDS_ENABLE_DITHER;
  125. }
  126. temp &= ~(LVDS_HSYNC_POLARITY | LVDS_VSYNC_POLARITY);
  127. if (fixed_mode->flags & DRM_MODE_FLAG_NHSYNC)
  128. temp |= LVDS_HSYNC_POLARITY;
  129. if (fixed_mode->flags & DRM_MODE_FLAG_NVSYNC)
  130. temp |= LVDS_VSYNC_POLARITY;
  131. I915_WRITE(lvds_encoder->reg, temp);
  132. }
  133. /**
  134. * Sets the power state for the panel.
  135. */
  136. static void intel_enable_lvds(struct intel_encoder *encoder)
  137. {
  138. struct drm_device *dev = encoder->base.dev;
  139. struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base);
  140. struct intel_crtc *intel_crtc = to_intel_crtc(encoder->base.crtc);
  141. struct drm_i915_private *dev_priv = dev->dev_private;
  142. u32 ctl_reg, stat_reg;
  143. if (HAS_PCH_SPLIT(dev)) {
  144. ctl_reg = PCH_PP_CONTROL;
  145. stat_reg = PCH_PP_STATUS;
  146. } else {
  147. ctl_reg = PP_CONTROL;
  148. stat_reg = PP_STATUS;
  149. }
  150. I915_WRITE(lvds_encoder->reg, I915_READ(lvds_encoder->reg) | LVDS_PORT_EN);
  151. I915_WRITE(ctl_reg, I915_READ(ctl_reg) | POWER_TARGET_ON);
  152. POSTING_READ(lvds_encoder->reg);
  153. if (wait_for((I915_READ(stat_reg) & PP_ON) != 0, 1000))
  154. DRM_ERROR("timed out waiting for panel to power on\n");
  155. intel_panel_enable_backlight(dev, intel_crtc->pipe);
  156. }
  157. static void intel_disable_lvds(struct intel_encoder *encoder)
  158. {
  159. struct drm_device *dev = encoder->base.dev;
  160. struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base);
  161. struct drm_i915_private *dev_priv = dev->dev_private;
  162. u32 ctl_reg, stat_reg;
  163. if (HAS_PCH_SPLIT(dev)) {
  164. ctl_reg = PCH_PP_CONTROL;
  165. stat_reg = PCH_PP_STATUS;
  166. } else {
  167. ctl_reg = PP_CONTROL;
  168. stat_reg = PP_STATUS;
  169. }
  170. intel_panel_disable_backlight(dev);
  171. I915_WRITE(ctl_reg, I915_READ(ctl_reg) & ~POWER_TARGET_ON);
  172. if (wait_for((I915_READ(stat_reg) & PP_ON) == 0, 1000))
  173. DRM_ERROR("timed out waiting for panel to power off\n");
  174. I915_WRITE(lvds_encoder->reg, I915_READ(lvds_encoder->reg) & ~LVDS_PORT_EN);
  175. POSTING_READ(lvds_encoder->reg);
  176. }
  177. static int intel_lvds_mode_valid(struct drm_connector *connector,
  178. struct drm_display_mode *mode)
  179. {
  180. struct intel_connector *intel_connector = to_intel_connector(connector);
  181. struct drm_display_mode *fixed_mode = intel_connector->panel.fixed_mode;
  182. if (mode->hdisplay > fixed_mode->hdisplay)
  183. return MODE_PANEL;
  184. if (mode->vdisplay > fixed_mode->vdisplay)
  185. return MODE_PANEL;
  186. return MODE_OK;
  187. }
  188. static bool intel_lvds_compute_config(struct intel_encoder *intel_encoder,
  189. struct intel_crtc_config *pipe_config)
  190. {
  191. struct drm_device *dev = intel_encoder->base.dev;
  192. struct drm_i915_private *dev_priv = dev->dev_private;
  193. struct intel_lvds_encoder *lvds_encoder =
  194. to_lvds_encoder(&intel_encoder->base);
  195. struct intel_connector *intel_connector =
  196. &lvds_encoder->attached_connector->base;
  197. struct drm_display_mode *adjusted_mode = &pipe_config->adjusted_mode;
  198. struct drm_display_mode *mode = &pipe_config->requested_mode;
  199. struct intel_crtc *intel_crtc = lvds_encoder->base.new_crtc;
  200. unsigned int lvds_bpp;
  201. int pipe;
  202. /* Should never happen!! */
  203. if (INTEL_INFO(dev)->gen < 4 && intel_crtc->pipe == 0) {
  204. DRM_ERROR("Can't support LVDS on pipe A\n");
  205. return false;
  206. }
  207. if (intel_encoder_check_is_cloned(&lvds_encoder->base))
  208. return false;
  209. if ((I915_READ(lvds_encoder->reg) & LVDS_A3_POWER_MASK) ==
  210. LVDS_A3_POWER_UP)
  211. lvds_bpp = 8*3;
  212. else
  213. lvds_bpp = 6*3;
  214. if (lvds_bpp != pipe_config->pipe_bpp) {
  215. DRM_DEBUG_KMS("forcing display bpp (was %d) to LVDS (%d)\n",
  216. pipe_config->pipe_bpp, lvds_bpp);
  217. pipe_config->pipe_bpp = lvds_bpp;
  218. }
  219. /*
  220. * We have timings from the BIOS for the panel, put them in
  221. * to the adjusted mode. The CRTC will be set up for this mode,
  222. * with the panel scaling set up to source from the H/VDisplay
  223. * of the original mode.
  224. */
  225. intel_fixed_panel_mode(intel_connector->panel.fixed_mode,
  226. adjusted_mode);
  227. if (HAS_PCH_SPLIT(dev)) {
  228. pipe_config->has_pch_encoder = true;
  229. intel_pch_panel_fitting(dev,
  230. intel_connector->panel.fitting_mode,
  231. mode, adjusted_mode);
  232. return true;
  233. } else {
  234. intel_gmch_panel_fitting(intel_crtc, pipe_config,
  235. intel_connector->panel.fitting_mode);
  236. }
  237. /*
  238. * Enable automatic panel scaling for non-native modes so that they fill
  239. * the screen. Should be enabled before the pipe is enabled, according
  240. * to register description and PRM.
  241. * Change the value here to see the borders for debugging
  242. */
  243. for_each_pipe(pipe)
  244. I915_WRITE(BCLRPAT(pipe), 0);
  245. drm_mode_set_crtcinfo(adjusted_mode, 0);
  246. pipe_config->timings_set = true;
  247. /*
  248. * XXX: It would be nice to support lower refresh rates on the
  249. * panels to reduce power consumption, and perhaps match the
  250. * user's requested refresh rate.
  251. */
  252. return true;
  253. }
  254. static void intel_lvds_mode_set(struct drm_encoder *encoder,
  255. struct drm_display_mode *mode,
  256. struct drm_display_mode *adjusted_mode)
  257. {
  258. /*
  259. * The LVDS pin pair will already have been turned on in the
  260. * intel_crtc_mode_set since it has a large impact on the DPLL
  261. * settings.
  262. */
  263. }
  264. /**
  265. * Detect the LVDS connection.
  266. *
  267. * Since LVDS doesn't have hotlug, we use the lid as a proxy. Open means
  268. * connected and closed means disconnected. We also send hotplug events as
  269. * needed, using lid status notification from the input layer.
  270. */
  271. static enum drm_connector_status
  272. intel_lvds_detect(struct drm_connector *connector, bool force)
  273. {
  274. struct drm_device *dev = connector->dev;
  275. enum drm_connector_status status;
  276. status = intel_panel_detect(dev);
  277. if (status != connector_status_unknown)
  278. return status;
  279. return connector_status_connected;
  280. }
  281. /**
  282. * Return the list of DDC modes if available, or the BIOS fixed mode otherwise.
  283. */
  284. static int intel_lvds_get_modes(struct drm_connector *connector)
  285. {
  286. struct intel_lvds_connector *lvds_connector = to_lvds_connector(connector);
  287. struct drm_device *dev = connector->dev;
  288. struct drm_display_mode *mode;
  289. /* use cached edid if we have one */
  290. if (!IS_ERR_OR_NULL(lvds_connector->base.edid))
  291. return drm_add_edid_modes(connector, lvds_connector->base.edid);
  292. mode = drm_mode_duplicate(dev, lvds_connector->base.panel.fixed_mode);
  293. if (mode == NULL)
  294. return 0;
  295. drm_mode_probed_add(connector, mode);
  296. return 1;
  297. }
  298. static int intel_no_modeset_on_lid_dmi_callback(const struct dmi_system_id *id)
  299. {
  300. DRM_INFO("Skipping forced modeset for %s\n", id->ident);
  301. return 1;
  302. }
  303. /* The GPU hangs up on these systems if modeset is performed on LID open */
  304. static const struct dmi_system_id intel_no_modeset_on_lid[] = {
  305. {
  306. .callback = intel_no_modeset_on_lid_dmi_callback,
  307. .ident = "Toshiba Tecra A11",
  308. .matches = {
  309. DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"),
  310. DMI_MATCH(DMI_PRODUCT_NAME, "TECRA A11"),
  311. },
  312. },
  313. { } /* terminating entry */
  314. };
  315. /*
  316. * Lid events. Note the use of 'modeset':
  317. * - we set it to MODESET_ON_LID_OPEN on lid close,
  318. * and set it to MODESET_DONE on open
  319. * - we use it as a "only once" bit (ie we ignore
  320. * duplicate events where it was already properly set)
  321. * - the suspend/resume paths will set it to
  322. * MODESET_SUSPENDED and ignore the lid open event,
  323. * because they restore the mode ("lid open").
  324. */
  325. static int intel_lid_notify(struct notifier_block *nb, unsigned long val,
  326. void *unused)
  327. {
  328. struct intel_lvds_connector *lvds_connector =
  329. container_of(nb, struct intel_lvds_connector, lid_notifier);
  330. struct drm_connector *connector = &lvds_connector->base.base;
  331. struct drm_device *dev = connector->dev;
  332. struct drm_i915_private *dev_priv = dev->dev_private;
  333. if (dev->switch_power_state != DRM_SWITCH_POWER_ON)
  334. return NOTIFY_OK;
  335. mutex_lock(&dev_priv->modeset_restore_lock);
  336. if (dev_priv->modeset_restore == MODESET_SUSPENDED)
  337. goto exit;
  338. /*
  339. * check and update the status of LVDS connector after receiving
  340. * the LID nofication event.
  341. */
  342. connector->status = connector->funcs->detect(connector, false);
  343. /* Don't force modeset on machines where it causes a GPU lockup */
  344. if (dmi_check_system(intel_no_modeset_on_lid))
  345. goto exit;
  346. if (!acpi_lid_open()) {
  347. /* do modeset on next lid open event */
  348. dev_priv->modeset_restore = MODESET_ON_LID_OPEN;
  349. goto exit;
  350. }
  351. if (dev_priv->modeset_restore == MODESET_DONE)
  352. goto exit;
  353. drm_modeset_lock_all(dev);
  354. intel_modeset_setup_hw_state(dev, true);
  355. drm_modeset_unlock_all(dev);
  356. dev_priv->modeset_restore = MODESET_DONE;
  357. exit:
  358. mutex_unlock(&dev_priv->modeset_restore_lock);
  359. return NOTIFY_OK;
  360. }
  361. /**
  362. * intel_lvds_destroy - unregister and free LVDS structures
  363. * @connector: connector to free
  364. *
  365. * Unregister the DDC bus for this connector then free the driver private
  366. * structure.
  367. */
  368. static void intel_lvds_destroy(struct drm_connector *connector)
  369. {
  370. struct intel_lvds_connector *lvds_connector =
  371. to_lvds_connector(connector);
  372. if (lvds_connector->lid_notifier.notifier_call)
  373. acpi_lid_notifier_unregister(&lvds_connector->lid_notifier);
  374. if (!IS_ERR_OR_NULL(lvds_connector->base.edid))
  375. kfree(lvds_connector->base.edid);
  376. intel_panel_fini(&lvds_connector->base.panel);
  377. drm_sysfs_connector_remove(connector);
  378. drm_connector_cleanup(connector);
  379. kfree(connector);
  380. }
  381. static int intel_lvds_set_property(struct drm_connector *connector,
  382. struct drm_property *property,
  383. uint64_t value)
  384. {
  385. struct intel_connector *intel_connector = to_intel_connector(connector);
  386. struct drm_device *dev = connector->dev;
  387. if (property == dev->mode_config.scaling_mode_property) {
  388. struct drm_crtc *crtc;
  389. if (value == DRM_MODE_SCALE_NONE) {
  390. DRM_DEBUG_KMS("no scaling not supported\n");
  391. return -EINVAL;
  392. }
  393. if (intel_connector->panel.fitting_mode == value) {
  394. /* the LVDS scaling property is not changed */
  395. return 0;
  396. }
  397. intel_connector->panel.fitting_mode = value;
  398. crtc = intel_attached_encoder(connector)->base.crtc;
  399. if (crtc && crtc->enabled) {
  400. /*
  401. * If the CRTC is enabled, the display will be changed
  402. * according to the new panel fitting mode.
  403. */
  404. intel_crtc_restore_mode(crtc);
  405. }
  406. }
  407. return 0;
  408. }
  409. static const struct drm_encoder_helper_funcs intel_lvds_helper_funcs = {
  410. .mode_set = intel_lvds_mode_set,
  411. };
  412. static const struct drm_connector_helper_funcs intel_lvds_connector_helper_funcs = {
  413. .get_modes = intel_lvds_get_modes,
  414. .mode_valid = intel_lvds_mode_valid,
  415. .best_encoder = intel_best_encoder,
  416. };
  417. static const struct drm_connector_funcs intel_lvds_connector_funcs = {
  418. .dpms = intel_connector_dpms,
  419. .detect = intel_lvds_detect,
  420. .fill_modes = drm_helper_probe_single_connector_modes,
  421. .set_property = intel_lvds_set_property,
  422. .destroy = intel_lvds_destroy,
  423. };
  424. static const struct drm_encoder_funcs intel_lvds_enc_funcs = {
  425. .destroy = intel_encoder_destroy,
  426. };
  427. static int __init intel_no_lvds_dmi_callback(const struct dmi_system_id *id)
  428. {
  429. DRM_INFO("Skipping LVDS initialization for %s\n", id->ident);
  430. return 1;
  431. }
  432. /* These systems claim to have LVDS, but really don't */
  433. static const struct dmi_system_id intel_no_lvds[] = {
  434. {
  435. .callback = intel_no_lvds_dmi_callback,
  436. .ident = "Apple Mac Mini (Core series)",
  437. .matches = {
  438. DMI_MATCH(DMI_SYS_VENDOR, "Apple"),
  439. DMI_MATCH(DMI_PRODUCT_NAME, "Macmini1,1"),
  440. },
  441. },
  442. {
  443. .callback = intel_no_lvds_dmi_callback,
  444. .ident = "Apple Mac Mini (Core 2 series)",
  445. .matches = {
  446. DMI_MATCH(DMI_SYS_VENDOR, "Apple"),
  447. DMI_MATCH(DMI_PRODUCT_NAME, "Macmini2,1"),
  448. },
  449. },
  450. {
  451. .callback = intel_no_lvds_dmi_callback,
  452. .ident = "MSI IM-945GSE-A",
  453. .matches = {
  454. DMI_MATCH(DMI_SYS_VENDOR, "MSI"),
  455. DMI_MATCH(DMI_PRODUCT_NAME, "A9830IMS"),
  456. },
  457. },
  458. {
  459. .callback = intel_no_lvds_dmi_callback,
  460. .ident = "Dell Studio Hybrid",
  461. .matches = {
  462. DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
  463. DMI_MATCH(DMI_PRODUCT_NAME, "Studio Hybrid 140g"),
  464. },
  465. },
  466. {
  467. .callback = intel_no_lvds_dmi_callback,
  468. .ident = "Dell OptiPlex FX170",
  469. .matches = {
  470. DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
  471. DMI_MATCH(DMI_PRODUCT_NAME, "OptiPlex FX170"),
  472. },
  473. },
  474. {
  475. .callback = intel_no_lvds_dmi_callback,
  476. .ident = "AOpen Mini PC",
  477. .matches = {
  478. DMI_MATCH(DMI_SYS_VENDOR, "AOpen"),
  479. DMI_MATCH(DMI_PRODUCT_NAME, "i965GMx-IF"),
  480. },
  481. },
  482. {
  483. .callback = intel_no_lvds_dmi_callback,
  484. .ident = "AOpen Mini PC MP915",
  485. .matches = {
  486. DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"),
  487. DMI_MATCH(DMI_BOARD_NAME, "i915GMx-F"),
  488. },
  489. },
  490. {
  491. .callback = intel_no_lvds_dmi_callback,
  492. .ident = "AOpen i915GMm-HFS",
  493. .matches = {
  494. DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"),
  495. DMI_MATCH(DMI_BOARD_NAME, "i915GMm-HFS"),
  496. },
  497. },
  498. {
  499. .callback = intel_no_lvds_dmi_callback,
  500. .ident = "AOpen i45GMx-I",
  501. .matches = {
  502. DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"),
  503. DMI_MATCH(DMI_BOARD_NAME, "i45GMx-I"),
  504. },
  505. },
  506. {
  507. .callback = intel_no_lvds_dmi_callback,
  508. .ident = "Aopen i945GTt-VFA",
  509. .matches = {
  510. DMI_MATCH(DMI_PRODUCT_VERSION, "AO00001JW"),
  511. },
  512. },
  513. {
  514. .callback = intel_no_lvds_dmi_callback,
  515. .ident = "Clientron U800",
  516. .matches = {
  517. DMI_MATCH(DMI_SYS_VENDOR, "Clientron"),
  518. DMI_MATCH(DMI_PRODUCT_NAME, "U800"),
  519. },
  520. },
  521. {
  522. .callback = intel_no_lvds_dmi_callback,
  523. .ident = "Clientron E830",
  524. .matches = {
  525. DMI_MATCH(DMI_SYS_VENDOR, "Clientron"),
  526. DMI_MATCH(DMI_PRODUCT_NAME, "E830"),
  527. },
  528. },
  529. {
  530. .callback = intel_no_lvds_dmi_callback,
  531. .ident = "Asus EeeBox PC EB1007",
  532. .matches = {
  533. DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK Computer INC."),
  534. DMI_MATCH(DMI_PRODUCT_NAME, "EB1007"),
  535. },
  536. },
  537. {
  538. .callback = intel_no_lvds_dmi_callback,
  539. .ident = "Asus AT5NM10T-I",
  540. .matches = {
  541. DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."),
  542. DMI_MATCH(DMI_BOARD_NAME, "AT5NM10T-I"),
  543. },
  544. },
  545. {
  546. .callback = intel_no_lvds_dmi_callback,
  547. .ident = "Hewlett-Packard HP t5740e Thin Client",
  548. .matches = {
  549. DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"),
  550. DMI_MATCH(DMI_PRODUCT_NAME, "HP t5740e Thin Client"),
  551. },
  552. },
  553. {
  554. .callback = intel_no_lvds_dmi_callback,
  555. .ident = "Hewlett-Packard t5745",
  556. .matches = {
  557. DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"),
  558. DMI_MATCH(DMI_PRODUCT_NAME, "hp t5745"),
  559. },
  560. },
  561. {
  562. .callback = intel_no_lvds_dmi_callback,
  563. .ident = "Hewlett-Packard st5747",
  564. .matches = {
  565. DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"),
  566. DMI_MATCH(DMI_PRODUCT_NAME, "hp st5747"),
  567. },
  568. },
  569. {
  570. .callback = intel_no_lvds_dmi_callback,
  571. .ident = "MSI Wind Box DC500",
  572. .matches = {
  573. DMI_MATCH(DMI_BOARD_VENDOR, "MICRO-STAR INTERNATIONAL CO., LTD"),
  574. DMI_MATCH(DMI_BOARD_NAME, "MS-7469"),
  575. },
  576. },
  577. {
  578. .callback = intel_no_lvds_dmi_callback,
  579. .ident = "Gigabyte GA-D525TUD",
  580. .matches = {
  581. DMI_MATCH(DMI_BOARD_VENDOR, "Gigabyte Technology Co., Ltd."),
  582. DMI_MATCH(DMI_BOARD_NAME, "D525TUD"),
  583. },
  584. },
  585. {
  586. .callback = intel_no_lvds_dmi_callback,
  587. .ident = "Supermicro X7SPA-H",
  588. .matches = {
  589. DMI_MATCH(DMI_SYS_VENDOR, "Supermicro"),
  590. DMI_MATCH(DMI_PRODUCT_NAME, "X7SPA-H"),
  591. },
  592. },
  593. {
  594. .callback = intel_no_lvds_dmi_callback,
  595. .ident = "Fujitsu Esprimo Q900",
  596. .matches = {
  597. DMI_MATCH(DMI_SYS_VENDOR, "FUJITSU"),
  598. DMI_MATCH(DMI_PRODUCT_NAME, "ESPRIMO Q900"),
  599. },
  600. },
  601. { } /* terminating entry */
  602. };
  603. /**
  604. * intel_find_lvds_downclock - find the reduced downclock for LVDS in EDID
  605. * @dev: drm device
  606. * @connector: LVDS connector
  607. *
  608. * Find the reduced downclock for LVDS in EDID.
  609. */
  610. static void intel_find_lvds_downclock(struct drm_device *dev,
  611. struct drm_display_mode *fixed_mode,
  612. struct drm_connector *connector)
  613. {
  614. struct drm_i915_private *dev_priv = dev->dev_private;
  615. struct drm_display_mode *scan;
  616. int temp_downclock;
  617. temp_downclock = fixed_mode->clock;
  618. list_for_each_entry(scan, &connector->probed_modes, head) {
  619. /*
  620. * If one mode has the same resolution with the fixed_panel
  621. * mode while they have the different refresh rate, it means
  622. * that the reduced downclock is found for the LVDS. In such
  623. * case we can set the different FPx0/1 to dynamically select
  624. * between low and high frequency.
  625. */
  626. if (scan->hdisplay == fixed_mode->hdisplay &&
  627. scan->hsync_start == fixed_mode->hsync_start &&
  628. scan->hsync_end == fixed_mode->hsync_end &&
  629. scan->htotal == fixed_mode->htotal &&
  630. scan->vdisplay == fixed_mode->vdisplay &&
  631. scan->vsync_start == fixed_mode->vsync_start &&
  632. scan->vsync_end == fixed_mode->vsync_end &&
  633. scan->vtotal == fixed_mode->vtotal) {
  634. if (scan->clock < temp_downclock) {
  635. /*
  636. * The downclock is already found. But we
  637. * expect to find the lower downclock.
  638. */
  639. temp_downclock = scan->clock;
  640. }
  641. }
  642. }
  643. if (temp_downclock < fixed_mode->clock && i915_lvds_downclock) {
  644. /* We found the downclock for LVDS. */
  645. dev_priv->lvds_downclock_avail = 1;
  646. dev_priv->lvds_downclock = temp_downclock;
  647. DRM_DEBUG_KMS("LVDS downclock is found in EDID. "
  648. "Normal clock %dKhz, downclock %dKhz\n",
  649. fixed_mode->clock, temp_downclock);
  650. }
  651. }
  652. /*
  653. * Enumerate the child dev array parsed from VBT to check whether
  654. * the LVDS is present.
  655. * If it is present, return 1.
  656. * If it is not present, return false.
  657. * If no child dev is parsed from VBT, it assumes that the LVDS is present.
  658. */
  659. static bool lvds_is_present_in_vbt(struct drm_device *dev,
  660. u8 *i2c_pin)
  661. {
  662. struct drm_i915_private *dev_priv = dev->dev_private;
  663. int i;
  664. if (!dev_priv->child_dev_num)
  665. return true;
  666. for (i = 0; i < dev_priv->child_dev_num; i++) {
  667. struct child_device_config *child = dev_priv->child_dev + i;
  668. /* If the device type is not LFP, continue.
  669. * We have to check both the new identifiers as well as the
  670. * old for compatibility with some BIOSes.
  671. */
  672. if (child->device_type != DEVICE_TYPE_INT_LFP &&
  673. child->device_type != DEVICE_TYPE_LFP)
  674. continue;
  675. if (intel_gmbus_is_port_valid(child->i2c_pin))
  676. *i2c_pin = child->i2c_pin;
  677. /* However, we cannot trust the BIOS writers to populate
  678. * the VBT correctly. Since LVDS requires additional
  679. * information from AIM blocks, a non-zero addin offset is
  680. * a good indicator that the LVDS is actually present.
  681. */
  682. if (child->addin_offset)
  683. return true;
  684. /* But even then some BIOS writers perform some black magic
  685. * and instantiate the device without reference to any
  686. * additional data. Trust that if the VBT was written into
  687. * the OpRegion then they have validated the LVDS's existence.
  688. */
  689. if (dev_priv->opregion.vbt)
  690. return true;
  691. }
  692. return false;
  693. }
  694. static int intel_dual_link_lvds_callback(const struct dmi_system_id *id)
  695. {
  696. DRM_INFO("Forcing lvds to dual link mode on %s\n", id->ident);
  697. return 1;
  698. }
  699. static const struct dmi_system_id intel_dual_link_lvds[] = {
  700. {
  701. .callback = intel_dual_link_lvds_callback,
  702. .ident = "Apple MacBook Pro (Core i5/i7 Series)",
  703. .matches = {
  704. DMI_MATCH(DMI_SYS_VENDOR, "Apple Inc."),
  705. DMI_MATCH(DMI_PRODUCT_NAME, "MacBookPro8,2"),
  706. },
  707. },
  708. { } /* terminating entry */
  709. };
  710. bool intel_is_dual_link_lvds(struct drm_device *dev)
  711. {
  712. struct intel_encoder *encoder;
  713. struct intel_lvds_encoder *lvds_encoder;
  714. list_for_each_entry(encoder, &dev->mode_config.encoder_list,
  715. base.head) {
  716. if (encoder->type == INTEL_OUTPUT_LVDS) {
  717. lvds_encoder = to_lvds_encoder(&encoder->base);
  718. return lvds_encoder->is_dual_link;
  719. }
  720. }
  721. return false;
  722. }
  723. static bool compute_is_dual_link_lvds(struct intel_lvds_encoder *lvds_encoder)
  724. {
  725. struct drm_device *dev = lvds_encoder->base.base.dev;
  726. unsigned int val;
  727. struct drm_i915_private *dev_priv = dev->dev_private;
  728. /* use the module option value if specified */
  729. if (i915_lvds_channel_mode > 0)
  730. return i915_lvds_channel_mode == 2;
  731. if (dmi_check_system(intel_dual_link_lvds))
  732. return true;
  733. /* BIOS should set the proper LVDS register value at boot, but
  734. * in reality, it doesn't set the value when the lid is closed;
  735. * we need to check "the value to be set" in VBT when LVDS
  736. * register is uninitialized.
  737. */
  738. val = I915_READ(lvds_encoder->reg);
  739. if (!(val & ~(LVDS_PIPE_MASK | LVDS_DETECTED)))
  740. val = dev_priv->bios_lvds_val;
  741. return (val & LVDS_CLKB_POWER_MASK) == LVDS_CLKB_POWER_UP;
  742. }
  743. static bool intel_lvds_supported(struct drm_device *dev)
  744. {
  745. /* With the introduction of the PCH we gained a dedicated
  746. * LVDS presence pin, use it. */
  747. if (HAS_PCH_IBX(dev) || HAS_PCH_CPT(dev))
  748. return true;
  749. /* Otherwise LVDS was only attached to mobile products,
  750. * except for the inglorious 830gm */
  751. if (INTEL_INFO(dev)->gen <= 4 && IS_MOBILE(dev) && !IS_I830(dev))
  752. return true;
  753. return false;
  754. }
  755. /**
  756. * intel_lvds_init - setup LVDS connectors on this device
  757. * @dev: drm device
  758. *
  759. * Create the connector, register the LVDS DDC bus, and try to figure out what
  760. * modes we can display on the LVDS panel (if present).
  761. */
  762. bool intel_lvds_init(struct drm_device *dev)
  763. {
  764. struct drm_i915_private *dev_priv = dev->dev_private;
  765. struct intel_lvds_encoder *lvds_encoder;
  766. struct intel_encoder *intel_encoder;
  767. struct intel_lvds_connector *lvds_connector;
  768. struct intel_connector *intel_connector;
  769. struct drm_connector *connector;
  770. struct drm_encoder *encoder;
  771. struct drm_display_mode *scan; /* *modes, *bios_mode; */
  772. struct drm_display_mode *fixed_mode = NULL;
  773. struct edid *edid;
  774. struct drm_crtc *crtc;
  775. u32 lvds;
  776. int pipe;
  777. u8 pin;
  778. if (!intel_lvds_supported(dev))
  779. return false;
  780. /* Skip init on machines we know falsely report LVDS */
  781. if (dmi_check_system(intel_no_lvds))
  782. return false;
  783. pin = GMBUS_PORT_PANEL;
  784. if (!lvds_is_present_in_vbt(dev, &pin)) {
  785. DRM_DEBUG_KMS("LVDS is not present in VBT\n");
  786. return false;
  787. }
  788. if (HAS_PCH_SPLIT(dev)) {
  789. if ((I915_READ(PCH_LVDS) & LVDS_DETECTED) == 0)
  790. return false;
  791. if (dev_priv->edp.support) {
  792. DRM_DEBUG_KMS("disable LVDS for eDP support\n");
  793. return false;
  794. }
  795. }
  796. lvds_encoder = kzalloc(sizeof(struct intel_lvds_encoder), GFP_KERNEL);
  797. if (!lvds_encoder)
  798. return false;
  799. lvds_connector = kzalloc(sizeof(struct intel_lvds_connector), GFP_KERNEL);
  800. if (!lvds_connector) {
  801. kfree(lvds_encoder);
  802. return false;
  803. }
  804. lvds_encoder->attached_connector = lvds_connector;
  805. intel_encoder = &lvds_encoder->base;
  806. encoder = &intel_encoder->base;
  807. intel_connector = &lvds_connector->base;
  808. connector = &intel_connector->base;
  809. drm_connector_init(dev, &intel_connector->base, &intel_lvds_connector_funcs,
  810. DRM_MODE_CONNECTOR_LVDS);
  811. drm_encoder_init(dev, &intel_encoder->base, &intel_lvds_enc_funcs,
  812. DRM_MODE_ENCODER_LVDS);
  813. intel_encoder->enable = intel_enable_lvds;
  814. intel_encoder->pre_pll_enable = intel_pre_pll_enable_lvds;
  815. intel_encoder->compute_config = intel_lvds_compute_config;
  816. intel_encoder->disable = intel_disable_lvds;
  817. intel_encoder->get_hw_state = intel_lvds_get_hw_state;
  818. intel_connector->get_hw_state = intel_connector_get_hw_state;
  819. intel_connector_attach_encoder(intel_connector, intel_encoder);
  820. intel_encoder->type = INTEL_OUTPUT_LVDS;
  821. intel_encoder->cloneable = false;
  822. if (HAS_PCH_SPLIT(dev))
  823. intel_encoder->crtc_mask = (1 << 0) | (1 << 1) | (1 << 2);
  824. else if (IS_GEN4(dev))
  825. intel_encoder->crtc_mask = (1 << 0) | (1 << 1);
  826. else
  827. intel_encoder->crtc_mask = (1 << 1);
  828. drm_encoder_helper_add(encoder, &intel_lvds_helper_funcs);
  829. drm_connector_helper_add(connector, &intel_lvds_connector_helper_funcs);
  830. connector->display_info.subpixel_order = SubPixelHorizontalRGB;
  831. connector->interlace_allowed = false;
  832. connector->doublescan_allowed = false;
  833. if (HAS_PCH_SPLIT(dev)) {
  834. lvds_encoder->reg = PCH_LVDS;
  835. } else {
  836. lvds_encoder->reg = LVDS;
  837. }
  838. /* create the scaling mode property */
  839. drm_mode_create_scaling_mode_property(dev);
  840. drm_object_attach_property(&connector->base,
  841. dev->mode_config.scaling_mode_property,
  842. DRM_MODE_SCALE_ASPECT);
  843. intel_connector->panel.fitting_mode = DRM_MODE_SCALE_ASPECT;
  844. /*
  845. * LVDS discovery:
  846. * 1) check for EDID on DDC
  847. * 2) check for VBT data
  848. * 3) check to see if LVDS is already on
  849. * if none of the above, no panel
  850. * 4) make sure lid is open
  851. * if closed, act like it's not there for now
  852. */
  853. /*
  854. * Attempt to get the fixed panel mode from DDC. Assume that the
  855. * preferred mode is the right one.
  856. */
  857. edid = drm_get_edid(connector, intel_gmbus_get_adapter(dev_priv, pin));
  858. if (edid) {
  859. if (drm_add_edid_modes(connector, edid)) {
  860. drm_mode_connector_update_edid_property(connector,
  861. edid);
  862. } else {
  863. kfree(edid);
  864. edid = ERR_PTR(-EINVAL);
  865. }
  866. } else {
  867. edid = ERR_PTR(-ENOENT);
  868. }
  869. lvds_connector->base.edid = edid;
  870. if (IS_ERR_OR_NULL(edid)) {
  871. /* Didn't get an EDID, so
  872. * Set wide sync ranges so we get all modes
  873. * handed to valid_mode for checking
  874. */
  875. connector->display_info.min_vfreq = 0;
  876. connector->display_info.max_vfreq = 200;
  877. connector->display_info.min_hfreq = 0;
  878. connector->display_info.max_hfreq = 200;
  879. }
  880. list_for_each_entry(scan, &connector->probed_modes, head) {
  881. if (scan->type & DRM_MODE_TYPE_PREFERRED) {
  882. DRM_DEBUG_KMS("using preferred mode from EDID: ");
  883. drm_mode_debug_printmodeline(scan);
  884. fixed_mode = drm_mode_duplicate(dev, scan);
  885. if (fixed_mode) {
  886. intel_find_lvds_downclock(dev, fixed_mode,
  887. connector);
  888. goto out;
  889. }
  890. }
  891. }
  892. /* Failed to get EDID, what about VBT? */
  893. if (dev_priv->lfp_lvds_vbt_mode) {
  894. DRM_DEBUG_KMS("using mode from VBT: ");
  895. drm_mode_debug_printmodeline(dev_priv->lfp_lvds_vbt_mode);
  896. fixed_mode = drm_mode_duplicate(dev, dev_priv->lfp_lvds_vbt_mode);
  897. if (fixed_mode) {
  898. fixed_mode->type |= DRM_MODE_TYPE_PREFERRED;
  899. goto out;
  900. }
  901. }
  902. /*
  903. * If we didn't get EDID, try checking if the panel is already turned
  904. * on. If so, assume that whatever is currently programmed is the
  905. * correct mode.
  906. */
  907. /* Ironlake: FIXME if still fail, not try pipe mode now */
  908. if (HAS_PCH_SPLIT(dev))
  909. goto failed;
  910. lvds = I915_READ(LVDS);
  911. pipe = (lvds & LVDS_PIPEB_SELECT) ? 1 : 0;
  912. crtc = intel_get_crtc_for_pipe(dev, pipe);
  913. if (crtc && (lvds & LVDS_PORT_EN)) {
  914. fixed_mode = intel_crtc_mode_get(dev, crtc);
  915. if (fixed_mode) {
  916. DRM_DEBUG_KMS("using current (BIOS) mode: ");
  917. drm_mode_debug_printmodeline(fixed_mode);
  918. fixed_mode->type |= DRM_MODE_TYPE_PREFERRED;
  919. goto out;
  920. }
  921. }
  922. /* If we still don't have a mode after all that, give up. */
  923. if (!fixed_mode)
  924. goto failed;
  925. out:
  926. lvds_encoder->is_dual_link = compute_is_dual_link_lvds(lvds_encoder);
  927. DRM_DEBUG_KMS("detected %s-link lvds configuration\n",
  928. lvds_encoder->is_dual_link ? "dual" : "single");
  929. /*
  930. * Unlock registers and just
  931. * leave them unlocked
  932. */
  933. if (HAS_PCH_SPLIT(dev)) {
  934. I915_WRITE(PCH_PP_CONTROL,
  935. I915_READ(PCH_PP_CONTROL) | PANEL_UNLOCK_REGS);
  936. } else {
  937. I915_WRITE(PP_CONTROL,
  938. I915_READ(PP_CONTROL) | PANEL_UNLOCK_REGS);
  939. }
  940. lvds_connector->lid_notifier.notifier_call = intel_lid_notify;
  941. if (acpi_lid_notifier_register(&lvds_connector->lid_notifier)) {
  942. DRM_DEBUG_KMS("lid notifier registration failed\n");
  943. lvds_connector->lid_notifier.notifier_call = NULL;
  944. }
  945. drm_sysfs_connector_add(connector);
  946. intel_panel_init(&intel_connector->panel, fixed_mode);
  947. intel_panel_setup_backlight(connector);
  948. return true;
  949. failed:
  950. DRM_DEBUG_KMS("No LVDS modes found, disabling.\n");
  951. drm_connector_cleanup(connector);
  952. drm_encoder_cleanup(encoder);
  953. if (fixed_mode)
  954. drm_mode_destroy(dev, fixed_mode);
  955. kfree(lvds_encoder);
  956. kfree(lvds_connector);
  957. return false;
  958. }