rtc-at91sam9.c 13 KB

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  1. /*
  2. * "RTT as Real Time Clock" driver for AT91SAM9 SoC family
  3. *
  4. * (C) 2007 Michel Benoit
  5. *
  6. * Based on rtc-at91rm9200.c by Rick Bronson
  7. *
  8. * This program is free software; you can redistribute it and/or
  9. * modify it under the terms of the GNU General Public License
  10. * as published by the Free Software Foundation; either version
  11. * 2 of the License, or (at your option) any later version.
  12. */
  13. #include <linux/module.h>
  14. #include <linux/kernel.h>
  15. #include <linux/platform_device.h>
  16. #include <linux/time.h>
  17. #include <linux/rtc.h>
  18. #include <linux/interrupt.h>
  19. #include <linux/ioctl.h>
  20. #include <linux/slab.h>
  21. #include <mach/board.h>
  22. #include <mach/at91_rtt.h>
  23. #include <mach/cpu.h>
  24. /*
  25. * This driver uses two configurable hardware resources that live in the
  26. * AT91SAM9 backup power domain (intended to be powered at all times)
  27. * to implement the Real Time Clock interfaces
  28. *
  29. * - A "Real-time Timer" (RTT) counts up in seconds from a base time.
  30. * We can't assign the counter value (CRTV) ... but we can reset it.
  31. *
  32. * - One of the "General Purpose Backup Registers" (GPBRs) holds the
  33. * base time, normally an offset from the beginning of the POSIX
  34. * epoch (1970-Jan-1 00:00:00 UTC). Some systems also include the
  35. * local timezone's offset.
  36. *
  37. * The RTC's value is the RTT counter plus that offset. The RTC's alarm
  38. * is likewise a base (ALMV) plus that offset.
  39. *
  40. * Not all RTTs will be used as RTCs; some systems have multiple RTTs to
  41. * choose from, or a "real" RTC module. All systems have multiple GPBR
  42. * registers available, likewise usable for more than "RTC" support.
  43. */
  44. /*
  45. * We store ALARM_DISABLED in ALMV to record that no alarm is set.
  46. * It's also the reset value for that field.
  47. */
  48. #define ALARM_DISABLED ((u32)~0)
  49. struct sam9_rtc {
  50. void __iomem *rtt;
  51. struct rtc_device *rtcdev;
  52. u32 imr;
  53. };
  54. #define rtt_readl(rtc, field) \
  55. __raw_readl((rtc)->rtt + AT91_RTT_ ## field)
  56. #define rtt_writel(rtc, field, val) \
  57. __raw_writel((val), (rtc)->rtt + AT91_RTT_ ## field)
  58. #define gpbr_readl(rtc) \
  59. at91_sys_read(AT91_GPBR + 4 * CONFIG_RTC_DRV_AT91SAM9_GPBR)
  60. #define gpbr_writel(rtc, val) \
  61. at91_sys_write(AT91_GPBR + 4 * CONFIG_RTC_DRV_AT91SAM9_GPBR, (val))
  62. /*
  63. * Read current time and date in RTC
  64. */
  65. static int at91_rtc_readtime(struct device *dev, struct rtc_time *tm)
  66. {
  67. struct sam9_rtc *rtc = dev_get_drvdata(dev);
  68. u32 secs, secs2;
  69. u32 offset;
  70. /* read current time offset */
  71. offset = gpbr_readl(rtc);
  72. if (offset == 0)
  73. return -EILSEQ;
  74. /* reread the counter to help sync the two clock domains */
  75. secs = rtt_readl(rtc, VR);
  76. secs2 = rtt_readl(rtc, VR);
  77. if (secs != secs2)
  78. secs = rtt_readl(rtc, VR);
  79. rtc_time_to_tm(offset + secs, tm);
  80. dev_dbg(dev, "%s: %4d-%02d-%02d %02d:%02d:%02d\n", "readtime",
  81. 1900 + tm->tm_year, tm->tm_mon, tm->tm_mday,
  82. tm->tm_hour, tm->tm_min, tm->tm_sec);
  83. return 0;
  84. }
  85. /*
  86. * Set current time and date in RTC
  87. */
  88. static int at91_rtc_settime(struct device *dev, struct rtc_time *tm)
  89. {
  90. struct sam9_rtc *rtc = dev_get_drvdata(dev);
  91. int err;
  92. u32 offset, alarm, mr;
  93. unsigned long secs;
  94. dev_dbg(dev, "%s: %4d-%02d-%02d %02d:%02d:%02d\n", "settime",
  95. 1900 + tm->tm_year, tm->tm_mon, tm->tm_mday,
  96. tm->tm_hour, tm->tm_min, tm->tm_sec);
  97. err = rtc_tm_to_time(tm, &secs);
  98. if (err != 0)
  99. return err;
  100. mr = rtt_readl(rtc, MR);
  101. /* disable interrupts */
  102. rtt_writel(rtc, MR, mr & ~(AT91_RTT_ALMIEN | AT91_RTT_RTTINCIEN));
  103. /* read current time offset */
  104. offset = gpbr_readl(rtc);
  105. /* store the new base time in a battery backup register */
  106. secs += 1;
  107. gpbr_writel(rtc, secs);
  108. /* adjust the alarm time for the new base */
  109. alarm = rtt_readl(rtc, AR);
  110. if (alarm != ALARM_DISABLED) {
  111. if (offset > secs) {
  112. /* time jumped backwards, increase time until alarm */
  113. alarm += (offset - secs);
  114. } else if ((alarm + offset) > secs) {
  115. /* time jumped forwards, decrease time until alarm */
  116. alarm -= (secs - offset);
  117. } else {
  118. /* time jumped past the alarm, disable alarm */
  119. alarm = ALARM_DISABLED;
  120. mr &= ~AT91_RTT_ALMIEN;
  121. }
  122. rtt_writel(rtc, AR, alarm);
  123. }
  124. /* reset the timer, and re-enable interrupts */
  125. rtt_writel(rtc, MR, mr | AT91_RTT_RTTRST);
  126. return 0;
  127. }
  128. static int at91_rtc_readalarm(struct device *dev, struct rtc_wkalrm *alrm)
  129. {
  130. struct sam9_rtc *rtc = dev_get_drvdata(dev);
  131. struct rtc_time *tm = &alrm->time;
  132. u32 alarm = rtt_readl(rtc, AR);
  133. u32 offset;
  134. offset = gpbr_readl(rtc);
  135. if (offset == 0)
  136. return -EILSEQ;
  137. memset(alrm, 0, sizeof(*alrm));
  138. if (alarm != ALARM_DISABLED && offset != 0) {
  139. rtc_time_to_tm(offset + alarm, tm);
  140. dev_dbg(dev, "%s: %4d-%02d-%02d %02d:%02d:%02d\n", "readalarm",
  141. 1900 + tm->tm_year, tm->tm_mon, tm->tm_mday,
  142. tm->tm_hour, tm->tm_min, tm->tm_sec);
  143. if (rtt_readl(rtc, MR) & AT91_RTT_ALMIEN)
  144. alrm->enabled = 1;
  145. }
  146. return 0;
  147. }
  148. static int at91_rtc_setalarm(struct device *dev, struct rtc_wkalrm *alrm)
  149. {
  150. struct sam9_rtc *rtc = dev_get_drvdata(dev);
  151. struct rtc_time *tm = &alrm->time;
  152. unsigned long secs;
  153. u32 offset;
  154. u32 mr;
  155. int err;
  156. err = rtc_tm_to_time(tm, &secs);
  157. if (err != 0)
  158. return err;
  159. offset = gpbr_readl(rtc);
  160. if (offset == 0) {
  161. /* time is not set */
  162. return -EILSEQ;
  163. }
  164. mr = rtt_readl(rtc, MR);
  165. rtt_writel(rtc, MR, mr & ~AT91_RTT_ALMIEN);
  166. /* alarm in the past? finish and leave disabled */
  167. if (secs <= offset) {
  168. rtt_writel(rtc, AR, ALARM_DISABLED);
  169. return 0;
  170. }
  171. /* else set alarm and maybe enable it */
  172. rtt_writel(rtc, AR, secs - offset);
  173. if (alrm->enabled)
  174. rtt_writel(rtc, MR, mr | AT91_RTT_ALMIEN);
  175. dev_dbg(dev, "%s: %4d-%02d-%02d %02d:%02d:%02d\n", "setalarm",
  176. tm->tm_year, tm->tm_mon, tm->tm_mday, tm->tm_hour,
  177. tm->tm_min, tm->tm_sec);
  178. return 0;
  179. }
  180. static int at91_rtc_alarm_irq_enable(struct device *dev, unsigned int enabled)
  181. {
  182. struct sam9_rtc *rtc = dev_get_drvdata(dev);
  183. u32 mr = rtt_readl(rtc, MR);
  184. dev_dbg(dev, "alarm_irq_enable: enabled=%08x, mr %08x\n", enabled, mr);
  185. if (enabled)
  186. rtt_writel(rtc, MR, mr | AT91_RTT_ALMIEN);
  187. else
  188. rtt_writel(rtc, MR, mr & ~AT91_RTT_ALMIEN);
  189. return 0;
  190. }
  191. /*
  192. * Provide additional RTC information in /proc/driver/rtc
  193. */
  194. static int at91_rtc_proc(struct device *dev, struct seq_file *seq)
  195. {
  196. struct sam9_rtc *rtc = dev_get_drvdata(dev);
  197. u32 mr = mr = rtt_readl(rtc, MR);
  198. seq_printf(seq, "update_IRQ\t: %s\n",
  199. (mr & AT91_RTT_RTTINCIEN) ? "yes" : "no");
  200. return 0;
  201. }
  202. /*
  203. * IRQ handler for the RTC
  204. */
  205. static irqreturn_t at91_rtc_interrupt(int irq, void *_rtc)
  206. {
  207. struct sam9_rtc *rtc = _rtc;
  208. u32 sr, mr;
  209. unsigned long events = 0;
  210. /* Shared interrupt may be for another device. Note: reading
  211. * SR clears it, so we must only read it in this irq handler!
  212. */
  213. mr = rtt_readl(rtc, MR) & (AT91_RTT_ALMIEN | AT91_RTT_RTTINCIEN);
  214. sr = rtt_readl(rtc, SR) & (mr >> 16);
  215. if (!sr)
  216. return IRQ_NONE;
  217. /* alarm status */
  218. if (sr & AT91_RTT_ALMS)
  219. events |= (RTC_AF | RTC_IRQF);
  220. /* timer update/increment */
  221. if (sr & AT91_RTT_RTTINC)
  222. events |= (RTC_UF | RTC_IRQF);
  223. rtc_update_irq(rtc->rtcdev, 1, events);
  224. pr_debug("%s: num=%ld, events=0x%02lx\n", __func__,
  225. events >> 8, events & 0x000000FF);
  226. return IRQ_HANDLED;
  227. }
  228. static const struct rtc_class_ops at91_rtc_ops = {
  229. .read_time = at91_rtc_readtime,
  230. .set_time = at91_rtc_settime,
  231. .read_alarm = at91_rtc_readalarm,
  232. .set_alarm = at91_rtc_setalarm,
  233. .proc = at91_rtc_proc,
  234. .alarm_irq_enable = at91_rtc_alarm_irq_enable,
  235. };
  236. /*
  237. * Initialize and install RTC driver
  238. */
  239. static int __init at91_rtc_probe(struct platform_device *pdev)
  240. {
  241. struct resource *r;
  242. struct sam9_rtc *rtc;
  243. int ret;
  244. u32 mr;
  245. r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  246. if (!r)
  247. return -ENODEV;
  248. rtc = kzalloc(sizeof *rtc, GFP_KERNEL);
  249. if (!rtc)
  250. return -ENOMEM;
  251. /* platform setup code should have handled this; sigh */
  252. if (!device_can_wakeup(&pdev->dev))
  253. device_init_wakeup(&pdev->dev, 1);
  254. platform_set_drvdata(pdev, rtc);
  255. rtc->rtt = ioremap(r->start, resource_size(r));
  256. if (!rtc->rtt) {
  257. dev_err(&pdev->dev, "failed to map registers, aborting.\n");
  258. ret = -ENOMEM;
  259. goto fail;
  260. }
  261. mr = rtt_readl(rtc, MR);
  262. /* unless RTT is counting at 1 Hz, re-initialize it */
  263. if ((mr & AT91_RTT_RTPRES) != AT91_SLOW_CLOCK) {
  264. mr = AT91_RTT_RTTRST | (AT91_SLOW_CLOCK & AT91_RTT_RTPRES);
  265. gpbr_writel(rtc, 0);
  266. }
  267. /* disable all interrupts (same as on shutdown path) */
  268. mr &= ~(AT91_RTT_ALMIEN | AT91_RTT_RTTINCIEN);
  269. rtt_writel(rtc, MR, mr);
  270. rtc->rtcdev = rtc_device_register(pdev->name, &pdev->dev,
  271. &at91_rtc_ops, THIS_MODULE);
  272. if (IS_ERR(rtc->rtcdev)) {
  273. ret = PTR_ERR(rtc->rtcdev);
  274. goto fail_register;
  275. }
  276. /* register irq handler after we know what name we'll use */
  277. ret = request_irq(AT91_ID_SYS, at91_rtc_interrupt,
  278. IRQF_DISABLED | IRQF_SHARED,
  279. dev_name(&rtc->rtcdev->dev), rtc);
  280. if (ret) {
  281. dev_dbg(&pdev->dev, "can't share IRQ %d?\n", AT91_ID_SYS);
  282. rtc_device_unregister(rtc->rtcdev);
  283. goto fail;
  284. }
  285. /* NOTE: sam9260 rev A silicon has a ROM bug which resets the
  286. * RTT on at least some reboots. If you have that chip, you must
  287. * initialize the time from some external source like a GPS, wall
  288. * clock, discrete RTC, etc
  289. */
  290. if (gpbr_readl(rtc) == 0)
  291. dev_warn(&pdev->dev, "%s: SET TIME!\n",
  292. dev_name(&rtc->rtcdev->dev));
  293. return 0;
  294. fail_register:
  295. iounmap(rtc->rtt);
  296. fail:
  297. platform_set_drvdata(pdev, NULL);
  298. kfree(rtc);
  299. return ret;
  300. }
  301. /*
  302. * Disable and remove the RTC driver
  303. */
  304. static int __exit at91_rtc_remove(struct platform_device *pdev)
  305. {
  306. struct sam9_rtc *rtc = platform_get_drvdata(pdev);
  307. u32 mr = rtt_readl(rtc, MR);
  308. /* disable all interrupts */
  309. rtt_writel(rtc, MR, mr & ~(AT91_RTT_ALMIEN | AT91_RTT_RTTINCIEN));
  310. free_irq(AT91_ID_SYS, rtc);
  311. rtc_device_unregister(rtc->rtcdev);
  312. iounmap(rtc->rtt);
  313. platform_set_drvdata(pdev, NULL);
  314. kfree(rtc);
  315. return 0;
  316. }
  317. static void at91_rtc_shutdown(struct platform_device *pdev)
  318. {
  319. struct sam9_rtc *rtc = platform_get_drvdata(pdev);
  320. u32 mr = rtt_readl(rtc, MR);
  321. rtc->imr = mr & (AT91_RTT_ALMIEN | AT91_RTT_RTTINCIEN);
  322. rtt_writel(rtc, MR, mr & ~rtc->imr);
  323. }
  324. #ifdef CONFIG_PM
  325. /* AT91SAM9 RTC Power management control */
  326. static int at91_rtc_suspend(struct platform_device *pdev,
  327. pm_message_t state)
  328. {
  329. struct sam9_rtc *rtc = platform_get_drvdata(pdev);
  330. u32 mr = rtt_readl(rtc, MR);
  331. /*
  332. * This IRQ is shared with DBGU and other hardware which isn't
  333. * necessarily a wakeup event source.
  334. */
  335. rtc->imr = mr & (AT91_RTT_ALMIEN | AT91_RTT_RTTINCIEN);
  336. if (rtc->imr) {
  337. if (device_may_wakeup(&pdev->dev) && (mr & AT91_RTT_ALMIEN)) {
  338. enable_irq_wake(AT91_ID_SYS);
  339. /* don't let RTTINC cause wakeups */
  340. if (mr & AT91_RTT_RTTINCIEN)
  341. rtt_writel(rtc, MR, mr & ~AT91_RTT_RTTINCIEN);
  342. } else
  343. rtt_writel(rtc, MR, mr & ~rtc->imr);
  344. }
  345. return 0;
  346. }
  347. static int at91_rtc_resume(struct platform_device *pdev)
  348. {
  349. struct sam9_rtc *rtc = platform_get_drvdata(pdev);
  350. u32 mr;
  351. if (rtc->imr) {
  352. if (device_may_wakeup(&pdev->dev))
  353. disable_irq_wake(AT91_ID_SYS);
  354. mr = rtt_readl(rtc, MR);
  355. rtt_writel(rtc, MR, mr | rtc->imr);
  356. }
  357. return 0;
  358. }
  359. #else
  360. #define at91_rtc_suspend NULL
  361. #define at91_rtc_resume NULL
  362. #endif
  363. static struct platform_driver at91_rtc_driver = {
  364. .driver.name = "rtc-at91sam9",
  365. .driver.owner = THIS_MODULE,
  366. .remove = __exit_p(at91_rtc_remove),
  367. .shutdown = at91_rtc_shutdown,
  368. .suspend = at91_rtc_suspend,
  369. .resume = at91_rtc_resume,
  370. };
  371. /* Chips can have more than one RTT module, and they can be used for more
  372. * than just RTCs. So we can't just register as "the" RTT driver.
  373. *
  374. * A normal approach in such cases is to create a library to allocate and
  375. * free the modules. Here we just use bus_find_device() as like such a
  376. * library, binding directly ... no runtime "library" footprint is needed.
  377. */
  378. static int __init at91_rtc_match(struct device *dev, void *v)
  379. {
  380. struct platform_device *pdev = to_platform_device(dev);
  381. int ret;
  382. /* continue searching if this isn't the RTT we need */
  383. if (strcmp("at91_rtt", pdev->name) != 0
  384. || pdev->id != CONFIG_RTC_DRV_AT91SAM9_RTT)
  385. goto fail;
  386. /* else we found it ... but fail unless we can bind to the RTC driver */
  387. if (dev->driver) {
  388. dev_dbg(dev, "busy, can't use as RTC!\n");
  389. goto fail;
  390. }
  391. dev->driver = &at91_rtc_driver.driver;
  392. if (device_attach(dev) == 0) {
  393. dev_dbg(dev, "can't attach RTC!\n");
  394. goto fail;
  395. }
  396. ret = at91_rtc_probe(pdev);
  397. if (ret == 0)
  398. return true;
  399. dev_dbg(dev, "RTC probe err %d!\n", ret);
  400. fail:
  401. return false;
  402. }
  403. static int __init at91_rtc_init(void)
  404. {
  405. int status;
  406. struct device *rtc;
  407. status = platform_driver_register(&at91_rtc_driver);
  408. if (status)
  409. return status;
  410. rtc = bus_find_device(&platform_bus_type, NULL,
  411. NULL, at91_rtc_match);
  412. if (!rtc)
  413. platform_driver_unregister(&at91_rtc_driver);
  414. return rtc ? 0 : -ENODEV;
  415. }
  416. module_init(at91_rtc_init);
  417. static void __exit at91_rtc_exit(void)
  418. {
  419. platform_driver_unregister(&at91_rtc_driver);
  420. }
  421. module_exit(at91_rtc_exit);
  422. MODULE_AUTHOR("Michel Benoit");
  423. MODULE_DESCRIPTION("RTC driver for Atmel AT91SAM9x");
  424. MODULE_LICENSE("GPL");