aesni-intel_glue.c 34 KB

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  1. /*
  2. * Support for Intel AES-NI instructions. This file contains glue
  3. * code, the real AES implementation is in intel-aes_asm.S.
  4. *
  5. * Copyright (C) 2008, Intel Corp.
  6. * Author: Huang Ying <ying.huang@intel.com>
  7. *
  8. * Added RFC4106 AES-GCM support for 128-bit keys under the AEAD
  9. * interface for 64-bit kernels.
  10. * Authors: Adrian Hoban <adrian.hoban@intel.com>
  11. * Gabriele Paoloni <gabriele.paoloni@intel.com>
  12. * Tadeusz Struk (tadeusz.struk@intel.com)
  13. * Aidan O'Mahony (aidan.o.mahony@intel.com)
  14. * Copyright (c) 2010, Intel Corporation.
  15. *
  16. * This program is free software; you can redistribute it and/or modify
  17. * it under the terms of the GNU General Public License as published by
  18. * the Free Software Foundation; either version 2 of the License, or
  19. * (at your option) any later version.
  20. */
  21. #include <linux/hardirq.h>
  22. #include <linux/types.h>
  23. #include <linux/crypto.h>
  24. #include <linux/module.h>
  25. #include <linux/err.h>
  26. #include <crypto/algapi.h>
  27. #include <crypto/aes.h>
  28. #include <crypto/cryptd.h>
  29. #include <crypto/ctr.h>
  30. #include <asm/cpu_device_id.h>
  31. #include <asm/i387.h>
  32. #include <asm/aes.h>
  33. #include <crypto/scatterwalk.h>
  34. #include <crypto/internal/aead.h>
  35. #include <linux/workqueue.h>
  36. #include <linux/spinlock.h>
  37. #if defined(CONFIG_CRYPTO_CTR) || defined(CONFIG_CRYPTO_CTR_MODULE)
  38. #define HAS_CTR
  39. #endif
  40. #if defined(CONFIG_CRYPTO_LRW) || defined(CONFIG_CRYPTO_LRW_MODULE)
  41. #define HAS_LRW
  42. #endif
  43. #if defined(CONFIG_CRYPTO_PCBC) || defined(CONFIG_CRYPTO_PCBC_MODULE)
  44. #define HAS_PCBC
  45. #endif
  46. #if defined(CONFIG_CRYPTO_XTS) || defined(CONFIG_CRYPTO_XTS_MODULE)
  47. #define HAS_XTS
  48. #endif
  49. struct async_aes_ctx {
  50. struct cryptd_ablkcipher *cryptd_tfm;
  51. };
  52. /* This data is stored at the end of the crypto_tfm struct.
  53. * It's a type of per "session" data storage location.
  54. * This needs to be 16 byte aligned.
  55. */
  56. struct aesni_rfc4106_gcm_ctx {
  57. u8 hash_subkey[16];
  58. struct crypto_aes_ctx aes_key_expanded;
  59. u8 nonce[4];
  60. struct cryptd_aead *cryptd_tfm;
  61. };
  62. struct aesni_gcm_set_hash_subkey_result {
  63. int err;
  64. struct completion completion;
  65. };
  66. struct aesni_hash_subkey_req_data {
  67. u8 iv[16];
  68. struct aesni_gcm_set_hash_subkey_result result;
  69. struct scatterlist sg;
  70. };
  71. #define AESNI_ALIGN (16)
  72. #define AES_BLOCK_MASK (~(AES_BLOCK_SIZE-1))
  73. #define RFC4106_HASH_SUBKEY_SIZE 16
  74. asmlinkage int aesni_set_key(struct crypto_aes_ctx *ctx, const u8 *in_key,
  75. unsigned int key_len);
  76. asmlinkage void aesni_enc(struct crypto_aes_ctx *ctx, u8 *out,
  77. const u8 *in);
  78. asmlinkage void aesni_dec(struct crypto_aes_ctx *ctx, u8 *out,
  79. const u8 *in);
  80. asmlinkage void aesni_ecb_enc(struct crypto_aes_ctx *ctx, u8 *out,
  81. const u8 *in, unsigned int len);
  82. asmlinkage void aesni_ecb_dec(struct crypto_aes_ctx *ctx, u8 *out,
  83. const u8 *in, unsigned int len);
  84. asmlinkage void aesni_cbc_enc(struct crypto_aes_ctx *ctx, u8 *out,
  85. const u8 *in, unsigned int len, u8 *iv);
  86. asmlinkage void aesni_cbc_dec(struct crypto_aes_ctx *ctx, u8 *out,
  87. const u8 *in, unsigned int len, u8 *iv);
  88. int crypto_fpu_init(void);
  89. void crypto_fpu_exit(void);
  90. #ifdef CONFIG_X86_64
  91. asmlinkage void aesni_ctr_enc(struct crypto_aes_ctx *ctx, u8 *out,
  92. const u8 *in, unsigned int len, u8 *iv);
  93. /* asmlinkage void aesni_gcm_enc()
  94. * void *ctx, AES Key schedule. Starts on a 16 byte boundary.
  95. * u8 *out, Ciphertext output. Encrypt in-place is allowed.
  96. * const u8 *in, Plaintext input
  97. * unsigned long plaintext_len, Length of data in bytes for encryption.
  98. * u8 *iv, Pre-counter block j0: 4 byte salt (from Security Association)
  99. * concatenated with 8 byte Initialisation Vector (from IPSec ESP
  100. * Payload) concatenated with 0x00000001. 16-byte aligned pointer.
  101. * u8 *hash_subkey, the Hash sub key input. Data starts on a 16-byte boundary.
  102. * const u8 *aad, Additional Authentication Data (AAD)
  103. * unsigned long aad_len, Length of AAD in bytes. With RFC4106 this
  104. * is going to be 8 or 12 bytes
  105. * u8 *auth_tag, Authenticated Tag output.
  106. * unsigned long auth_tag_len), Authenticated Tag Length in bytes.
  107. * Valid values are 16 (most likely), 12 or 8.
  108. */
  109. asmlinkage void aesni_gcm_enc(void *ctx, u8 *out,
  110. const u8 *in, unsigned long plaintext_len, u8 *iv,
  111. u8 *hash_subkey, const u8 *aad, unsigned long aad_len,
  112. u8 *auth_tag, unsigned long auth_tag_len);
  113. /* asmlinkage void aesni_gcm_dec()
  114. * void *ctx, AES Key schedule. Starts on a 16 byte boundary.
  115. * u8 *out, Plaintext output. Decrypt in-place is allowed.
  116. * const u8 *in, Ciphertext input
  117. * unsigned long ciphertext_len, Length of data in bytes for decryption.
  118. * u8 *iv, Pre-counter block j0: 4 byte salt (from Security Association)
  119. * concatenated with 8 byte Initialisation Vector (from IPSec ESP
  120. * Payload) concatenated with 0x00000001. 16-byte aligned pointer.
  121. * u8 *hash_subkey, the Hash sub key input. Data starts on a 16-byte boundary.
  122. * const u8 *aad, Additional Authentication Data (AAD)
  123. * unsigned long aad_len, Length of AAD in bytes. With RFC4106 this is going
  124. * to be 8 or 12 bytes
  125. * u8 *auth_tag, Authenticated Tag output.
  126. * unsigned long auth_tag_len) Authenticated Tag Length in bytes.
  127. * Valid values are 16 (most likely), 12 or 8.
  128. */
  129. asmlinkage void aesni_gcm_dec(void *ctx, u8 *out,
  130. const u8 *in, unsigned long ciphertext_len, u8 *iv,
  131. u8 *hash_subkey, const u8 *aad, unsigned long aad_len,
  132. u8 *auth_tag, unsigned long auth_tag_len);
  133. static inline struct
  134. aesni_rfc4106_gcm_ctx *aesni_rfc4106_gcm_ctx_get(struct crypto_aead *tfm)
  135. {
  136. return
  137. (struct aesni_rfc4106_gcm_ctx *)
  138. PTR_ALIGN((u8 *)
  139. crypto_tfm_ctx(crypto_aead_tfm(tfm)), AESNI_ALIGN);
  140. }
  141. #endif
  142. static inline struct crypto_aes_ctx *aes_ctx(void *raw_ctx)
  143. {
  144. unsigned long addr = (unsigned long)raw_ctx;
  145. unsigned long align = AESNI_ALIGN;
  146. if (align <= crypto_tfm_ctx_alignment())
  147. align = 1;
  148. return (struct crypto_aes_ctx *)ALIGN(addr, align);
  149. }
  150. static int aes_set_key_common(struct crypto_tfm *tfm, void *raw_ctx,
  151. const u8 *in_key, unsigned int key_len)
  152. {
  153. struct crypto_aes_ctx *ctx = aes_ctx(raw_ctx);
  154. u32 *flags = &tfm->crt_flags;
  155. int err;
  156. if (key_len != AES_KEYSIZE_128 && key_len != AES_KEYSIZE_192 &&
  157. key_len != AES_KEYSIZE_256) {
  158. *flags |= CRYPTO_TFM_RES_BAD_KEY_LEN;
  159. return -EINVAL;
  160. }
  161. if (!irq_fpu_usable())
  162. err = crypto_aes_expand_key(ctx, in_key, key_len);
  163. else {
  164. kernel_fpu_begin();
  165. err = aesni_set_key(ctx, in_key, key_len);
  166. kernel_fpu_end();
  167. }
  168. return err;
  169. }
  170. static int aes_set_key(struct crypto_tfm *tfm, const u8 *in_key,
  171. unsigned int key_len)
  172. {
  173. return aes_set_key_common(tfm, crypto_tfm_ctx(tfm), in_key, key_len);
  174. }
  175. static void aes_encrypt(struct crypto_tfm *tfm, u8 *dst, const u8 *src)
  176. {
  177. struct crypto_aes_ctx *ctx = aes_ctx(crypto_tfm_ctx(tfm));
  178. if (!irq_fpu_usable())
  179. crypto_aes_encrypt_x86(ctx, dst, src);
  180. else {
  181. kernel_fpu_begin();
  182. aesni_enc(ctx, dst, src);
  183. kernel_fpu_end();
  184. }
  185. }
  186. static void aes_decrypt(struct crypto_tfm *tfm, u8 *dst, const u8 *src)
  187. {
  188. struct crypto_aes_ctx *ctx = aes_ctx(crypto_tfm_ctx(tfm));
  189. if (!irq_fpu_usable())
  190. crypto_aes_decrypt_x86(ctx, dst, src);
  191. else {
  192. kernel_fpu_begin();
  193. aesni_dec(ctx, dst, src);
  194. kernel_fpu_end();
  195. }
  196. }
  197. static void __aes_encrypt(struct crypto_tfm *tfm, u8 *dst, const u8 *src)
  198. {
  199. struct crypto_aes_ctx *ctx = aes_ctx(crypto_tfm_ctx(tfm));
  200. aesni_enc(ctx, dst, src);
  201. }
  202. static void __aes_decrypt(struct crypto_tfm *tfm, u8 *dst, const u8 *src)
  203. {
  204. struct crypto_aes_ctx *ctx = aes_ctx(crypto_tfm_ctx(tfm));
  205. aesni_dec(ctx, dst, src);
  206. }
  207. static int ecb_encrypt(struct blkcipher_desc *desc,
  208. struct scatterlist *dst, struct scatterlist *src,
  209. unsigned int nbytes)
  210. {
  211. struct crypto_aes_ctx *ctx = aes_ctx(crypto_blkcipher_ctx(desc->tfm));
  212. struct blkcipher_walk walk;
  213. int err;
  214. blkcipher_walk_init(&walk, dst, src, nbytes);
  215. err = blkcipher_walk_virt(desc, &walk);
  216. desc->flags &= ~CRYPTO_TFM_REQ_MAY_SLEEP;
  217. kernel_fpu_begin();
  218. while ((nbytes = walk.nbytes)) {
  219. aesni_ecb_enc(ctx, walk.dst.virt.addr, walk.src.virt.addr,
  220. nbytes & AES_BLOCK_MASK);
  221. nbytes &= AES_BLOCK_SIZE - 1;
  222. err = blkcipher_walk_done(desc, &walk, nbytes);
  223. }
  224. kernel_fpu_end();
  225. return err;
  226. }
  227. static int ecb_decrypt(struct blkcipher_desc *desc,
  228. struct scatterlist *dst, struct scatterlist *src,
  229. unsigned int nbytes)
  230. {
  231. struct crypto_aes_ctx *ctx = aes_ctx(crypto_blkcipher_ctx(desc->tfm));
  232. struct blkcipher_walk walk;
  233. int err;
  234. blkcipher_walk_init(&walk, dst, src, nbytes);
  235. err = blkcipher_walk_virt(desc, &walk);
  236. desc->flags &= ~CRYPTO_TFM_REQ_MAY_SLEEP;
  237. kernel_fpu_begin();
  238. while ((nbytes = walk.nbytes)) {
  239. aesni_ecb_dec(ctx, walk.dst.virt.addr, walk.src.virt.addr,
  240. nbytes & AES_BLOCK_MASK);
  241. nbytes &= AES_BLOCK_SIZE - 1;
  242. err = blkcipher_walk_done(desc, &walk, nbytes);
  243. }
  244. kernel_fpu_end();
  245. return err;
  246. }
  247. static int cbc_encrypt(struct blkcipher_desc *desc,
  248. struct scatterlist *dst, struct scatterlist *src,
  249. unsigned int nbytes)
  250. {
  251. struct crypto_aes_ctx *ctx = aes_ctx(crypto_blkcipher_ctx(desc->tfm));
  252. struct blkcipher_walk walk;
  253. int err;
  254. blkcipher_walk_init(&walk, dst, src, nbytes);
  255. err = blkcipher_walk_virt(desc, &walk);
  256. desc->flags &= ~CRYPTO_TFM_REQ_MAY_SLEEP;
  257. kernel_fpu_begin();
  258. while ((nbytes = walk.nbytes)) {
  259. aesni_cbc_enc(ctx, walk.dst.virt.addr, walk.src.virt.addr,
  260. nbytes & AES_BLOCK_MASK, walk.iv);
  261. nbytes &= AES_BLOCK_SIZE - 1;
  262. err = blkcipher_walk_done(desc, &walk, nbytes);
  263. }
  264. kernel_fpu_end();
  265. return err;
  266. }
  267. static int cbc_decrypt(struct blkcipher_desc *desc,
  268. struct scatterlist *dst, struct scatterlist *src,
  269. unsigned int nbytes)
  270. {
  271. struct crypto_aes_ctx *ctx = aes_ctx(crypto_blkcipher_ctx(desc->tfm));
  272. struct blkcipher_walk walk;
  273. int err;
  274. blkcipher_walk_init(&walk, dst, src, nbytes);
  275. err = blkcipher_walk_virt(desc, &walk);
  276. desc->flags &= ~CRYPTO_TFM_REQ_MAY_SLEEP;
  277. kernel_fpu_begin();
  278. while ((nbytes = walk.nbytes)) {
  279. aesni_cbc_dec(ctx, walk.dst.virt.addr, walk.src.virt.addr,
  280. nbytes & AES_BLOCK_MASK, walk.iv);
  281. nbytes &= AES_BLOCK_SIZE - 1;
  282. err = blkcipher_walk_done(desc, &walk, nbytes);
  283. }
  284. kernel_fpu_end();
  285. return err;
  286. }
  287. #ifdef CONFIG_X86_64
  288. static void ctr_crypt_final(struct crypto_aes_ctx *ctx,
  289. struct blkcipher_walk *walk)
  290. {
  291. u8 *ctrblk = walk->iv;
  292. u8 keystream[AES_BLOCK_SIZE];
  293. u8 *src = walk->src.virt.addr;
  294. u8 *dst = walk->dst.virt.addr;
  295. unsigned int nbytes = walk->nbytes;
  296. aesni_enc(ctx, keystream, ctrblk);
  297. crypto_xor(keystream, src, nbytes);
  298. memcpy(dst, keystream, nbytes);
  299. crypto_inc(ctrblk, AES_BLOCK_SIZE);
  300. }
  301. static int ctr_crypt(struct blkcipher_desc *desc,
  302. struct scatterlist *dst, struct scatterlist *src,
  303. unsigned int nbytes)
  304. {
  305. struct crypto_aes_ctx *ctx = aes_ctx(crypto_blkcipher_ctx(desc->tfm));
  306. struct blkcipher_walk walk;
  307. int err;
  308. blkcipher_walk_init(&walk, dst, src, nbytes);
  309. err = blkcipher_walk_virt_block(desc, &walk, AES_BLOCK_SIZE);
  310. desc->flags &= ~CRYPTO_TFM_REQ_MAY_SLEEP;
  311. kernel_fpu_begin();
  312. while ((nbytes = walk.nbytes) >= AES_BLOCK_SIZE) {
  313. aesni_ctr_enc(ctx, walk.dst.virt.addr, walk.src.virt.addr,
  314. nbytes & AES_BLOCK_MASK, walk.iv);
  315. nbytes &= AES_BLOCK_SIZE - 1;
  316. err = blkcipher_walk_done(desc, &walk, nbytes);
  317. }
  318. if (walk.nbytes) {
  319. ctr_crypt_final(ctx, &walk);
  320. err = blkcipher_walk_done(desc, &walk, 0);
  321. }
  322. kernel_fpu_end();
  323. return err;
  324. }
  325. #endif
  326. static int ablk_set_key(struct crypto_ablkcipher *tfm, const u8 *key,
  327. unsigned int key_len)
  328. {
  329. struct async_aes_ctx *ctx = crypto_ablkcipher_ctx(tfm);
  330. struct crypto_ablkcipher *child = &ctx->cryptd_tfm->base;
  331. int err;
  332. crypto_ablkcipher_clear_flags(child, CRYPTO_TFM_REQ_MASK);
  333. crypto_ablkcipher_set_flags(child, crypto_ablkcipher_get_flags(tfm)
  334. & CRYPTO_TFM_REQ_MASK);
  335. err = crypto_ablkcipher_setkey(child, key, key_len);
  336. crypto_ablkcipher_set_flags(tfm, crypto_ablkcipher_get_flags(child)
  337. & CRYPTO_TFM_RES_MASK);
  338. return err;
  339. }
  340. static int ablk_encrypt(struct ablkcipher_request *req)
  341. {
  342. struct crypto_ablkcipher *tfm = crypto_ablkcipher_reqtfm(req);
  343. struct async_aes_ctx *ctx = crypto_ablkcipher_ctx(tfm);
  344. if (!irq_fpu_usable()) {
  345. struct ablkcipher_request *cryptd_req =
  346. ablkcipher_request_ctx(req);
  347. memcpy(cryptd_req, req, sizeof(*req));
  348. ablkcipher_request_set_tfm(cryptd_req, &ctx->cryptd_tfm->base);
  349. return crypto_ablkcipher_encrypt(cryptd_req);
  350. } else {
  351. struct blkcipher_desc desc;
  352. desc.tfm = cryptd_ablkcipher_child(ctx->cryptd_tfm);
  353. desc.info = req->info;
  354. desc.flags = 0;
  355. return crypto_blkcipher_crt(desc.tfm)->encrypt(
  356. &desc, req->dst, req->src, req->nbytes);
  357. }
  358. }
  359. static int ablk_decrypt(struct ablkcipher_request *req)
  360. {
  361. struct crypto_ablkcipher *tfm = crypto_ablkcipher_reqtfm(req);
  362. struct async_aes_ctx *ctx = crypto_ablkcipher_ctx(tfm);
  363. if (!irq_fpu_usable()) {
  364. struct ablkcipher_request *cryptd_req =
  365. ablkcipher_request_ctx(req);
  366. memcpy(cryptd_req, req, sizeof(*req));
  367. ablkcipher_request_set_tfm(cryptd_req, &ctx->cryptd_tfm->base);
  368. return crypto_ablkcipher_decrypt(cryptd_req);
  369. } else {
  370. struct blkcipher_desc desc;
  371. desc.tfm = cryptd_ablkcipher_child(ctx->cryptd_tfm);
  372. desc.info = req->info;
  373. desc.flags = 0;
  374. return crypto_blkcipher_crt(desc.tfm)->decrypt(
  375. &desc, req->dst, req->src, req->nbytes);
  376. }
  377. }
  378. static void ablk_exit(struct crypto_tfm *tfm)
  379. {
  380. struct async_aes_ctx *ctx = crypto_tfm_ctx(tfm);
  381. cryptd_free_ablkcipher(ctx->cryptd_tfm);
  382. }
  383. static int ablk_init_common(struct crypto_tfm *tfm, const char *drv_name)
  384. {
  385. struct async_aes_ctx *ctx = crypto_tfm_ctx(tfm);
  386. struct cryptd_ablkcipher *cryptd_tfm;
  387. cryptd_tfm = cryptd_alloc_ablkcipher(drv_name, 0, 0);
  388. if (IS_ERR(cryptd_tfm))
  389. return PTR_ERR(cryptd_tfm);
  390. ctx->cryptd_tfm = cryptd_tfm;
  391. tfm->crt_ablkcipher.reqsize = sizeof(struct ablkcipher_request) +
  392. crypto_ablkcipher_reqsize(&cryptd_tfm->base);
  393. return 0;
  394. }
  395. static int ablk_ecb_init(struct crypto_tfm *tfm)
  396. {
  397. return ablk_init_common(tfm, "__driver-ecb-aes-aesni");
  398. }
  399. static int ablk_cbc_init(struct crypto_tfm *tfm)
  400. {
  401. return ablk_init_common(tfm, "__driver-cbc-aes-aesni");
  402. }
  403. #ifdef CONFIG_X86_64
  404. static int ablk_ctr_init(struct crypto_tfm *tfm)
  405. {
  406. return ablk_init_common(tfm, "__driver-ctr-aes-aesni");
  407. }
  408. #ifdef HAS_CTR
  409. static int ablk_rfc3686_ctr_init(struct crypto_tfm *tfm)
  410. {
  411. return ablk_init_common(tfm, "rfc3686(__driver-ctr-aes-aesni)");
  412. }
  413. #endif
  414. #endif
  415. #ifdef HAS_LRW
  416. static int ablk_lrw_init(struct crypto_tfm *tfm)
  417. {
  418. return ablk_init_common(tfm, "fpu(lrw(__driver-aes-aesni))");
  419. }
  420. #endif
  421. #ifdef HAS_PCBC
  422. static int ablk_pcbc_init(struct crypto_tfm *tfm)
  423. {
  424. return ablk_init_common(tfm, "fpu(pcbc(__driver-aes-aesni))");
  425. }
  426. #endif
  427. #ifdef HAS_XTS
  428. static int ablk_xts_init(struct crypto_tfm *tfm)
  429. {
  430. return ablk_init_common(tfm, "fpu(xts(__driver-aes-aesni))");
  431. }
  432. #endif
  433. #ifdef CONFIG_X86_64
  434. static int rfc4106_init(struct crypto_tfm *tfm)
  435. {
  436. struct cryptd_aead *cryptd_tfm;
  437. struct aesni_rfc4106_gcm_ctx *ctx = (struct aesni_rfc4106_gcm_ctx *)
  438. PTR_ALIGN((u8 *)crypto_tfm_ctx(tfm), AESNI_ALIGN);
  439. struct crypto_aead *cryptd_child;
  440. struct aesni_rfc4106_gcm_ctx *child_ctx;
  441. cryptd_tfm = cryptd_alloc_aead("__driver-gcm-aes-aesni", 0, 0);
  442. if (IS_ERR(cryptd_tfm))
  443. return PTR_ERR(cryptd_tfm);
  444. cryptd_child = cryptd_aead_child(cryptd_tfm);
  445. child_ctx = aesni_rfc4106_gcm_ctx_get(cryptd_child);
  446. memcpy(child_ctx, ctx, sizeof(*ctx));
  447. ctx->cryptd_tfm = cryptd_tfm;
  448. tfm->crt_aead.reqsize = sizeof(struct aead_request)
  449. + crypto_aead_reqsize(&cryptd_tfm->base);
  450. return 0;
  451. }
  452. static void rfc4106_exit(struct crypto_tfm *tfm)
  453. {
  454. struct aesni_rfc4106_gcm_ctx *ctx =
  455. (struct aesni_rfc4106_gcm_ctx *)
  456. PTR_ALIGN((u8 *)crypto_tfm_ctx(tfm), AESNI_ALIGN);
  457. if (!IS_ERR(ctx->cryptd_tfm))
  458. cryptd_free_aead(ctx->cryptd_tfm);
  459. return;
  460. }
  461. static void
  462. rfc4106_set_hash_subkey_done(struct crypto_async_request *req, int err)
  463. {
  464. struct aesni_gcm_set_hash_subkey_result *result = req->data;
  465. if (err == -EINPROGRESS)
  466. return;
  467. result->err = err;
  468. complete(&result->completion);
  469. }
  470. static int
  471. rfc4106_set_hash_subkey(u8 *hash_subkey, const u8 *key, unsigned int key_len)
  472. {
  473. struct crypto_ablkcipher *ctr_tfm;
  474. struct ablkcipher_request *req;
  475. int ret = -EINVAL;
  476. struct aesni_hash_subkey_req_data *req_data;
  477. ctr_tfm = crypto_alloc_ablkcipher("ctr(aes)", 0, 0);
  478. if (IS_ERR(ctr_tfm))
  479. return PTR_ERR(ctr_tfm);
  480. crypto_ablkcipher_clear_flags(ctr_tfm, ~0);
  481. ret = crypto_ablkcipher_setkey(ctr_tfm, key, key_len);
  482. if (ret)
  483. goto out_free_ablkcipher;
  484. ret = -ENOMEM;
  485. req = ablkcipher_request_alloc(ctr_tfm, GFP_KERNEL);
  486. if (!req)
  487. goto out_free_ablkcipher;
  488. req_data = kmalloc(sizeof(*req_data), GFP_KERNEL);
  489. if (!req_data)
  490. goto out_free_request;
  491. memset(req_data->iv, 0, sizeof(req_data->iv));
  492. /* Clear the data in the hash sub key container to zero.*/
  493. /* We want to cipher all zeros to create the hash sub key. */
  494. memset(hash_subkey, 0, RFC4106_HASH_SUBKEY_SIZE);
  495. init_completion(&req_data->result.completion);
  496. sg_init_one(&req_data->sg, hash_subkey, RFC4106_HASH_SUBKEY_SIZE);
  497. ablkcipher_request_set_tfm(req, ctr_tfm);
  498. ablkcipher_request_set_callback(req, CRYPTO_TFM_REQ_MAY_SLEEP |
  499. CRYPTO_TFM_REQ_MAY_BACKLOG,
  500. rfc4106_set_hash_subkey_done,
  501. &req_data->result);
  502. ablkcipher_request_set_crypt(req, &req_data->sg,
  503. &req_data->sg, RFC4106_HASH_SUBKEY_SIZE, req_data->iv);
  504. ret = crypto_ablkcipher_encrypt(req);
  505. if (ret == -EINPROGRESS || ret == -EBUSY) {
  506. ret = wait_for_completion_interruptible
  507. (&req_data->result.completion);
  508. if (!ret)
  509. ret = req_data->result.err;
  510. }
  511. kfree(req_data);
  512. out_free_request:
  513. ablkcipher_request_free(req);
  514. out_free_ablkcipher:
  515. crypto_free_ablkcipher(ctr_tfm);
  516. return ret;
  517. }
  518. static int rfc4106_set_key(struct crypto_aead *parent, const u8 *key,
  519. unsigned int key_len)
  520. {
  521. int ret = 0;
  522. struct crypto_tfm *tfm = crypto_aead_tfm(parent);
  523. struct aesni_rfc4106_gcm_ctx *ctx = aesni_rfc4106_gcm_ctx_get(parent);
  524. struct crypto_aead *cryptd_child = cryptd_aead_child(ctx->cryptd_tfm);
  525. struct aesni_rfc4106_gcm_ctx *child_ctx =
  526. aesni_rfc4106_gcm_ctx_get(cryptd_child);
  527. u8 *new_key_mem = NULL;
  528. if (key_len < 4) {
  529. crypto_tfm_set_flags(tfm, CRYPTO_TFM_RES_BAD_KEY_LEN);
  530. return -EINVAL;
  531. }
  532. /*Account for 4 byte nonce at the end.*/
  533. key_len -= 4;
  534. if (key_len != AES_KEYSIZE_128) {
  535. crypto_tfm_set_flags(tfm, CRYPTO_TFM_RES_BAD_KEY_LEN);
  536. return -EINVAL;
  537. }
  538. memcpy(ctx->nonce, key + key_len, sizeof(ctx->nonce));
  539. /*This must be on a 16 byte boundary!*/
  540. if ((unsigned long)(&(ctx->aes_key_expanded.key_enc[0])) % AESNI_ALIGN)
  541. return -EINVAL;
  542. if ((unsigned long)key % AESNI_ALIGN) {
  543. /*key is not aligned: use an auxuliar aligned pointer*/
  544. new_key_mem = kmalloc(key_len+AESNI_ALIGN, GFP_KERNEL);
  545. if (!new_key_mem)
  546. return -ENOMEM;
  547. new_key_mem = PTR_ALIGN(new_key_mem, AESNI_ALIGN);
  548. memcpy(new_key_mem, key, key_len);
  549. key = new_key_mem;
  550. }
  551. if (!irq_fpu_usable())
  552. ret = crypto_aes_expand_key(&(ctx->aes_key_expanded),
  553. key, key_len);
  554. else {
  555. kernel_fpu_begin();
  556. ret = aesni_set_key(&(ctx->aes_key_expanded), key, key_len);
  557. kernel_fpu_end();
  558. }
  559. /*This must be on a 16 byte boundary!*/
  560. if ((unsigned long)(&(ctx->hash_subkey[0])) % AESNI_ALIGN) {
  561. ret = -EINVAL;
  562. goto exit;
  563. }
  564. ret = rfc4106_set_hash_subkey(ctx->hash_subkey, key, key_len);
  565. memcpy(child_ctx, ctx, sizeof(*ctx));
  566. exit:
  567. kfree(new_key_mem);
  568. return ret;
  569. }
  570. /* This is the Integrity Check Value (aka the authentication tag length and can
  571. * be 8, 12 or 16 bytes long. */
  572. static int rfc4106_set_authsize(struct crypto_aead *parent,
  573. unsigned int authsize)
  574. {
  575. struct aesni_rfc4106_gcm_ctx *ctx = aesni_rfc4106_gcm_ctx_get(parent);
  576. struct crypto_aead *cryptd_child = cryptd_aead_child(ctx->cryptd_tfm);
  577. switch (authsize) {
  578. case 8:
  579. case 12:
  580. case 16:
  581. break;
  582. default:
  583. return -EINVAL;
  584. }
  585. crypto_aead_crt(parent)->authsize = authsize;
  586. crypto_aead_crt(cryptd_child)->authsize = authsize;
  587. return 0;
  588. }
  589. static int rfc4106_encrypt(struct aead_request *req)
  590. {
  591. int ret;
  592. struct crypto_aead *tfm = crypto_aead_reqtfm(req);
  593. struct aesni_rfc4106_gcm_ctx *ctx = aesni_rfc4106_gcm_ctx_get(tfm);
  594. if (!irq_fpu_usable()) {
  595. struct aead_request *cryptd_req =
  596. (struct aead_request *) aead_request_ctx(req);
  597. memcpy(cryptd_req, req, sizeof(*req));
  598. aead_request_set_tfm(cryptd_req, &ctx->cryptd_tfm->base);
  599. return crypto_aead_encrypt(cryptd_req);
  600. } else {
  601. struct crypto_aead *cryptd_child = cryptd_aead_child(ctx->cryptd_tfm);
  602. kernel_fpu_begin();
  603. ret = cryptd_child->base.crt_aead.encrypt(req);
  604. kernel_fpu_end();
  605. return ret;
  606. }
  607. }
  608. static int rfc4106_decrypt(struct aead_request *req)
  609. {
  610. int ret;
  611. struct crypto_aead *tfm = crypto_aead_reqtfm(req);
  612. struct aesni_rfc4106_gcm_ctx *ctx = aesni_rfc4106_gcm_ctx_get(tfm);
  613. if (!irq_fpu_usable()) {
  614. struct aead_request *cryptd_req =
  615. (struct aead_request *) aead_request_ctx(req);
  616. memcpy(cryptd_req, req, sizeof(*req));
  617. aead_request_set_tfm(cryptd_req, &ctx->cryptd_tfm->base);
  618. return crypto_aead_decrypt(cryptd_req);
  619. } else {
  620. struct crypto_aead *cryptd_child = cryptd_aead_child(ctx->cryptd_tfm);
  621. kernel_fpu_begin();
  622. ret = cryptd_child->base.crt_aead.decrypt(req);
  623. kernel_fpu_end();
  624. return ret;
  625. }
  626. }
  627. static int __driver_rfc4106_encrypt(struct aead_request *req)
  628. {
  629. u8 one_entry_in_sg = 0;
  630. u8 *src, *dst, *assoc;
  631. __be32 counter = cpu_to_be32(1);
  632. struct crypto_aead *tfm = crypto_aead_reqtfm(req);
  633. struct aesni_rfc4106_gcm_ctx *ctx = aesni_rfc4106_gcm_ctx_get(tfm);
  634. void *aes_ctx = &(ctx->aes_key_expanded);
  635. unsigned long auth_tag_len = crypto_aead_authsize(tfm);
  636. u8 iv_tab[16+AESNI_ALIGN];
  637. u8* iv = (u8 *) PTR_ALIGN((u8 *)iv_tab, AESNI_ALIGN);
  638. struct scatter_walk src_sg_walk;
  639. struct scatter_walk assoc_sg_walk;
  640. struct scatter_walk dst_sg_walk;
  641. unsigned int i;
  642. /* Assuming we are supporting rfc4106 64-bit extended */
  643. /* sequence numbers We need to have the AAD length equal */
  644. /* to 8 or 12 bytes */
  645. if (unlikely(req->assoclen != 8 && req->assoclen != 12))
  646. return -EINVAL;
  647. /* IV below built */
  648. for (i = 0; i < 4; i++)
  649. *(iv+i) = ctx->nonce[i];
  650. for (i = 0; i < 8; i++)
  651. *(iv+4+i) = req->iv[i];
  652. *((__be32 *)(iv+12)) = counter;
  653. if ((sg_is_last(req->src)) && (sg_is_last(req->assoc))) {
  654. one_entry_in_sg = 1;
  655. scatterwalk_start(&src_sg_walk, req->src);
  656. scatterwalk_start(&assoc_sg_walk, req->assoc);
  657. src = scatterwalk_map(&src_sg_walk);
  658. assoc = scatterwalk_map(&assoc_sg_walk);
  659. dst = src;
  660. if (unlikely(req->src != req->dst)) {
  661. scatterwalk_start(&dst_sg_walk, req->dst);
  662. dst = scatterwalk_map(&dst_sg_walk);
  663. }
  664. } else {
  665. /* Allocate memory for src, dst, assoc */
  666. src = kmalloc(req->cryptlen + auth_tag_len + req->assoclen,
  667. GFP_ATOMIC);
  668. if (unlikely(!src))
  669. return -ENOMEM;
  670. assoc = (src + req->cryptlen + auth_tag_len);
  671. scatterwalk_map_and_copy(src, req->src, 0, req->cryptlen, 0);
  672. scatterwalk_map_and_copy(assoc, req->assoc, 0,
  673. req->assoclen, 0);
  674. dst = src;
  675. }
  676. aesni_gcm_enc(aes_ctx, dst, src, (unsigned long)req->cryptlen, iv,
  677. ctx->hash_subkey, assoc, (unsigned long)req->assoclen, dst
  678. + ((unsigned long)req->cryptlen), auth_tag_len);
  679. /* The authTag (aka the Integrity Check Value) needs to be written
  680. * back to the packet. */
  681. if (one_entry_in_sg) {
  682. if (unlikely(req->src != req->dst)) {
  683. scatterwalk_unmap(dst);
  684. scatterwalk_done(&dst_sg_walk, 0, 0);
  685. }
  686. scatterwalk_unmap(src);
  687. scatterwalk_unmap(assoc);
  688. scatterwalk_done(&src_sg_walk, 0, 0);
  689. scatterwalk_done(&assoc_sg_walk, 0, 0);
  690. } else {
  691. scatterwalk_map_and_copy(dst, req->dst, 0,
  692. req->cryptlen + auth_tag_len, 1);
  693. kfree(src);
  694. }
  695. return 0;
  696. }
  697. static int __driver_rfc4106_decrypt(struct aead_request *req)
  698. {
  699. u8 one_entry_in_sg = 0;
  700. u8 *src, *dst, *assoc;
  701. unsigned long tempCipherLen = 0;
  702. __be32 counter = cpu_to_be32(1);
  703. int retval = 0;
  704. struct crypto_aead *tfm = crypto_aead_reqtfm(req);
  705. struct aesni_rfc4106_gcm_ctx *ctx = aesni_rfc4106_gcm_ctx_get(tfm);
  706. void *aes_ctx = &(ctx->aes_key_expanded);
  707. unsigned long auth_tag_len = crypto_aead_authsize(tfm);
  708. u8 iv_and_authTag[32+AESNI_ALIGN];
  709. u8 *iv = (u8 *) PTR_ALIGN((u8 *)iv_and_authTag, AESNI_ALIGN);
  710. u8 *authTag = iv + 16;
  711. struct scatter_walk src_sg_walk;
  712. struct scatter_walk assoc_sg_walk;
  713. struct scatter_walk dst_sg_walk;
  714. unsigned int i;
  715. if (unlikely((req->cryptlen < auth_tag_len) ||
  716. (req->assoclen != 8 && req->assoclen != 12)))
  717. return -EINVAL;
  718. /* Assuming we are supporting rfc4106 64-bit extended */
  719. /* sequence numbers We need to have the AAD length */
  720. /* equal to 8 or 12 bytes */
  721. tempCipherLen = (unsigned long)(req->cryptlen - auth_tag_len);
  722. /* IV below built */
  723. for (i = 0; i < 4; i++)
  724. *(iv+i) = ctx->nonce[i];
  725. for (i = 0; i < 8; i++)
  726. *(iv+4+i) = req->iv[i];
  727. *((__be32 *)(iv+12)) = counter;
  728. if ((sg_is_last(req->src)) && (sg_is_last(req->assoc))) {
  729. one_entry_in_sg = 1;
  730. scatterwalk_start(&src_sg_walk, req->src);
  731. scatterwalk_start(&assoc_sg_walk, req->assoc);
  732. src = scatterwalk_map(&src_sg_walk);
  733. assoc = scatterwalk_map(&assoc_sg_walk);
  734. dst = src;
  735. if (unlikely(req->src != req->dst)) {
  736. scatterwalk_start(&dst_sg_walk, req->dst);
  737. dst = scatterwalk_map(&dst_sg_walk);
  738. }
  739. } else {
  740. /* Allocate memory for src, dst, assoc */
  741. src = kmalloc(req->cryptlen + req->assoclen, GFP_ATOMIC);
  742. if (!src)
  743. return -ENOMEM;
  744. assoc = (src + req->cryptlen + auth_tag_len);
  745. scatterwalk_map_and_copy(src, req->src, 0, req->cryptlen, 0);
  746. scatterwalk_map_and_copy(assoc, req->assoc, 0,
  747. req->assoclen, 0);
  748. dst = src;
  749. }
  750. aesni_gcm_dec(aes_ctx, dst, src, tempCipherLen, iv,
  751. ctx->hash_subkey, assoc, (unsigned long)req->assoclen,
  752. authTag, auth_tag_len);
  753. /* Compare generated tag with passed in tag. */
  754. retval = memcmp(src + tempCipherLen, authTag, auth_tag_len) ?
  755. -EBADMSG : 0;
  756. if (one_entry_in_sg) {
  757. if (unlikely(req->src != req->dst)) {
  758. scatterwalk_unmap(dst);
  759. scatterwalk_done(&dst_sg_walk, 0, 0);
  760. }
  761. scatterwalk_unmap(src);
  762. scatterwalk_unmap(assoc);
  763. scatterwalk_done(&src_sg_walk, 0, 0);
  764. scatterwalk_done(&assoc_sg_walk, 0, 0);
  765. } else {
  766. scatterwalk_map_and_copy(dst, req->dst, 0, req->cryptlen, 1);
  767. kfree(src);
  768. }
  769. return retval;
  770. }
  771. #endif
  772. static struct crypto_alg aesni_algs[] = { {
  773. .cra_name = "aes",
  774. .cra_driver_name = "aes-aesni",
  775. .cra_priority = 300,
  776. .cra_flags = CRYPTO_ALG_TYPE_CIPHER,
  777. .cra_blocksize = AES_BLOCK_SIZE,
  778. .cra_ctxsize = sizeof(struct crypto_aes_ctx) +
  779. AESNI_ALIGN - 1,
  780. .cra_alignmask = 0,
  781. .cra_module = THIS_MODULE,
  782. .cra_u = {
  783. .cipher = {
  784. .cia_min_keysize = AES_MIN_KEY_SIZE,
  785. .cia_max_keysize = AES_MAX_KEY_SIZE,
  786. .cia_setkey = aes_set_key,
  787. .cia_encrypt = aes_encrypt,
  788. .cia_decrypt = aes_decrypt
  789. }
  790. }
  791. }, {
  792. .cra_name = "__aes-aesni",
  793. .cra_driver_name = "__driver-aes-aesni",
  794. .cra_priority = 0,
  795. .cra_flags = CRYPTO_ALG_TYPE_CIPHER,
  796. .cra_blocksize = AES_BLOCK_SIZE,
  797. .cra_ctxsize = sizeof(struct crypto_aes_ctx) +
  798. AESNI_ALIGN - 1,
  799. .cra_alignmask = 0,
  800. .cra_module = THIS_MODULE,
  801. .cra_u = {
  802. .cipher = {
  803. .cia_min_keysize = AES_MIN_KEY_SIZE,
  804. .cia_max_keysize = AES_MAX_KEY_SIZE,
  805. .cia_setkey = aes_set_key,
  806. .cia_encrypt = __aes_encrypt,
  807. .cia_decrypt = __aes_decrypt
  808. }
  809. }
  810. }, {
  811. .cra_name = "__ecb-aes-aesni",
  812. .cra_driver_name = "__driver-ecb-aes-aesni",
  813. .cra_priority = 0,
  814. .cra_flags = CRYPTO_ALG_TYPE_BLKCIPHER,
  815. .cra_blocksize = AES_BLOCK_SIZE,
  816. .cra_ctxsize = sizeof(struct crypto_aes_ctx) +
  817. AESNI_ALIGN - 1,
  818. .cra_alignmask = 0,
  819. .cra_type = &crypto_blkcipher_type,
  820. .cra_module = THIS_MODULE,
  821. .cra_u = {
  822. .blkcipher = {
  823. .min_keysize = AES_MIN_KEY_SIZE,
  824. .max_keysize = AES_MAX_KEY_SIZE,
  825. .setkey = aes_set_key,
  826. .encrypt = ecb_encrypt,
  827. .decrypt = ecb_decrypt,
  828. },
  829. },
  830. }, {
  831. .cra_name = "__cbc-aes-aesni",
  832. .cra_driver_name = "__driver-cbc-aes-aesni",
  833. .cra_priority = 0,
  834. .cra_flags = CRYPTO_ALG_TYPE_BLKCIPHER,
  835. .cra_blocksize = AES_BLOCK_SIZE,
  836. .cra_ctxsize = sizeof(struct crypto_aes_ctx) +
  837. AESNI_ALIGN - 1,
  838. .cra_alignmask = 0,
  839. .cra_type = &crypto_blkcipher_type,
  840. .cra_module = THIS_MODULE,
  841. .cra_u = {
  842. .blkcipher = {
  843. .min_keysize = AES_MIN_KEY_SIZE,
  844. .max_keysize = AES_MAX_KEY_SIZE,
  845. .setkey = aes_set_key,
  846. .encrypt = cbc_encrypt,
  847. .decrypt = cbc_decrypt,
  848. },
  849. },
  850. }, {
  851. .cra_name = "ecb(aes)",
  852. .cra_driver_name = "ecb-aes-aesni",
  853. .cra_priority = 400,
  854. .cra_flags = CRYPTO_ALG_TYPE_ABLKCIPHER | CRYPTO_ALG_ASYNC,
  855. .cra_blocksize = AES_BLOCK_SIZE,
  856. .cra_ctxsize = sizeof(struct async_aes_ctx),
  857. .cra_alignmask = 0,
  858. .cra_type = &crypto_ablkcipher_type,
  859. .cra_module = THIS_MODULE,
  860. .cra_init = ablk_ecb_init,
  861. .cra_exit = ablk_exit,
  862. .cra_u = {
  863. .ablkcipher = {
  864. .min_keysize = AES_MIN_KEY_SIZE,
  865. .max_keysize = AES_MAX_KEY_SIZE,
  866. .setkey = ablk_set_key,
  867. .encrypt = ablk_encrypt,
  868. .decrypt = ablk_decrypt,
  869. },
  870. },
  871. }, {
  872. .cra_name = "cbc(aes)",
  873. .cra_driver_name = "cbc-aes-aesni",
  874. .cra_priority = 400,
  875. .cra_flags = CRYPTO_ALG_TYPE_ABLKCIPHER | CRYPTO_ALG_ASYNC,
  876. .cra_blocksize = AES_BLOCK_SIZE,
  877. .cra_ctxsize = sizeof(struct async_aes_ctx),
  878. .cra_alignmask = 0,
  879. .cra_type = &crypto_ablkcipher_type,
  880. .cra_module = THIS_MODULE,
  881. .cra_init = ablk_cbc_init,
  882. .cra_exit = ablk_exit,
  883. .cra_u = {
  884. .ablkcipher = {
  885. .min_keysize = AES_MIN_KEY_SIZE,
  886. .max_keysize = AES_MAX_KEY_SIZE,
  887. .ivsize = AES_BLOCK_SIZE,
  888. .setkey = ablk_set_key,
  889. .encrypt = ablk_encrypt,
  890. .decrypt = ablk_decrypt,
  891. },
  892. },
  893. #ifdef CONFIG_X86_64
  894. }, {
  895. .cra_name = "__ctr-aes-aesni",
  896. .cra_driver_name = "__driver-ctr-aes-aesni",
  897. .cra_priority = 0,
  898. .cra_flags = CRYPTO_ALG_TYPE_BLKCIPHER,
  899. .cra_blocksize = 1,
  900. .cra_ctxsize = sizeof(struct crypto_aes_ctx) +
  901. AESNI_ALIGN - 1,
  902. .cra_alignmask = 0,
  903. .cra_type = &crypto_blkcipher_type,
  904. .cra_module = THIS_MODULE,
  905. .cra_u = {
  906. .blkcipher = {
  907. .min_keysize = AES_MIN_KEY_SIZE,
  908. .max_keysize = AES_MAX_KEY_SIZE,
  909. .ivsize = AES_BLOCK_SIZE,
  910. .setkey = aes_set_key,
  911. .encrypt = ctr_crypt,
  912. .decrypt = ctr_crypt,
  913. },
  914. },
  915. }, {
  916. .cra_name = "ctr(aes)",
  917. .cra_driver_name = "ctr-aes-aesni",
  918. .cra_priority = 400,
  919. .cra_flags = CRYPTO_ALG_TYPE_ABLKCIPHER | CRYPTO_ALG_ASYNC,
  920. .cra_blocksize = 1,
  921. .cra_ctxsize = sizeof(struct async_aes_ctx),
  922. .cra_alignmask = 0,
  923. .cra_type = &crypto_ablkcipher_type,
  924. .cra_module = THIS_MODULE,
  925. .cra_init = ablk_ctr_init,
  926. .cra_exit = ablk_exit,
  927. .cra_u = {
  928. .ablkcipher = {
  929. .min_keysize = AES_MIN_KEY_SIZE,
  930. .max_keysize = AES_MAX_KEY_SIZE,
  931. .ivsize = AES_BLOCK_SIZE,
  932. .setkey = ablk_set_key,
  933. .encrypt = ablk_encrypt,
  934. .decrypt = ablk_encrypt,
  935. .geniv = "chainiv",
  936. },
  937. },
  938. }, {
  939. .cra_name = "__gcm-aes-aesni",
  940. .cra_driver_name = "__driver-gcm-aes-aesni",
  941. .cra_priority = 0,
  942. .cra_flags = CRYPTO_ALG_TYPE_AEAD,
  943. .cra_blocksize = 1,
  944. .cra_ctxsize = sizeof(struct aesni_rfc4106_gcm_ctx) +
  945. AESNI_ALIGN,
  946. .cra_alignmask = 0,
  947. .cra_type = &crypto_aead_type,
  948. .cra_module = THIS_MODULE,
  949. .cra_u = {
  950. .aead = {
  951. .encrypt = __driver_rfc4106_encrypt,
  952. .decrypt = __driver_rfc4106_decrypt,
  953. },
  954. },
  955. }, {
  956. .cra_name = "rfc4106(gcm(aes))",
  957. .cra_driver_name = "rfc4106-gcm-aesni",
  958. .cra_priority = 400,
  959. .cra_flags = CRYPTO_ALG_TYPE_AEAD | CRYPTO_ALG_ASYNC,
  960. .cra_blocksize = 1,
  961. .cra_ctxsize = sizeof(struct aesni_rfc4106_gcm_ctx) +
  962. AESNI_ALIGN,
  963. .cra_alignmask = 0,
  964. .cra_type = &crypto_nivaead_type,
  965. .cra_module = THIS_MODULE,
  966. .cra_init = rfc4106_init,
  967. .cra_exit = rfc4106_exit,
  968. .cra_u = {
  969. .aead = {
  970. .setkey = rfc4106_set_key,
  971. .setauthsize = rfc4106_set_authsize,
  972. .encrypt = rfc4106_encrypt,
  973. .decrypt = rfc4106_decrypt,
  974. .geniv = "seqiv",
  975. .ivsize = 8,
  976. .maxauthsize = 16,
  977. },
  978. },
  979. #ifdef HAS_CTR
  980. }, {
  981. .cra_name = "rfc3686(ctr(aes))",
  982. .cra_driver_name = "rfc3686-ctr-aes-aesni",
  983. .cra_priority = 400,
  984. .cra_flags = CRYPTO_ALG_TYPE_ABLKCIPHER | CRYPTO_ALG_ASYNC,
  985. .cra_blocksize = 1,
  986. .cra_ctxsize = sizeof(struct async_aes_ctx),
  987. .cra_alignmask = 0,
  988. .cra_type = &crypto_ablkcipher_type,
  989. .cra_module = THIS_MODULE,
  990. .cra_init = ablk_rfc3686_ctr_init,
  991. .cra_exit = ablk_exit,
  992. .cra_u = {
  993. .ablkcipher = {
  994. .min_keysize = AES_MIN_KEY_SIZE +
  995. CTR_RFC3686_NONCE_SIZE,
  996. .max_keysize = AES_MAX_KEY_SIZE +
  997. CTR_RFC3686_NONCE_SIZE,
  998. .ivsize = CTR_RFC3686_IV_SIZE,
  999. .setkey = ablk_set_key,
  1000. .encrypt = ablk_encrypt,
  1001. .decrypt = ablk_decrypt,
  1002. .geniv = "seqiv",
  1003. },
  1004. },
  1005. #endif
  1006. #endif
  1007. #ifdef HAS_LRW
  1008. }, {
  1009. .cra_name = "lrw(aes)",
  1010. .cra_driver_name = "lrw-aes-aesni",
  1011. .cra_priority = 400,
  1012. .cra_flags = CRYPTO_ALG_TYPE_ABLKCIPHER | CRYPTO_ALG_ASYNC,
  1013. .cra_blocksize = AES_BLOCK_SIZE,
  1014. .cra_ctxsize = sizeof(struct async_aes_ctx),
  1015. .cra_alignmask = 0,
  1016. .cra_type = &crypto_ablkcipher_type,
  1017. .cra_module = THIS_MODULE,
  1018. .cra_init = ablk_lrw_init,
  1019. .cra_exit = ablk_exit,
  1020. .cra_u = {
  1021. .ablkcipher = {
  1022. .min_keysize = AES_MIN_KEY_SIZE + AES_BLOCK_SIZE,
  1023. .max_keysize = AES_MAX_KEY_SIZE + AES_BLOCK_SIZE,
  1024. .ivsize = AES_BLOCK_SIZE,
  1025. .setkey = ablk_set_key,
  1026. .encrypt = ablk_encrypt,
  1027. .decrypt = ablk_decrypt,
  1028. },
  1029. },
  1030. #endif
  1031. #ifdef HAS_PCBC
  1032. }, {
  1033. .cra_name = "pcbc(aes)",
  1034. .cra_driver_name = "pcbc-aes-aesni",
  1035. .cra_priority = 400,
  1036. .cra_flags = CRYPTO_ALG_TYPE_ABLKCIPHER | CRYPTO_ALG_ASYNC,
  1037. .cra_blocksize = AES_BLOCK_SIZE,
  1038. .cra_ctxsize = sizeof(struct async_aes_ctx),
  1039. .cra_alignmask = 0,
  1040. .cra_type = &crypto_ablkcipher_type,
  1041. .cra_module = THIS_MODULE,
  1042. .cra_init = ablk_pcbc_init,
  1043. .cra_exit = ablk_exit,
  1044. .cra_u = {
  1045. .ablkcipher = {
  1046. .min_keysize = AES_MIN_KEY_SIZE,
  1047. .max_keysize = AES_MAX_KEY_SIZE,
  1048. .ivsize = AES_BLOCK_SIZE,
  1049. .setkey = ablk_set_key,
  1050. .encrypt = ablk_encrypt,
  1051. .decrypt = ablk_decrypt,
  1052. },
  1053. },
  1054. #endif
  1055. #ifdef HAS_XTS
  1056. }, {
  1057. .cra_name = "xts(aes)",
  1058. .cra_driver_name = "xts-aes-aesni",
  1059. .cra_priority = 400,
  1060. .cra_flags = CRYPTO_ALG_TYPE_ABLKCIPHER | CRYPTO_ALG_ASYNC,
  1061. .cra_blocksize = AES_BLOCK_SIZE,
  1062. .cra_ctxsize = sizeof(struct async_aes_ctx),
  1063. .cra_alignmask = 0,
  1064. .cra_type = &crypto_ablkcipher_type,
  1065. .cra_module = THIS_MODULE,
  1066. .cra_init = ablk_xts_init,
  1067. .cra_exit = ablk_exit,
  1068. .cra_u = {
  1069. .ablkcipher = {
  1070. .min_keysize = 2 * AES_MIN_KEY_SIZE,
  1071. .max_keysize = 2 * AES_MAX_KEY_SIZE,
  1072. .ivsize = AES_BLOCK_SIZE,
  1073. .setkey = ablk_set_key,
  1074. .encrypt = ablk_encrypt,
  1075. .decrypt = ablk_decrypt,
  1076. },
  1077. },
  1078. #endif
  1079. } };
  1080. static const struct x86_cpu_id aesni_cpu_id[] = {
  1081. X86_FEATURE_MATCH(X86_FEATURE_AES),
  1082. {}
  1083. };
  1084. MODULE_DEVICE_TABLE(x86cpu, aesni_cpu_id);
  1085. static int __init aesni_init(void)
  1086. {
  1087. int err, i;
  1088. if (!x86_match_cpu(aesni_cpu_id))
  1089. return -ENODEV;
  1090. err = crypto_fpu_init();
  1091. if (err)
  1092. return err;
  1093. for (i = 0; i < ARRAY_SIZE(aesni_algs); i++)
  1094. INIT_LIST_HEAD(&aesni_algs[i].cra_list);
  1095. return crypto_register_algs(aesni_algs, ARRAY_SIZE(aesni_algs));
  1096. }
  1097. static void __exit aesni_exit(void)
  1098. {
  1099. crypto_unregister_algs(aesni_algs, ARRAY_SIZE(aesni_algs));
  1100. crypto_fpu_exit();
  1101. }
  1102. module_init(aesni_init);
  1103. module_exit(aesni_exit);
  1104. MODULE_DESCRIPTION("Rijndael (AES) Cipher Algorithm, Intel AES-NI instructions optimized");
  1105. MODULE_LICENSE("GPL");
  1106. MODULE_ALIAS("aes");