generic.c 9.0 KB

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  1. /*
  2. * linux/arch/arm/mach-pxa/generic.c
  3. *
  4. * Author: Nicolas Pitre
  5. * Created: Jun 15, 2001
  6. * Copyright: MontaVista Software Inc.
  7. *
  8. * Code common to all PXA machines.
  9. *
  10. * This program is free software; you can redistribute it and/or modify
  11. * it under the terms of the GNU General Public License version 2 as
  12. * published by the Free Software Foundation.
  13. *
  14. * Since this file should be linked before any other machine specific file,
  15. * the __initcall() here will be executed first. This serves as default
  16. * initialization stuff for PXA machines which can be overridden later if
  17. * need be.
  18. */
  19. #include <linux/module.h>
  20. #include <linux/kernel.h>
  21. #include <linux/init.h>
  22. #include <linux/delay.h>
  23. #include <linux/platform_device.h>
  24. #include <linux/ioport.h>
  25. #include <linux/pm.h>
  26. #include <linux/string.h>
  27. #include <linux/sched.h>
  28. #include <asm/cnt32_to_63.h>
  29. #include <asm/div64.h>
  30. #include <asm/hardware.h>
  31. #include <asm/irq.h>
  32. #include <asm/system.h>
  33. #include <asm/pgtable.h>
  34. #include <asm/mach/map.h>
  35. #include <asm/arch/pxa-regs.h>
  36. #include <asm/arch/udc.h>
  37. #include <asm/arch/pxafb.h>
  38. #include <asm/arch/mmc.h>
  39. #include <asm/arch/irda.h>
  40. #include <asm/arch/i2c.h>
  41. #include "generic.h"
  42. /*
  43. * This is the PXA2xx sched_clock implementation. This has a resolution
  44. * of at least 308ns and a maximum value that depends on the value of
  45. * CLOCK_TICK_RATE.
  46. *
  47. * The return value is guaranteed to be monotonic in that range as
  48. * long as there is always less than 582 seconds between successive
  49. * calls to this function.
  50. */
  51. unsigned long long sched_clock(void)
  52. {
  53. unsigned long long v = cnt32_to_63(OSCR);
  54. /* Note: top bit ov v needs cleared unless multiplier is even. */
  55. #if CLOCK_TICK_RATE == 3686400
  56. /* 1E9 / 3686400 => 78125 / 288, max value = 32025597s (370 days). */
  57. /* The <<1 is used to get rid of tick.hi top bit */
  58. v *= 78125<<1;
  59. do_div(v, 288<<1);
  60. #elif CLOCK_TICK_RATE == 3250000
  61. /* 1E9 / 3250000 => 4000 / 13, max value = 709490156s (8211 days) */
  62. v *= 4000;
  63. do_div(v, 13);
  64. #elif CLOCK_TICK_RATE == 3249600
  65. /* 1E9 / 3249600 => 625000 / 2031, max value = 4541295s (52 days) */
  66. v *= 625000;
  67. do_div(v, 2031);
  68. #else
  69. #warning "consider fixing sched_clock for your value of CLOCK_TICK_RATE"
  70. /*
  71. * 96-bit math to perform tick * NSEC_PER_SEC / CLOCK_TICK_RATE for
  72. * any value of CLOCK_TICK_RATE. Max value is in the 80 thousand
  73. * years range which is nice, but with higher computation cost.
  74. */
  75. {
  76. union {
  77. unsigned long long val;
  78. struct { unsigned long lo, hi; };
  79. } x;
  80. unsigned long long y;
  81. x.val = v;
  82. x.hi &= 0x7fffffff;
  83. y = (unsigned long long)x.lo * NSEC_PER_SEC;
  84. x.lo = y;
  85. y = (y >> 32) + (unsigned long long)x.hi * NSEC_PER_SEC;
  86. x.hi = do_div(y, CLOCK_TICK_RATE);
  87. do_div(x.val, CLOCK_TICK_RATE);
  88. x.hi += y;
  89. v = x.val;
  90. }
  91. #endif
  92. return v;
  93. }
  94. /*
  95. * Handy function to set GPIO alternate functions
  96. */
  97. void pxa_gpio_mode(int gpio_mode)
  98. {
  99. unsigned long flags;
  100. int gpio = gpio_mode & GPIO_MD_MASK_NR;
  101. int fn = (gpio_mode & GPIO_MD_MASK_FN) >> 8;
  102. int gafr;
  103. local_irq_save(flags);
  104. if (gpio_mode & GPIO_DFLT_LOW)
  105. GPCR(gpio) = GPIO_bit(gpio);
  106. else if (gpio_mode & GPIO_DFLT_HIGH)
  107. GPSR(gpio) = GPIO_bit(gpio);
  108. if (gpio_mode & GPIO_MD_MASK_DIR)
  109. GPDR(gpio) |= GPIO_bit(gpio);
  110. else
  111. GPDR(gpio) &= ~GPIO_bit(gpio);
  112. gafr = GAFR(gpio) & ~(0x3 << (((gpio) & 0xf)*2));
  113. GAFR(gpio) = gafr | (fn << (((gpio) & 0xf)*2));
  114. local_irq_restore(flags);
  115. }
  116. EXPORT_SYMBOL(pxa_gpio_mode);
  117. /*
  118. * Routine to safely enable or disable a clock in the CKEN
  119. */
  120. void pxa_set_cken(int clock, int enable)
  121. {
  122. unsigned long flags;
  123. local_irq_save(flags);
  124. if (enable)
  125. CKEN |= clock;
  126. else
  127. CKEN &= ~clock;
  128. local_irq_restore(flags);
  129. }
  130. EXPORT_SYMBOL(pxa_set_cken);
  131. /*
  132. * Intel PXA2xx internal register mapping.
  133. *
  134. * Note 1: not all PXA2xx variants implement all those addresses.
  135. *
  136. * Note 2: virtual 0xfffe0000-0xffffffff is reserved for the vector table
  137. * and cache flush area.
  138. */
  139. static struct map_desc standard_io_desc[] __initdata = {
  140. { /* Devs */
  141. .virtual = 0xf2000000,
  142. .pfn = __phys_to_pfn(0x40000000),
  143. .length = 0x02000000,
  144. .type = MT_DEVICE
  145. }, { /* LCD */
  146. .virtual = 0xf4000000,
  147. .pfn = __phys_to_pfn(0x44000000),
  148. .length = 0x00100000,
  149. .type = MT_DEVICE
  150. }, { /* Mem Ctl */
  151. .virtual = 0xf6000000,
  152. .pfn = __phys_to_pfn(0x48000000),
  153. .length = 0x00100000,
  154. .type = MT_DEVICE
  155. }, { /* USB host */
  156. .virtual = 0xf8000000,
  157. .pfn = __phys_to_pfn(0x4c000000),
  158. .length = 0x00100000,
  159. .type = MT_DEVICE
  160. }, { /* Camera */
  161. .virtual = 0xfa000000,
  162. .pfn = __phys_to_pfn(0x50000000),
  163. .length = 0x00100000,
  164. .type = MT_DEVICE
  165. }, { /* IMem ctl */
  166. .virtual = 0xfe000000,
  167. .pfn = __phys_to_pfn(0x58000000),
  168. .length = 0x00100000,
  169. .type = MT_DEVICE
  170. }, { /* UNCACHED_PHYS_0 */
  171. .virtual = 0xff000000,
  172. .pfn = __phys_to_pfn(0x00000000),
  173. .length = 0x00100000,
  174. .type = MT_DEVICE
  175. }
  176. };
  177. void __init pxa_map_io(void)
  178. {
  179. iotable_init(standard_io_desc, ARRAY_SIZE(standard_io_desc));
  180. get_clk_frequency_khz(1);
  181. }
  182. static struct resource pxamci_resources[] = {
  183. [0] = {
  184. .start = 0x41100000,
  185. .end = 0x41100fff,
  186. .flags = IORESOURCE_MEM,
  187. },
  188. [1] = {
  189. .start = IRQ_MMC,
  190. .end = IRQ_MMC,
  191. .flags = IORESOURCE_IRQ,
  192. },
  193. };
  194. static u64 pxamci_dmamask = 0xffffffffUL;
  195. static struct platform_device pxamci_device = {
  196. .name = "pxa2xx-mci",
  197. .id = -1,
  198. .dev = {
  199. .dma_mask = &pxamci_dmamask,
  200. .coherent_dma_mask = 0xffffffff,
  201. },
  202. .num_resources = ARRAY_SIZE(pxamci_resources),
  203. .resource = pxamci_resources,
  204. };
  205. void __init pxa_set_mci_info(struct pxamci_platform_data *info)
  206. {
  207. pxamci_device.dev.platform_data = info;
  208. }
  209. static struct pxa2xx_udc_mach_info pxa_udc_info;
  210. void __init pxa_set_udc_info(struct pxa2xx_udc_mach_info *info)
  211. {
  212. memcpy(&pxa_udc_info, info, sizeof *info);
  213. }
  214. static struct resource pxa2xx_udc_resources[] = {
  215. [0] = {
  216. .start = 0x40600000,
  217. .end = 0x4060ffff,
  218. .flags = IORESOURCE_MEM,
  219. },
  220. [1] = {
  221. .start = IRQ_USB,
  222. .end = IRQ_USB,
  223. .flags = IORESOURCE_IRQ,
  224. },
  225. };
  226. static u64 udc_dma_mask = ~(u32)0;
  227. static struct platform_device udc_device = {
  228. .name = "pxa2xx-udc",
  229. .id = -1,
  230. .resource = pxa2xx_udc_resources,
  231. .num_resources = ARRAY_SIZE(pxa2xx_udc_resources),
  232. .dev = {
  233. .platform_data = &pxa_udc_info,
  234. .dma_mask = &udc_dma_mask,
  235. }
  236. };
  237. static struct resource pxafb_resources[] = {
  238. [0] = {
  239. .start = 0x44000000,
  240. .end = 0x4400ffff,
  241. .flags = IORESOURCE_MEM,
  242. },
  243. [1] = {
  244. .start = IRQ_LCD,
  245. .end = IRQ_LCD,
  246. .flags = IORESOURCE_IRQ,
  247. },
  248. };
  249. static u64 fb_dma_mask = ~(u64)0;
  250. static struct platform_device pxafb_device = {
  251. .name = "pxa2xx-fb",
  252. .id = -1,
  253. .dev = {
  254. .dma_mask = &fb_dma_mask,
  255. .coherent_dma_mask = 0xffffffff,
  256. },
  257. .num_resources = ARRAY_SIZE(pxafb_resources),
  258. .resource = pxafb_resources,
  259. };
  260. void __init set_pxa_fb_info(struct pxafb_mach_info *info)
  261. {
  262. pxafb_device.dev.platform_data = info;
  263. }
  264. void __init set_pxa_fb_parent(struct device *parent_dev)
  265. {
  266. pxafb_device.dev.parent = parent_dev;
  267. }
  268. static struct platform_device ffuart_device = {
  269. .name = "pxa2xx-uart",
  270. .id = 0,
  271. };
  272. static struct platform_device btuart_device = {
  273. .name = "pxa2xx-uart",
  274. .id = 1,
  275. };
  276. static struct platform_device stuart_device = {
  277. .name = "pxa2xx-uart",
  278. .id = 2,
  279. };
  280. static struct platform_device hwuart_device = {
  281. .name = "pxa2xx-uart",
  282. .id = 3,
  283. };
  284. static struct resource i2c_resources[] = {
  285. {
  286. .start = 0x40301680,
  287. .end = 0x403016a3,
  288. .flags = IORESOURCE_MEM,
  289. }, {
  290. .start = IRQ_I2C,
  291. .end = IRQ_I2C,
  292. .flags = IORESOURCE_IRQ,
  293. },
  294. };
  295. static struct platform_device i2c_device = {
  296. .name = "pxa2xx-i2c",
  297. .id = 0,
  298. .resource = i2c_resources,
  299. .num_resources = ARRAY_SIZE(i2c_resources),
  300. };
  301. void __init pxa_set_i2c_info(struct i2c_pxa_platform_data *info)
  302. {
  303. i2c_device.dev.platform_data = info;
  304. }
  305. static struct resource i2s_resources[] = {
  306. {
  307. .start = 0x40400000,
  308. .end = 0x40400083,
  309. .flags = IORESOURCE_MEM,
  310. }, {
  311. .start = IRQ_I2S,
  312. .end = IRQ_I2S,
  313. .flags = IORESOURCE_IRQ,
  314. },
  315. };
  316. static struct platform_device i2s_device = {
  317. .name = "pxa2xx-i2s",
  318. .id = -1,
  319. .resource = i2s_resources,
  320. .num_resources = ARRAY_SIZE(i2s_resources),
  321. };
  322. static u64 pxaficp_dmamask = ~(u32)0;
  323. static struct platform_device pxaficp_device = {
  324. .name = "pxa2xx-ir",
  325. .id = -1,
  326. .dev = {
  327. .dma_mask = &pxaficp_dmamask,
  328. .coherent_dma_mask = 0xffffffff,
  329. },
  330. };
  331. void __init pxa_set_ficp_info(struct pxaficp_platform_data *info)
  332. {
  333. pxaficp_device.dev.platform_data = info;
  334. }
  335. static struct platform_device pxartc_device = {
  336. .name = "sa1100-rtc",
  337. .id = -1,
  338. };
  339. static struct platform_device *devices[] __initdata = {
  340. &pxamci_device,
  341. &udc_device,
  342. &pxafb_device,
  343. &ffuart_device,
  344. &btuart_device,
  345. &stuart_device,
  346. &pxaficp_device,
  347. &i2c_device,
  348. &i2s_device,
  349. &pxartc_device,
  350. };
  351. static int __init pxa_init(void)
  352. {
  353. int cpuid, ret;
  354. ret = platform_add_devices(devices, ARRAY_SIZE(devices));
  355. if (ret)
  356. return ret;
  357. /* Only add HWUART for PXA255/26x; PXA210/250/27x do not have it. */
  358. cpuid = read_cpuid(CPUID_ID);
  359. if (((cpuid >> 4) & 0xfff) == 0x2d0 ||
  360. ((cpuid >> 4) & 0xfff) == 0x290)
  361. ret = platform_device_register(&hwuart_device);
  362. return ret;
  363. }
  364. subsys_initcall(pxa_init);