rtc-s3c.c 16 KB

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  1. /* drivers/rtc/rtc-s3c.c
  2. *
  3. * Copyright (c) 2010 Samsung Electronics Co., Ltd.
  4. * http://www.samsung.com/
  5. *
  6. * Copyright (c) 2004,2006 Simtec Electronics
  7. * Ben Dooks, <ben@simtec.co.uk>
  8. * http://armlinux.simtec.co.uk/
  9. *
  10. * This program is free software; you can redistribute it and/or modify
  11. * it under the terms of the GNU General Public License version 2 as
  12. * published by the Free Software Foundation.
  13. *
  14. * S3C2410/S3C2440/S3C24XX Internal RTC Driver
  15. */
  16. #include <linux/module.h>
  17. #include <linux/fs.h>
  18. #include <linux/string.h>
  19. #include <linux/init.h>
  20. #include <linux/platform_device.h>
  21. #include <linux/interrupt.h>
  22. #include <linux/rtc.h>
  23. #include <linux/bcd.h>
  24. #include <linux/clk.h>
  25. #include <linux/log2.h>
  26. #include <linux/slab.h>
  27. #include <mach/hardware.h>
  28. #include <asm/uaccess.h>
  29. #include <asm/io.h>
  30. #include <asm/irq.h>
  31. #include <plat/regs-rtc.h>
  32. enum s3c_cpu_type {
  33. TYPE_S3C2410,
  34. TYPE_S3C64XX,
  35. };
  36. /* I have yet to find an S3C implementation with more than one
  37. * of these rtc blocks in */
  38. static struct resource *s3c_rtc_mem;
  39. static struct clk *rtc_clk;
  40. static void __iomem *s3c_rtc_base;
  41. static int s3c_rtc_alarmno = NO_IRQ;
  42. static int s3c_rtc_tickno = NO_IRQ;
  43. static bool wake_en;
  44. static enum s3c_cpu_type s3c_rtc_cpu_type;
  45. static DEFINE_SPINLOCK(s3c_rtc_pie_lock);
  46. static void s3c_rtc_alarm_clk_enable(bool enable)
  47. {
  48. static DEFINE_SPINLOCK(s3c_rtc_alarm_clk_lock);
  49. static bool alarm_clk_enabled;
  50. unsigned long irq_flags;
  51. spin_lock_irqsave(&s3c_rtc_alarm_clk_lock, irq_flags);
  52. if (enable) {
  53. if (!alarm_clk_enabled) {
  54. clk_enable(rtc_clk);
  55. alarm_clk_enabled = true;
  56. }
  57. } else {
  58. if (alarm_clk_enabled) {
  59. clk_disable(rtc_clk);
  60. alarm_clk_enabled = false;
  61. }
  62. }
  63. spin_unlock_irqrestore(&s3c_rtc_alarm_clk_lock, irq_flags);
  64. }
  65. /* IRQ Handlers */
  66. static irqreturn_t s3c_rtc_alarmirq(int irq, void *id)
  67. {
  68. struct rtc_device *rdev = id;
  69. clk_enable(rtc_clk);
  70. rtc_update_irq(rdev, 1, RTC_AF | RTC_IRQF);
  71. if (s3c_rtc_cpu_type == TYPE_S3C64XX)
  72. writeb(S3C2410_INTP_ALM, s3c_rtc_base + S3C2410_INTP);
  73. clk_disable(rtc_clk);
  74. s3c_rtc_alarm_clk_enable(false);
  75. return IRQ_HANDLED;
  76. }
  77. static irqreturn_t s3c_rtc_tickirq(int irq, void *id)
  78. {
  79. struct rtc_device *rdev = id;
  80. clk_enable(rtc_clk);
  81. rtc_update_irq(rdev, 1, RTC_PF | RTC_IRQF);
  82. if (s3c_rtc_cpu_type == TYPE_S3C64XX)
  83. writeb(S3C2410_INTP_TIC, s3c_rtc_base + S3C2410_INTP);
  84. clk_disable(rtc_clk);
  85. return IRQ_HANDLED;
  86. }
  87. /* Update control registers */
  88. static int s3c_rtc_setaie(struct device *dev, unsigned int enabled)
  89. {
  90. unsigned int tmp;
  91. pr_debug("%s: aie=%d\n", __func__, enabled);
  92. clk_enable(rtc_clk);
  93. tmp = readb(s3c_rtc_base + S3C2410_RTCALM) & ~S3C2410_RTCALM_ALMEN;
  94. if (enabled)
  95. tmp |= S3C2410_RTCALM_ALMEN;
  96. writeb(tmp, s3c_rtc_base + S3C2410_RTCALM);
  97. clk_disable(rtc_clk);
  98. s3c_rtc_alarm_clk_enable(enabled);
  99. return 0;
  100. }
  101. static int s3c_rtc_setfreq(struct device *dev, int freq)
  102. {
  103. struct platform_device *pdev = to_platform_device(dev);
  104. struct rtc_device *rtc_dev = platform_get_drvdata(pdev);
  105. unsigned int tmp = 0;
  106. if (!is_power_of_2(freq))
  107. return -EINVAL;
  108. clk_enable(rtc_clk);
  109. spin_lock_irq(&s3c_rtc_pie_lock);
  110. if (s3c_rtc_cpu_type == TYPE_S3C2410) {
  111. tmp = readb(s3c_rtc_base + S3C2410_TICNT);
  112. tmp &= S3C2410_TICNT_ENABLE;
  113. }
  114. tmp |= (rtc_dev->max_user_freq / freq)-1;
  115. writel(tmp, s3c_rtc_base + S3C2410_TICNT);
  116. spin_unlock_irq(&s3c_rtc_pie_lock);
  117. clk_disable(rtc_clk);
  118. return 0;
  119. }
  120. /* Time read/write */
  121. static int s3c_rtc_gettime(struct device *dev, struct rtc_time *rtc_tm)
  122. {
  123. unsigned int have_retried = 0;
  124. void __iomem *base = s3c_rtc_base;
  125. clk_enable(rtc_clk);
  126. retry_get_time:
  127. rtc_tm->tm_min = readb(base + S3C2410_RTCMIN);
  128. rtc_tm->tm_hour = readb(base + S3C2410_RTCHOUR);
  129. rtc_tm->tm_mday = readb(base + S3C2410_RTCDATE);
  130. rtc_tm->tm_mon = readb(base + S3C2410_RTCMON);
  131. rtc_tm->tm_year = readb(base + S3C2410_RTCYEAR);
  132. rtc_tm->tm_sec = readb(base + S3C2410_RTCSEC);
  133. /* the only way to work out wether the system was mid-update
  134. * when we read it is to check the second counter, and if it
  135. * is zero, then we re-try the entire read
  136. */
  137. if (rtc_tm->tm_sec == 0 && !have_retried) {
  138. have_retried = 1;
  139. goto retry_get_time;
  140. }
  141. rtc_tm->tm_sec = bcd2bin(rtc_tm->tm_sec);
  142. rtc_tm->tm_min = bcd2bin(rtc_tm->tm_min);
  143. rtc_tm->tm_hour = bcd2bin(rtc_tm->tm_hour);
  144. rtc_tm->tm_mday = bcd2bin(rtc_tm->tm_mday);
  145. rtc_tm->tm_mon = bcd2bin(rtc_tm->tm_mon);
  146. rtc_tm->tm_year = bcd2bin(rtc_tm->tm_year);
  147. rtc_tm->tm_year += 100;
  148. pr_debug("read time %04d.%02d.%02d %02d:%02d:%02d\n",
  149. 1900 + rtc_tm->tm_year, rtc_tm->tm_mon, rtc_tm->tm_mday,
  150. rtc_tm->tm_hour, rtc_tm->tm_min, rtc_tm->tm_sec);
  151. rtc_tm->tm_mon -= 1;
  152. clk_disable(rtc_clk);
  153. return rtc_valid_tm(rtc_tm);
  154. }
  155. static int s3c_rtc_settime(struct device *dev, struct rtc_time *tm)
  156. {
  157. void __iomem *base = s3c_rtc_base;
  158. int year = tm->tm_year - 100;
  159. pr_debug("set time %04d.%02d.%02d %02d:%02d:%02d\n",
  160. 1900 + tm->tm_year, tm->tm_mon, tm->tm_mday,
  161. tm->tm_hour, tm->tm_min, tm->tm_sec);
  162. /* we get around y2k by simply not supporting it */
  163. if (year < 0 || year >= 100) {
  164. dev_err(dev, "rtc only supports 100 years\n");
  165. return -EINVAL;
  166. }
  167. clk_enable(rtc_clk);
  168. writeb(bin2bcd(tm->tm_sec), base + S3C2410_RTCSEC);
  169. writeb(bin2bcd(tm->tm_min), base + S3C2410_RTCMIN);
  170. writeb(bin2bcd(tm->tm_hour), base + S3C2410_RTCHOUR);
  171. writeb(bin2bcd(tm->tm_mday), base + S3C2410_RTCDATE);
  172. writeb(bin2bcd(tm->tm_mon + 1), base + S3C2410_RTCMON);
  173. writeb(bin2bcd(year), base + S3C2410_RTCYEAR);
  174. clk_disable(rtc_clk);
  175. return 0;
  176. }
  177. static int s3c_rtc_getalarm(struct device *dev, struct rtc_wkalrm *alrm)
  178. {
  179. struct rtc_time *alm_tm = &alrm->time;
  180. void __iomem *base = s3c_rtc_base;
  181. unsigned int alm_en;
  182. clk_enable(rtc_clk);
  183. alm_tm->tm_sec = readb(base + S3C2410_ALMSEC);
  184. alm_tm->tm_min = readb(base + S3C2410_ALMMIN);
  185. alm_tm->tm_hour = readb(base + S3C2410_ALMHOUR);
  186. alm_tm->tm_mon = readb(base + S3C2410_ALMMON);
  187. alm_tm->tm_mday = readb(base + S3C2410_ALMDATE);
  188. alm_tm->tm_year = readb(base + S3C2410_ALMYEAR);
  189. alm_en = readb(base + S3C2410_RTCALM);
  190. alrm->enabled = (alm_en & S3C2410_RTCALM_ALMEN) ? 1 : 0;
  191. pr_debug("read alarm %d, %04d.%02d.%02d %02d:%02d:%02d\n",
  192. alm_en,
  193. 1900 + alm_tm->tm_year, alm_tm->tm_mon, alm_tm->tm_mday,
  194. alm_tm->tm_hour, alm_tm->tm_min, alm_tm->tm_sec);
  195. /* decode the alarm enable field */
  196. if (alm_en & S3C2410_RTCALM_SECEN)
  197. alm_tm->tm_sec = bcd2bin(alm_tm->tm_sec);
  198. else
  199. alm_tm->tm_sec = -1;
  200. if (alm_en & S3C2410_RTCALM_MINEN)
  201. alm_tm->tm_min = bcd2bin(alm_tm->tm_min);
  202. else
  203. alm_tm->tm_min = -1;
  204. if (alm_en & S3C2410_RTCALM_HOUREN)
  205. alm_tm->tm_hour = bcd2bin(alm_tm->tm_hour);
  206. else
  207. alm_tm->tm_hour = -1;
  208. if (alm_en & S3C2410_RTCALM_DAYEN)
  209. alm_tm->tm_mday = bcd2bin(alm_tm->tm_mday);
  210. else
  211. alm_tm->tm_mday = -1;
  212. if (alm_en & S3C2410_RTCALM_MONEN) {
  213. alm_tm->tm_mon = bcd2bin(alm_tm->tm_mon);
  214. alm_tm->tm_mon -= 1;
  215. } else {
  216. alm_tm->tm_mon = -1;
  217. }
  218. if (alm_en & S3C2410_RTCALM_YEAREN)
  219. alm_tm->tm_year = bcd2bin(alm_tm->tm_year);
  220. else
  221. alm_tm->tm_year = -1;
  222. clk_disable(rtc_clk);
  223. return 0;
  224. }
  225. static int s3c_rtc_setalarm(struct device *dev, struct rtc_wkalrm *alrm)
  226. {
  227. struct rtc_time *tm = &alrm->time;
  228. void __iomem *base = s3c_rtc_base;
  229. unsigned int alrm_en;
  230. clk_enable(rtc_clk);
  231. pr_debug("s3c_rtc_setalarm: %d, %04d.%02d.%02d %02d:%02d:%02d\n",
  232. alrm->enabled,
  233. 1900 + tm->tm_year, tm->tm_mon + 1, tm->tm_mday,
  234. tm->tm_hour, tm->tm_min, tm->tm_sec);
  235. alrm_en = readb(base + S3C2410_RTCALM) & S3C2410_RTCALM_ALMEN;
  236. writeb(0x00, base + S3C2410_RTCALM);
  237. if (tm->tm_sec < 60 && tm->tm_sec >= 0) {
  238. alrm_en |= S3C2410_RTCALM_SECEN;
  239. writeb(bin2bcd(tm->tm_sec), base + S3C2410_ALMSEC);
  240. }
  241. if (tm->tm_min < 60 && tm->tm_min >= 0) {
  242. alrm_en |= S3C2410_RTCALM_MINEN;
  243. writeb(bin2bcd(tm->tm_min), base + S3C2410_ALMMIN);
  244. }
  245. if (tm->tm_hour < 24 && tm->tm_hour >= 0) {
  246. alrm_en |= S3C2410_RTCALM_HOUREN;
  247. writeb(bin2bcd(tm->tm_hour), base + S3C2410_ALMHOUR);
  248. }
  249. pr_debug("setting S3C2410_RTCALM to %08x\n", alrm_en);
  250. writeb(alrm_en, base + S3C2410_RTCALM);
  251. s3c_rtc_setaie(dev, alrm->enabled);
  252. clk_disable(rtc_clk);
  253. return 0;
  254. }
  255. static int s3c_rtc_proc(struct device *dev, struct seq_file *seq)
  256. {
  257. unsigned int ticnt;
  258. clk_enable(rtc_clk);
  259. if (s3c_rtc_cpu_type == TYPE_S3C64XX) {
  260. ticnt = readw(s3c_rtc_base + S3C2410_RTCCON);
  261. ticnt &= S3C64XX_RTCCON_TICEN;
  262. } else {
  263. ticnt = readb(s3c_rtc_base + S3C2410_TICNT);
  264. ticnt &= S3C2410_TICNT_ENABLE;
  265. }
  266. seq_printf(seq, "periodic_IRQ\t: %s\n", ticnt ? "yes" : "no");
  267. clk_disable(rtc_clk);
  268. return 0;
  269. }
  270. static const struct rtc_class_ops s3c_rtcops = {
  271. .read_time = s3c_rtc_gettime,
  272. .set_time = s3c_rtc_settime,
  273. .read_alarm = s3c_rtc_getalarm,
  274. .set_alarm = s3c_rtc_setalarm,
  275. .proc = s3c_rtc_proc,
  276. .alarm_irq_enable = s3c_rtc_setaie,
  277. };
  278. static void s3c_rtc_enable(struct platform_device *pdev, int en)
  279. {
  280. void __iomem *base = s3c_rtc_base;
  281. unsigned int tmp;
  282. if (s3c_rtc_base == NULL)
  283. return;
  284. clk_enable(rtc_clk);
  285. if (!en) {
  286. tmp = readw(base + S3C2410_RTCCON);
  287. if (s3c_rtc_cpu_type == TYPE_S3C64XX)
  288. tmp &= ~S3C64XX_RTCCON_TICEN;
  289. tmp &= ~S3C2410_RTCCON_RTCEN;
  290. writew(tmp, base + S3C2410_RTCCON);
  291. if (s3c_rtc_cpu_type == TYPE_S3C2410) {
  292. tmp = readb(base + S3C2410_TICNT);
  293. tmp &= ~S3C2410_TICNT_ENABLE;
  294. writeb(tmp, base + S3C2410_TICNT);
  295. }
  296. } else {
  297. /* re-enable the device, and check it is ok */
  298. if ((readw(base+S3C2410_RTCCON) & S3C2410_RTCCON_RTCEN) == 0) {
  299. dev_info(&pdev->dev, "rtc disabled, re-enabling\n");
  300. tmp = readw(base + S3C2410_RTCCON);
  301. writew(tmp | S3C2410_RTCCON_RTCEN,
  302. base + S3C2410_RTCCON);
  303. }
  304. if ((readw(base + S3C2410_RTCCON) & S3C2410_RTCCON_CNTSEL)) {
  305. dev_info(&pdev->dev, "removing RTCCON_CNTSEL\n");
  306. tmp = readw(base + S3C2410_RTCCON);
  307. writew(tmp & ~S3C2410_RTCCON_CNTSEL,
  308. base + S3C2410_RTCCON);
  309. }
  310. if ((readw(base + S3C2410_RTCCON) & S3C2410_RTCCON_CLKRST)) {
  311. dev_info(&pdev->dev, "removing RTCCON_CLKRST\n");
  312. tmp = readw(base + S3C2410_RTCCON);
  313. writew(tmp & ~S3C2410_RTCCON_CLKRST,
  314. base + S3C2410_RTCCON);
  315. }
  316. }
  317. clk_disable(rtc_clk);
  318. }
  319. static int __devexit s3c_rtc_remove(struct platform_device *dev)
  320. {
  321. struct rtc_device *rtc = platform_get_drvdata(dev);
  322. free_irq(s3c_rtc_alarmno, rtc);
  323. free_irq(s3c_rtc_tickno, rtc);
  324. platform_set_drvdata(dev, NULL);
  325. rtc_device_unregister(rtc);
  326. s3c_rtc_setaie(&dev->dev, 0);
  327. clk_put(rtc_clk);
  328. rtc_clk = NULL;
  329. iounmap(s3c_rtc_base);
  330. release_resource(s3c_rtc_mem);
  331. kfree(s3c_rtc_mem);
  332. return 0;
  333. }
  334. static int __devinit s3c_rtc_probe(struct platform_device *pdev)
  335. {
  336. struct rtc_device *rtc;
  337. struct rtc_time rtc_tm;
  338. struct resource *res;
  339. int ret;
  340. pr_debug("%s: probe=%p\n", __func__, pdev);
  341. /* find the IRQs */
  342. s3c_rtc_tickno = platform_get_irq(pdev, 1);
  343. if (s3c_rtc_tickno < 0) {
  344. dev_err(&pdev->dev, "no irq for rtc tick\n");
  345. return -ENOENT;
  346. }
  347. s3c_rtc_alarmno = platform_get_irq(pdev, 0);
  348. if (s3c_rtc_alarmno < 0) {
  349. dev_err(&pdev->dev, "no irq for alarm\n");
  350. return -ENOENT;
  351. }
  352. pr_debug("s3c2410_rtc: tick irq %d, alarm irq %d\n",
  353. s3c_rtc_tickno, s3c_rtc_alarmno);
  354. /* get the memory region */
  355. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  356. if (res == NULL) {
  357. dev_err(&pdev->dev, "failed to get memory region resource\n");
  358. return -ENOENT;
  359. }
  360. s3c_rtc_mem = request_mem_region(res->start, resource_size(res),
  361. pdev->name);
  362. if (s3c_rtc_mem == NULL) {
  363. dev_err(&pdev->dev, "failed to reserve memory region\n");
  364. ret = -ENOENT;
  365. goto err_nores;
  366. }
  367. s3c_rtc_base = ioremap(res->start, resource_size(res));
  368. if (s3c_rtc_base == NULL) {
  369. dev_err(&pdev->dev, "failed ioremap()\n");
  370. ret = -EINVAL;
  371. goto err_nomap;
  372. }
  373. rtc_clk = clk_get(&pdev->dev, "rtc");
  374. if (IS_ERR(rtc_clk)) {
  375. dev_err(&pdev->dev, "failed to find rtc clock source\n");
  376. ret = PTR_ERR(rtc_clk);
  377. rtc_clk = NULL;
  378. goto err_clk;
  379. }
  380. clk_enable(rtc_clk);
  381. /* check to see if everything is setup correctly */
  382. s3c_rtc_enable(pdev, 1);
  383. pr_debug("s3c2410_rtc: RTCCON=%02x\n",
  384. readw(s3c_rtc_base + S3C2410_RTCCON));
  385. device_init_wakeup(&pdev->dev, 1);
  386. /* register RTC and exit */
  387. rtc = rtc_device_register("s3c", &pdev->dev, &s3c_rtcops,
  388. THIS_MODULE);
  389. if (IS_ERR(rtc)) {
  390. dev_err(&pdev->dev, "cannot attach rtc\n");
  391. ret = PTR_ERR(rtc);
  392. goto err_nortc;
  393. }
  394. s3c_rtc_cpu_type = platform_get_device_id(pdev)->driver_data;
  395. /* Check RTC Time */
  396. s3c_rtc_gettime(NULL, &rtc_tm);
  397. if (rtc_valid_tm(&rtc_tm)) {
  398. rtc_tm.tm_year = 100;
  399. rtc_tm.tm_mon = 0;
  400. rtc_tm.tm_mday = 1;
  401. rtc_tm.tm_hour = 0;
  402. rtc_tm.tm_min = 0;
  403. rtc_tm.tm_sec = 0;
  404. s3c_rtc_settime(NULL, &rtc_tm);
  405. dev_warn(&pdev->dev, "warning: invalid RTC value so initializing it\n");
  406. }
  407. if (s3c_rtc_cpu_type == TYPE_S3C64XX)
  408. rtc->max_user_freq = 32768;
  409. else
  410. rtc->max_user_freq = 128;
  411. platform_set_drvdata(pdev, rtc);
  412. s3c_rtc_setfreq(&pdev->dev, 1);
  413. ret = request_irq(s3c_rtc_alarmno, s3c_rtc_alarmirq,
  414. IRQF_DISABLED, "s3c2410-rtc alarm", rtc);
  415. if (ret) {
  416. dev_err(&pdev->dev, "IRQ%d error %d\n", s3c_rtc_alarmno, ret);
  417. goto err_alarm_irq;
  418. }
  419. ret = request_irq(s3c_rtc_tickno, s3c_rtc_tickirq,
  420. IRQF_DISABLED, "s3c2410-rtc tick", rtc);
  421. if (ret) {
  422. dev_err(&pdev->dev, "IRQ%d error %d\n", s3c_rtc_tickno, ret);
  423. free_irq(s3c_rtc_alarmno, rtc);
  424. goto err_tick_irq;
  425. }
  426. clk_disable(rtc_clk);
  427. return 0;
  428. err_tick_irq:
  429. free_irq(s3c_rtc_alarmno, rtc);
  430. err_alarm_irq:
  431. platform_set_drvdata(pdev, NULL);
  432. rtc_device_unregister(rtc);
  433. err_nortc:
  434. s3c_rtc_enable(pdev, 0);
  435. clk_disable(rtc_clk);
  436. clk_put(rtc_clk);
  437. err_clk:
  438. iounmap(s3c_rtc_base);
  439. err_nomap:
  440. release_resource(s3c_rtc_mem);
  441. err_nores:
  442. return ret;
  443. }
  444. #ifdef CONFIG_PM
  445. /* RTC Power management control */
  446. static int ticnt_save, ticnt_en_save;
  447. static int s3c_rtc_suspend(struct platform_device *pdev, pm_message_t state)
  448. {
  449. clk_enable(rtc_clk);
  450. /* save TICNT for anyone using periodic interrupts */
  451. ticnt_save = readb(s3c_rtc_base + S3C2410_TICNT);
  452. if (s3c_rtc_cpu_type == TYPE_S3C64XX) {
  453. ticnt_en_save = readw(s3c_rtc_base + S3C2410_RTCCON);
  454. ticnt_en_save &= S3C64XX_RTCCON_TICEN;
  455. }
  456. s3c_rtc_enable(pdev, 0);
  457. if (device_may_wakeup(&pdev->dev) && !wake_en) {
  458. if (enable_irq_wake(s3c_rtc_alarmno) == 0)
  459. wake_en = true;
  460. else
  461. dev_err(&pdev->dev, "enable_irq_wake failed\n");
  462. }
  463. clk_disable(rtc_clk);
  464. return 0;
  465. }
  466. static int s3c_rtc_resume(struct platform_device *pdev)
  467. {
  468. unsigned int tmp;
  469. clk_enable(rtc_clk);
  470. s3c_rtc_enable(pdev, 1);
  471. writeb(ticnt_save, s3c_rtc_base + S3C2410_TICNT);
  472. if (s3c_rtc_cpu_type == TYPE_S3C64XX && ticnt_en_save) {
  473. tmp = readw(s3c_rtc_base + S3C2410_RTCCON);
  474. writew(tmp | ticnt_en_save, s3c_rtc_base + S3C2410_RTCCON);
  475. }
  476. if (device_may_wakeup(&pdev->dev) && wake_en) {
  477. disable_irq_wake(s3c_rtc_alarmno);
  478. wake_en = false;
  479. }
  480. clk_disable(rtc_clk);
  481. return 0;
  482. }
  483. #else
  484. #define s3c_rtc_suspend NULL
  485. #define s3c_rtc_resume NULL
  486. #endif
  487. static struct platform_device_id s3c_rtc_driver_ids[] = {
  488. {
  489. .name = "s3c2410-rtc",
  490. .driver_data = TYPE_S3C2410,
  491. }, {
  492. .name = "s3c64xx-rtc",
  493. .driver_data = TYPE_S3C64XX,
  494. },
  495. { }
  496. };
  497. MODULE_DEVICE_TABLE(platform, s3c_rtc_driver_ids);
  498. static struct platform_driver s3c_rtc_driver = {
  499. .probe = s3c_rtc_probe,
  500. .remove = __devexit_p(s3c_rtc_remove),
  501. .suspend = s3c_rtc_suspend,
  502. .resume = s3c_rtc_resume,
  503. .id_table = s3c_rtc_driver_ids,
  504. .driver = {
  505. .name = "s3c-rtc",
  506. .owner = THIS_MODULE,
  507. },
  508. };
  509. static char __initdata banner[] = "S3C24XX RTC, (c) 2004,2006 Simtec Electronics\n";
  510. static int __init s3c_rtc_init(void)
  511. {
  512. printk(banner);
  513. return platform_driver_register(&s3c_rtc_driver);
  514. }
  515. static void __exit s3c_rtc_exit(void)
  516. {
  517. platform_driver_unregister(&s3c_rtc_driver);
  518. }
  519. module_init(s3c_rtc_init);
  520. module_exit(s3c_rtc_exit);
  521. MODULE_DESCRIPTION("Samsung S3C RTC Driver");
  522. MODULE_AUTHOR("Ben Dooks <ben@simtec.co.uk>");
  523. MODULE_LICENSE("GPL");
  524. MODULE_ALIAS("platform:s3c2410-rtc");