e1000_main.c 132 KB

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  1. /*******************************************************************************
  2. Copyright(c) 1999 - 2006 Intel Corporation. All rights reserved.
  3. This program is free software; you can redistribute it and/or modify it
  4. under the terms of the GNU General Public License as published by the Free
  5. Software Foundation; either version 2 of the License, or (at your option)
  6. any later version.
  7. This program is distributed in the hope that it will be useful, but WITHOUT
  8. ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  9. FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  10. more details.
  11. You should have received a copy of the GNU General Public License along with
  12. this program; if not, write to the Free Software Foundation, Inc., 59
  13. Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  14. The full GNU General Public License is included in this distribution in the
  15. file called LICENSE.
  16. Contact Information:
  17. Linux NICS <linux.nics@intel.com>
  18. e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
  19. Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  20. *******************************************************************************/
  21. #include "e1000.h"
  22. char e1000_driver_name[] = "e1000";
  23. static char e1000_driver_string[] = "Intel(R) PRO/1000 Network Driver";
  24. #ifndef CONFIG_E1000_NAPI
  25. #define DRIVERNAPI
  26. #else
  27. #define DRIVERNAPI "-NAPI"
  28. #endif
  29. #define DRV_VERSION "7.0.38-k4"DRIVERNAPI
  30. char e1000_driver_version[] = DRV_VERSION;
  31. static char e1000_copyright[] = "Copyright (c) 1999-2006 Intel Corporation.";
  32. /* e1000_pci_tbl - PCI Device ID Table
  33. *
  34. * Last entry must be all 0s
  35. *
  36. * Macro expands to...
  37. * {PCI_DEVICE(PCI_VENDOR_ID_INTEL, device_id)}
  38. */
  39. static struct pci_device_id e1000_pci_tbl[] = {
  40. INTEL_E1000_ETHERNET_DEVICE(0x1000),
  41. INTEL_E1000_ETHERNET_DEVICE(0x1001),
  42. INTEL_E1000_ETHERNET_DEVICE(0x1004),
  43. INTEL_E1000_ETHERNET_DEVICE(0x1008),
  44. INTEL_E1000_ETHERNET_DEVICE(0x1009),
  45. INTEL_E1000_ETHERNET_DEVICE(0x100C),
  46. INTEL_E1000_ETHERNET_DEVICE(0x100D),
  47. INTEL_E1000_ETHERNET_DEVICE(0x100E),
  48. INTEL_E1000_ETHERNET_DEVICE(0x100F),
  49. INTEL_E1000_ETHERNET_DEVICE(0x1010),
  50. INTEL_E1000_ETHERNET_DEVICE(0x1011),
  51. INTEL_E1000_ETHERNET_DEVICE(0x1012),
  52. INTEL_E1000_ETHERNET_DEVICE(0x1013),
  53. INTEL_E1000_ETHERNET_DEVICE(0x1014),
  54. INTEL_E1000_ETHERNET_DEVICE(0x1015),
  55. INTEL_E1000_ETHERNET_DEVICE(0x1016),
  56. INTEL_E1000_ETHERNET_DEVICE(0x1017),
  57. INTEL_E1000_ETHERNET_DEVICE(0x1018),
  58. INTEL_E1000_ETHERNET_DEVICE(0x1019),
  59. INTEL_E1000_ETHERNET_DEVICE(0x101A),
  60. INTEL_E1000_ETHERNET_DEVICE(0x101D),
  61. INTEL_E1000_ETHERNET_DEVICE(0x101E),
  62. INTEL_E1000_ETHERNET_DEVICE(0x1026),
  63. INTEL_E1000_ETHERNET_DEVICE(0x1027),
  64. INTEL_E1000_ETHERNET_DEVICE(0x1028),
  65. INTEL_E1000_ETHERNET_DEVICE(0x105E),
  66. INTEL_E1000_ETHERNET_DEVICE(0x105F),
  67. INTEL_E1000_ETHERNET_DEVICE(0x1060),
  68. INTEL_E1000_ETHERNET_DEVICE(0x1075),
  69. INTEL_E1000_ETHERNET_DEVICE(0x1076),
  70. INTEL_E1000_ETHERNET_DEVICE(0x1077),
  71. INTEL_E1000_ETHERNET_DEVICE(0x1078),
  72. INTEL_E1000_ETHERNET_DEVICE(0x1079),
  73. INTEL_E1000_ETHERNET_DEVICE(0x107A),
  74. INTEL_E1000_ETHERNET_DEVICE(0x107B),
  75. INTEL_E1000_ETHERNET_DEVICE(0x107C),
  76. INTEL_E1000_ETHERNET_DEVICE(0x107D),
  77. INTEL_E1000_ETHERNET_DEVICE(0x107E),
  78. INTEL_E1000_ETHERNET_DEVICE(0x107F),
  79. INTEL_E1000_ETHERNET_DEVICE(0x108A),
  80. INTEL_E1000_ETHERNET_DEVICE(0x108B),
  81. INTEL_E1000_ETHERNET_DEVICE(0x108C),
  82. INTEL_E1000_ETHERNET_DEVICE(0x1096),
  83. INTEL_E1000_ETHERNET_DEVICE(0x1098),
  84. INTEL_E1000_ETHERNET_DEVICE(0x1099),
  85. INTEL_E1000_ETHERNET_DEVICE(0x109A),
  86. INTEL_E1000_ETHERNET_DEVICE(0x10B5),
  87. INTEL_E1000_ETHERNET_DEVICE(0x10B9),
  88. /* required last entry */
  89. {0,}
  90. };
  91. MODULE_DEVICE_TABLE(pci, e1000_pci_tbl);
  92. static int e1000_setup_tx_resources(struct e1000_adapter *adapter,
  93. struct e1000_tx_ring *txdr);
  94. static int e1000_setup_rx_resources(struct e1000_adapter *adapter,
  95. struct e1000_rx_ring *rxdr);
  96. static void e1000_free_tx_resources(struct e1000_adapter *adapter,
  97. struct e1000_tx_ring *tx_ring);
  98. static void e1000_free_rx_resources(struct e1000_adapter *adapter,
  99. struct e1000_rx_ring *rx_ring);
  100. /* Local Function Prototypes */
  101. static int e1000_init_module(void);
  102. static void e1000_exit_module(void);
  103. static int e1000_probe(struct pci_dev *pdev, const struct pci_device_id *ent);
  104. static void __devexit e1000_remove(struct pci_dev *pdev);
  105. static int e1000_alloc_queues(struct e1000_adapter *adapter);
  106. static int e1000_sw_init(struct e1000_adapter *adapter);
  107. static int e1000_open(struct net_device *netdev);
  108. static int e1000_close(struct net_device *netdev);
  109. static void e1000_configure_tx(struct e1000_adapter *adapter);
  110. static void e1000_configure_rx(struct e1000_adapter *adapter);
  111. static void e1000_setup_rctl(struct e1000_adapter *adapter);
  112. static void e1000_clean_all_tx_rings(struct e1000_adapter *adapter);
  113. static void e1000_clean_all_rx_rings(struct e1000_adapter *adapter);
  114. static void e1000_clean_tx_ring(struct e1000_adapter *adapter,
  115. struct e1000_tx_ring *tx_ring);
  116. static void e1000_clean_rx_ring(struct e1000_adapter *adapter,
  117. struct e1000_rx_ring *rx_ring);
  118. static void e1000_set_multi(struct net_device *netdev);
  119. static void e1000_update_phy_info(unsigned long data);
  120. static void e1000_watchdog(unsigned long data);
  121. static void e1000_82547_tx_fifo_stall(unsigned long data);
  122. static int e1000_xmit_frame(struct sk_buff *skb, struct net_device *netdev);
  123. static struct net_device_stats * e1000_get_stats(struct net_device *netdev);
  124. static int e1000_change_mtu(struct net_device *netdev, int new_mtu);
  125. static int e1000_set_mac(struct net_device *netdev, void *p);
  126. static irqreturn_t e1000_intr(int irq, void *data, struct pt_regs *regs);
  127. static boolean_t e1000_clean_tx_irq(struct e1000_adapter *adapter,
  128. struct e1000_tx_ring *tx_ring);
  129. #ifdef CONFIG_E1000_NAPI
  130. static int e1000_clean(struct net_device *poll_dev, int *budget);
  131. static boolean_t e1000_clean_rx_irq(struct e1000_adapter *adapter,
  132. struct e1000_rx_ring *rx_ring,
  133. int *work_done, int work_to_do);
  134. static boolean_t e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
  135. struct e1000_rx_ring *rx_ring,
  136. int *work_done, int work_to_do);
  137. #else
  138. static boolean_t e1000_clean_rx_irq(struct e1000_adapter *adapter,
  139. struct e1000_rx_ring *rx_ring);
  140. static boolean_t e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
  141. struct e1000_rx_ring *rx_ring);
  142. #endif
  143. static void e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
  144. struct e1000_rx_ring *rx_ring,
  145. int cleaned_count);
  146. static void e1000_alloc_rx_buffers_ps(struct e1000_adapter *adapter,
  147. struct e1000_rx_ring *rx_ring,
  148. int cleaned_count);
  149. static int e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd);
  150. static int e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr,
  151. int cmd);
  152. static void e1000_enter_82542_rst(struct e1000_adapter *adapter);
  153. static void e1000_leave_82542_rst(struct e1000_adapter *adapter);
  154. static void e1000_tx_timeout(struct net_device *dev);
  155. static void e1000_reset_task(struct net_device *dev);
  156. static void e1000_smartspeed(struct e1000_adapter *adapter);
  157. static int e1000_82547_fifo_workaround(struct e1000_adapter *adapter,
  158. struct sk_buff *skb);
  159. static void e1000_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp);
  160. static void e1000_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid);
  161. static void e1000_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid);
  162. static void e1000_restore_vlan(struct e1000_adapter *adapter);
  163. #ifdef CONFIG_PM
  164. static int e1000_suspend(struct pci_dev *pdev, pm_message_t state);
  165. static int e1000_resume(struct pci_dev *pdev);
  166. #endif
  167. static void e1000_shutdown(struct pci_dev *pdev);
  168. #ifdef CONFIG_NET_POLL_CONTROLLER
  169. /* for netdump / net console */
  170. static void e1000_netpoll (struct net_device *netdev);
  171. #endif
  172. static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev,
  173. pci_channel_state_t state);
  174. static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev);
  175. static void e1000_io_resume(struct pci_dev *pdev);
  176. static struct pci_error_handlers e1000_err_handler = {
  177. .error_detected = e1000_io_error_detected,
  178. .slot_reset = e1000_io_slot_reset,
  179. .resume = e1000_io_resume,
  180. };
  181. static struct pci_driver e1000_driver = {
  182. .name = e1000_driver_name,
  183. .id_table = e1000_pci_tbl,
  184. .probe = e1000_probe,
  185. .remove = __devexit_p(e1000_remove),
  186. /* Power Managment Hooks */
  187. #ifdef CONFIG_PM
  188. .suspend = e1000_suspend,
  189. .resume = e1000_resume,
  190. #endif
  191. .shutdown = e1000_shutdown,
  192. .err_handler = &e1000_err_handler
  193. };
  194. MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
  195. MODULE_DESCRIPTION("Intel(R) PRO/1000 Network Driver");
  196. MODULE_LICENSE("GPL");
  197. MODULE_VERSION(DRV_VERSION);
  198. static int debug = NETIF_MSG_DRV | NETIF_MSG_PROBE;
  199. module_param(debug, int, 0);
  200. MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
  201. /**
  202. * e1000_init_module - Driver Registration Routine
  203. *
  204. * e1000_init_module is the first routine called when the driver is
  205. * loaded. All it does is register with the PCI subsystem.
  206. **/
  207. static int __init
  208. e1000_init_module(void)
  209. {
  210. int ret;
  211. printk(KERN_INFO "%s - version %s\n",
  212. e1000_driver_string, e1000_driver_version);
  213. printk(KERN_INFO "%s\n", e1000_copyright);
  214. ret = pci_module_init(&e1000_driver);
  215. return ret;
  216. }
  217. module_init(e1000_init_module);
  218. /**
  219. * e1000_exit_module - Driver Exit Cleanup Routine
  220. *
  221. * e1000_exit_module is called just before the driver is removed
  222. * from memory.
  223. **/
  224. static void __exit
  225. e1000_exit_module(void)
  226. {
  227. pci_unregister_driver(&e1000_driver);
  228. }
  229. module_exit(e1000_exit_module);
  230. static int e1000_request_irq(struct e1000_adapter *adapter)
  231. {
  232. struct net_device *netdev = adapter->netdev;
  233. int flags, err = 0;
  234. flags = SA_SHIRQ | SA_SAMPLE_RANDOM;
  235. #ifdef CONFIG_PCI_MSI
  236. if (adapter->hw.mac_type > e1000_82547_rev_2) {
  237. adapter->have_msi = TRUE;
  238. if ((err = pci_enable_msi(adapter->pdev))) {
  239. DPRINTK(PROBE, ERR,
  240. "Unable to allocate MSI interrupt Error: %d\n", err);
  241. adapter->have_msi = FALSE;
  242. }
  243. }
  244. if (adapter->have_msi)
  245. flags &= ~SA_SHIRQ;
  246. #endif
  247. if ((err = request_irq(adapter->pdev->irq, &e1000_intr, flags,
  248. netdev->name, netdev)))
  249. DPRINTK(PROBE, ERR,
  250. "Unable to allocate interrupt Error: %d\n", err);
  251. return err;
  252. }
  253. static void e1000_free_irq(struct e1000_adapter *adapter)
  254. {
  255. struct net_device *netdev = adapter->netdev;
  256. free_irq(adapter->pdev->irq, netdev);
  257. #ifdef CONFIG_PCI_MSI
  258. if (adapter->have_msi)
  259. pci_disable_msi(adapter->pdev);
  260. #endif
  261. }
  262. /**
  263. * e1000_irq_disable - Mask off interrupt generation on the NIC
  264. * @adapter: board private structure
  265. **/
  266. static void
  267. e1000_irq_disable(struct e1000_adapter *adapter)
  268. {
  269. atomic_inc(&adapter->irq_sem);
  270. E1000_WRITE_REG(&adapter->hw, IMC, ~0);
  271. E1000_WRITE_FLUSH(&adapter->hw);
  272. synchronize_irq(adapter->pdev->irq);
  273. }
  274. /**
  275. * e1000_irq_enable - Enable default interrupt generation settings
  276. * @adapter: board private structure
  277. **/
  278. static void
  279. e1000_irq_enable(struct e1000_adapter *adapter)
  280. {
  281. if (likely(atomic_dec_and_test(&adapter->irq_sem))) {
  282. E1000_WRITE_REG(&adapter->hw, IMS, IMS_ENABLE_MASK);
  283. E1000_WRITE_FLUSH(&adapter->hw);
  284. }
  285. }
  286. static void
  287. e1000_update_mng_vlan(struct e1000_adapter *adapter)
  288. {
  289. struct net_device *netdev = adapter->netdev;
  290. uint16_t vid = adapter->hw.mng_cookie.vlan_id;
  291. uint16_t old_vid = adapter->mng_vlan_id;
  292. if (adapter->vlgrp) {
  293. if (!adapter->vlgrp->vlan_devices[vid]) {
  294. if (adapter->hw.mng_cookie.status &
  295. E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) {
  296. e1000_vlan_rx_add_vid(netdev, vid);
  297. adapter->mng_vlan_id = vid;
  298. } else
  299. adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
  300. if ((old_vid != (uint16_t)E1000_MNG_VLAN_NONE) &&
  301. (vid != old_vid) &&
  302. !adapter->vlgrp->vlan_devices[old_vid])
  303. e1000_vlan_rx_kill_vid(netdev, old_vid);
  304. } else
  305. adapter->mng_vlan_id = vid;
  306. }
  307. }
  308. /**
  309. * e1000_release_hw_control - release control of the h/w to f/w
  310. * @adapter: address of board private structure
  311. *
  312. * e1000_release_hw_control resets {CTRL_EXT|FWSM}:DRV_LOAD bit.
  313. * For ASF and Pass Through versions of f/w this means that the
  314. * driver is no longer loaded. For AMT version (only with 82573) i
  315. * of the f/w this means that the netowrk i/f is closed.
  316. *
  317. **/
  318. static void
  319. e1000_release_hw_control(struct e1000_adapter *adapter)
  320. {
  321. uint32_t ctrl_ext;
  322. uint32_t swsm;
  323. /* Let firmware taken over control of h/w */
  324. switch (adapter->hw.mac_type) {
  325. case e1000_82571:
  326. case e1000_82572:
  327. case e1000_80003es2lan:
  328. ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
  329. E1000_WRITE_REG(&adapter->hw, CTRL_EXT,
  330. ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
  331. break;
  332. case e1000_82573:
  333. swsm = E1000_READ_REG(&adapter->hw, SWSM);
  334. E1000_WRITE_REG(&adapter->hw, SWSM,
  335. swsm & ~E1000_SWSM_DRV_LOAD);
  336. default:
  337. break;
  338. }
  339. }
  340. /**
  341. * e1000_get_hw_control - get control of the h/w from f/w
  342. * @adapter: address of board private structure
  343. *
  344. * e1000_get_hw_control sets {CTRL_EXT|FWSM}:DRV_LOAD bit.
  345. * For ASF and Pass Through versions of f/w this means that
  346. * the driver is loaded. For AMT version (only with 82573)
  347. * of the f/w this means that the netowrk i/f is open.
  348. *
  349. **/
  350. static void
  351. e1000_get_hw_control(struct e1000_adapter *adapter)
  352. {
  353. uint32_t ctrl_ext;
  354. uint32_t swsm;
  355. /* Let firmware know the driver has taken over */
  356. switch (adapter->hw.mac_type) {
  357. case e1000_82571:
  358. case e1000_82572:
  359. case e1000_80003es2lan:
  360. ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
  361. E1000_WRITE_REG(&adapter->hw, CTRL_EXT,
  362. ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
  363. break;
  364. case e1000_82573:
  365. swsm = E1000_READ_REG(&adapter->hw, SWSM);
  366. E1000_WRITE_REG(&adapter->hw, SWSM,
  367. swsm | E1000_SWSM_DRV_LOAD);
  368. break;
  369. default:
  370. break;
  371. }
  372. }
  373. int
  374. e1000_up(struct e1000_adapter *adapter)
  375. {
  376. struct net_device *netdev = adapter->netdev;
  377. int i;
  378. /* hardware has been reset, we need to reload some things */
  379. /* Reset the PHY if it was previously powered down */
  380. if (adapter->hw.media_type == e1000_media_type_copper) {
  381. uint16_t mii_reg;
  382. e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &mii_reg);
  383. if (mii_reg & MII_CR_POWER_DOWN)
  384. e1000_phy_hw_reset(&adapter->hw);
  385. }
  386. e1000_set_multi(netdev);
  387. e1000_restore_vlan(adapter);
  388. e1000_configure_tx(adapter);
  389. e1000_setup_rctl(adapter);
  390. e1000_configure_rx(adapter);
  391. /* call E1000_DESC_UNUSED which always leaves
  392. * at least 1 descriptor unused to make sure
  393. * next_to_use != next_to_clean */
  394. for (i = 0; i < adapter->num_rx_queues; i++) {
  395. struct e1000_rx_ring *ring = &adapter->rx_ring[i];
  396. adapter->alloc_rx_buf(adapter, ring,
  397. E1000_DESC_UNUSED(ring));
  398. }
  399. adapter->tx_queue_len = netdev->tx_queue_len;
  400. mod_timer(&adapter->watchdog_timer, jiffies);
  401. #ifdef CONFIG_E1000_NAPI
  402. netif_poll_enable(netdev);
  403. #endif
  404. e1000_irq_enable(adapter);
  405. return 0;
  406. }
  407. void
  408. e1000_down(struct e1000_adapter *adapter)
  409. {
  410. struct net_device *netdev = adapter->netdev;
  411. boolean_t mng_mode_enabled = (adapter->hw.mac_type >= e1000_82571) &&
  412. e1000_check_mng_mode(&adapter->hw);
  413. e1000_irq_disable(adapter);
  414. del_timer_sync(&adapter->tx_fifo_stall_timer);
  415. del_timer_sync(&adapter->watchdog_timer);
  416. del_timer_sync(&adapter->phy_info_timer);
  417. #ifdef CONFIG_E1000_NAPI
  418. netif_poll_disable(netdev);
  419. #endif
  420. netdev->tx_queue_len = adapter->tx_queue_len;
  421. adapter->link_speed = 0;
  422. adapter->link_duplex = 0;
  423. netif_carrier_off(netdev);
  424. netif_stop_queue(netdev);
  425. e1000_reset(adapter);
  426. e1000_clean_all_tx_rings(adapter);
  427. e1000_clean_all_rx_rings(adapter);
  428. /* Power down the PHY so no link is implied when interface is down *
  429. * The PHY cannot be powered down if any of the following is TRUE *
  430. * (a) WoL is enabled
  431. * (b) AMT is active
  432. * (c) SoL/IDER session is active */
  433. if (!adapter->wol && adapter->hw.mac_type >= e1000_82540 &&
  434. adapter->hw.media_type == e1000_media_type_copper &&
  435. !(E1000_READ_REG(&adapter->hw, MANC) & E1000_MANC_SMBUS_EN) &&
  436. !mng_mode_enabled &&
  437. !e1000_check_phy_reset_block(&adapter->hw)) {
  438. uint16_t mii_reg;
  439. e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &mii_reg);
  440. mii_reg |= MII_CR_POWER_DOWN;
  441. e1000_write_phy_reg(&adapter->hw, PHY_CTRL, mii_reg);
  442. mdelay(1);
  443. }
  444. }
  445. void
  446. e1000_reinit_locked(struct e1000_adapter *adapter)
  447. {
  448. WARN_ON(in_interrupt());
  449. while (test_and_set_bit(__E1000_RESETTING, &adapter->flags))
  450. msleep(1);
  451. e1000_down(adapter);
  452. e1000_up(adapter);
  453. clear_bit(__E1000_RESETTING, &adapter->flags);
  454. }
  455. void
  456. e1000_reset(struct e1000_adapter *adapter)
  457. {
  458. uint32_t pba, manc;
  459. uint16_t fc_high_water_mark = E1000_FC_HIGH_DIFF;
  460. /* Repartition Pba for greater than 9k mtu
  461. * To take effect CTRL.RST is required.
  462. */
  463. switch (adapter->hw.mac_type) {
  464. case e1000_82547:
  465. case e1000_82547_rev_2:
  466. pba = E1000_PBA_30K;
  467. break;
  468. case e1000_82571:
  469. case e1000_82572:
  470. case e1000_80003es2lan:
  471. pba = E1000_PBA_38K;
  472. break;
  473. case e1000_82573:
  474. pba = E1000_PBA_12K;
  475. break;
  476. default:
  477. pba = E1000_PBA_48K;
  478. break;
  479. }
  480. if ((adapter->hw.mac_type != e1000_82573) &&
  481. (adapter->netdev->mtu > E1000_RXBUFFER_8192))
  482. pba -= 8; /* allocate more FIFO for Tx */
  483. if (adapter->hw.mac_type == e1000_82547) {
  484. adapter->tx_fifo_head = 0;
  485. adapter->tx_head_addr = pba << E1000_TX_HEAD_ADDR_SHIFT;
  486. adapter->tx_fifo_size =
  487. (E1000_PBA_40K - pba) << E1000_PBA_BYTES_SHIFT;
  488. atomic_set(&adapter->tx_fifo_stall, 0);
  489. }
  490. E1000_WRITE_REG(&adapter->hw, PBA, pba);
  491. /* flow control settings */
  492. /* Set the FC high water mark to 90% of the FIFO size.
  493. * Required to clear last 3 LSB */
  494. fc_high_water_mark = ((pba * 9216)/10) & 0xFFF8;
  495. adapter->hw.fc_high_water = fc_high_water_mark;
  496. adapter->hw.fc_low_water = fc_high_water_mark - 8;
  497. if (adapter->hw.mac_type == e1000_80003es2lan)
  498. adapter->hw.fc_pause_time = 0xFFFF;
  499. else
  500. adapter->hw.fc_pause_time = E1000_FC_PAUSE_TIME;
  501. adapter->hw.fc_send_xon = 1;
  502. adapter->hw.fc = adapter->hw.original_fc;
  503. /* Allow time for pending master requests to run */
  504. e1000_reset_hw(&adapter->hw);
  505. if (adapter->hw.mac_type >= e1000_82544)
  506. E1000_WRITE_REG(&adapter->hw, WUC, 0);
  507. if (e1000_init_hw(&adapter->hw))
  508. DPRINTK(PROBE, ERR, "Hardware Error\n");
  509. e1000_update_mng_vlan(adapter);
  510. /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
  511. E1000_WRITE_REG(&adapter->hw, VET, ETHERNET_IEEE_VLAN_TYPE);
  512. e1000_reset_adaptive(&adapter->hw);
  513. e1000_phy_get_info(&adapter->hw, &adapter->phy_info);
  514. if (adapter->en_mng_pt) {
  515. manc = E1000_READ_REG(&adapter->hw, MANC);
  516. manc |= (E1000_MANC_ARP_EN | E1000_MANC_EN_MNG2HOST);
  517. E1000_WRITE_REG(&adapter->hw, MANC, manc);
  518. }
  519. }
  520. /**
  521. * e1000_probe - Device Initialization Routine
  522. * @pdev: PCI device information struct
  523. * @ent: entry in e1000_pci_tbl
  524. *
  525. * Returns 0 on success, negative on failure
  526. *
  527. * e1000_probe initializes an adapter identified by a pci_dev structure.
  528. * The OS initialization, configuring of the adapter private structure,
  529. * and a hardware reset occur.
  530. **/
  531. static int __devinit
  532. e1000_probe(struct pci_dev *pdev,
  533. const struct pci_device_id *ent)
  534. {
  535. struct net_device *netdev;
  536. struct e1000_adapter *adapter;
  537. unsigned long mmio_start, mmio_len;
  538. static int cards_found = 0;
  539. static int e1000_ksp3_port_a = 0; /* global ksp3 port a indication */
  540. int i, err, pci_using_dac;
  541. uint16_t eeprom_data;
  542. uint16_t eeprom_apme_mask = E1000_EEPROM_APME;
  543. if ((err = pci_enable_device(pdev)))
  544. return err;
  545. if (!(err = pci_set_dma_mask(pdev, DMA_64BIT_MASK))) {
  546. pci_using_dac = 1;
  547. } else {
  548. if ((err = pci_set_dma_mask(pdev, DMA_32BIT_MASK))) {
  549. E1000_ERR("No usable DMA configuration, aborting\n");
  550. return err;
  551. }
  552. pci_using_dac = 0;
  553. }
  554. if ((err = pci_request_regions(pdev, e1000_driver_name)))
  555. return err;
  556. pci_set_master(pdev);
  557. netdev = alloc_etherdev(sizeof(struct e1000_adapter));
  558. if (!netdev) {
  559. err = -ENOMEM;
  560. goto err_alloc_etherdev;
  561. }
  562. SET_MODULE_OWNER(netdev);
  563. SET_NETDEV_DEV(netdev, &pdev->dev);
  564. pci_set_drvdata(pdev, netdev);
  565. adapter = netdev_priv(netdev);
  566. adapter->netdev = netdev;
  567. adapter->pdev = pdev;
  568. adapter->hw.back = adapter;
  569. adapter->msg_enable = (1 << debug) - 1;
  570. mmio_start = pci_resource_start(pdev, BAR_0);
  571. mmio_len = pci_resource_len(pdev, BAR_0);
  572. adapter->hw.hw_addr = ioremap(mmio_start, mmio_len);
  573. if (!adapter->hw.hw_addr) {
  574. err = -EIO;
  575. goto err_ioremap;
  576. }
  577. for (i = BAR_1; i <= BAR_5; i++) {
  578. if (pci_resource_len(pdev, i) == 0)
  579. continue;
  580. if (pci_resource_flags(pdev, i) & IORESOURCE_IO) {
  581. adapter->hw.io_base = pci_resource_start(pdev, i);
  582. break;
  583. }
  584. }
  585. netdev->open = &e1000_open;
  586. netdev->stop = &e1000_close;
  587. netdev->hard_start_xmit = &e1000_xmit_frame;
  588. netdev->get_stats = &e1000_get_stats;
  589. netdev->set_multicast_list = &e1000_set_multi;
  590. netdev->set_mac_address = &e1000_set_mac;
  591. netdev->change_mtu = &e1000_change_mtu;
  592. netdev->do_ioctl = &e1000_ioctl;
  593. e1000_set_ethtool_ops(netdev);
  594. netdev->tx_timeout = &e1000_tx_timeout;
  595. netdev->watchdog_timeo = 5 * HZ;
  596. #ifdef CONFIG_E1000_NAPI
  597. netdev->poll = &e1000_clean;
  598. netdev->weight = 64;
  599. #endif
  600. netdev->vlan_rx_register = e1000_vlan_rx_register;
  601. netdev->vlan_rx_add_vid = e1000_vlan_rx_add_vid;
  602. netdev->vlan_rx_kill_vid = e1000_vlan_rx_kill_vid;
  603. #ifdef CONFIG_NET_POLL_CONTROLLER
  604. netdev->poll_controller = e1000_netpoll;
  605. #endif
  606. strcpy(netdev->name, pci_name(pdev));
  607. netdev->mem_start = mmio_start;
  608. netdev->mem_end = mmio_start + mmio_len;
  609. netdev->base_addr = adapter->hw.io_base;
  610. adapter->bd_number = cards_found;
  611. /* setup the private structure */
  612. if ((err = e1000_sw_init(adapter)))
  613. goto err_sw_init;
  614. if ((err = e1000_check_phy_reset_block(&adapter->hw)))
  615. DPRINTK(PROBE, INFO, "PHY reset is blocked due to SOL/IDER session.\n");
  616. /* if ksp3, indicate if it's port a being setup */
  617. if (pdev->device == E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3 &&
  618. e1000_ksp3_port_a == 0)
  619. adapter->ksp3_port_a = 1;
  620. e1000_ksp3_port_a++;
  621. /* Reset for multiple KP3 adapters */
  622. if (e1000_ksp3_port_a == 4)
  623. e1000_ksp3_port_a = 0;
  624. if (adapter->hw.mac_type >= e1000_82543) {
  625. netdev->features = NETIF_F_SG |
  626. NETIF_F_HW_CSUM |
  627. NETIF_F_HW_VLAN_TX |
  628. NETIF_F_HW_VLAN_RX |
  629. NETIF_F_HW_VLAN_FILTER;
  630. }
  631. #ifdef NETIF_F_TSO
  632. if ((adapter->hw.mac_type >= e1000_82544) &&
  633. (adapter->hw.mac_type != e1000_82547))
  634. netdev->features |= NETIF_F_TSO;
  635. #ifdef NETIF_F_TSO_IPV6
  636. if (adapter->hw.mac_type > e1000_82547_rev_2)
  637. netdev->features |= NETIF_F_TSO_IPV6;
  638. #endif
  639. #endif
  640. if (pci_using_dac)
  641. netdev->features |= NETIF_F_HIGHDMA;
  642. /* hard_start_xmit is safe against parallel locking */
  643. netdev->features |= NETIF_F_LLTX;
  644. adapter->en_mng_pt = e1000_enable_mng_pass_thru(&adapter->hw);
  645. /* before reading the EEPROM, reset the controller to
  646. * put the device in a known good starting state */
  647. e1000_reset_hw(&adapter->hw);
  648. /* make sure the EEPROM is good */
  649. if (e1000_validate_eeprom_checksum(&adapter->hw) < 0) {
  650. DPRINTK(PROBE, ERR, "The EEPROM Checksum Is Not Valid\n");
  651. err = -EIO;
  652. goto err_eeprom;
  653. }
  654. /* copy the MAC address out of the EEPROM */
  655. if (e1000_read_mac_addr(&adapter->hw))
  656. DPRINTK(PROBE, ERR, "EEPROM Read Error\n");
  657. memcpy(netdev->dev_addr, adapter->hw.mac_addr, netdev->addr_len);
  658. memcpy(netdev->perm_addr, adapter->hw.mac_addr, netdev->addr_len);
  659. if (!is_valid_ether_addr(netdev->perm_addr)) {
  660. DPRINTK(PROBE, ERR, "Invalid MAC Address\n");
  661. err = -EIO;
  662. goto err_eeprom;
  663. }
  664. e1000_read_part_num(&adapter->hw, &(adapter->part_num));
  665. e1000_get_bus_info(&adapter->hw);
  666. init_timer(&adapter->tx_fifo_stall_timer);
  667. adapter->tx_fifo_stall_timer.function = &e1000_82547_tx_fifo_stall;
  668. adapter->tx_fifo_stall_timer.data = (unsigned long) adapter;
  669. init_timer(&adapter->watchdog_timer);
  670. adapter->watchdog_timer.function = &e1000_watchdog;
  671. adapter->watchdog_timer.data = (unsigned long) adapter;
  672. init_timer(&adapter->phy_info_timer);
  673. adapter->phy_info_timer.function = &e1000_update_phy_info;
  674. adapter->phy_info_timer.data = (unsigned long) adapter;
  675. INIT_WORK(&adapter->reset_task,
  676. (void (*)(void *))e1000_reset_task, netdev);
  677. /* we're going to reset, so assume we have no link for now */
  678. netif_carrier_off(netdev);
  679. netif_stop_queue(netdev);
  680. e1000_check_options(adapter);
  681. /* Initial Wake on LAN setting
  682. * If APM wake is enabled in the EEPROM,
  683. * enable the ACPI Magic Packet filter
  684. */
  685. switch (adapter->hw.mac_type) {
  686. case e1000_82542_rev2_0:
  687. case e1000_82542_rev2_1:
  688. case e1000_82543:
  689. break;
  690. case e1000_82544:
  691. e1000_read_eeprom(&adapter->hw,
  692. EEPROM_INIT_CONTROL2_REG, 1, &eeprom_data);
  693. eeprom_apme_mask = E1000_EEPROM_82544_APM;
  694. break;
  695. case e1000_82546:
  696. case e1000_82546_rev_3:
  697. case e1000_82571:
  698. case e1000_80003es2lan:
  699. if (E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_FUNC_1){
  700. e1000_read_eeprom(&adapter->hw,
  701. EEPROM_INIT_CONTROL3_PORT_B, 1, &eeprom_data);
  702. break;
  703. }
  704. /* Fall Through */
  705. default:
  706. e1000_read_eeprom(&adapter->hw,
  707. EEPROM_INIT_CONTROL3_PORT_A, 1, &eeprom_data);
  708. break;
  709. }
  710. if (eeprom_data & eeprom_apme_mask)
  711. adapter->wol |= E1000_WUFC_MAG;
  712. /* print bus type/speed/width info */
  713. {
  714. struct e1000_hw *hw = &adapter->hw;
  715. DPRINTK(PROBE, INFO, "(PCI%s:%s:%s) ",
  716. ((hw->bus_type == e1000_bus_type_pcix) ? "-X" :
  717. (hw->bus_type == e1000_bus_type_pci_express ? " Express":"")),
  718. ((hw->bus_speed == e1000_bus_speed_2500) ? "2.5Gb/s" :
  719. (hw->bus_speed == e1000_bus_speed_133) ? "133MHz" :
  720. (hw->bus_speed == e1000_bus_speed_120) ? "120MHz" :
  721. (hw->bus_speed == e1000_bus_speed_100) ? "100MHz" :
  722. (hw->bus_speed == e1000_bus_speed_66) ? "66MHz" : "33MHz"),
  723. ((hw->bus_width == e1000_bus_width_64) ? "64-bit" :
  724. (hw->bus_width == e1000_bus_width_pciex_4) ? "Width x4" :
  725. (hw->bus_width == e1000_bus_width_pciex_1) ? "Width x1" :
  726. "32-bit"));
  727. }
  728. for (i = 0; i < 6; i++)
  729. printk("%2.2x%c", netdev->dev_addr[i], i == 5 ? '\n' : ':');
  730. /* reset the hardware with the new settings */
  731. e1000_reset(adapter);
  732. /* If the controller is 82573 and f/w is AMT, do not set
  733. * DRV_LOAD until the interface is up. For all other cases,
  734. * let the f/w know that the h/w is now under the control
  735. * of the driver. */
  736. if (adapter->hw.mac_type != e1000_82573 ||
  737. !e1000_check_mng_mode(&adapter->hw))
  738. e1000_get_hw_control(adapter);
  739. strcpy(netdev->name, "eth%d");
  740. if ((err = register_netdev(netdev)))
  741. goto err_register;
  742. DPRINTK(PROBE, INFO, "Intel(R) PRO/1000 Network Connection\n");
  743. cards_found++;
  744. return 0;
  745. err_register:
  746. err_sw_init:
  747. err_eeprom:
  748. iounmap(adapter->hw.hw_addr);
  749. err_ioremap:
  750. free_netdev(netdev);
  751. err_alloc_etherdev:
  752. pci_release_regions(pdev);
  753. return err;
  754. }
  755. /**
  756. * e1000_remove - Device Removal Routine
  757. * @pdev: PCI device information struct
  758. *
  759. * e1000_remove is called by the PCI subsystem to alert the driver
  760. * that it should release a PCI device. The could be caused by a
  761. * Hot-Plug event, or because the driver is going to be removed from
  762. * memory.
  763. **/
  764. static void __devexit
  765. e1000_remove(struct pci_dev *pdev)
  766. {
  767. struct net_device *netdev = pci_get_drvdata(pdev);
  768. struct e1000_adapter *adapter = netdev_priv(netdev);
  769. uint32_t manc;
  770. #ifdef CONFIG_E1000_NAPI
  771. int i;
  772. #endif
  773. flush_scheduled_work();
  774. if (adapter->hw.mac_type >= e1000_82540 &&
  775. adapter->hw.media_type == e1000_media_type_copper) {
  776. manc = E1000_READ_REG(&adapter->hw, MANC);
  777. if (manc & E1000_MANC_SMBUS_EN) {
  778. manc |= E1000_MANC_ARP_EN;
  779. E1000_WRITE_REG(&adapter->hw, MANC, manc);
  780. }
  781. }
  782. /* Release control of h/w to f/w. If f/w is AMT enabled, this
  783. * would have already happened in close and is redundant. */
  784. e1000_release_hw_control(adapter);
  785. unregister_netdev(netdev);
  786. #ifdef CONFIG_E1000_NAPI
  787. for (i = 0; i < adapter->num_rx_queues; i++)
  788. dev_put(&adapter->polling_netdev[i]);
  789. #endif
  790. if (!e1000_check_phy_reset_block(&adapter->hw))
  791. e1000_phy_hw_reset(&adapter->hw);
  792. kfree(adapter->tx_ring);
  793. kfree(adapter->rx_ring);
  794. #ifdef CONFIG_E1000_NAPI
  795. kfree(adapter->polling_netdev);
  796. #endif
  797. iounmap(adapter->hw.hw_addr);
  798. pci_release_regions(pdev);
  799. free_netdev(netdev);
  800. pci_disable_device(pdev);
  801. }
  802. /**
  803. * e1000_sw_init - Initialize general software structures (struct e1000_adapter)
  804. * @adapter: board private structure to initialize
  805. *
  806. * e1000_sw_init initializes the Adapter private data structure.
  807. * Fields are initialized based on PCI device information and
  808. * OS network device settings (MTU size).
  809. **/
  810. static int __devinit
  811. e1000_sw_init(struct e1000_adapter *adapter)
  812. {
  813. struct e1000_hw *hw = &adapter->hw;
  814. struct net_device *netdev = adapter->netdev;
  815. struct pci_dev *pdev = adapter->pdev;
  816. #ifdef CONFIG_E1000_NAPI
  817. int i;
  818. #endif
  819. /* PCI config space info */
  820. hw->vendor_id = pdev->vendor;
  821. hw->device_id = pdev->device;
  822. hw->subsystem_vendor_id = pdev->subsystem_vendor;
  823. hw->subsystem_id = pdev->subsystem_device;
  824. pci_read_config_byte(pdev, PCI_REVISION_ID, &hw->revision_id);
  825. pci_read_config_word(pdev, PCI_COMMAND, &hw->pci_cmd_word);
  826. adapter->rx_buffer_len = MAXIMUM_ETHERNET_FRAME_SIZE;
  827. adapter->rx_ps_bsize0 = E1000_RXBUFFER_128;
  828. hw->max_frame_size = netdev->mtu +
  829. ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
  830. hw->min_frame_size = MINIMUM_ETHERNET_FRAME_SIZE;
  831. /* identify the MAC */
  832. if (e1000_set_mac_type(hw)) {
  833. DPRINTK(PROBE, ERR, "Unknown MAC Type\n");
  834. return -EIO;
  835. }
  836. /* initialize eeprom parameters */
  837. if (e1000_init_eeprom_params(hw)) {
  838. E1000_ERR("EEPROM initialization failed\n");
  839. return -EIO;
  840. }
  841. switch (hw->mac_type) {
  842. default:
  843. break;
  844. case e1000_82541:
  845. case e1000_82547:
  846. case e1000_82541_rev_2:
  847. case e1000_82547_rev_2:
  848. hw->phy_init_script = 1;
  849. break;
  850. }
  851. e1000_set_media_type(hw);
  852. hw->wait_autoneg_complete = FALSE;
  853. hw->tbi_compatibility_en = TRUE;
  854. hw->adaptive_ifs = TRUE;
  855. /* Copper options */
  856. if (hw->media_type == e1000_media_type_copper) {
  857. hw->mdix = AUTO_ALL_MODES;
  858. hw->disable_polarity_correction = FALSE;
  859. hw->master_slave = E1000_MASTER_SLAVE;
  860. }
  861. adapter->num_tx_queues = 1;
  862. adapter->num_rx_queues = 1;
  863. if (e1000_alloc_queues(adapter)) {
  864. DPRINTK(PROBE, ERR, "Unable to allocate memory for queues\n");
  865. return -ENOMEM;
  866. }
  867. #ifdef CONFIG_E1000_NAPI
  868. for (i = 0; i < adapter->num_rx_queues; i++) {
  869. adapter->polling_netdev[i].priv = adapter;
  870. adapter->polling_netdev[i].poll = &e1000_clean;
  871. adapter->polling_netdev[i].weight = 64;
  872. dev_hold(&adapter->polling_netdev[i]);
  873. set_bit(__LINK_STATE_START, &adapter->polling_netdev[i].state);
  874. }
  875. spin_lock_init(&adapter->tx_queue_lock);
  876. #endif
  877. atomic_set(&adapter->irq_sem, 1);
  878. spin_lock_init(&adapter->stats_lock);
  879. return 0;
  880. }
  881. /**
  882. * e1000_alloc_queues - Allocate memory for all rings
  883. * @adapter: board private structure to initialize
  884. *
  885. * We allocate one ring per queue at run-time since we don't know the
  886. * number of queues at compile-time. The polling_netdev array is
  887. * intended for Multiqueue, but should work fine with a single queue.
  888. **/
  889. static int __devinit
  890. e1000_alloc_queues(struct e1000_adapter *adapter)
  891. {
  892. int size;
  893. size = sizeof(struct e1000_tx_ring) * adapter->num_tx_queues;
  894. adapter->tx_ring = kmalloc(size, GFP_KERNEL);
  895. if (!adapter->tx_ring)
  896. return -ENOMEM;
  897. memset(adapter->tx_ring, 0, size);
  898. size = sizeof(struct e1000_rx_ring) * adapter->num_rx_queues;
  899. adapter->rx_ring = kmalloc(size, GFP_KERNEL);
  900. if (!adapter->rx_ring) {
  901. kfree(adapter->tx_ring);
  902. return -ENOMEM;
  903. }
  904. memset(adapter->rx_ring, 0, size);
  905. #ifdef CONFIG_E1000_NAPI
  906. size = sizeof(struct net_device) * adapter->num_rx_queues;
  907. adapter->polling_netdev = kmalloc(size, GFP_KERNEL);
  908. if (!adapter->polling_netdev) {
  909. kfree(adapter->tx_ring);
  910. kfree(adapter->rx_ring);
  911. return -ENOMEM;
  912. }
  913. memset(adapter->polling_netdev, 0, size);
  914. #endif
  915. return E1000_SUCCESS;
  916. }
  917. /**
  918. * e1000_open - Called when a network interface is made active
  919. * @netdev: network interface device structure
  920. *
  921. * Returns 0 on success, negative value on failure
  922. *
  923. * The open entry point is called when a network interface is made
  924. * active by the system (IFF_UP). At this point all resources needed
  925. * for transmit and receive operations are allocated, the interrupt
  926. * handler is registered with the OS, the watchdog timer is started,
  927. * and the stack is notified that the interface is ready.
  928. **/
  929. static int
  930. e1000_open(struct net_device *netdev)
  931. {
  932. struct e1000_adapter *adapter = netdev_priv(netdev);
  933. int err;
  934. /* disallow open during test */
  935. if (test_bit(__E1000_DRIVER_TESTING, &adapter->flags))
  936. return -EBUSY;
  937. /* allocate transmit descriptors */
  938. if ((err = e1000_setup_all_tx_resources(adapter)))
  939. goto err_setup_tx;
  940. /* allocate receive descriptors */
  941. if ((err = e1000_setup_all_rx_resources(adapter)))
  942. goto err_setup_rx;
  943. err = e1000_request_irq(adapter);
  944. if (err)
  945. goto err_up;
  946. if ((err = e1000_up(adapter)))
  947. goto err_up;
  948. adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
  949. if ((adapter->hw.mng_cookie.status &
  950. E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) {
  951. e1000_update_mng_vlan(adapter);
  952. }
  953. /* If AMT is enabled, let the firmware know that the network
  954. * interface is now open */
  955. if (adapter->hw.mac_type == e1000_82573 &&
  956. e1000_check_mng_mode(&adapter->hw))
  957. e1000_get_hw_control(adapter);
  958. return E1000_SUCCESS;
  959. err_up:
  960. e1000_free_all_rx_resources(adapter);
  961. err_setup_rx:
  962. e1000_free_all_tx_resources(adapter);
  963. err_setup_tx:
  964. e1000_reset(adapter);
  965. return err;
  966. }
  967. /**
  968. * e1000_close - Disables a network interface
  969. * @netdev: network interface device structure
  970. *
  971. * Returns 0, this is not allowed to fail
  972. *
  973. * The close entry point is called when an interface is de-activated
  974. * by the OS. The hardware is still under the drivers control, but
  975. * needs to be disabled. A global MAC reset is issued to stop the
  976. * hardware, and all transmit and receive resources are freed.
  977. **/
  978. static int
  979. e1000_close(struct net_device *netdev)
  980. {
  981. struct e1000_adapter *adapter = netdev_priv(netdev);
  982. WARN_ON(test_bit(__E1000_RESETTING, &adapter->flags));
  983. e1000_down(adapter);
  984. e1000_free_irq(adapter);
  985. e1000_free_all_tx_resources(adapter);
  986. e1000_free_all_rx_resources(adapter);
  987. if ((adapter->hw.mng_cookie.status &
  988. E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) {
  989. e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
  990. }
  991. /* If AMT is enabled, let the firmware know that the network
  992. * interface is now closed */
  993. if (adapter->hw.mac_type == e1000_82573 &&
  994. e1000_check_mng_mode(&adapter->hw))
  995. e1000_release_hw_control(adapter);
  996. return 0;
  997. }
  998. /**
  999. * e1000_check_64k_bound - check that memory doesn't cross 64kB boundary
  1000. * @adapter: address of board private structure
  1001. * @start: address of beginning of memory
  1002. * @len: length of memory
  1003. **/
  1004. static boolean_t
  1005. e1000_check_64k_bound(struct e1000_adapter *adapter,
  1006. void *start, unsigned long len)
  1007. {
  1008. unsigned long begin = (unsigned long) start;
  1009. unsigned long end = begin + len;
  1010. /* First rev 82545 and 82546 need to not allow any memory
  1011. * write location to cross 64k boundary due to errata 23 */
  1012. if (adapter->hw.mac_type == e1000_82545 ||
  1013. adapter->hw.mac_type == e1000_82546) {
  1014. return ((begin ^ (end - 1)) >> 16) != 0 ? FALSE : TRUE;
  1015. }
  1016. return TRUE;
  1017. }
  1018. /**
  1019. * e1000_setup_tx_resources - allocate Tx resources (Descriptors)
  1020. * @adapter: board private structure
  1021. * @txdr: tx descriptor ring (for a specific queue) to setup
  1022. *
  1023. * Return 0 on success, negative on failure
  1024. **/
  1025. static int
  1026. e1000_setup_tx_resources(struct e1000_adapter *adapter,
  1027. struct e1000_tx_ring *txdr)
  1028. {
  1029. struct pci_dev *pdev = adapter->pdev;
  1030. int size;
  1031. size = sizeof(struct e1000_buffer) * txdr->count;
  1032. txdr->buffer_info = vmalloc_node(size, pcibus_to_node(pdev->bus));
  1033. if (!txdr->buffer_info) {
  1034. DPRINTK(PROBE, ERR,
  1035. "Unable to allocate memory for the transmit descriptor ring\n");
  1036. return -ENOMEM;
  1037. }
  1038. memset(txdr->buffer_info, 0, size);
  1039. /* round up to nearest 4K */
  1040. txdr->size = txdr->count * sizeof(struct e1000_tx_desc);
  1041. E1000_ROUNDUP(txdr->size, 4096);
  1042. txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
  1043. if (!txdr->desc) {
  1044. setup_tx_desc_die:
  1045. vfree(txdr->buffer_info);
  1046. DPRINTK(PROBE, ERR,
  1047. "Unable to allocate memory for the transmit descriptor ring\n");
  1048. return -ENOMEM;
  1049. }
  1050. /* Fix for errata 23, can't cross 64kB boundary */
  1051. if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) {
  1052. void *olddesc = txdr->desc;
  1053. dma_addr_t olddma = txdr->dma;
  1054. DPRINTK(TX_ERR, ERR, "txdr align check failed: %u bytes "
  1055. "at %p\n", txdr->size, txdr->desc);
  1056. /* Try again, without freeing the previous */
  1057. txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
  1058. /* Failed allocation, critical failure */
  1059. if (!txdr->desc) {
  1060. pci_free_consistent(pdev, txdr->size, olddesc, olddma);
  1061. goto setup_tx_desc_die;
  1062. }
  1063. if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) {
  1064. /* give up */
  1065. pci_free_consistent(pdev, txdr->size, txdr->desc,
  1066. txdr->dma);
  1067. pci_free_consistent(pdev, txdr->size, olddesc, olddma);
  1068. DPRINTK(PROBE, ERR,
  1069. "Unable to allocate aligned memory "
  1070. "for the transmit descriptor ring\n");
  1071. vfree(txdr->buffer_info);
  1072. return -ENOMEM;
  1073. } else {
  1074. /* Free old allocation, new allocation was successful */
  1075. pci_free_consistent(pdev, txdr->size, olddesc, olddma);
  1076. }
  1077. }
  1078. memset(txdr->desc, 0, txdr->size);
  1079. txdr->next_to_use = 0;
  1080. txdr->next_to_clean = 0;
  1081. spin_lock_init(&txdr->tx_lock);
  1082. return 0;
  1083. }
  1084. /**
  1085. * e1000_setup_all_tx_resources - wrapper to allocate Tx resources
  1086. * (Descriptors) for all queues
  1087. * @adapter: board private structure
  1088. *
  1089. * If this function returns with an error, then it's possible one or
  1090. * more of the rings is populated (while the rest are not). It is the
  1091. * callers duty to clean those orphaned rings.
  1092. *
  1093. * Return 0 on success, negative on failure
  1094. **/
  1095. int
  1096. e1000_setup_all_tx_resources(struct e1000_adapter *adapter)
  1097. {
  1098. int i, err = 0;
  1099. for (i = 0; i < adapter->num_tx_queues; i++) {
  1100. err = e1000_setup_tx_resources(adapter, &adapter->tx_ring[i]);
  1101. if (err) {
  1102. DPRINTK(PROBE, ERR,
  1103. "Allocation for Tx Queue %u failed\n", i);
  1104. break;
  1105. }
  1106. }
  1107. return err;
  1108. }
  1109. /**
  1110. * e1000_configure_tx - Configure 8254x Transmit Unit after Reset
  1111. * @adapter: board private structure
  1112. *
  1113. * Configure the Tx unit of the MAC after a reset.
  1114. **/
  1115. static void
  1116. e1000_configure_tx(struct e1000_adapter *adapter)
  1117. {
  1118. uint64_t tdba;
  1119. struct e1000_hw *hw = &adapter->hw;
  1120. uint32_t tdlen, tctl, tipg, tarc;
  1121. uint32_t ipgr1, ipgr2;
  1122. /* Setup the HW Tx Head and Tail descriptor pointers */
  1123. switch (adapter->num_tx_queues) {
  1124. case 1:
  1125. default:
  1126. tdba = adapter->tx_ring[0].dma;
  1127. tdlen = adapter->tx_ring[0].count *
  1128. sizeof(struct e1000_tx_desc);
  1129. E1000_WRITE_REG(hw, TDBAL, (tdba & 0x00000000ffffffffULL));
  1130. E1000_WRITE_REG(hw, TDBAH, (tdba >> 32));
  1131. E1000_WRITE_REG(hw, TDLEN, tdlen);
  1132. E1000_WRITE_REG(hw, TDH, 0);
  1133. E1000_WRITE_REG(hw, TDT, 0);
  1134. adapter->tx_ring[0].tdh = E1000_TDH;
  1135. adapter->tx_ring[0].tdt = E1000_TDT;
  1136. break;
  1137. }
  1138. /* Set the default values for the Tx Inter Packet Gap timer */
  1139. if (hw->media_type == e1000_media_type_fiber ||
  1140. hw->media_type == e1000_media_type_internal_serdes)
  1141. tipg = DEFAULT_82543_TIPG_IPGT_FIBER;
  1142. else
  1143. tipg = DEFAULT_82543_TIPG_IPGT_COPPER;
  1144. switch (hw->mac_type) {
  1145. case e1000_82542_rev2_0:
  1146. case e1000_82542_rev2_1:
  1147. tipg = DEFAULT_82542_TIPG_IPGT;
  1148. ipgr1 = DEFAULT_82542_TIPG_IPGR1;
  1149. ipgr2 = DEFAULT_82542_TIPG_IPGR2;
  1150. break;
  1151. case e1000_80003es2lan:
  1152. ipgr1 = DEFAULT_82543_TIPG_IPGR1;
  1153. ipgr2 = DEFAULT_80003ES2LAN_TIPG_IPGR2;
  1154. break;
  1155. default:
  1156. ipgr1 = DEFAULT_82543_TIPG_IPGR1;
  1157. ipgr2 = DEFAULT_82543_TIPG_IPGR2;
  1158. break;
  1159. }
  1160. tipg |= ipgr1 << E1000_TIPG_IPGR1_SHIFT;
  1161. tipg |= ipgr2 << E1000_TIPG_IPGR2_SHIFT;
  1162. E1000_WRITE_REG(hw, TIPG, tipg);
  1163. /* Set the Tx Interrupt Delay register */
  1164. E1000_WRITE_REG(hw, TIDV, adapter->tx_int_delay);
  1165. if (hw->mac_type >= e1000_82540)
  1166. E1000_WRITE_REG(hw, TADV, adapter->tx_abs_int_delay);
  1167. /* Program the Transmit Control Register */
  1168. tctl = E1000_READ_REG(hw, TCTL);
  1169. tctl &= ~E1000_TCTL_CT;
  1170. tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC |
  1171. (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
  1172. #ifdef DISABLE_MULR
  1173. /* disable Multiple Reads for debugging */
  1174. tctl &= ~E1000_TCTL_MULR;
  1175. #endif
  1176. if (hw->mac_type == e1000_82571 || hw->mac_type == e1000_82572) {
  1177. tarc = E1000_READ_REG(hw, TARC0);
  1178. tarc |= ((1 << 25) | (1 << 21));
  1179. E1000_WRITE_REG(hw, TARC0, tarc);
  1180. tarc = E1000_READ_REG(hw, TARC1);
  1181. tarc |= (1 << 25);
  1182. if (tctl & E1000_TCTL_MULR)
  1183. tarc &= ~(1 << 28);
  1184. else
  1185. tarc |= (1 << 28);
  1186. E1000_WRITE_REG(hw, TARC1, tarc);
  1187. } else if (hw->mac_type == e1000_80003es2lan) {
  1188. tarc = E1000_READ_REG(hw, TARC0);
  1189. tarc |= 1;
  1190. if (hw->media_type == e1000_media_type_internal_serdes)
  1191. tarc |= (1 << 20);
  1192. E1000_WRITE_REG(hw, TARC0, tarc);
  1193. tarc = E1000_READ_REG(hw, TARC1);
  1194. tarc |= 1;
  1195. E1000_WRITE_REG(hw, TARC1, tarc);
  1196. }
  1197. e1000_config_collision_dist(hw);
  1198. /* Setup Transmit Descriptor Settings for eop descriptor */
  1199. adapter->txd_cmd = E1000_TXD_CMD_IDE | E1000_TXD_CMD_EOP |
  1200. E1000_TXD_CMD_IFCS;
  1201. if (hw->mac_type < e1000_82543)
  1202. adapter->txd_cmd |= E1000_TXD_CMD_RPS;
  1203. else
  1204. adapter->txd_cmd |= E1000_TXD_CMD_RS;
  1205. /* Cache if we're 82544 running in PCI-X because we'll
  1206. * need this to apply a workaround later in the send path. */
  1207. if (hw->mac_type == e1000_82544 &&
  1208. hw->bus_type == e1000_bus_type_pcix)
  1209. adapter->pcix_82544 = 1;
  1210. E1000_WRITE_REG(hw, TCTL, tctl);
  1211. }
  1212. /**
  1213. * e1000_setup_rx_resources - allocate Rx resources (Descriptors)
  1214. * @adapter: board private structure
  1215. * @rxdr: rx descriptor ring (for a specific queue) to setup
  1216. *
  1217. * Returns 0 on success, negative on failure
  1218. **/
  1219. static int
  1220. e1000_setup_rx_resources(struct e1000_adapter *adapter,
  1221. struct e1000_rx_ring *rxdr)
  1222. {
  1223. struct pci_dev *pdev = adapter->pdev;
  1224. int size, desc_len;
  1225. size = sizeof(struct e1000_buffer) * rxdr->count;
  1226. rxdr->buffer_info = vmalloc_node(size, pcibus_to_node(pdev->bus));
  1227. if (!rxdr->buffer_info) {
  1228. DPRINTK(PROBE, ERR,
  1229. "Unable to allocate memory for the receive descriptor ring\n");
  1230. return -ENOMEM;
  1231. }
  1232. memset(rxdr->buffer_info, 0, size);
  1233. size = sizeof(struct e1000_ps_page) * rxdr->count;
  1234. rxdr->ps_page = kmalloc(size, GFP_KERNEL);
  1235. if (!rxdr->ps_page) {
  1236. vfree(rxdr->buffer_info);
  1237. DPRINTK(PROBE, ERR,
  1238. "Unable to allocate memory for the receive descriptor ring\n");
  1239. return -ENOMEM;
  1240. }
  1241. memset(rxdr->ps_page, 0, size);
  1242. size = sizeof(struct e1000_ps_page_dma) * rxdr->count;
  1243. rxdr->ps_page_dma = kmalloc(size, GFP_KERNEL);
  1244. if (!rxdr->ps_page_dma) {
  1245. vfree(rxdr->buffer_info);
  1246. kfree(rxdr->ps_page);
  1247. DPRINTK(PROBE, ERR,
  1248. "Unable to allocate memory for the receive descriptor ring\n");
  1249. return -ENOMEM;
  1250. }
  1251. memset(rxdr->ps_page_dma, 0, size);
  1252. if (adapter->hw.mac_type <= e1000_82547_rev_2)
  1253. desc_len = sizeof(struct e1000_rx_desc);
  1254. else
  1255. desc_len = sizeof(union e1000_rx_desc_packet_split);
  1256. /* Round up to nearest 4K */
  1257. rxdr->size = rxdr->count * desc_len;
  1258. E1000_ROUNDUP(rxdr->size, 4096);
  1259. rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
  1260. if (!rxdr->desc) {
  1261. DPRINTK(PROBE, ERR,
  1262. "Unable to allocate memory for the receive descriptor ring\n");
  1263. setup_rx_desc_die:
  1264. vfree(rxdr->buffer_info);
  1265. kfree(rxdr->ps_page);
  1266. kfree(rxdr->ps_page_dma);
  1267. return -ENOMEM;
  1268. }
  1269. /* Fix for errata 23, can't cross 64kB boundary */
  1270. if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) {
  1271. void *olddesc = rxdr->desc;
  1272. dma_addr_t olddma = rxdr->dma;
  1273. DPRINTK(RX_ERR, ERR, "rxdr align check failed: %u bytes "
  1274. "at %p\n", rxdr->size, rxdr->desc);
  1275. /* Try again, without freeing the previous */
  1276. rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
  1277. /* Failed allocation, critical failure */
  1278. if (!rxdr->desc) {
  1279. pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
  1280. DPRINTK(PROBE, ERR,
  1281. "Unable to allocate memory "
  1282. "for the receive descriptor ring\n");
  1283. goto setup_rx_desc_die;
  1284. }
  1285. if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) {
  1286. /* give up */
  1287. pci_free_consistent(pdev, rxdr->size, rxdr->desc,
  1288. rxdr->dma);
  1289. pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
  1290. DPRINTK(PROBE, ERR,
  1291. "Unable to allocate aligned memory "
  1292. "for the receive descriptor ring\n");
  1293. goto setup_rx_desc_die;
  1294. } else {
  1295. /* Free old allocation, new allocation was successful */
  1296. pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
  1297. }
  1298. }
  1299. memset(rxdr->desc, 0, rxdr->size);
  1300. rxdr->next_to_clean = 0;
  1301. rxdr->next_to_use = 0;
  1302. return 0;
  1303. }
  1304. /**
  1305. * e1000_setup_all_rx_resources - wrapper to allocate Rx resources
  1306. * (Descriptors) for all queues
  1307. * @adapter: board private structure
  1308. *
  1309. * If this function returns with an error, then it's possible one or
  1310. * more of the rings is populated (while the rest are not). It is the
  1311. * callers duty to clean those orphaned rings.
  1312. *
  1313. * Return 0 on success, negative on failure
  1314. **/
  1315. int
  1316. e1000_setup_all_rx_resources(struct e1000_adapter *adapter)
  1317. {
  1318. int i, err = 0;
  1319. for (i = 0; i < adapter->num_rx_queues; i++) {
  1320. err = e1000_setup_rx_resources(adapter, &adapter->rx_ring[i]);
  1321. if (err) {
  1322. DPRINTK(PROBE, ERR,
  1323. "Allocation for Rx Queue %u failed\n", i);
  1324. break;
  1325. }
  1326. }
  1327. return err;
  1328. }
  1329. /**
  1330. * e1000_setup_rctl - configure the receive control registers
  1331. * @adapter: Board private structure
  1332. **/
  1333. #define PAGE_USE_COUNT(S) (((S) >> PAGE_SHIFT) + \
  1334. (((S) & (PAGE_SIZE - 1)) ? 1 : 0))
  1335. static void
  1336. e1000_setup_rctl(struct e1000_adapter *adapter)
  1337. {
  1338. uint32_t rctl, rfctl;
  1339. uint32_t psrctl = 0;
  1340. #ifndef CONFIG_E1000_DISABLE_PACKET_SPLIT
  1341. uint32_t pages = 0;
  1342. #endif
  1343. rctl = E1000_READ_REG(&adapter->hw, RCTL);
  1344. rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
  1345. rctl |= E1000_RCTL_EN | E1000_RCTL_BAM |
  1346. E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF |
  1347. (adapter->hw.mc_filter_type << E1000_RCTL_MO_SHIFT);
  1348. if (adapter->hw.mac_type > e1000_82543)
  1349. rctl |= E1000_RCTL_SECRC;
  1350. if (adapter->hw.tbi_compatibility_on == 1)
  1351. rctl |= E1000_RCTL_SBP;
  1352. else
  1353. rctl &= ~E1000_RCTL_SBP;
  1354. if (adapter->netdev->mtu <= ETH_DATA_LEN)
  1355. rctl &= ~E1000_RCTL_LPE;
  1356. else
  1357. rctl |= E1000_RCTL_LPE;
  1358. /* Setup buffer sizes */
  1359. rctl &= ~E1000_RCTL_SZ_4096;
  1360. rctl |= E1000_RCTL_BSEX;
  1361. switch (adapter->rx_buffer_len) {
  1362. case E1000_RXBUFFER_256:
  1363. rctl |= E1000_RCTL_SZ_256;
  1364. rctl &= ~E1000_RCTL_BSEX;
  1365. break;
  1366. case E1000_RXBUFFER_512:
  1367. rctl |= E1000_RCTL_SZ_512;
  1368. rctl &= ~E1000_RCTL_BSEX;
  1369. break;
  1370. case E1000_RXBUFFER_1024:
  1371. rctl |= E1000_RCTL_SZ_1024;
  1372. rctl &= ~E1000_RCTL_BSEX;
  1373. break;
  1374. case E1000_RXBUFFER_2048:
  1375. default:
  1376. rctl |= E1000_RCTL_SZ_2048;
  1377. rctl &= ~E1000_RCTL_BSEX;
  1378. break;
  1379. case E1000_RXBUFFER_4096:
  1380. rctl |= E1000_RCTL_SZ_4096;
  1381. break;
  1382. case E1000_RXBUFFER_8192:
  1383. rctl |= E1000_RCTL_SZ_8192;
  1384. break;
  1385. case E1000_RXBUFFER_16384:
  1386. rctl |= E1000_RCTL_SZ_16384;
  1387. break;
  1388. }
  1389. #ifndef CONFIG_E1000_DISABLE_PACKET_SPLIT
  1390. /* 82571 and greater support packet-split where the protocol
  1391. * header is placed in skb->data and the packet data is
  1392. * placed in pages hanging off of skb_shinfo(skb)->nr_frags.
  1393. * In the case of a non-split, skb->data is linearly filled,
  1394. * followed by the page buffers. Therefore, skb->data is
  1395. * sized to hold the largest protocol header.
  1396. */
  1397. pages = PAGE_USE_COUNT(adapter->netdev->mtu);
  1398. if ((adapter->hw.mac_type > e1000_82547_rev_2) && (pages <= 3) &&
  1399. PAGE_SIZE <= 16384)
  1400. adapter->rx_ps_pages = pages;
  1401. else
  1402. adapter->rx_ps_pages = 0;
  1403. #endif
  1404. if (adapter->rx_ps_pages) {
  1405. /* Configure extra packet-split registers */
  1406. rfctl = E1000_READ_REG(&adapter->hw, RFCTL);
  1407. rfctl |= E1000_RFCTL_EXTEN;
  1408. /* disable IPv6 packet split support */
  1409. rfctl |= E1000_RFCTL_IPV6_DIS;
  1410. E1000_WRITE_REG(&adapter->hw, RFCTL, rfctl);
  1411. rctl |= E1000_RCTL_DTYP_PS | E1000_RCTL_SECRC;
  1412. psrctl |= adapter->rx_ps_bsize0 >>
  1413. E1000_PSRCTL_BSIZE0_SHIFT;
  1414. switch (adapter->rx_ps_pages) {
  1415. case 3:
  1416. psrctl |= PAGE_SIZE <<
  1417. E1000_PSRCTL_BSIZE3_SHIFT;
  1418. case 2:
  1419. psrctl |= PAGE_SIZE <<
  1420. E1000_PSRCTL_BSIZE2_SHIFT;
  1421. case 1:
  1422. psrctl |= PAGE_SIZE >>
  1423. E1000_PSRCTL_BSIZE1_SHIFT;
  1424. break;
  1425. }
  1426. E1000_WRITE_REG(&adapter->hw, PSRCTL, psrctl);
  1427. }
  1428. E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
  1429. }
  1430. /**
  1431. * e1000_configure_rx - Configure 8254x Receive Unit after Reset
  1432. * @adapter: board private structure
  1433. *
  1434. * Configure the Rx unit of the MAC after a reset.
  1435. **/
  1436. static void
  1437. e1000_configure_rx(struct e1000_adapter *adapter)
  1438. {
  1439. uint64_t rdba;
  1440. struct e1000_hw *hw = &adapter->hw;
  1441. uint32_t rdlen, rctl, rxcsum, ctrl_ext;
  1442. if (adapter->rx_ps_pages) {
  1443. /* this is a 32 byte descriptor */
  1444. rdlen = adapter->rx_ring[0].count *
  1445. sizeof(union e1000_rx_desc_packet_split);
  1446. adapter->clean_rx = e1000_clean_rx_irq_ps;
  1447. adapter->alloc_rx_buf = e1000_alloc_rx_buffers_ps;
  1448. } else {
  1449. rdlen = adapter->rx_ring[0].count *
  1450. sizeof(struct e1000_rx_desc);
  1451. adapter->clean_rx = e1000_clean_rx_irq;
  1452. adapter->alloc_rx_buf = e1000_alloc_rx_buffers;
  1453. }
  1454. /* disable receives while setting up the descriptors */
  1455. rctl = E1000_READ_REG(hw, RCTL);
  1456. E1000_WRITE_REG(hw, RCTL, rctl & ~E1000_RCTL_EN);
  1457. /* set the Receive Delay Timer Register */
  1458. E1000_WRITE_REG(hw, RDTR, adapter->rx_int_delay);
  1459. if (hw->mac_type >= e1000_82540) {
  1460. E1000_WRITE_REG(hw, RADV, adapter->rx_abs_int_delay);
  1461. if (adapter->itr > 1)
  1462. E1000_WRITE_REG(hw, ITR,
  1463. 1000000000 / (adapter->itr * 256));
  1464. }
  1465. if (hw->mac_type >= e1000_82571) {
  1466. ctrl_ext = E1000_READ_REG(hw, CTRL_EXT);
  1467. /* Reset delay timers after every interrupt */
  1468. ctrl_ext |= E1000_CTRL_EXT_INT_TIMER_CLR;
  1469. #ifdef CONFIG_E1000_NAPI
  1470. /* Auto-Mask interrupts upon ICR read. */
  1471. ctrl_ext |= E1000_CTRL_EXT_IAME;
  1472. #endif
  1473. E1000_WRITE_REG(hw, CTRL_EXT, ctrl_ext);
  1474. E1000_WRITE_REG(hw, IAM, ~0);
  1475. E1000_WRITE_FLUSH(hw);
  1476. }
  1477. /* Setup the HW Rx Head and Tail Descriptor Pointers and
  1478. * the Base and Length of the Rx Descriptor Ring */
  1479. switch (adapter->num_rx_queues) {
  1480. case 1:
  1481. default:
  1482. rdba = adapter->rx_ring[0].dma;
  1483. E1000_WRITE_REG(hw, RDBAL, (rdba & 0x00000000ffffffffULL));
  1484. E1000_WRITE_REG(hw, RDBAH, (rdba >> 32));
  1485. E1000_WRITE_REG(hw, RDLEN, rdlen);
  1486. E1000_WRITE_REG(hw, RDH, 0);
  1487. E1000_WRITE_REG(hw, RDT, 0);
  1488. adapter->rx_ring[0].rdh = E1000_RDH;
  1489. adapter->rx_ring[0].rdt = E1000_RDT;
  1490. break;
  1491. }
  1492. /* Enable 82543 Receive Checksum Offload for TCP and UDP */
  1493. if (hw->mac_type >= e1000_82543) {
  1494. rxcsum = E1000_READ_REG(hw, RXCSUM);
  1495. if (adapter->rx_csum == TRUE) {
  1496. rxcsum |= E1000_RXCSUM_TUOFL;
  1497. /* Enable 82571 IPv4 payload checksum for UDP fragments
  1498. * Must be used in conjunction with packet-split. */
  1499. if ((hw->mac_type >= e1000_82571) &&
  1500. (adapter->rx_ps_pages)) {
  1501. rxcsum |= E1000_RXCSUM_IPPCSE;
  1502. }
  1503. } else {
  1504. rxcsum &= ~E1000_RXCSUM_TUOFL;
  1505. /* don't need to clear IPPCSE as it defaults to 0 */
  1506. }
  1507. E1000_WRITE_REG(hw, RXCSUM, rxcsum);
  1508. }
  1509. if (hw->mac_type == e1000_82573)
  1510. E1000_WRITE_REG(hw, ERT, 0x0100);
  1511. /* Enable Receives */
  1512. E1000_WRITE_REG(hw, RCTL, rctl);
  1513. }
  1514. /**
  1515. * e1000_free_tx_resources - Free Tx Resources per Queue
  1516. * @adapter: board private structure
  1517. * @tx_ring: Tx descriptor ring for a specific queue
  1518. *
  1519. * Free all transmit software resources
  1520. **/
  1521. static void
  1522. e1000_free_tx_resources(struct e1000_adapter *adapter,
  1523. struct e1000_tx_ring *tx_ring)
  1524. {
  1525. struct pci_dev *pdev = adapter->pdev;
  1526. e1000_clean_tx_ring(adapter, tx_ring);
  1527. vfree(tx_ring->buffer_info);
  1528. tx_ring->buffer_info = NULL;
  1529. pci_free_consistent(pdev, tx_ring->size, tx_ring->desc, tx_ring->dma);
  1530. tx_ring->desc = NULL;
  1531. }
  1532. /**
  1533. * e1000_free_all_tx_resources - Free Tx Resources for All Queues
  1534. * @adapter: board private structure
  1535. *
  1536. * Free all transmit software resources
  1537. **/
  1538. void
  1539. e1000_free_all_tx_resources(struct e1000_adapter *adapter)
  1540. {
  1541. int i;
  1542. for (i = 0; i < adapter->num_tx_queues; i++)
  1543. e1000_free_tx_resources(adapter, &adapter->tx_ring[i]);
  1544. }
  1545. static void
  1546. e1000_unmap_and_free_tx_resource(struct e1000_adapter *adapter,
  1547. struct e1000_buffer *buffer_info)
  1548. {
  1549. if (buffer_info->dma) {
  1550. pci_unmap_page(adapter->pdev,
  1551. buffer_info->dma,
  1552. buffer_info->length,
  1553. PCI_DMA_TODEVICE);
  1554. }
  1555. if (buffer_info->skb)
  1556. dev_kfree_skb_any(buffer_info->skb);
  1557. memset(buffer_info, 0, sizeof(struct e1000_buffer));
  1558. }
  1559. /**
  1560. * e1000_clean_tx_ring - Free Tx Buffers
  1561. * @adapter: board private structure
  1562. * @tx_ring: ring to be cleaned
  1563. **/
  1564. static void
  1565. e1000_clean_tx_ring(struct e1000_adapter *adapter,
  1566. struct e1000_tx_ring *tx_ring)
  1567. {
  1568. struct e1000_buffer *buffer_info;
  1569. unsigned long size;
  1570. unsigned int i;
  1571. /* Free all the Tx ring sk_buffs */
  1572. for (i = 0; i < tx_ring->count; i++) {
  1573. buffer_info = &tx_ring->buffer_info[i];
  1574. e1000_unmap_and_free_tx_resource(adapter, buffer_info);
  1575. }
  1576. size = sizeof(struct e1000_buffer) * tx_ring->count;
  1577. memset(tx_ring->buffer_info, 0, size);
  1578. /* Zero out the descriptor ring */
  1579. memset(tx_ring->desc, 0, tx_ring->size);
  1580. tx_ring->next_to_use = 0;
  1581. tx_ring->next_to_clean = 0;
  1582. tx_ring->last_tx_tso = 0;
  1583. writel(0, adapter->hw.hw_addr + tx_ring->tdh);
  1584. writel(0, adapter->hw.hw_addr + tx_ring->tdt);
  1585. }
  1586. /**
  1587. * e1000_clean_all_tx_rings - Free Tx Buffers for all queues
  1588. * @adapter: board private structure
  1589. **/
  1590. static void
  1591. e1000_clean_all_tx_rings(struct e1000_adapter *adapter)
  1592. {
  1593. int i;
  1594. for (i = 0; i < adapter->num_tx_queues; i++)
  1595. e1000_clean_tx_ring(adapter, &adapter->tx_ring[i]);
  1596. }
  1597. /**
  1598. * e1000_free_rx_resources - Free Rx Resources
  1599. * @adapter: board private structure
  1600. * @rx_ring: ring to clean the resources from
  1601. *
  1602. * Free all receive software resources
  1603. **/
  1604. static void
  1605. e1000_free_rx_resources(struct e1000_adapter *adapter,
  1606. struct e1000_rx_ring *rx_ring)
  1607. {
  1608. struct pci_dev *pdev = adapter->pdev;
  1609. e1000_clean_rx_ring(adapter, rx_ring);
  1610. vfree(rx_ring->buffer_info);
  1611. rx_ring->buffer_info = NULL;
  1612. kfree(rx_ring->ps_page);
  1613. rx_ring->ps_page = NULL;
  1614. kfree(rx_ring->ps_page_dma);
  1615. rx_ring->ps_page_dma = NULL;
  1616. pci_free_consistent(pdev, rx_ring->size, rx_ring->desc, rx_ring->dma);
  1617. rx_ring->desc = NULL;
  1618. }
  1619. /**
  1620. * e1000_free_all_rx_resources - Free Rx Resources for All Queues
  1621. * @adapter: board private structure
  1622. *
  1623. * Free all receive software resources
  1624. **/
  1625. void
  1626. e1000_free_all_rx_resources(struct e1000_adapter *adapter)
  1627. {
  1628. int i;
  1629. for (i = 0; i < adapter->num_rx_queues; i++)
  1630. e1000_free_rx_resources(adapter, &adapter->rx_ring[i]);
  1631. }
  1632. /**
  1633. * e1000_clean_rx_ring - Free Rx Buffers per Queue
  1634. * @adapter: board private structure
  1635. * @rx_ring: ring to free buffers from
  1636. **/
  1637. static void
  1638. e1000_clean_rx_ring(struct e1000_adapter *adapter,
  1639. struct e1000_rx_ring *rx_ring)
  1640. {
  1641. struct e1000_buffer *buffer_info;
  1642. struct e1000_ps_page *ps_page;
  1643. struct e1000_ps_page_dma *ps_page_dma;
  1644. struct pci_dev *pdev = adapter->pdev;
  1645. unsigned long size;
  1646. unsigned int i, j;
  1647. /* Free all the Rx ring sk_buffs */
  1648. for (i = 0; i < rx_ring->count; i++) {
  1649. buffer_info = &rx_ring->buffer_info[i];
  1650. if (buffer_info->skb) {
  1651. pci_unmap_single(pdev,
  1652. buffer_info->dma,
  1653. buffer_info->length,
  1654. PCI_DMA_FROMDEVICE);
  1655. dev_kfree_skb(buffer_info->skb);
  1656. buffer_info->skb = NULL;
  1657. }
  1658. ps_page = &rx_ring->ps_page[i];
  1659. ps_page_dma = &rx_ring->ps_page_dma[i];
  1660. for (j = 0; j < adapter->rx_ps_pages; j++) {
  1661. if (!ps_page->ps_page[j]) break;
  1662. pci_unmap_page(pdev,
  1663. ps_page_dma->ps_page_dma[j],
  1664. PAGE_SIZE, PCI_DMA_FROMDEVICE);
  1665. ps_page_dma->ps_page_dma[j] = 0;
  1666. put_page(ps_page->ps_page[j]);
  1667. ps_page->ps_page[j] = NULL;
  1668. }
  1669. }
  1670. size = sizeof(struct e1000_buffer) * rx_ring->count;
  1671. memset(rx_ring->buffer_info, 0, size);
  1672. size = sizeof(struct e1000_ps_page) * rx_ring->count;
  1673. memset(rx_ring->ps_page, 0, size);
  1674. size = sizeof(struct e1000_ps_page_dma) * rx_ring->count;
  1675. memset(rx_ring->ps_page_dma, 0, size);
  1676. /* Zero out the descriptor ring */
  1677. memset(rx_ring->desc, 0, rx_ring->size);
  1678. rx_ring->next_to_clean = 0;
  1679. rx_ring->next_to_use = 0;
  1680. writel(0, adapter->hw.hw_addr + rx_ring->rdh);
  1681. writel(0, adapter->hw.hw_addr + rx_ring->rdt);
  1682. }
  1683. /**
  1684. * e1000_clean_all_rx_rings - Free Rx Buffers for all queues
  1685. * @adapter: board private structure
  1686. **/
  1687. static void
  1688. e1000_clean_all_rx_rings(struct e1000_adapter *adapter)
  1689. {
  1690. int i;
  1691. for (i = 0; i < adapter->num_rx_queues; i++)
  1692. e1000_clean_rx_ring(adapter, &adapter->rx_ring[i]);
  1693. }
  1694. /* The 82542 2.0 (revision 2) needs to have the receive unit in reset
  1695. * and memory write and invalidate disabled for certain operations
  1696. */
  1697. static void
  1698. e1000_enter_82542_rst(struct e1000_adapter *adapter)
  1699. {
  1700. struct net_device *netdev = adapter->netdev;
  1701. uint32_t rctl;
  1702. e1000_pci_clear_mwi(&adapter->hw);
  1703. rctl = E1000_READ_REG(&adapter->hw, RCTL);
  1704. rctl |= E1000_RCTL_RST;
  1705. E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
  1706. E1000_WRITE_FLUSH(&adapter->hw);
  1707. mdelay(5);
  1708. if (netif_running(netdev))
  1709. e1000_clean_all_rx_rings(adapter);
  1710. }
  1711. static void
  1712. e1000_leave_82542_rst(struct e1000_adapter *adapter)
  1713. {
  1714. struct net_device *netdev = adapter->netdev;
  1715. uint32_t rctl;
  1716. rctl = E1000_READ_REG(&adapter->hw, RCTL);
  1717. rctl &= ~E1000_RCTL_RST;
  1718. E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
  1719. E1000_WRITE_FLUSH(&adapter->hw);
  1720. mdelay(5);
  1721. if (adapter->hw.pci_cmd_word & PCI_COMMAND_INVALIDATE)
  1722. e1000_pci_set_mwi(&adapter->hw);
  1723. if (netif_running(netdev)) {
  1724. /* No need to loop, because 82542 supports only 1 queue */
  1725. struct e1000_rx_ring *ring = &adapter->rx_ring[0];
  1726. e1000_configure_rx(adapter);
  1727. adapter->alloc_rx_buf(adapter, ring, E1000_DESC_UNUSED(ring));
  1728. }
  1729. }
  1730. /**
  1731. * e1000_set_mac - Change the Ethernet Address of the NIC
  1732. * @netdev: network interface device structure
  1733. * @p: pointer to an address structure
  1734. *
  1735. * Returns 0 on success, negative on failure
  1736. **/
  1737. static int
  1738. e1000_set_mac(struct net_device *netdev, void *p)
  1739. {
  1740. struct e1000_adapter *adapter = netdev_priv(netdev);
  1741. struct sockaddr *addr = p;
  1742. if (!is_valid_ether_addr(addr->sa_data))
  1743. return -EADDRNOTAVAIL;
  1744. /* 82542 2.0 needs to be in reset to write receive address registers */
  1745. if (adapter->hw.mac_type == e1000_82542_rev2_0)
  1746. e1000_enter_82542_rst(adapter);
  1747. memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
  1748. memcpy(adapter->hw.mac_addr, addr->sa_data, netdev->addr_len);
  1749. e1000_rar_set(&adapter->hw, adapter->hw.mac_addr, 0);
  1750. /* With 82571 controllers, LAA may be overwritten (with the default)
  1751. * due to controller reset from the other port. */
  1752. if (adapter->hw.mac_type == e1000_82571) {
  1753. /* activate the work around */
  1754. adapter->hw.laa_is_present = 1;
  1755. /* Hold a copy of the LAA in RAR[14] This is done so that
  1756. * between the time RAR[0] gets clobbered and the time it
  1757. * gets fixed (in e1000_watchdog), the actual LAA is in one
  1758. * of the RARs and no incoming packets directed to this port
  1759. * are dropped. Eventaully the LAA will be in RAR[0] and
  1760. * RAR[14] */
  1761. e1000_rar_set(&adapter->hw, adapter->hw.mac_addr,
  1762. E1000_RAR_ENTRIES - 1);
  1763. }
  1764. if (adapter->hw.mac_type == e1000_82542_rev2_0)
  1765. e1000_leave_82542_rst(adapter);
  1766. return 0;
  1767. }
  1768. /**
  1769. * e1000_set_multi - Multicast and Promiscuous mode set
  1770. * @netdev: network interface device structure
  1771. *
  1772. * The set_multi entry point is called whenever the multicast address
  1773. * list or the network interface flags are updated. This routine is
  1774. * responsible for configuring the hardware for proper multicast,
  1775. * promiscuous mode, and all-multi behavior.
  1776. **/
  1777. static void
  1778. e1000_set_multi(struct net_device *netdev)
  1779. {
  1780. struct e1000_adapter *adapter = netdev_priv(netdev);
  1781. struct e1000_hw *hw = &adapter->hw;
  1782. struct dev_mc_list *mc_ptr;
  1783. uint32_t rctl;
  1784. uint32_t hash_value;
  1785. int i, rar_entries = E1000_RAR_ENTRIES;
  1786. /* reserve RAR[14] for LAA over-write work-around */
  1787. if (adapter->hw.mac_type == e1000_82571)
  1788. rar_entries--;
  1789. /* Check for Promiscuous and All Multicast modes */
  1790. rctl = E1000_READ_REG(hw, RCTL);
  1791. if (netdev->flags & IFF_PROMISC) {
  1792. rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
  1793. } else if (netdev->flags & IFF_ALLMULTI) {
  1794. rctl |= E1000_RCTL_MPE;
  1795. rctl &= ~E1000_RCTL_UPE;
  1796. } else {
  1797. rctl &= ~(E1000_RCTL_UPE | E1000_RCTL_MPE);
  1798. }
  1799. E1000_WRITE_REG(hw, RCTL, rctl);
  1800. /* 82542 2.0 needs to be in reset to write receive address registers */
  1801. if (hw->mac_type == e1000_82542_rev2_0)
  1802. e1000_enter_82542_rst(adapter);
  1803. /* load the first 14 multicast address into the exact filters 1-14
  1804. * RAR 0 is used for the station MAC adddress
  1805. * if there are not 14 addresses, go ahead and clear the filters
  1806. * -- with 82571 controllers only 0-13 entries are filled here
  1807. */
  1808. mc_ptr = netdev->mc_list;
  1809. for (i = 1; i < rar_entries; i++) {
  1810. if (mc_ptr) {
  1811. e1000_rar_set(hw, mc_ptr->dmi_addr, i);
  1812. mc_ptr = mc_ptr->next;
  1813. } else {
  1814. E1000_WRITE_REG_ARRAY(hw, RA, i << 1, 0);
  1815. E1000_WRITE_REG_ARRAY(hw, RA, (i << 1) + 1, 0);
  1816. }
  1817. }
  1818. /* clear the old settings from the multicast hash table */
  1819. for (i = 0; i < E1000_NUM_MTA_REGISTERS; i++)
  1820. E1000_WRITE_REG_ARRAY(hw, MTA, i, 0);
  1821. /* load any remaining addresses into the hash table */
  1822. for (; mc_ptr; mc_ptr = mc_ptr->next) {
  1823. hash_value = e1000_hash_mc_addr(hw, mc_ptr->dmi_addr);
  1824. e1000_mta_set(hw, hash_value);
  1825. }
  1826. if (hw->mac_type == e1000_82542_rev2_0)
  1827. e1000_leave_82542_rst(adapter);
  1828. }
  1829. /* Need to wait a few seconds after link up to get diagnostic information from
  1830. * the phy */
  1831. static void
  1832. e1000_update_phy_info(unsigned long data)
  1833. {
  1834. struct e1000_adapter *adapter = (struct e1000_adapter *) data;
  1835. e1000_phy_get_info(&adapter->hw, &adapter->phy_info);
  1836. }
  1837. /**
  1838. * e1000_82547_tx_fifo_stall - Timer Call-back
  1839. * @data: pointer to adapter cast into an unsigned long
  1840. **/
  1841. static void
  1842. e1000_82547_tx_fifo_stall(unsigned long data)
  1843. {
  1844. struct e1000_adapter *adapter = (struct e1000_adapter *) data;
  1845. struct net_device *netdev = adapter->netdev;
  1846. uint32_t tctl;
  1847. if (atomic_read(&adapter->tx_fifo_stall)) {
  1848. if ((E1000_READ_REG(&adapter->hw, TDT) ==
  1849. E1000_READ_REG(&adapter->hw, TDH)) &&
  1850. (E1000_READ_REG(&adapter->hw, TDFT) ==
  1851. E1000_READ_REG(&adapter->hw, TDFH)) &&
  1852. (E1000_READ_REG(&adapter->hw, TDFTS) ==
  1853. E1000_READ_REG(&adapter->hw, TDFHS))) {
  1854. tctl = E1000_READ_REG(&adapter->hw, TCTL);
  1855. E1000_WRITE_REG(&adapter->hw, TCTL,
  1856. tctl & ~E1000_TCTL_EN);
  1857. E1000_WRITE_REG(&adapter->hw, TDFT,
  1858. adapter->tx_head_addr);
  1859. E1000_WRITE_REG(&adapter->hw, TDFH,
  1860. adapter->tx_head_addr);
  1861. E1000_WRITE_REG(&adapter->hw, TDFTS,
  1862. adapter->tx_head_addr);
  1863. E1000_WRITE_REG(&adapter->hw, TDFHS,
  1864. adapter->tx_head_addr);
  1865. E1000_WRITE_REG(&adapter->hw, TCTL, tctl);
  1866. E1000_WRITE_FLUSH(&adapter->hw);
  1867. adapter->tx_fifo_head = 0;
  1868. atomic_set(&adapter->tx_fifo_stall, 0);
  1869. netif_wake_queue(netdev);
  1870. } else {
  1871. mod_timer(&adapter->tx_fifo_stall_timer, jiffies + 1);
  1872. }
  1873. }
  1874. }
  1875. /**
  1876. * e1000_watchdog - Timer Call-back
  1877. * @data: pointer to adapter cast into an unsigned long
  1878. **/
  1879. static void
  1880. e1000_watchdog(unsigned long data)
  1881. {
  1882. struct e1000_adapter *adapter = (struct e1000_adapter *) data;
  1883. struct net_device *netdev = adapter->netdev;
  1884. struct e1000_tx_ring *txdr = adapter->tx_ring;
  1885. uint32_t link, tctl;
  1886. e1000_check_for_link(&adapter->hw);
  1887. if (adapter->hw.mac_type == e1000_82573) {
  1888. e1000_enable_tx_pkt_filtering(&adapter->hw);
  1889. if (adapter->mng_vlan_id != adapter->hw.mng_cookie.vlan_id)
  1890. e1000_update_mng_vlan(adapter);
  1891. }
  1892. if ((adapter->hw.media_type == e1000_media_type_internal_serdes) &&
  1893. !(E1000_READ_REG(&adapter->hw, TXCW) & E1000_TXCW_ANE))
  1894. link = !adapter->hw.serdes_link_down;
  1895. else
  1896. link = E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_LU;
  1897. if (link) {
  1898. if (!netif_carrier_ok(netdev)) {
  1899. boolean_t txb2b = 1;
  1900. e1000_get_speed_and_duplex(&adapter->hw,
  1901. &adapter->link_speed,
  1902. &adapter->link_duplex);
  1903. DPRINTK(LINK, INFO, "NIC Link is Up %d Mbps %s\n",
  1904. adapter->link_speed,
  1905. adapter->link_duplex == FULL_DUPLEX ?
  1906. "Full Duplex" : "Half Duplex");
  1907. /* tweak tx_queue_len according to speed/duplex
  1908. * and adjust the timeout factor */
  1909. netdev->tx_queue_len = adapter->tx_queue_len;
  1910. adapter->tx_timeout_factor = 1;
  1911. switch (adapter->link_speed) {
  1912. case SPEED_10:
  1913. txb2b = 0;
  1914. netdev->tx_queue_len = 10;
  1915. adapter->tx_timeout_factor = 8;
  1916. break;
  1917. case SPEED_100:
  1918. txb2b = 0;
  1919. netdev->tx_queue_len = 100;
  1920. /* maybe add some timeout factor ? */
  1921. break;
  1922. }
  1923. if ((adapter->hw.mac_type == e1000_82571 ||
  1924. adapter->hw.mac_type == e1000_82572) &&
  1925. txb2b == 0) {
  1926. #define SPEED_MODE_BIT (1 << 21)
  1927. uint32_t tarc0;
  1928. tarc0 = E1000_READ_REG(&adapter->hw, TARC0);
  1929. tarc0 &= ~SPEED_MODE_BIT;
  1930. E1000_WRITE_REG(&adapter->hw, TARC0, tarc0);
  1931. }
  1932. #ifdef NETIF_F_TSO
  1933. /* disable TSO for pcie and 10/100 speeds, to avoid
  1934. * some hardware issues */
  1935. if (!adapter->tso_force &&
  1936. adapter->hw.bus_type == e1000_bus_type_pci_express){
  1937. switch (adapter->link_speed) {
  1938. case SPEED_10:
  1939. case SPEED_100:
  1940. DPRINTK(PROBE,INFO,
  1941. "10/100 speed: disabling TSO\n");
  1942. netdev->features &= ~NETIF_F_TSO;
  1943. break;
  1944. case SPEED_1000:
  1945. netdev->features |= NETIF_F_TSO;
  1946. break;
  1947. default:
  1948. /* oops */
  1949. break;
  1950. }
  1951. }
  1952. #endif
  1953. /* enable transmits in the hardware, need to do this
  1954. * after setting TARC0 */
  1955. tctl = E1000_READ_REG(&adapter->hw, TCTL);
  1956. tctl |= E1000_TCTL_EN;
  1957. E1000_WRITE_REG(&adapter->hw, TCTL, tctl);
  1958. netif_carrier_on(netdev);
  1959. netif_wake_queue(netdev);
  1960. mod_timer(&adapter->phy_info_timer, jiffies + 2 * HZ);
  1961. adapter->smartspeed = 0;
  1962. }
  1963. } else {
  1964. if (netif_carrier_ok(netdev)) {
  1965. adapter->link_speed = 0;
  1966. adapter->link_duplex = 0;
  1967. DPRINTK(LINK, INFO, "NIC Link is Down\n");
  1968. netif_carrier_off(netdev);
  1969. netif_stop_queue(netdev);
  1970. mod_timer(&adapter->phy_info_timer, jiffies + 2 * HZ);
  1971. /* 80003ES2LAN workaround--
  1972. * For packet buffer work-around on link down event;
  1973. * disable receives in the ISR and
  1974. * reset device here in the watchdog
  1975. */
  1976. if (adapter->hw.mac_type == e1000_80003es2lan) {
  1977. /* reset device */
  1978. schedule_work(&adapter->reset_task);
  1979. }
  1980. }
  1981. e1000_smartspeed(adapter);
  1982. }
  1983. e1000_update_stats(adapter);
  1984. adapter->hw.tx_packet_delta = adapter->stats.tpt - adapter->tpt_old;
  1985. adapter->tpt_old = adapter->stats.tpt;
  1986. adapter->hw.collision_delta = adapter->stats.colc - adapter->colc_old;
  1987. adapter->colc_old = adapter->stats.colc;
  1988. adapter->gorcl = adapter->stats.gorcl - adapter->gorcl_old;
  1989. adapter->gorcl_old = adapter->stats.gorcl;
  1990. adapter->gotcl = adapter->stats.gotcl - adapter->gotcl_old;
  1991. adapter->gotcl_old = adapter->stats.gotcl;
  1992. e1000_update_adaptive(&adapter->hw);
  1993. if (!netif_carrier_ok(netdev)) {
  1994. if (E1000_DESC_UNUSED(txdr) + 1 < txdr->count) {
  1995. /* We've lost link, so the controller stops DMA,
  1996. * but we've got queued Tx work that's never going
  1997. * to get done, so reset controller to flush Tx.
  1998. * (Do the reset outside of interrupt context). */
  1999. adapter->tx_timeout_count++;
  2000. schedule_work(&adapter->reset_task);
  2001. }
  2002. }
  2003. /* Dynamic mode for Interrupt Throttle Rate (ITR) */
  2004. if (adapter->hw.mac_type >= e1000_82540 && adapter->itr == 1) {
  2005. /* Symmetric Tx/Rx gets a reduced ITR=2000; Total
  2006. * asymmetrical Tx or Rx gets ITR=8000; everyone
  2007. * else is between 2000-8000. */
  2008. uint32_t goc = (adapter->gotcl + adapter->gorcl) / 10000;
  2009. uint32_t dif = (adapter->gotcl > adapter->gorcl ?
  2010. adapter->gotcl - adapter->gorcl :
  2011. adapter->gorcl - adapter->gotcl) / 10000;
  2012. uint32_t itr = goc > 0 ? (dif * 6000 / goc + 2000) : 8000;
  2013. E1000_WRITE_REG(&adapter->hw, ITR, 1000000000 / (itr * 256));
  2014. }
  2015. /* Cause software interrupt to ensure rx ring is cleaned */
  2016. E1000_WRITE_REG(&adapter->hw, ICS, E1000_ICS_RXDMT0);
  2017. /* Force detection of hung controller every watchdog period */
  2018. adapter->detect_tx_hung = TRUE;
  2019. /* With 82571 controllers, LAA may be overwritten due to controller
  2020. * reset from the other port. Set the appropriate LAA in RAR[0] */
  2021. if (adapter->hw.mac_type == e1000_82571 && adapter->hw.laa_is_present)
  2022. e1000_rar_set(&adapter->hw, adapter->hw.mac_addr, 0);
  2023. /* Reset the timer */
  2024. mod_timer(&adapter->watchdog_timer, jiffies + 2 * HZ);
  2025. }
  2026. #define E1000_TX_FLAGS_CSUM 0x00000001
  2027. #define E1000_TX_FLAGS_VLAN 0x00000002
  2028. #define E1000_TX_FLAGS_TSO 0x00000004
  2029. #define E1000_TX_FLAGS_IPV4 0x00000008
  2030. #define E1000_TX_FLAGS_VLAN_MASK 0xffff0000
  2031. #define E1000_TX_FLAGS_VLAN_SHIFT 16
  2032. static int
  2033. e1000_tso(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
  2034. struct sk_buff *skb)
  2035. {
  2036. #ifdef NETIF_F_TSO
  2037. struct e1000_context_desc *context_desc;
  2038. struct e1000_buffer *buffer_info;
  2039. unsigned int i;
  2040. uint32_t cmd_length = 0;
  2041. uint16_t ipcse = 0, tucse, mss;
  2042. uint8_t ipcss, ipcso, tucss, tucso, hdr_len;
  2043. int err;
  2044. if (skb_shinfo(skb)->tso_size) {
  2045. if (skb_header_cloned(skb)) {
  2046. err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
  2047. if (err)
  2048. return err;
  2049. }
  2050. hdr_len = ((skb->h.raw - skb->data) + (skb->h.th->doff << 2));
  2051. mss = skb_shinfo(skb)->tso_size;
  2052. if (skb->protocol == htons(ETH_P_IP)) {
  2053. skb->nh.iph->tot_len = 0;
  2054. skb->nh.iph->check = 0;
  2055. skb->h.th->check =
  2056. ~csum_tcpudp_magic(skb->nh.iph->saddr,
  2057. skb->nh.iph->daddr,
  2058. 0,
  2059. IPPROTO_TCP,
  2060. 0);
  2061. cmd_length = E1000_TXD_CMD_IP;
  2062. ipcse = skb->h.raw - skb->data - 1;
  2063. #ifdef NETIF_F_TSO_IPV6
  2064. } else if (skb->protocol == ntohs(ETH_P_IPV6)) {
  2065. skb->nh.ipv6h->payload_len = 0;
  2066. skb->h.th->check =
  2067. ~csum_ipv6_magic(&skb->nh.ipv6h->saddr,
  2068. &skb->nh.ipv6h->daddr,
  2069. 0,
  2070. IPPROTO_TCP,
  2071. 0);
  2072. ipcse = 0;
  2073. #endif
  2074. }
  2075. ipcss = skb->nh.raw - skb->data;
  2076. ipcso = (void *)&(skb->nh.iph->check) - (void *)skb->data;
  2077. tucss = skb->h.raw - skb->data;
  2078. tucso = (void *)&(skb->h.th->check) - (void *)skb->data;
  2079. tucse = 0;
  2080. cmd_length |= (E1000_TXD_CMD_DEXT | E1000_TXD_CMD_TSE |
  2081. E1000_TXD_CMD_TCP | (skb->len - (hdr_len)));
  2082. i = tx_ring->next_to_use;
  2083. context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
  2084. buffer_info = &tx_ring->buffer_info[i];
  2085. context_desc->lower_setup.ip_fields.ipcss = ipcss;
  2086. context_desc->lower_setup.ip_fields.ipcso = ipcso;
  2087. context_desc->lower_setup.ip_fields.ipcse = cpu_to_le16(ipcse);
  2088. context_desc->upper_setup.tcp_fields.tucss = tucss;
  2089. context_desc->upper_setup.tcp_fields.tucso = tucso;
  2090. context_desc->upper_setup.tcp_fields.tucse = cpu_to_le16(tucse);
  2091. context_desc->tcp_seg_setup.fields.mss = cpu_to_le16(mss);
  2092. context_desc->tcp_seg_setup.fields.hdr_len = hdr_len;
  2093. context_desc->cmd_and_length = cpu_to_le32(cmd_length);
  2094. buffer_info->time_stamp = jiffies;
  2095. if (++i == tx_ring->count) i = 0;
  2096. tx_ring->next_to_use = i;
  2097. return TRUE;
  2098. }
  2099. #endif
  2100. return FALSE;
  2101. }
  2102. static boolean_t
  2103. e1000_tx_csum(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
  2104. struct sk_buff *skb)
  2105. {
  2106. struct e1000_context_desc *context_desc;
  2107. struct e1000_buffer *buffer_info;
  2108. unsigned int i;
  2109. uint8_t css;
  2110. if (likely(skb->ip_summed == CHECKSUM_HW)) {
  2111. css = skb->h.raw - skb->data;
  2112. i = tx_ring->next_to_use;
  2113. buffer_info = &tx_ring->buffer_info[i];
  2114. context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
  2115. context_desc->upper_setup.tcp_fields.tucss = css;
  2116. context_desc->upper_setup.tcp_fields.tucso = css + skb->csum;
  2117. context_desc->upper_setup.tcp_fields.tucse = 0;
  2118. context_desc->tcp_seg_setup.data = 0;
  2119. context_desc->cmd_and_length = cpu_to_le32(E1000_TXD_CMD_DEXT);
  2120. buffer_info->time_stamp = jiffies;
  2121. if (unlikely(++i == tx_ring->count)) i = 0;
  2122. tx_ring->next_to_use = i;
  2123. return TRUE;
  2124. }
  2125. return FALSE;
  2126. }
  2127. #define E1000_MAX_TXD_PWR 12
  2128. #define E1000_MAX_DATA_PER_TXD (1<<E1000_MAX_TXD_PWR)
  2129. static int
  2130. e1000_tx_map(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
  2131. struct sk_buff *skb, unsigned int first, unsigned int max_per_txd,
  2132. unsigned int nr_frags, unsigned int mss)
  2133. {
  2134. struct e1000_buffer *buffer_info;
  2135. unsigned int len = skb->len;
  2136. unsigned int offset = 0, size, count = 0, i;
  2137. unsigned int f;
  2138. len -= skb->data_len;
  2139. i = tx_ring->next_to_use;
  2140. while (len) {
  2141. buffer_info = &tx_ring->buffer_info[i];
  2142. size = min(len, max_per_txd);
  2143. #ifdef NETIF_F_TSO
  2144. /* Workaround for Controller erratum --
  2145. * descriptor for non-tso packet in a linear SKB that follows a
  2146. * tso gets written back prematurely before the data is fully
  2147. * DMA'd to the controller */
  2148. if (!skb->data_len && tx_ring->last_tx_tso &&
  2149. !skb_shinfo(skb)->tso_size) {
  2150. tx_ring->last_tx_tso = 0;
  2151. size -= 4;
  2152. }
  2153. /* Workaround for premature desc write-backs
  2154. * in TSO mode. Append 4-byte sentinel desc */
  2155. if (unlikely(mss && !nr_frags && size == len && size > 8))
  2156. size -= 4;
  2157. #endif
  2158. /* work-around for errata 10 and it applies
  2159. * to all controllers in PCI-X mode
  2160. * The fix is to make sure that the first descriptor of a
  2161. * packet is smaller than 2048 - 16 - 16 (or 2016) bytes
  2162. */
  2163. if (unlikely((adapter->hw.bus_type == e1000_bus_type_pcix) &&
  2164. (size > 2015) && count == 0))
  2165. size = 2015;
  2166. /* Workaround for potential 82544 hang in PCI-X. Avoid
  2167. * terminating buffers within evenly-aligned dwords. */
  2168. if (unlikely(adapter->pcix_82544 &&
  2169. !((unsigned long)(skb->data + offset + size - 1) & 4) &&
  2170. size > 4))
  2171. size -= 4;
  2172. buffer_info->length = size;
  2173. buffer_info->dma =
  2174. pci_map_single(adapter->pdev,
  2175. skb->data + offset,
  2176. size,
  2177. PCI_DMA_TODEVICE);
  2178. buffer_info->time_stamp = jiffies;
  2179. len -= size;
  2180. offset += size;
  2181. count++;
  2182. if (unlikely(++i == tx_ring->count)) i = 0;
  2183. }
  2184. for (f = 0; f < nr_frags; f++) {
  2185. struct skb_frag_struct *frag;
  2186. frag = &skb_shinfo(skb)->frags[f];
  2187. len = frag->size;
  2188. offset = frag->page_offset;
  2189. while (len) {
  2190. buffer_info = &tx_ring->buffer_info[i];
  2191. size = min(len, max_per_txd);
  2192. #ifdef NETIF_F_TSO
  2193. /* Workaround for premature desc write-backs
  2194. * in TSO mode. Append 4-byte sentinel desc */
  2195. if (unlikely(mss && f == (nr_frags-1) && size == len && size > 8))
  2196. size -= 4;
  2197. #endif
  2198. /* Workaround for potential 82544 hang in PCI-X.
  2199. * Avoid terminating buffers within evenly-aligned
  2200. * dwords. */
  2201. if (unlikely(adapter->pcix_82544 &&
  2202. !((unsigned long)(frag->page+offset+size-1) & 4) &&
  2203. size > 4))
  2204. size -= 4;
  2205. buffer_info->length = size;
  2206. buffer_info->dma =
  2207. pci_map_page(adapter->pdev,
  2208. frag->page,
  2209. offset,
  2210. size,
  2211. PCI_DMA_TODEVICE);
  2212. buffer_info->time_stamp = jiffies;
  2213. len -= size;
  2214. offset += size;
  2215. count++;
  2216. if (unlikely(++i == tx_ring->count)) i = 0;
  2217. }
  2218. }
  2219. i = (i == 0) ? tx_ring->count - 1 : i - 1;
  2220. tx_ring->buffer_info[i].skb = skb;
  2221. tx_ring->buffer_info[first].next_to_watch = i;
  2222. return count;
  2223. }
  2224. static void
  2225. e1000_tx_queue(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
  2226. int tx_flags, int count)
  2227. {
  2228. struct e1000_tx_desc *tx_desc = NULL;
  2229. struct e1000_buffer *buffer_info;
  2230. uint32_t txd_upper = 0, txd_lower = E1000_TXD_CMD_IFCS;
  2231. unsigned int i;
  2232. if (likely(tx_flags & E1000_TX_FLAGS_TSO)) {
  2233. txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D |
  2234. E1000_TXD_CMD_TSE;
  2235. txd_upper |= E1000_TXD_POPTS_TXSM << 8;
  2236. if (likely(tx_flags & E1000_TX_FLAGS_IPV4))
  2237. txd_upper |= E1000_TXD_POPTS_IXSM << 8;
  2238. }
  2239. if (likely(tx_flags & E1000_TX_FLAGS_CSUM)) {
  2240. txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D;
  2241. txd_upper |= E1000_TXD_POPTS_TXSM << 8;
  2242. }
  2243. if (unlikely(tx_flags & E1000_TX_FLAGS_VLAN)) {
  2244. txd_lower |= E1000_TXD_CMD_VLE;
  2245. txd_upper |= (tx_flags & E1000_TX_FLAGS_VLAN_MASK);
  2246. }
  2247. i = tx_ring->next_to_use;
  2248. while (count--) {
  2249. buffer_info = &tx_ring->buffer_info[i];
  2250. tx_desc = E1000_TX_DESC(*tx_ring, i);
  2251. tx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
  2252. tx_desc->lower.data =
  2253. cpu_to_le32(txd_lower | buffer_info->length);
  2254. tx_desc->upper.data = cpu_to_le32(txd_upper);
  2255. if (unlikely(++i == tx_ring->count)) i = 0;
  2256. }
  2257. tx_desc->lower.data |= cpu_to_le32(adapter->txd_cmd);
  2258. /* Force memory writes to complete before letting h/w
  2259. * know there are new descriptors to fetch. (Only
  2260. * applicable for weak-ordered memory model archs,
  2261. * such as IA-64). */
  2262. wmb();
  2263. tx_ring->next_to_use = i;
  2264. writel(i, adapter->hw.hw_addr + tx_ring->tdt);
  2265. }
  2266. /**
  2267. * 82547 workaround to avoid controller hang in half-duplex environment.
  2268. * The workaround is to avoid queuing a large packet that would span
  2269. * the internal Tx FIFO ring boundary by notifying the stack to resend
  2270. * the packet at a later time. This gives the Tx FIFO an opportunity to
  2271. * flush all packets. When that occurs, we reset the Tx FIFO pointers
  2272. * to the beginning of the Tx FIFO.
  2273. **/
  2274. #define E1000_FIFO_HDR 0x10
  2275. #define E1000_82547_PAD_LEN 0x3E0
  2276. static int
  2277. e1000_82547_fifo_workaround(struct e1000_adapter *adapter, struct sk_buff *skb)
  2278. {
  2279. uint32_t fifo_space = adapter->tx_fifo_size - adapter->tx_fifo_head;
  2280. uint32_t skb_fifo_len = skb->len + E1000_FIFO_HDR;
  2281. E1000_ROUNDUP(skb_fifo_len, E1000_FIFO_HDR);
  2282. if (adapter->link_duplex != HALF_DUPLEX)
  2283. goto no_fifo_stall_required;
  2284. if (atomic_read(&adapter->tx_fifo_stall))
  2285. return 1;
  2286. if (skb_fifo_len >= (E1000_82547_PAD_LEN + fifo_space)) {
  2287. atomic_set(&adapter->tx_fifo_stall, 1);
  2288. return 1;
  2289. }
  2290. no_fifo_stall_required:
  2291. adapter->tx_fifo_head += skb_fifo_len;
  2292. if (adapter->tx_fifo_head >= adapter->tx_fifo_size)
  2293. adapter->tx_fifo_head -= adapter->tx_fifo_size;
  2294. return 0;
  2295. }
  2296. #define MINIMUM_DHCP_PACKET_SIZE 282
  2297. static int
  2298. e1000_transfer_dhcp_info(struct e1000_adapter *adapter, struct sk_buff *skb)
  2299. {
  2300. struct e1000_hw *hw = &adapter->hw;
  2301. uint16_t length, offset;
  2302. if (vlan_tx_tag_present(skb)) {
  2303. if (!((vlan_tx_tag_get(skb) == adapter->hw.mng_cookie.vlan_id) &&
  2304. ( adapter->hw.mng_cookie.status &
  2305. E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) )
  2306. return 0;
  2307. }
  2308. if (skb->len > MINIMUM_DHCP_PACKET_SIZE) {
  2309. struct ethhdr *eth = (struct ethhdr *) skb->data;
  2310. if ((htons(ETH_P_IP) == eth->h_proto)) {
  2311. const struct iphdr *ip =
  2312. (struct iphdr *)((uint8_t *)skb->data+14);
  2313. if (IPPROTO_UDP == ip->protocol) {
  2314. struct udphdr *udp =
  2315. (struct udphdr *)((uint8_t *)ip +
  2316. (ip->ihl << 2));
  2317. if (ntohs(udp->dest) == 67) {
  2318. offset = (uint8_t *)udp + 8 - skb->data;
  2319. length = skb->len - offset;
  2320. return e1000_mng_write_dhcp_info(hw,
  2321. (uint8_t *)udp + 8,
  2322. length);
  2323. }
  2324. }
  2325. }
  2326. }
  2327. return 0;
  2328. }
  2329. #define TXD_USE_COUNT(S, X) (((S) >> (X)) + 1 )
  2330. static int
  2331. e1000_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
  2332. {
  2333. struct e1000_adapter *adapter = netdev_priv(netdev);
  2334. struct e1000_tx_ring *tx_ring;
  2335. unsigned int first, max_per_txd = E1000_MAX_DATA_PER_TXD;
  2336. unsigned int max_txd_pwr = E1000_MAX_TXD_PWR;
  2337. unsigned int tx_flags = 0;
  2338. unsigned int len = skb->len;
  2339. unsigned long flags;
  2340. unsigned int nr_frags = 0;
  2341. unsigned int mss = 0;
  2342. int count = 0;
  2343. int tso;
  2344. unsigned int f;
  2345. len -= skb->data_len;
  2346. tx_ring = adapter->tx_ring;
  2347. if (unlikely(skb->len <= 0)) {
  2348. dev_kfree_skb_any(skb);
  2349. return NETDEV_TX_OK;
  2350. }
  2351. #ifdef NETIF_F_TSO
  2352. mss = skb_shinfo(skb)->tso_size;
  2353. /* The controller does a simple calculation to
  2354. * make sure there is enough room in the FIFO before
  2355. * initiating the DMA for each buffer. The calc is:
  2356. * 4 = ceil(buffer len/mss). To make sure we don't
  2357. * overrun the FIFO, adjust the max buffer len if mss
  2358. * drops. */
  2359. if (mss) {
  2360. uint8_t hdr_len;
  2361. max_per_txd = min(mss << 2, max_per_txd);
  2362. max_txd_pwr = fls(max_per_txd) - 1;
  2363. /* TSO Workaround for 82571/2/3 Controllers -- if skb->data
  2364. * points to just header, pull a few bytes of payload from
  2365. * frags into skb->data */
  2366. hdr_len = ((skb->h.raw - skb->data) + (skb->h.th->doff << 2));
  2367. if (skb->data_len && (hdr_len == (skb->len - skb->data_len))) {
  2368. switch (adapter->hw.mac_type) {
  2369. unsigned int pull_size;
  2370. case e1000_82571:
  2371. case e1000_82572:
  2372. case e1000_82573:
  2373. pull_size = min((unsigned int)4, skb->data_len);
  2374. if (!__pskb_pull_tail(skb, pull_size)) {
  2375. printk(KERN_ERR
  2376. "__pskb_pull_tail failed.\n");
  2377. dev_kfree_skb_any(skb);
  2378. return NETDEV_TX_OK;
  2379. }
  2380. len = skb->len - skb->data_len;
  2381. break;
  2382. default:
  2383. /* do nothing */
  2384. break;
  2385. }
  2386. }
  2387. }
  2388. /* reserve a descriptor for the offload context */
  2389. if ((mss) || (skb->ip_summed == CHECKSUM_HW))
  2390. count++;
  2391. count++;
  2392. #else
  2393. if (skb->ip_summed == CHECKSUM_HW)
  2394. count++;
  2395. #endif
  2396. #ifdef NETIF_F_TSO
  2397. /* Controller Erratum workaround */
  2398. if (!skb->data_len && tx_ring->last_tx_tso &&
  2399. !skb_shinfo(skb)->tso_size)
  2400. count++;
  2401. #endif
  2402. count += TXD_USE_COUNT(len, max_txd_pwr);
  2403. if (adapter->pcix_82544)
  2404. count++;
  2405. /* work-around for errata 10 and it applies to all controllers
  2406. * in PCI-X mode, so add one more descriptor to the count
  2407. */
  2408. if (unlikely((adapter->hw.bus_type == e1000_bus_type_pcix) &&
  2409. (len > 2015)))
  2410. count++;
  2411. nr_frags = skb_shinfo(skb)->nr_frags;
  2412. for (f = 0; f < nr_frags; f++)
  2413. count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size,
  2414. max_txd_pwr);
  2415. if (adapter->pcix_82544)
  2416. count += nr_frags;
  2417. if (adapter->hw.tx_pkt_filtering &&
  2418. (adapter->hw.mac_type == e1000_82573))
  2419. e1000_transfer_dhcp_info(adapter, skb);
  2420. local_irq_save(flags);
  2421. if (!spin_trylock(&tx_ring->tx_lock)) {
  2422. /* Collision - tell upper layer to requeue */
  2423. local_irq_restore(flags);
  2424. return NETDEV_TX_LOCKED;
  2425. }
  2426. /* need: count + 2 desc gap to keep tail from touching
  2427. * head, otherwise try next time */
  2428. if (unlikely(E1000_DESC_UNUSED(tx_ring) < count + 2)) {
  2429. netif_stop_queue(netdev);
  2430. spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
  2431. return NETDEV_TX_BUSY;
  2432. }
  2433. if (unlikely(adapter->hw.mac_type == e1000_82547)) {
  2434. if (unlikely(e1000_82547_fifo_workaround(adapter, skb))) {
  2435. netif_stop_queue(netdev);
  2436. mod_timer(&adapter->tx_fifo_stall_timer, jiffies);
  2437. spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
  2438. return NETDEV_TX_BUSY;
  2439. }
  2440. }
  2441. if (unlikely(adapter->vlgrp && vlan_tx_tag_present(skb))) {
  2442. tx_flags |= E1000_TX_FLAGS_VLAN;
  2443. tx_flags |= (vlan_tx_tag_get(skb) << E1000_TX_FLAGS_VLAN_SHIFT);
  2444. }
  2445. first = tx_ring->next_to_use;
  2446. tso = e1000_tso(adapter, tx_ring, skb);
  2447. if (tso < 0) {
  2448. dev_kfree_skb_any(skb);
  2449. spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
  2450. return NETDEV_TX_OK;
  2451. }
  2452. if (likely(tso)) {
  2453. tx_ring->last_tx_tso = 1;
  2454. tx_flags |= E1000_TX_FLAGS_TSO;
  2455. } else if (likely(e1000_tx_csum(adapter, tx_ring, skb)))
  2456. tx_flags |= E1000_TX_FLAGS_CSUM;
  2457. /* Old method was to assume IPv4 packet by default if TSO was enabled.
  2458. * 82571 hardware supports TSO capabilities for IPv6 as well...
  2459. * no longer assume, we must. */
  2460. if (likely(skb->protocol == htons(ETH_P_IP)))
  2461. tx_flags |= E1000_TX_FLAGS_IPV4;
  2462. e1000_tx_queue(adapter, tx_ring, tx_flags,
  2463. e1000_tx_map(adapter, tx_ring, skb, first,
  2464. max_per_txd, nr_frags, mss));
  2465. netdev->trans_start = jiffies;
  2466. /* Make sure there is space in the ring for the next send. */
  2467. if (unlikely(E1000_DESC_UNUSED(tx_ring) < MAX_SKB_FRAGS + 2))
  2468. netif_stop_queue(netdev);
  2469. spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
  2470. return NETDEV_TX_OK;
  2471. }
  2472. /**
  2473. * e1000_tx_timeout - Respond to a Tx Hang
  2474. * @netdev: network interface device structure
  2475. **/
  2476. static void
  2477. e1000_tx_timeout(struct net_device *netdev)
  2478. {
  2479. struct e1000_adapter *adapter = netdev_priv(netdev);
  2480. /* Do the reset outside of interrupt context */
  2481. adapter->tx_timeout_count++;
  2482. schedule_work(&adapter->reset_task);
  2483. }
  2484. static void
  2485. e1000_reset_task(struct net_device *netdev)
  2486. {
  2487. struct e1000_adapter *adapter = netdev_priv(netdev);
  2488. e1000_reinit_locked(adapter);
  2489. }
  2490. /**
  2491. * e1000_get_stats - Get System Network Statistics
  2492. * @netdev: network interface device structure
  2493. *
  2494. * Returns the address of the device statistics structure.
  2495. * The statistics are actually updated from the timer callback.
  2496. **/
  2497. static struct net_device_stats *
  2498. e1000_get_stats(struct net_device *netdev)
  2499. {
  2500. struct e1000_adapter *adapter = netdev_priv(netdev);
  2501. /* only return the current stats */
  2502. return &adapter->net_stats;
  2503. }
  2504. /**
  2505. * e1000_change_mtu - Change the Maximum Transfer Unit
  2506. * @netdev: network interface device structure
  2507. * @new_mtu: new value for maximum frame size
  2508. *
  2509. * Returns 0 on success, negative on failure
  2510. **/
  2511. static int
  2512. e1000_change_mtu(struct net_device *netdev, int new_mtu)
  2513. {
  2514. struct e1000_adapter *adapter = netdev_priv(netdev);
  2515. int max_frame = new_mtu + ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
  2516. uint16_t eeprom_data = 0;
  2517. if ((max_frame < MINIMUM_ETHERNET_FRAME_SIZE) ||
  2518. (max_frame > MAX_JUMBO_FRAME_SIZE)) {
  2519. DPRINTK(PROBE, ERR, "Invalid MTU setting\n");
  2520. return -EINVAL;
  2521. }
  2522. /* Adapter-specific max frame size limits. */
  2523. switch (adapter->hw.mac_type) {
  2524. case e1000_undefined ... e1000_82542_rev2_1:
  2525. if (max_frame > MAXIMUM_ETHERNET_FRAME_SIZE) {
  2526. DPRINTK(PROBE, ERR, "Jumbo Frames not supported.\n");
  2527. return -EINVAL;
  2528. }
  2529. break;
  2530. case e1000_82573:
  2531. /* only enable jumbo frames if ASPM is disabled completely
  2532. * this means both bits must be zero in 0x1A bits 3:2 */
  2533. e1000_read_eeprom(&adapter->hw, EEPROM_INIT_3GIO_3, 1,
  2534. &eeprom_data);
  2535. if (eeprom_data & EEPROM_WORD1A_ASPM_MASK) {
  2536. if (max_frame > MAXIMUM_ETHERNET_FRAME_SIZE) {
  2537. DPRINTK(PROBE, ERR,
  2538. "Jumbo Frames not supported.\n");
  2539. return -EINVAL;
  2540. }
  2541. break;
  2542. }
  2543. /* fall through to get support */
  2544. case e1000_82571:
  2545. case e1000_82572:
  2546. case e1000_80003es2lan:
  2547. #define MAX_STD_JUMBO_FRAME_SIZE 9234
  2548. if (max_frame > MAX_STD_JUMBO_FRAME_SIZE) {
  2549. DPRINTK(PROBE, ERR, "MTU > 9216 not supported.\n");
  2550. return -EINVAL;
  2551. }
  2552. break;
  2553. default:
  2554. /* Capable of supporting up to MAX_JUMBO_FRAME_SIZE limit. */
  2555. break;
  2556. }
  2557. /* NOTE: dev_alloc_skb reserves 16 bytes, and typically NET_IP_ALIGN
  2558. * means we reserve 2 more, this pushes us to allocate from the next
  2559. * larger slab size
  2560. * i.e. RXBUFFER_2048 --> size-4096 slab */
  2561. if (max_frame <= E1000_RXBUFFER_256)
  2562. adapter->rx_buffer_len = E1000_RXBUFFER_256;
  2563. else if (max_frame <= E1000_RXBUFFER_512)
  2564. adapter->rx_buffer_len = E1000_RXBUFFER_512;
  2565. else if (max_frame <= E1000_RXBUFFER_1024)
  2566. adapter->rx_buffer_len = E1000_RXBUFFER_1024;
  2567. else if (max_frame <= E1000_RXBUFFER_2048)
  2568. adapter->rx_buffer_len = E1000_RXBUFFER_2048;
  2569. else if (max_frame <= E1000_RXBUFFER_4096)
  2570. adapter->rx_buffer_len = E1000_RXBUFFER_4096;
  2571. else if (max_frame <= E1000_RXBUFFER_8192)
  2572. adapter->rx_buffer_len = E1000_RXBUFFER_8192;
  2573. else if (max_frame <= E1000_RXBUFFER_16384)
  2574. adapter->rx_buffer_len = E1000_RXBUFFER_16384;
  2575. /* adjust allocation if LPE protects us, and we aren't using SBP */
  2576. #define MAXIMUM_ETHERNET_VLAN_SIZE 1522
  2577. if (!adapter->hw.tbi_compatibility_on &&
  2578. ((max_frame == MAXIMUM_ETHERNET_FRAME_SIZE) ||
  2579. (max_frame == MAXIMUM_ETHERNET_VLAN_SIZE)))
  2580. adapter->rx_buffer_len = MAXIMUM_ETHERNET_VLAN_SIZE;
  2581. netdev->mtu = new_mtu;
  2582. if (netif_running(netdev))
  2583. e1000_reinit_locked(adapter);
  2584. adapter->hw.max_frame_size = max_frame;
  2585. return 0;
  2586. }
  2587. /**
  2588. * e1000_update_stats - Update the board statistics counters
  2589. * @adapter: board private structure
  2590. **/
  2591. void
  2592. e1000_update_stats(struct e1000_adapter *adapter)
  2593. {
  2594. struct e1000_hw *hw = &adapter->hw;
  2595. struct pci_dev *pdev = adapter->pdev;
  2596. unsigned long flags;
  2597. uint16_t phy_tmp;
  2598. #define PHY_IDLE_ERROR_COUNT_MASK 0x00FF
  2599. /*
  2600. * Prevent stats update while adapter is being reset, or if the pci
  2601. * connection is down.
  2602. */
  2603. if (adapter->link_speed == 0)
  2604. return;
  2605. if (pdev->error_state && pdev->error_state != pci_channel_io_normal)
  2606. return;
  2607. spin_lock_irqsave(&adapter->stats_lock, flags);
  2608. /* these counters are modified from e1000_adjust_tbi_stats,
  2609. * called from the interrupt context, so they must only
  2610. * be written while holding adapter->stats_lock
  2611. */
  2612. adapter->stats.crcerrs += E1000_READ_REG(hw, CRCERRS);
  2613. adapter->stats.gprc += E1000_READ_REG(hw, GPRC);
  2614. adapter->stats.gorcl += E1000_READ_REG(hw, GORCL);
  2615. adapter->stats.gorch += E1000_READ_REG(hw, GORCH);
  2616. adapter->stats.bprc += E1000_READ_REG(hw, BPRC);
  2617. adapter->stats.mprc += E1000_READ_REG(hw, MPRC);
  2618. adapter->stats.roc += E1000_READ_REG(hw, ROC);
  2619. adapter->stats.prc64 += E1000_READ_REG(hw, PRC64);
  2620. adapter->stats.prc127 += E1000_READ_REG(hw, PRC127);
  2621. adapter->stats.prc255 += E1000_READ_REG(hw, PRC255);
  2622. adapter->stats.prc511 += E1000_READ_REG(hw, PRC511);
  2623. adapter->stats.prc1023 += E1000_READ_REG(hw, PRC1023);
  2624. adapter->stats.prc1522 += E1000_READ_REG(hw, PRC1522);
  2625. adapter->stats.symerrs += E1000_READ_REG(hw, SYMERRS);
  2626. adapter->stats.mpc += E1000_READ_REG(hw, MPC);
  2627. adapter->stats.scc += E1000_READ_REG(hw, SCC);
  2628. adapter->stats.ecol += E1000_READ_REG(hw, ECOL);
  2629. adapter->stats.mcc += E1000_READ_REG(hw, MCC);
  2630. adapter->stats.latecol += E1000_READ_REG(hw, LATECOL);
  2631. adapter->stats.dc += E1000_READ_REG(hw, DC);
  2632. adapter->stats.sec += E1000_READ_REG(hw, SEC);
  2633. adapter->stats.rlec += E1000_READ_REG(hw, RLEC);
  2634. adapter->stats.xonrxc += E1000_READ_REG(hw, XONRXC);
  2635. adapter->stats.xontxc += E1000_READ_REG(hw, XONTXC);
  2636. adapter->stats.xoffrxc += E1000_READ_REG(hw, XOFFRXC);
  2637. adapter->stats.xofftxc += E1000_READ_REG(hw, XOFFTXC);
  2638. adapter->stats.fcruc += E1000_READ_REG(hw, FCRUC);
  2639. adapter->stats.gptc += E1000_READ_REG(hw, GPTC);
  2640. adapter->stats.gotcl += E1000_READ_REG(hw, GOTCL);
  2641. adapter->stats.gotch += E1000_READ_REG(hw, GOTCH);
  2642. adapter->stats.rnbc += E1000_READ_REG(hw, RNBC);
  2643. adapter->stats.ruc += E1000_READ_REG(hw, RUC);
  2644. adapter->stats.rfc += E1000_READ_REG(hw, RFC);
  2645. adapter->stats.rjc += E1000_READ_REG(hw, RJC);
  2646. adapter->stats.torl += E1000_READ_REG(hw, TORL);
  2647. adapter->stats.torh += E1000_READ_REG(hw, TORH);
  2648. adapter->stats.totl += E1000_READ_REG(hw, TOTL);
  2649. adapter->stats.toth += E1000_READ_REG(hw, TOTH);
  2650. adapter->stats.tpr += E1000_READ_REG(hw, TPR);
  2651. adapter->stats.ptc64 += E1000_READ_REG(hw, PTC64);
  2652. adapter->stats.ptc127 += E1000_READ_REG(hw, PTC127);
  2653. adapter->stats.ptc255 += E1000_READ_REG(hw, PTC255);
  2654. adapter->stats.ptc511 += E1000_READ_REG(hw, PTC511);
  2655. adapter->stats.ptc1023 += E1000_READ_REG(hw, PTC1023);
  2656. adapter->stats.ptc1522 += E1000_READ_REG(hw, PTC1522);
  2657. adapter->stats.mptc += E1000_READ_REG(hw, MPTC);
  2658. adapter->stats.bptc += E1000_READ_REG(hw, BPTC);
  2659. /* used for adaptive IFS */
  2660. hw->tx_packet_delta = E1000_READ_REG(hw, TPT);
  2661. adapter->stats.tpt += hw->tx_packet_delta;
  2662. hw->collision_delta = E1000_READ_REG(hw, COLC);
  2663. adapter->stats.colc += hw->collision_delta;
  2664. if (hw->mac_type >= e1000_82543) {
  2665. adapter->stats.algnerrc += E1000_READ_REG(hw, ALGNERRC);
  2666. adapter->stats.rxerrc += E1000_READ_REG(hw, RXERRC);
  2667. adapter->stats.tncrs += E1000_READ_REG(hw, TNCRS);
  2668. adapter->stats.cexterr += E1000_READ_REG(hw, CEXTERR);
  2669. adapter->stats.tsctc += E1000_READ_REG(hw, TSCTC);
  2670. adapter->stats.tsctfc += E1000_READ_REG(hw, TSCTFC);
  2671. }
  2672. if (hw->mac_type > e1000_82547_rev_2) {
  2673. adapter->stats.iac += E1000_READ_REG(hw, IAC);
  2674. adapter->stats.icrxoc += E1000_READ_REG(hw, ICRXOC);
  2675. adapter->stats.icrxptc += E1000_READ_REG(hw, ICRXPTC);
  2676. adapter->stats.icrxatc += E1000_READ_REG(hw, ICRXATC);
  2677. adapter->stats.ictxptc += E1000_READ_REG(hw, ICTXPTC);
  2678. adapter->stats.ictxatc += E1000_READ_REG(hw, ICTXATC);
  2679. adapter->stats.ictxqec += E1000_READ_REG(hw, ICTXQEC);
  2680. adapter->stats.ictxqmtc += E1000_READ_REG(hw, ICTXQMTC);
  2681. adapter->stats.icrxdmtc += E1000_READ_REG(hw, ICRXDMTC);
  2682. }
  2683. /* Fill out the OS statistics structure */
  2684. adapter->net_stats.rx_packets = adapter->stats.gprc;
  2685. adapter->net_stats.tx_packets = adapter->stats.gptc;
  2686. adapter->net_stats.rx_bytes = adapter->stats.gorcl;
  2687. adapter->net_stats.tx_bytes = adapter->stats.gotcl;
  2688. adapter->net_stats.multicast = adapter->stats.mprc;
  2689. adapter->net_stats.collisions = adapter->stats.colc;
  2690. /* Rx Errors */
  2691. /* RLEC on some newer hardware can be incorrect so build
  2692. * our own version based on RUC and ROC */
  2693. adapter->net_stats.rx_errors = adapter->stats.rxerrc +
  2694. adapter->stats.crcerrs + adapter->stats.algnerrc +
  2695. adapter->stats.ruc + adapter->stats.roc +
  2696. adapter->stats.cexterr;
  2697. adapter->net_stats.rx_length_errors = adapter->stats.ruc +
  2698. adapter->stats.roc;
  2699. adapter->net_stats.rx_crc_errors = adapter->stats.crcerrs;
  2700. adapter->net_stats.rx_frame_errors = adapter->stats.algnerrc;
  2701. adapter->net_stats.rx_missed_errors = adapter->stats.mpc;
  2702. /* Tx Errors */
  2703. adapter->net_stats.tx_errors = adapter->stats.ecol +
  2704. adapter->stats.latecol;
  2705. adapter->net_stats.tx_aborted_errors = adapter->stats.ecol;
  2706. adapter->net_stats.tx_window_errors = adapter->stats.latecol;
  2707. adapter->net_stats.tx_carrier_errors = adapter->stats.tncrs;
  2708. /* Tx Dropped needs to be maintained elsewhere */
  2709. /* Phy Stats */
  2710. if (hw->media_type == e1000_media_type_copper) {
  2711. if ((adapter->link_speed == SPEED_1000) &&
  2712. (!e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_tmp))) {
  2713. phy_tmp &= PHY_IDLE_ERROR_COUNT_MASK;
  2714. adapter->phy_stats.idle_errors += phy_tmp;
  2715. }
  2716. if ((hw->mac_type <= e1000_82546) &&
  2717. (hw->phy_type == e1000_phy_m88) &&
  2718. !e1000_read_phy_reg(hw, M88E1000_RX_ERR_CNTR, &phy_tmp))
  2719. adapter->phy_stats.receive_errors += phy_tmp;
  2720. }
  2721. spin_unlock_irqrestore(&adapter->stats_lock, flags);
  2722. }
  2723. /**
  2724. * e1000_intr - Interrupt Handler
  2725. * @irq: interrupt number
  2726. * @data: pointer to a network interface device structure
  2727. * @pt_regs: CPU registers structure
  2728. **/
  2729. static irqreturn_t
  2730. e1000_intr(int irq, void *data, struct pt_regs *regs)
  2731. {
  2732. struct net_device *netdev = data;
  2733. struct e1000_adapter *adapter = netdev_priv(netdev);
  2734. struct e1000_hw *hw = &adapter->hw;
  2735. uint32_t rctl, icr = E1000_READ_REG(hw, ICR);
  2736. #ifndef CONFIG_E1000_NAPI
  2737. int i;
  2738. #else
  2739. /* Interrupt Auto-Mask...upon reading ICR,
  2740. * interrupts are masked. No need for the
  2741. * IMC write, but it does mean we should
  2742. * account for it ASAP. */
  2743. if (likely(hw->mac_type >= e1000_82571))
  2744. atomic_inc(&adapter->irq_sem);
  2745. #endif
  2746. if (unlikely(!icr)) {
  2747. #ifdef CONFIG_E1000_NAPI
  2748. if (hw->mac_type >= e1000_82571)
  2749. e1000_irq_enable(adapter);
  2750. #endif
  2751. return IRQ_NONE; /* Not our interrupt */
  2752. }
  2753. if (unlikely(icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC))) {
  2754. hw->get_link_status = 1;
  2755. /* 80003ES2LAN workaround--
  2756. * For packet buffer work-around on link down event;
  2757. * disable receives here in the ISR and
  2758. * reset adapter in watchdog
  2759. */
  2760. if (netif_carrier_ok(netdev) &&
  2761. (adapter->hw.mac_type == e1000_80003es2lan)) {
  2762. /* disable receives */
  2763. rctl = E1000_READ_REG(hw, RCTL);
  2764. E1000_WRITE_REG(hw, RCTL, rctl & ~E1000_RCTL_EN);
  2765. }
  2766. mod_timer(&adapter->watchdog_timer, jiffies);
  2767. }
  2768. #ifdef CONFIG_E1000_NAPI
  2769. if (unlikely(hw->mac_type < e1000_82571)) {
  2770. atomic_inc(&adapter->irq_sem);
  2771. E1000_WRITE_REG(hw, IMC, ~0);
  2772. E1000_WRITE_FLUSH(hw);
  2773. }
  2774. if (likely(netif_rx_schedule_prep(&adapter->polling_netdev[0])))
  2775. __netif_rx_schedule(&adapter->polling_netdev[0]);
  2776. else
  2777. e1000_irq_enable(adapter);
  2778. #else
  2779. /* Writing IMC and IMS is needed for 82547.
  2780. * Due to Hub Link bus being occupied, an interrupt
  2781. * de-assertion message is not able to be sent.
  2782. * When an interrupt assertion message is generated later,
  2783. * two messages are re-ordered and sent out.
  2784. * That causes APIC to think 82547 is in de-assertion
  2785. * state, while 82547 is in assertion state, resulting
  2786. * in dead lock. Writing IMC forces 82547 into
  2787. * de-assertion state.
  2788. */
  2789. if (hw->mac_type == e1000_82547 || hw->mac_type == e1000_82547_rev_2) {
  2790. atomic_inc(&adapter->irq_sem);
  2791. E1000_WRITE_REG(hw, IMC, ~0);
  2792. }
  2793. for (i = 0; i < E1000_MAX_INTR; i++)
  2794. if (unlikely(!adapter->clean_rx(adapter, adapter->rx_ring) &
  2795. !e1000_clean_tx_irq(adapter, adapter->tx_ring)))
  2796. break;
  2797. if (hw->mac_type == e1000_82547 || hw->mac_type == e1000_82547_rev_2)
  2798. e1000_irq_enable(adapter);
  2799. #endif
  2800. return IRQ_HANDLED;
  2801. }
  2802. #ifdef CONFIG_E1000_NAPI
  2803. /**
  2804. * e1000_clean - NAPI Rx polling callback
  2805. * @adapter: board private structure
  2806. **/
  2807. static int
  2808. e1000_clean(struct net_device *poll_dev, int *budget)
  2809. {
  2810. struct e1000_adapter *adapter;
  2811. int work_to_do = min(*budget, poll_dev->quota);
  2812. int tx_cleaned = 0, i = 0, work_done = 0;
  2813. /* Must NOT use netdev_priv macro here. */
  2814. adapter = poll_dev->priv;
  2815. /* Keep link state information with original netdev */
  2816. if (!netif_carrier_ok(adapter->netdev))
  2817. goto quit_polling;
  2818. while (poll_dev != &adapter->polling_netdev[i]) {
  2819. i++;
  2820. BUG_ON(i == adapter->num_rx_queues);
  2821. }
  2822. if (likely(adapter->num_tx_queues == 1)) {
  2823. /* e1000_clean is called per-cpu. This lock protects
  2824. * tx_ring[0] from being cleaned by multiple cpus
  2825. * simultaneously. A failure obtaining the lock means
  2826. * tx_ring[0] is currently being cleaned anyway. */
  2827. if (spin_trylock(&adapter->tx_queue_lock)) {
  2828. tx_cleaned = e1000_clean_tx_irq(adapter,
  2829. &adapter->tx_ring[0]);
  2830. spin_unlock(&adapter->tx_queue_lock);
  2831. }
  2832. } else
  2833. tx_cleaned = e1000_clean_tx_irq(adapter, &adapter->tx_ring[i]);
  2834. adapter->clean_rx(adapter, &adapter->rx_ring[i],
  2835. &work_done, work_to_do);
  2836. *budget -= work_done;
  2837. poll_dev->quota -= work_done;
  2838. /* If no Tx and not enough Rx work done, exit the polling mode */
  2839. if ((!tx_cleaned && (work_done == 0)) ||
  2840. !netif_running(adapter->netdev)) {
  2841. quit_polling:
  2842. netif_rx_complete(poll_dev);
  2843. e1000_irq_enable(adapter);
  2844. return 0;
  2845. }
  2846. return 1;
  2847. }
  2848. #endif
  2849. /**
  2850. * e1000_clean_tx_irq - Reclaim resources after transmit completes
  2851. * @adapter: board private structure
  2852. **/
  2853. static boolean_t
  2854. e1000_clean_tx_irq(struct e1000_adapter *adapter,
  2855. struct e1000_tx_ring *tx_ring)
  2856. {
  2857. struct net_device *netdev = adapter->netdev;
  2858. struct e1000_tx_desc *tx_desc, *eop_desc;
  2859. struct e1000_buffer *buffer_info;
  2860. unsigned int i, eop;
  2861. #ifdef CONFIG_E1000_NAPI
  2862. unsigned int count = 0;
  2863. #endif
  2864. boolean_t cleaned = FALSE;
  2865. i = tx_ring->next_to_clean;
  2866. eop = tx_ring->buffer_info[i].next_to_watch;
  2867. eop_desc = E1000_TX_DESC(*tx_ring, eop);
  2868. while (eop_desc->upper.data & cpu_to_le32(E1000_TXD_STAT_DD)) {
  2869. for (cleaned = FALSE; !cleaned; ) {
  2870. tx_desc = E1000_TX_DESC(*tx_ring, i);
  2871. buffer_info = &tx_ring->buffer_info[i];
  2872. cleaned = (i == eop);
  2873. e1000_unmap_and_free_tx_resource(adapter, buffer_info);
  2874. memset(tx_desc, 0, sizeof(struct e1000_tx_desc));
  2875. if (unlikely(++i == tx_ring->count)) i = 0;
  2876. }
  2877. eop = tx_ring->buffer_info[i].next_to_watch;
  2878. eop_desc = E1000_TX_DESC(*tx_ring, eop);
  2879. #ifdef CONFIG_E1000_NAPI
  2880. #define E1000_TX_WEIGHT 64
  2881. /* weight of a sort for tx, to avoid endless transmit cleanup */
  2882. if (count++ == E1000_TX_WEIGHT) break;
  2883. #endif
  2884. }
  2885. tx_ring->next_to_clean = i;
  2886. #define TX_WAKE_THRESHOLD 32
  2887. if (unlikely(cleaned && netif_queue_stopped(netdev) &&
  2888. netif_carrier_ok(netdev))) {
  2889. spin_lock(&tx_ring->tx_lock);
  2890. if (netif_queue_stopped(netdev) &&
  2891. (E1000_DESC_UNUSED(tx_ring) >= TX_WAKE_THRESHOLD))
  2892. netif_wake_queue(netdev);
  2893. spin_unlock(&tx_ring->tx_lock);
  2894. }
  2895. if (adapter->detect_tx_hung) {
  2896. /* Detect a transmit hang in hardware, this serializes the
  2897. * check with the clearing of time_stamp and movement of i */
  2898. adapter->detect_tx_hung = FALSE;
  2899. if (tx_ring->buffer_info[eop].dma &&
  2900. time_after(jiffies, tx_ring->buffer_info[eop].time_stamp +
  2901. (adapter->tx_timeout_factor * HZ))
  2902. && !(E1000_READ_REG(&adapter->hw, STATUS) &
  2903. E1000_STATUS_TXOFF)) {
  2904. /* detected Tx unit hang */
  2905. DPRINTK(DRV, ERR, "Detected Tx Unit Hang\n"
  2906. " Tx Queue <%lu>\n"
  2907. " TDH <%x>\n"
  2908. " TDT <%x>\n"
  2909. " next_to_use <%x>\n"
  2910. " next_to_clean <%x>\n"
  2911. "buffer_info[next_to_clean]\n"
  2912. " time_stamp <%lx>\n"
  2913. " next_to_watch <%x>\n"
  2914. " jiffies <%lx>\n"
  2915. " next_to_watch.status <%x>\n",
  2916. (unsigned long)((tx_ring - adapter->tx_ring) /
  2917. sizeof(struct e1000_tx_ring)),
  2918. readl(adapter->hw.hw_addr + tx_ring->tdh),
  2919. readl(adapter->hw.hw_addr + tx_ring->tdt),
  2920. tx_ring->next_to_use,
  2921. tx_ring->next_to_clean,
  2922. tx_ring->buffer_info[eop].time_stamp,
  2923. eop,
  2924. jiffies,
  2925. eop_desc->upper.fields.status);
  2926. netif_stop_queue(netdev);
  2927. }
  2928. }
  2929. return cleaned;
  2930. }
  2931. /**
  2932. * e1000_rx_checksum - Receive Checksum Offload for 82543
  2933. * @adapter: board private structure
  2934. * @status_err: receive descriptor status and error fields
  2935. * @csum: receive descriptor csum field
  2936. * @sk_buff: socket buffer with received data
  2937. **/
  2938. static void
  2939. e1000_rx_checksum(struct e1000_adapter *adapter,
  2940. uint32_t status_err, uint32_t csum,
  2941. struct sk_buff *skb)
  2942. {
  2943. uint16_t status = (uint16_t)status_err;
  2944. uint8_t errors = (uint8_t)(status_err >> 24);
  2945. skb->ip_summed = CHECKSUM_NONE;
  2946. /* 82543 or newer only */
  2947. if (unlikely(adapter->hw.mac_type < e1000_82543)) return;
  2948. /* Ignore Checksum bit is set */
  2949. if (unlikely(status & E1000_RXD_STAT_IXSM)) return;
  2950. /* TCP/UDP checksum error bit is set */
  2951. if (unlikely(errors & E1000_RXD_ERR_TCPE)) {
  2952. /* let the stack verify checksum errors */
  2953. adapter->hw_csum_err++;
  2954. return;
  2955. }
  2956. /* TCP/UDP Checksum has not been calculated */
  2957. if (adapter->hw.mac_type <= e1000_82547_rev_2) {
  2958. if (!(status & E1000_RXD_STAT_TCPCS))
  2959. return;
  2960. } else {
  2961. if (!(status & (E1000_RXD_STAT_TCPCS | E1000_RXD_STAT_UDPCS)))
  2962. return;
  2963. }
  2964. /* It must be a TCP or UDP packet with a valid checksum */
  2965. if (likely(status & E1000_RXD_STAT_TCPCS)) {
  2966. /* TCP checksum is good */
  2967. skb->ip_summed = CHECKSUM_UNNECESSARY;
  2968. } else if (adapter->hw.mac_type > e1000_82547_rev_2) {
  2969. /* IP fragment with UDP payload */
  2970. /* Hardware complements the payload checksum, so we undo it
  2971. * and then put the value in host order for further stack use.
  2972. */
  2973. csum = ntohl(csum ^ 0xFFFF);
  2974. skb->csum = csum;
  2975. skb->ip_summed = CHECKSUM_HW;
  2976. }
  2977. adapter->hw_csum_good++;
  2978. }
  2979. /**
  2980. * e1000_clean_rx_irq - Send received data up the network stack; legacy
  2981. * @adapter: board private structure
  2982. **/
  2983. static boolean_t
  2984. #ifdef CONFIG_E1000_NAPI
  2985. e1000_clean_rx_irq(struct e1000_adapter *adapter,
  2986. struct e1000_rx_ring *rx_ring,
  2987. int *work_done, int work_to_do)
  2988. #else
  2989. e1000_clean_rx_irq(struct e1000_adapter *adapter,
  2990. struct e1000_rx_ring *rx_ring)
  2991. #endif
  2992. {
  2993. struct net_device *netdev = adapter->netdev;
  2994. struct pci_dev *pdev = adapter->pdev;
  2995. struct e1000_rx_desc *rx_desc, *next_rxd;
  2996. struct e1000_buffer *buffer_info, *next_buffer;
  2997. unsigned long flags;
  2998. uint32_t length;
  2999. uint8_t last_byte;
  3000. unsigned int i;
  3001. int cleaned_count = 0;
  3002. boolean_t cleaned = FALSE;
  3003. i = rx_ring->next_to_clean;
  3004. rx_desc = E1000_RX_DESC(*rx_ring, i);
  3005. buffer_info = &rx_ring->buffer_info[i];
  3006. while (rx_desc->status & E1000_RXD_STAT_DD) {
  3007. struct sk_buff *skb;
  3008. u8 status;
  3009. #ifdef CONFIG_E1000_NAPI
  3010. if (*work_done >= work_to_do)
  3011. break;
  3012. (*work_done)++;
  3013. #endif
  3014. status = rx_desc->status;
  3015. skb = buffer_info->skb;
  3016. buffer_info->skb = NULL;
  3017. prefetch(skb->data - NET_IP_ALIGN);
  3018. if (++i == rx_ring->count) i = 0;
  3019. next_rxd = E1000_RX_DESC(*rx_ring, i);
  3020. prefetch(next_rxd);
  3021. next_buffer = &rx_ring->buffer_info[i];
  3022. cleaned = TRUE;
  3023. cleaned_count++;
  3024. pci_unmap_single(pdev,
  3025. buffer_info->dma,
  3026. buffer_info->length,
  3027. PCI_DMA_FROMDEVICE);
  3028. length = le16_to_cpu(rx_desc->length);
  3029. if (unlikely(!(status & E1000_RXD_STAT_EOP))) {
  3030. /* All receives must fit into a single buffer */
  3031. E1000_DBG("%s: Receive packet consumed multiple"
  3032. " buffers\n", netdev->name);
  3033. dev_kfree_skb_irq(skb);
  3034. goto next_desc;
  3035. }
  3036. if (unlikely(rx_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK)) {
  3037. last_byte = *(skb->data + length - 1);
  3038. if (TBI_ACCEPT(&adapter->hw, status,
  3039. rx_desc->errors, length, last_byte)) {
  3040. spin_lock_irqsave(&adapter->stats_lock, flags);
  3041. e1000_tbi_adjust_stats(&adapter->hw,
  3042. &adapter->stats,
  3043. length, skb->data);
  3044. spin_unlock_irqrestore(&adapter->stats_lock,
  3045. flags);
  3046. length--;
  3047. } else {
  3048. /* recycle */
  3049. buffer_info->skb = skb;
  3050. goto next_desc;
  3051. }
  3052. }
  3053. /* code added for copybreak, this should improve
  3054. * performance for small packets with large amounts
  3055. * of reassembly being done in the stack */
  3056. #define E1000_CB_LENGTH 256
  3057. if (length < E1000_CB_LENGTH) {
  3058. struct sk_buff *new_skb =
  3059. dev_alloc_skb(length + NET_IP_ALIGN);
  3060. if (new_skb) {
  3061. skb_reserve(new_skb, NET_IP_ALIGN);
  3062. new_skb->dev = netdev;
  3063. memcpy(new_skb->data - NET_IP_ALIGN,
  3064. skb->data - NET_IP_ALIGN,
  3065. length + NET_IP_ALIGN);
  3066. /* save the skb in buffer_info as good */
  3067. buffer_info->skb = skb;
  3068. skb = new_skb;
  3069. skb_put(skb, length);
  3070. }
  3071. } else
  3072. skb_put(skb, length);
  3073. /* end copybreak code */
  3074. /* Receive Checksum Offload */
  3075. e1000_rx_checksum(adapter,
  3076. (uint32_t)(status) |
  3077. ((uint32_t)(rx_desc->errors) << 24),
  3078. le16_to_cpu(rx_desc->csum), skb);
  3079. skb->protocol = eth_type_trans(skb, netdev);
  3080. #ifdef CONFIG_E1000_NAPI
  3081. if (unlikely(adapter->vlgrp &&
  3082. (status & E1000_RXD_STAT_VP))) {
  3083. vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
  3084. le16_to_cpu(rx_desc->special) &
  3085. E1000_RXD_SPC_VLAN_MASK);
  3086. } else {
  3087. netif_receive_skb(skb);
  3088. }
  3089. #else /* CONFIG_E1000_NAPI */
  3090. if (unlikely(adapter->vlgrp &&
  3091. (status & E1000_RXD_STAT_VP))) {
  3092. vlan_hwaccel_rx(skb, adapter->vlgrp,
  3093. le16_to_cpu(rx_desc->special) &
  3094. E1000_RXD_SPC_VLAN_MASK);
  3095. } else {
  3096. netif_rx(skb);
  3097. }
  3098. #endif /* CONFIG_E1000_NAPI */
  3099. netdev->last_rx = jiffies;
  3100. next_desc:
  3101. rx_desc->status = 0;
  3102. /* return some buffers to hardware, one at a time is too slow */
  3103. if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
  3104. adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
  3105. cleaned_count = 0;
  3106. }
  3107. /* use prefetched values */
  3108. rx_desc = next_rxd;
  3109. buffer_info = next_buffer;
  3110. }
  3111. rx_ring->next_to_clean = i;
  3112. cleaned_count = E1000_DESC_UNUSED(rx_ring);
  3113. if (cleaned_count)
  3114. adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
  3115. return cleaned;
  3116. }
  3117. /**
  3118. * e1000_clean_rx_irq_ps - Send received data up the network stack; packet split
  3119. * @adapter: board private structure
  3120. **/
  3121. static boolean_t
  3122. #ifdef CONFIG_E1000_NAPI
  3123. e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
  3124. struct e1000_rx_ring *rx_ring,
  3125. int *work_done, int work_to_do)
  3126. #else
  3127. e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
  3128. struct e1000_rx_ring *rx_ring)
  3129. #endif
  3130. {
  3131. union e1000_rx_desc_packet_split *rx_desc, *next_rxd;
  3132. struct net_device *netdev = adapter->netdev;
  3133. struct pci_dev *pdev = adapter->pdev;
  3134. struct e1000_buffer *buffer_info, *next_buffer;
  3135. struct e1000_ps_page *ps_page;
  3136. struct e1000_ps_page_dma *ps_page_dma;
  3137. struct sk_buff *skb;
  3138. unsigned int i, j;
  3139. uint32_t length, staterr;
  3140. int cleaned_count = 0;
  3141. boolean_t cleaned = FALSE;
  3142. i = rx_ring->next_to_clean;
  3143. rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
  3144. staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
  3145. buffer_info = &rx_ring->buffer_info[i];
  3146. while (staterr & E1000_RXD_STAT_DD) {
  3147. buffer_info = &rx_ring->buffer_info[i];
  3148. ps_page = &rx_ring->ps_page[i];
  3149. ps_page_dma = &rx_ring->ps_page_dma[i];
  3150. #ifdef CONFIG_E1000_NAPI
  3151. if (unlikely(*work_done >= work_to_do))
  3152. break;
  3153. (*work_done)++;
  3154. #endif
  3155. skb = buffer_info->skb;
  3156. /* in the packet split case this is header only */
  3157. prefetch(skb->data - NET_IP_ALIGN);
  3158. if (++i == rx_ring->count) i = 0;
  3159. next_rxd = E1000_RX_DESC_PS(*rx_ring, i);
  3160. prefetch(next_rxd);
  3161. next_buffer = &rx_ring->buffer_info[i];
  3162. cleaned = TRUE;
  3163. cleaned_count++;
  3164. pci_unmap_single(pdev, buffer_info->dma,
  3165. buffer_info->length,
  3166. PCI_DMA_FROMDEVICE);
  3167. if (unlikely(!(staterr & E1000_RXD_STAT_EOP))) {
  3168. E1000_DBG("%s: Packet Split buffers didn't pick up"
  3169. " the full packet\n", netdev->name);
  3170. dev_kfree_skb_irq(skb);
  3171. goto next_desc;
  3172. }
  3173. if (unlikely(staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK)) {
  3174. dev_kfree_skb_irq(skb);
  3175. goto next_desc;
  3176. }
  3177. length = le16_to_cpu(rx_desc->wb.middle.length0);
  3178. if (unlikely(!length)) {
  3179. E1000_DBG("%s: Last part of the packet spanning"
  3180. " multiple descriptors\n", netdev->name);
  3181. dev_kfree_skb_irq(skb);
  3182. goto next_desc;
  3183. }
  3184. /* Good Receive */
  3185. skb_put(skb, length);
  3186. {
  3187. /* this looks ugly, but it seems compiler issues make it
  3188. more efficient than reusing j */
  3189. int l1 = le16_to_cpu(rx_desc->wb.upper.length[0]);
  3190. /* page alloc/put takes too long and effects small packet
  3191. * throughput, so unsplit small packets and save the alloc/put*/
  3192. if (l1 && ((length + l1) <= adapter->rx_ps_bsize0)) {
  3193. u8 *vaddr;
  3194. /* there is no documentation about how to call
  3195. * kmap_atomic, so we can't hold the mapping
  3196. * very long */
  3197. pci_dma_sync_single_for_cpu(pdev,
  3198. ps_page_dma->ps_page_dma[0],
  3199. PAGE_SIZE,
  3200. PCI_DMA_FROMDEVICE);
  3201. vaddr = kmap_atomic(ps_page->ps_page[0],
  3202. KM_SKB_DATA_SOFTIRQ);
  3203. memcpy(skb->tail, vaddr, l1);
  3204. kunmap_atomic(vaddr, KM_SKB_DATA_SOFTIRQ);
  3205. pci_dma_sync_single_for_device(pdev,
  3206. ps_page_dma->ps_page_dma[0],
  3207. PAGE_SIZE, PCI_DMA_FROMDEVICE);
  3208. skb_put(skb, l1);
  3209. length += l1;
  3210. goto copydone;
  3211. } /* if */
  3212. }
  3213. for (j = 0; j < adapter->rx_ps_pages; j++) {
  3214. if (!(length= le16_to_cpu(rx_desc->wb.upper.length[j])))
  3215. break;
  3216. pci_unmap_page(pdev, ps_page_dma->ps_page_dma[j],
  3217. PAGE_SIZE, PCI_DMA_FROMDEVICE);
  3218. ps_page_dma->ps_page_dma[j] = 0;
  3219. skb_fill_page_desc(skb, j, ps_page->ps_page[j], 0,
  3220. length);
  3221. ps_page->ps_page[j] = NULL;
  3222. skb->len += length;
  3223. skb->data_len += length;
  3224. skb->truesize += length;
  3225. }
  3226. copydone:
  3227. e1000_rx_checksum(adapter, staterr,
  3228. le16_to_cpu(rx_desc->wb.lower.hi_dword.csum_ip.csum), skb);
  3229. skb->protocol = eth_type_trans(skb, netdev);
  3230. if (likely(rx_desc->wb.upper.header_status &
  3231. cpu_to_le16(E1000_RXDPS_HDRSTAT_HDRSP)))
  3232. adapter->rx_hdr_split++;
  3233. #ifdef CONFIG_E1000_NAPI
  3234. if (unlikely(adapter->vlgrp && (staterr & E1000_RXD_STAT_VP))) {
  3235. vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
  3236. le16_to_cpu(rx_desc->wb.middle.vlan) &
  3237. E1000_RXD_SPC_VLAN_MASK);
  3238. } else {
  3239. netif_receive_skb(skb);
  3240. }
  3241. #else /* CONFIG_E1000_NAPI */
  3242. if (unlikely(adapter->vlgrp && (staterr & E1000_RXD_STAT_VP))) {
  3243. vlan_hwaccel_rx(skb, adapter->vlgrp,
  3244. le16_to_cpu(rx_desc->wb.middle.vlan) &
  3245. E1000_RXD_SPC_VLAN_MASK);
  3246. } else {
  3247. netif_rx(skb);
  3248. }
  3249. #endif /* CONFIG_E1000_NAPI */
  3250. netdev->last_rx = jiffies;
  3251. next_desc:
  3252. rx_desc->wb.middle.status_error &= cpu_to_le32(~0xFF);
  3253. buffer_info->skb = NULL;
  3254. /* return some buffers to hardware, one at a time is too slow */
  3255. if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
  3256. adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
  3257. cleaned_count = 0;
  3258. }
  3259. /* use prefetched values */
  3260. rx_desc = next_rxd;
  3261. buffer_info = next_buffer;
  3262. staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
  3263. }
  3264. rx_ring->next_to_clean = i;
  3265. cleaned_count = E1000_DESC_UNUSED(rx_ring);
  3266. if (cleaned_count)
  3267. adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
  3268. return cleaned;
  3269. }
  3270. /**
  3271. * e1000_alloc_rx_buffers - Replace used receive buffers; legacy & extended
  3272. * @adapter: address of board private structure
  3273. **/
  3274. static void
  3275. e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
  3276. struct e1000_rx_ring *rx_ring,
  3277. int cleaned_count)
  3278. {
  3279. struct net_device *netdev = adapter->netdev;
  3280. struct pci_dev *pdev = adapter->pdev;
  3281. struct e1000_rx_desc *rx_desc;
  3282. struct e1000_buffer *buffer_info;
  3283. struct sk_buff *skb;
  3284. unsigned int i;
  3285. unsigned int bufsz = adapter->rx_buffer_len + NET_IP_ALIGN;
  3286. i = rx_ring->next_to_use;
  3287. buffer_info = &rx_ring->buffer_info[i];
  3288. while (cleaned_count--) {
  3289. if (!(skb = buffer_info->skb))
  3290. skb = dev_alloc_skb(bufsz);
  3291. else {
  3292. skb_trim(skb, 0);
  3293. goto map_skb;
  3294. }
  3295. if (unlikely(!skb)) {
  3296. /* Better luck next round */
  3297. adapter->alloc_rx_buff_failed++;
  3298. break;
  3299. }
  3300. /* Fix for errata 23, can't cross 64kB boundary */
  3301. if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) {
  3302. struct sk_buff *oldskb = skb;
  3303. DPRINTK(RX_ERR, ERR, "skb align check failed: %u bytes "
  3304. "at %p\n", bufsz, skb->data);
  3305. /* Try again, without freeing the previous */
  3306. skb = dev_alloc_skb(bufsz);
  3307. /* Failed allocation, critical failure */
  3308. if (!skb) {
  3309. dev_kfree_skb(oldskb);
  3310. break;
  3311. }
  3312. if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) {
  3313. /* give up */
  3314. dev_kfree_skb(skb);
  3315. dev_kfree_skb(oldskb);
  3316. break; /* while !buffer_info->skb */
  3317. } else {
  3318. /* Use new allocation */
  3319. dev_kfree_skb(oldskb);
  3320. }
  3321. }
  3322. /* Make buffer alignment 2 beyond a 16 byte boundary
  3323. * this will result in a 16 byte aligned IP header after
  3324. * the 14 byte MAC header is removed
  3325. */
  3326. skb_reserve(skb, NET_IP_ALIGN);
  3327. skb->dev = netdev;
  3328. buffer_info->skb = skb;
  3329. buffer_info->length = adapter->rx_buffer_len;
  3330. map_skb:
  3331. buffer_info->dma = pci_map_single(pdev,
  3332. skb->data,
  3333. adapter->rx_buffer_len,
  3334. PCI_DMA_FROMDEVICE);
  3335. /* Fix for errata 23, can't cross 64kB boundary */
  3336. if (!e1000_check_64k_bound(adapter,
  3337. (void *)(unsigned long)buffer_info->dma,
  3338. adapter->rx_buffer_len)) {
  3339. DPRINTK(RX_ERR, ERR,
  3340. "dma align check failed: %u bytes at %p\n",
  3341. adapter->rx_buffer_len,
  3342. (void *)(unsigned long)buffer_info->dma);
  3343. dev_kfree_skb(skb);
  3344. buffer_info->skb = NULL;
  3345. pci_unmap_single(pdev, buffer_info->dma,
  3346. adapter->rx_buffer_len,
  3347. PCI_DMA_FROMDEVICE);
  3348. break; /* while !buffer_info->skb */
  3349. }
  3350. rx_desc = E1000_RX_DESC(*rx_ring, i);
  3351. rx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
  3352. if (unlikely(++i == rx_ring->count))
  3353. i = 0;
  3354. buffer_info = &rx_ring->buffer_info[i];
  3355. }
  3356. if (likely(rx_ring->next_to_use != i)) {
  3357. rx_ring->next_to_use = i;
  3358. if (unlikely(i-- == 0))
  3359. i = (rx_ring->count - 1);
  3360. /* Force memory writes to complete before letting h/w
  3361. * know there are new descriptors to fetch. (Only
  3362. * applicable for weak-ordered memory model archs,
  3363. * such as IA-64). */
  3364. wmb();
  3365. writel(i, adapter->hw.hw_addr + rx_ring->rdt);
  3366. }
  3367. }
  3368. /**
  3369. * e1000_alloc_rx_buffers_ps - Replace used receive buffers; packet split
  3370. * @adapter: address of board private structure
  3371. **/
  3372. static void
  3373. e1000_alloc_rx_buffers_ps(struct e1000_adapter *adapter,
  3374. struct e1000_rx_ring *rx_ring,
  3375. int cleaned_count)
  3376. {
  3377. struct net_device *netdev = adapter->netdev;
  3378. struct pci_dev *pdev = adapter->pdev;
  3379. union e1000_rx_desc_packet_split *rx_desc;
  3380. struct e1000_buffer *buffer_info;
  3381. struct e1000_ps_page *ps_page;
  3382. struct e1000_ps_page_dma *ps_page_dma;
  3383. struct sk_buff *skb;
  3384. unsigned int i, j;
  3385. i = rx_ring->next_to_use;
  3386. buffer_info = &rx_ring->buffer_info[i];
  3387. ps_page = &rx_ring->ps_page[i];
  3388. ps_page_dma = &rx_ring->ps_page_dma[i];
  3389. while (cleaned_count--) {
  3390. rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
  3391. for (j = 0; j < PS_PAGE_BUFFERS; j++) {
  3392. if (j < adapter->rx_ps_pages) {
  3393. if (likely(!ps_page->ps_page[j])) {
  3394. ps_page->ps_page[j] =
  3395. alloc_page(GFP_ATOMIC);
  3396. if (unlikely(!ps_page->ps_page[j])) {
  3397. adapter->alloc_rx_buff_failed++;
  3398. goto no_buffers;
  3399. }
  3400. ps_page_dma->ps_page_dma[j] =
  3401. pci_map_page(pdev,
  3402. ps_page->ps_page[j],
  3403. 0, PAGE_SIZE,
  3404. PCI_DMA_FROMDEVICE);
  3405. }
  3406. /* Refresh the desc even if buffer_addrs didn't
  3407. * change because each write-back erases
  3408. * this info.
  3409. */
  3410. rx_desc->read.buffer_addr[j+1] =
  3411. cpu_to_le64(ps_page_dma->ps_page_dma[j]);
  3412. } else
  3413. rx_desc->read.buffer_addr[j+1] = ~0;
  3414. }
  3415. skb = dev_alloc_skb(adapter->rx_ps_bsize0 + NET_IP_ALIGN);
  3416. if (unlikely(!skb)) {
  3417. adapter->alloc_rx_buff_failed++;
  3418. break;
  3419. }
  3420. /* Make buffer alignment 2 beyond a 16 byte boundary
  3421. * this will result in a 16 byte aligned IP header after
  3422. * the 14 byte MAC header is removed
  3423. */
  3424. skb_reserve(skb, NET_IP_ALIGN);
  3425. skb->dev = netdev;
  3426. buffer_info->skb = skb;
  3427. buffer_info->length = adapter->rx_ps_bsize0;
  3428. buffer_info->dma = pci_map_single(pdev, skb->data,
  3429. adapter->rx_ps_bsize0,
  3430. PCI_DMA_FROMDEVICE);
  3431. rx_desc->read.buffer_addr[0] = cpu_to_le64(buffer_info->dma);
  3432. if (unlikely(++i == rx_ring->count)) i = 0;
  3433. buffer_info = &rx_ring->buffer_info[i];
  3434. ps_page = &rx_ring->ps_page[i];
  3435. ps_page_dma = &rx_ring->ps_page_dma[i];
  3436. }
  3437. no_buffers:
  3438. if (likely(rx_ring->next_to_use != i)) {
  3439. rx_ring->next_to_use = i;
  3440. if (unlikely(i-- == 0)) i = (rx_ring->count - 1);
  3441. /* Force memory writes to complete before letting h/w
  3442. * know there are new descriptors to fetch. (Only
  3443. * applicable for weak-ordered memory model archs,
  3444. * such as IA-64). */
  3445. wmb();
  3446. /* Hardware increments by 16 bytes, but packet split
  3447. * descriptors are 32 bytes...so we increment tail
  3448. * twice as much.
  3449. */
  3450. writel(i<<1, adapter->hw.hw_addr + rx_ring->rdt);
  3451. }
  3452. }
  3453. /**
  3454. * e1000_smartspeed - Workaround for SmartSpeed on 82541 and 82547 controllers.
  3455. * @adapter:
  3456. **/
  3457. static void
  3458. e1000_smartspeed(struct e1000_adapter *adapter)
  3459. {
  3460. uint16_t phy_status;
  3461. uint16_t phy_ctrl;
  3462. if ((adapter->hw.phy_type != e1000_phy_igp) || !adapter->hw.autoneg ||
  3463. !(adapter->hw.autoneg_advertised & ADVERTISE_1000_FULL))
  3464. return;
  3465. if (adapter->smartspeed == 0) {
  3466. /* If Master/Slave config fault is asserted twice,
  3467. * we assume back-to-back */
  3468. e1000_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_status);
  3469. if (!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return;
  3470. e1000_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_status);
  3471. if (!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return;
  3472. e1000_read_phy_reg(&adapter->hw, PHY_1000T_CTRL, &phy_ctrl);
  3473. if (phy_ctrl & CR_1000T_MS_ENABLE) {
  3474. phy_ctrl &= ~CR_1000T_MS_ENABLE;
  3475. e1000_write_phy_reg(&adapter->hw, PHY_1000T_CTRL,
  3476. phy_ctrl);
  3477. adapter->smartspeed++;
  3478. if (!e1000_phy_setup_autoneg(&adapter->hw) &&
  3479. !e1000_read_phy_reg(&adapter->hw, PHY_CTRL,
  3480. &phy_ctrl)) {
  3481. phy_ctrl |= (MII_CR_AUTO_NEG_EN |
  3482. MII_CR_RESTART_AUTO_NEG);
  3483. e1000_write_phy_reg(&adapter->hw, PHY_CTRL,
  3484. phy_ctrl);
  3485. }
  3486. }
  3487. return;
  3488. } else if (adapter->smartspeed == E1000_SMARTSPEED_DOWNSHIFT) {
  3489. /* If still no link, perhaps using 2/3 pair cable */
  3490. e1000_read_phy_reg(&adapter->hw, PHY_1000T_CTRL, &phy_ctrl);
  3491. phy_ctrl |= CR_1000T_MS_ENABLE;
  3492. e1000_write_phy_reg(&adapter->hw, PHY_1000T_CTRL, phy_ctrl);
  3493. if (!e1000_phy_setup_autoneg(&adapter->hw) &&
  3494. !e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &phy_ctrl)) {
  3495. phy_ctrl |= (MII_CR_AUTO_NEG_EN |
  3496. MII_CR_RESTART_AUTO_NEG);
  3497. e1000_write_phy_reg(&adapter->hw, PHY_CTRL, phy_ctrl);
  3498. }
  3499. }
  3500. /* Restart process after E1000_SMARTSPEED_MAX iterations */
  3501. if (adapter->smartspeed++ == E1000_SMARTSPEED_MAX)
  3502. adapter->smartspeed = 0;
  3503. }
  3504. /**
  3505. * e1000_ioctl -
  3506. * @netdev:
  3507. * @ifreq:
  3508. * @cmd:
  3509. **/
  3510. static int
  3511. e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
  3512. {
  3513. switch (cmd) {
  3514. case SIOCGMIIPHY:
  3515. case SIOCGMIIREG:
  3516. case SIOCSMIIREG:
  3517. return e1000_mii_ioctl(netdev, ifr, cmd);
  3518. default:
  3519. return -EOPNOTSUPP;
  3520. }
  3521. }
  3522. /**
  3523. * e1000_mii_ioctl -
  3524. * @netdev:
  3525. * @ifreq:
  3526. * @cmd:
  3527. **/
  3528. static int
  3529. e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
  3530. {
  3531. struct e1000_adapter *adapter = netdev_priv(netdev);
  3532. struct mii_ioctl_data *data = if_mii(ifr);
  3533. int retval;
  3534. uint16_t mii_reg;
  3535. uint16_t spddplx;
  3536. unsigned long flags;
  3537. if (adapter->hw.media_type != e1000_media_type_copper)
  3538. return -EOPNOTSUPP;
  3539. switch (cmd) {
  3540. case SIOCGMIIPHY:
  3541. data->phy_id = adapter->hw.phy_addr;
  3542. break;
  3543. case SIOCGMIIREG:
  3544. if (!capable(CAP_NET_ADMIN))
  3545. return -EPERM;
  3546. spin_lock_irqsave(&adapter->stats_lock, flags);
  3547. if (e1000_read_phy_reg(&adapter->hw, data->reg_num & 0x1F,
  3548. &data->val_out)) {
  3549. spin_unlock_irqrestore(&adapter->stats_lock, flags);
  3550. return -EIO;
  3551. }
  3552. spin_unlock_irqrestore(&adapter->stats_lock, flags);
  3553. break;
  3554. case SIOCSMIIREG:
  3555. if (!capable(CAP_NET_ADMIN))
  3556. return -EPERM;
  3557. if (data->reg_num & ~(0x1F))
  3558. return -EFAULT;
  3559. mii_reg = data->val_in;
  3560. spin_lock_irqsave(&adapter->stats_lock, flags);
  3561. if (e1000_write_phy_reg(&adapter->hw, data->reg_num,
  3562. mii_reg)) {
  3563. spin_unlock_irqrestore(&adapter->stats_lock, flags);
  3564. return -EIO;
  3565. }
  3566. if (adapter->hw.media_type == e1000_media_type_copper) {
  3567. switch (data->reg_num) {
  3568. case PHY_CTRL:
  3569. if (mii_reg & MII_CR_POWER_DOWN)
  3570. break;
  3571. if (mii_reg & MII_CR_AUTO_NEG_EN) {
  3572. adapter->hw.autoneg = 1;
  3573. adapter->hw.autoneg_advertised = 0x2F;
  3574. } else {
  3575. if (mii_reg & 0x40)
  3576. spddplx = SPEED_1000;
  3577. else if (mii_reg & 0x2000)
  3578. spddplx = SPEED_100;
  3579. else
  3580. spddplx = SPEED_10;
  3581. spddplx += (mii_reg & 0x100)
  3582. ? DUPLEX_FULL :
  3583. DUPLEX_HALF;
  3584. retval = e1000_set_spd_dplx(adapter,
  3585. spddplx);
  3586. if (retval) {
  3587. spin_unlock_irqrestore(
  3588. &adapter->stats_lock,
  3589. flags);
  3590. return retval;
  3591. }
  3592. }
  3593. if (netif_running(adapter->netdev))
  3594. e1000_reinit_locked(adapter);
  3595. else
  3596. e1000_reset(adapter);
  3597. break;
  3598. case M88E1000_PHY_SPEC_CTRL:
  3599. case M88E1000_EXT_PHY_SPEC_CTRL:
  3600. if (e1000_phy_reset(&adapter->hw)) {
  3601. spin_unlock_irqrestore(
  3602. &adapter->stats_lock, flags);
  3603. return -EIO;
  3604. }
  3605. break;
  3606. }
  3607. } else {
  3608. switch (data->reg_num) {
  3609. case PHY_CTRL:
  3610. if (mii_reg & MII_CR_POWER_DOWN)
  3611. break;
  3612. if (netif_running(adapter->netdev))
  3613. e1000_reinit_locked(adapter);
  3614. else
  3615. e1000_reset(adapter);
  3616. break;
  3617. }
  3618. }
  3619. spin_unlock_irqrestore(&adapter->stats_lock, flags);
  3620. break;
  3621. default:
  3622. return -EOPNOTSUPP;
  3623. }
  3624. return E1000_SUCCESS;
  3625. }
  3626. void
  3627. e1000_pci_set_mwi(struct e1000_hw *hw)
  3628. {
  3629. struct e1000_adapter *adapter = hw->back;
  3630. int ret_val = pci_set_mwi(adapter->pdev);
  3631. if (ret_val)
  3632. DPRINTK(PROBE, ERR, "Error in setting MWI\n");
  3633. }
  3634. void
  3635. e1000_pci_clear_mwi(struct e1000_hw *hw)
  3636. {
  3637. struct e1000_adapter *adapter = hw->back;
  3638. pci_clear_mwi(adapter->pdev);
  3639. }
  3640. void
  3641. e1000_read_pci_cfg(struct e1000_hw *hw, uint32_t reg, uint16_t *value)
  3642. {
  3643. struct e1000_adapter *adapter = hw->back;
  3644. pci_read_config_word(adapter->pdev, reg, value);
  3645. }
  3646. void
  3647. e1000_write_pci_cfg(struct e1000_hw *hw, uint32_t reg, uint16_t *value)
  3648. {
  3649. struct e1000_adapter *adapter = hw->back;
  3650. pci_write_config_word(adapter->pdev, reg, *value);
  3651. }
  3652. uint32_t
  3653. e1000_io_read(struct e1000_hw *hw, unsigned long port)
  3654. {
  3655. return inl(port);
  3656. }
  3657. void
  3658. e1000_io_write(struct e1000_hw *hw, unsigned long port, uint32_t value)
  3659. {
  3660. outl(value, port);
  3661. }
  3662. static void
  3663. e1000_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp)
  3664. {
  3665. struct e1000_adapter *adapter = netdev_priv(netdev);
  3666. uint32_t ctrl, rctl;
  3667. e1000_irq_disable(adapter);
  3668. adapter->vlgrp = grp;
  3669. if (grp) {
  3670. /* enable VLAN tag insert/strip */
  3671. ctrl = E1000_READ_REG(&adapter->hw, CTRL);
  3672. ctrl |= E1000_CTRL_VME;
  3673. E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
  3674. /* enable VLAN receive filtering */
  3675. rctl = E1000_READ_REG(&adapter->hw, RCTL);
  3676. rctl |= E1000_RCTL_VFE;
  3677. rctl &= ~E1000_RCTL_CFIEN;
  3678. E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
  3679. e1000_update_mng_vlan(adapter);
  3680. } else {
  3681. /* disable VLAN tag insert/strip */
  3682. ctrl = E1000_READ_REG(&adapter->hw, CTRL);
  3683. ctrl &= ~E1000_CTRL_VME;
  3684. E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
  3685. /* disable VLAN filtering */
  3686. rctl = E1000_READ_REG(&adapter->hw, RCTL);
  3687. rctl &= ~E1000_RCTL_VFE;
  3688. E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
  3689. if (adapter->mng_vlan_id != (uint16_t)E1000_MNG_VLAN_NONE) {
  3690. e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
  3691. adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
  3692. }
  3693. }
  3694. e1000_irq_enable(adapter);
  3695. }
  3696. static void
  3697. e1000_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid)
  3698. {
  3699. struct e1000_adapter *adapter = netdev_priv(netdev);
  3700. uint32_t vfta, index;
  3701. if ((adapter->hw.mng_cookie.status &
  3702. E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
  3703. (vid == adapter->mng_vlan_id))
  3704. return;
  3705. /* add VID to filter table */
  3706. index = (vid >> 5) & 0x7F;
  3707. vfta = E1000_READ_REG_ARRAY(&adapter->hw, VFTA, index);
  3708. vfta |= (1 << (vid & 0x1F));
  3709. e1000_write_vfta(&adapter->hw, index, vfta);
  3710. }
  3711. static void
  3712. e1000_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid)
  3713. {
  3714. struct e1000_adapter *adapter = netdev_priv(netdev);
  3715. uint32_t vfta, index;
  3716. e1000_irq_disable(adapter);
  3717. if (adapter->vlgrp)
  3718. adapter->vlgrp->vlan_devices[vid] = NULL;
  3719. e1000_irq_enable(adapter);
  3720. if ((adapter->hw.mng_cookie.status &
  3721. E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
  3722. (vid == adapter->mng_vlan_id)) {
  3723. /* release control to f/w */
  3724. e1000_release_hw_control(adapter);
  3725. return;
  3726. }
  3727. /* remove VID from filter table */
  3728. index = (vid >> 5) & 0x7F;
  3729. vfta = E1000_READ_REG_ARRAY(&adapter->hw, VFTA, index);
  3730. vfta &= ~(1 << (vid & 0x1F));
  3731. e1000_write_vfta(&adapter->hw, index, vfta);
  3732. }
  3733. static void
  3734. e1000_restore_vlan(struct e1000_adapter *adapter)
  3735. {
  3736. e1000_vlan_rx_register(adapter->netdev, adapter->vlgrp);
  3737. if (adapter->vlgrp) {
  3738. uint16_t vid;
  3739. for (vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) {
  3740. if (!adapter->vlgrp->vlan_devices[vid])
  3741. continue;
  3742. e1000_vlan_rx_add_vid(adapter->netdev, vid);
  3743. }
  3744. }
  3745. }
  3746. int
  3747. e1000_set_spd_dplx(struct e1000_adapter *adapter, uint16_t spddplx)
  3748. {
  3749. adapter->hw.autoneg = 0;
  3750. /* Fiber NICs only allow 1000 gbps Full duplex */
  3751. if ((adapter->hw.media_type == e1000_media_type_fiber) &&
  3752. spddplx != (SPEED_1000 + DUPLEX_FULL)) {
  3753. DPRINTK(PROBE, ERR, "Unsupported Speed/Duplex configuration\n");
  3754. return -EINVAL;
  3755. }
  3756. switch (spddplx) {
  3757. case SPEED_10 + DUPLEX_HALF:
  3758. adapter->hw.forced_speed_duplex = e1000_10_half;
  3759. break;
  3760. case SPEED_10 + DUPLEX_FULL:
  3761. adapter->hw.forced_speed_duplex = e1000_10_full;
  3762. break;
  3763. case SPEED_100 + DUPLEX_HALF:
  3764. adapter->hw.forced_speed_duplex = e1000_100_half;
  3765. break;
  3766. case SPEED_100 + DUPLEX_FULL:
  3767. adapter->hw.forced_speed_duplex = e1000_100_full;
  3768. break;
  3769. case SPEED_1000 + DUPLEX_FULL:
  3770. adapter->hw.autoneg = 1;
  3771. adapter->hw.autoneg_advertised = ADVERTISE_1000_FULL;
  3772. break;
  3773. case SPEED_1000 + DUPLEX_HALF: /* not supported */
  3774. default:
  3775. DPRINTK(PROBE, ERR, "Unsupported Speed/Duplex configuration\n");
  3776. return -EINVAL;
  3777. }
  3778. return 0;
  3779. }
  3780. #ifdef CONFIG_PM
  3781. /* Save/restore 16 or 64 dwords of PCI config space depending on which
  3782. * bus we're on (PCI(X) vs. PCI-E)
  3783. */
  3784. #define PCIE_CONFIG_SPACE_LEN 256
  3785. #define PCI_CONFIG_SPACE_LEN 64
  3786. static int
  3787. e1000_pci_save_state(struct e1000_adapter *adapter)
  3788. {
  3789. struct pci_dev *dev = adapter->pdev;
  3790. int size;
  3791. int i;
  3792. if (adapter->hw.mac_type >= e1000_82571)
  3793. size = PCIE_CONFIG_SPACE_LEN;
  3794. else
  3795. size = PCI_CONFIG_SPACE_LEN;
  3796. WARN_ON(adapter->config_space != NULL);
  3797. adapter->config_space = kmalloc(size, GFP_KERNEL);
  3798. if (!adapter->config_space) {
  3799. DPRINTK(PROBE, ERR, "unable to allocate %d bytes\n", size);
  3800. return -ENOMEM;
  3801. }
  3802. for (i = 0; i < (size / 4); i++)
  3803. pci_read_config_dword(dev, i * 4, &adapter->config_space[i]);
  3804. return 0;
  3805. }
  3806. static void
  3807. e1000_pci_restore_state(struct e1000_adapter *adapter)
  3808. {
  3809. struct pci_dev *dev = adapter->pdev;
  3810. int size;
  3811. int i;
  3812. if (adapter->config_space == NULL)
  3813. return;
  3814. if (adapter->hw.mac_type >= e1000_82571)
  3815. size = PCIE_CONFIG_SPACE_LEN;
  3816. else
  3817. size = PCI_CONFIG_SPACE_LEN;
  3818. for (i = 0; i < (size / 4); i++)
  3819. pci_write_config_dword(dev, i * 4, adapter->config_space[i]);
  3820. kfree(adapter->config_space);
  3821. adapter->config_space = NULL;
  3822. return;
  3823. }
  3824. #endif /* CONFIG_PM */
  3825. static int
  3826. e1000_suspend(struct pci_dev *pdev, pm_message_t state)
  3827. {
  3828. struct net_device *netdev = pci_get_drvdata(pdev);
  3829. struct e1000_adapter *adapter = netdev_priv(netdev);
  3830. uint32_t ctrl, ctrl_ext, rctl, manc, status;
  3831. uint32_t wufc = adapter->wol;
  3832. int retval = 0;
  3833. netif_device_detach(netdev);
  3834. if (netif_running(netdev)) {
  3835. WARN_ON(test_bit(__E1000_RESETTING, &adapter->flags));
  3836. e1000_down(adapter);
  3837. }
  3838. #ifdef CONFIG_PM
  3839. /* Implement our own version of pci_save_state(pdev) because pci-
  3840. * express adapters have 256-byte config spaces. */
  3841. retval = e1000_pci_save_state(adapter);
  3842. if (retval)
  3843. return retval;
  3844. #endif
  3845. status = E1000_READ_REG(&adapter->hw, STATUS);
  3846. if (status & E1000_STATUS_LU)
  3847. wufc &= ~E1000_WUFC_LNKC;
  3848. if (wufc) {
  3849. e1000_setup_rctl(adapter);
  3850. e1000_set_multi(netdev);
  3851. /* turn on all-multi mode if wake on multicast is enabled */
  3852. if (adapter->wol & E1000_WUFC_MC) {
  3853. rctl = E1000_READ_REG(&adapter->hw, RCTL);
  3854. rctl |= E1000_RCTL_MPE;
  3855. E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
  3856. }
  3857. if (adapter->hw.mac_type >= e1000_82540) {
  3858. ctrl = E1000_READ_REG(&adapter->hw, CTRL);
  3859. /* advertise wake from D3Cold */
  3860. #define E1000_CTRL_ADVD3WUC 0x00100000
  3861. /* phy power management enable */
  3862. #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000
  3863. ctrl |= E1000_CTRL_ADVD3WUC |
  3864. E1000_CTRL_EN_PHY_PWR_MGMT;
  3865. E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
  3866. }
  3867. if (adapter->hw.media_type == e1000_media_type_fiber ||
  3868. adapter->hw.media_type == e1000_media_type_internal_serdes) {
  3869. /* keep the laser running in D3 */
  3870. ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
  3871. ctrl_ext |= E1000_CTRL_EXT_SDP7_DATA;
  3872. E1000_WRITE_REG(&adapter->hw, CTRL_EXT, ctrl_ext);
  3873. }
  3874. /* Allow time for pending master requests to run */
  3875. e1000_disable_pciex_master(&adapter->hw);
  3876. E1000_WRITE_REG(&adapter->hw, WUC, E1000_WUC_PME_EN);
  3877. E1000_WRITE_REG(&adapter->hw, WUFC, wufc);
  3878. pci_enable_wake(pdev, PCI_D3hot, 1);
  3879. pci_enable_wake(pdev, PCI_D3cold, 1);
  3880. } else {
  3881. E1000_WRITE_REG(&adapter->hw, WUC, 0);
  3882. E1000_WRITE_REG(&adapter->hw, WUFC, 0);
  3883. pci_enable_wake(pdev, PCI_D3hot, 0);
  3884. pci_enable_wake(pdev, PCI_D3cold, 0);
  3885. }
  3886. if (adapter->hw.mac_type >= e1000_82540 &&
  3887. adapter->hw.media_type == e1000_media_type_copper) {
  3888. manc = E1000_READ_REG(&adapter->hw, MANC);
  3889. if (manc & E1000_MANC_SMBUS_EN) {
  3890. manc |= E1000_MANC_ARP_EN;
  3891. E1000_WRITE_REG(&adapter->hw, MANC, manc);
  3892. pci_enable_wake(pdev, PCI_D3hot, 1);
  3893. pci_enable_wake(pdev, PCI_D3cold, 1);
  3894. }
  3895. }
  3896. /* Release control of h/w to f/w. If f/w is AMT enabled, this
  3897. * would have already happened in close and is redundant. */
  3898. e1000_release_hw_control(adapter);
  3899. pci_disable_device(pdev);
  3900. pci_set_power_state(pdev, pci_choose_state(pdev, state));
  3901. return 0;
  3902. }
  3903. #ifdef CONFIG_PM
  3904. static int
  3905. e1000_resume(struct pci_dev *pdev)
  3906. {
  3907. struct net_device *netdev = pci_get_drvdata(pdev);
  3908. struct e1000_adapter *adapter = netdev_priv(netdev);
  3909. uint32_t manc, ret_val;
  3910. pci_set_power_state(pdev, PCI_D0);
  3911. e1000_pci_restore_state(adapter);
  3912. ret_val = pci_enable_device(pdev);
  3913. pci_set_master(pdev);
  3914. pci_enable_wake(pdev, PCI_D3hot, 0);
  3915. pci_enable_wake(pdev, PCI_D3cold, 0);
  3916. e1000_reset(adapter);
  3917. E1000_WRITE_REG(&adapter->hw, WUS, ~0);
  3918. if (netif_running(netdev))
  3919. e1000_up(adapter);
  3920. netif_device_attach(netdev);
  3921. if (adapter->hw.mac_type >= e1000_82540 &&
  3922. adapter->hw.media_type == e1000_media_type_copper) {
  3923. manc = E1000_READ_REG(&adapter->hw, MANC);
  3924. manc &= ~(E1000_MANC_ARP_EN);
  3925. E1000_WRITE_REG(&adapter->hw, MANC, manc);
  3926. }
  3927. /* If the controller is 82573 and f/w is AMT, do not set
  3928. * DRV_LOAD until the interface is up. For all other cases,
  3929. * let the f/w know that the h/w is now under the control
  3930. * of the driver. */
  3931. if (adapter->hw.mac_type != e1000_82573 ||
  3932. !e1000_check_mng_mode(&adapter->hw))
  3933. e1000_get_hw_control(adapter);
  3934. return 0;
  3935. }
  3936. #endif
  3937. static void e1000_shutdown(struct pci_dev *pdev)
  3938. {
  3939. e1000_suspend(pdev, PMSG_SUSPEND);
  3940. }
  3941. #ifdef CONFIG_NET_POLL_CONTROLLER
  3942. /*
  3943. * Polling 'interrupt' - used by things like netconsole to send skbs
  3944. * without having to re-enable interrupts. It's not called while
  3945. * the interrupt routine is executing.
  3946. */
  3947. static void
  3948. e1000_netpoll(struct net_device *netdev)
  3949. {
  3950. struct e1000_adapter *adapter = netdev_priv(netdev);
  3951. disable_irq(adapter->pdev->irq);
  3952. e1000_intr(adapter->pdev->irq, netdev, NULL);
  3953. e1000_clean_tx_irq(adapter, adapter->tx_ring);
  3954. #ifndef CONFIG_E1000_NAPI
  3955. adapter->clean_rx(adapter, adapter->rx_ring);
  3956. #endif
  3957. enable_irq(adapter->pdev->irq);
  3958. }
  3959. #endif
  3960. /**
  3961. * e1000_io_error_detected - called when PCI error is detected
  3962. * @pdev: Pointer to PCI device
  3963. * @state: The current pci conneection state
  3964. *
  3965. * This function is called after a PCI bus error affecting
  3966. * this device has been detected.
  3967. */
  3968. static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev, pci_channel_state_t state)
  3969. {
  3970. struct net_device *netdev = pci_get_drvdata(pdev);
  3971. struct e1000_adapter *adapter = netdev->priv;
  3972. netif_device_detach(netdev);
  3973. if (netif_running(netdev))
  3974. e1000_down(adapter);
  3975. /* Request a slot slot reset. */
  3976. return PCI_ERS_RESULT_NEED_RESET;
  3977. }
  3978. /**
  3979. * e1000_io_slot_reset - called after the pci bus has been reset.
  3980. * @pdev: Pointer to PCI device
  3981. *
  3982. * Restart the card from scratch, as if from a cold-boot. Implementation
  3983. * resembles the first-half of the e1000_resume routine.
  3984. */
  3985. static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev)
  3986. {
  3987. struct net_device *netdev = pci_get_drvdata(pdev);
  3988. struct e1000_adapter *adapter = netdev->priv;
  3989. if (pci_enable_device(pdev)) {
  3990. printk(KERN_ERR "e1000: Cannot re-enable PCI device after reset.\n");
  3991. return PCI_ERS_RESULT_DISCONNECT;
  3992. }
  3993. pci_set_master(pdev);
  3994. pci_enable_wake(pdev, 3, 0);
  3995. pci_enable_wake(pdev, 4, 0); /* 4 == D3 cold */
  3996. /* Perform card reset only on one instance of the card */
  3997. if (PCI_FUNC (pdev->devfn) != 0)
  3998. return PCI_ERS_RESULT_RECOVERED;
  3999. e1000_reset(adapter);
  4000. E1000_WRITE_REG(&adapter->hw, WUS, ~0);
  4001. return PCI_ERS_RESULT_RECOVERED;
  4002. }
  4003. /**
  4004. * e1000_io_resume - called when traffic can start flowing again.
  4005. * @pdev: Pointer to PCI device
  4006. *
  4007. * This callback is called when the error recovery driver tells us that
  4008. * its OK to resume normal operation. Implementation resembles the
  4009. * second-half of the e1000_resume routine.
  4010. */
  4011. static void e1000_io_resume(struct pci_dev *pdev)
  4012. {
  4013. struct net_device *netdev = pci_get_drvdata(pdev);
  4014. struct e1000_adapter *adapter = netdev->priv;
  4015. uint32_t manc, swsm;
  4016. if (netif_running(netdev)) {
  4017. if (e1000_up(adapter)) {
  4018. printk("e1000: can't bring device back up after reset\n");
  4019. return;
  4020. }
  4021. }
  4022. netif_device_attach(netdev);
  4023. if (adapter->hw.mac_type >= e1000_82540 &&
  4024. adapter->hw.media_type == e1000_media_type_copper) {
  4025. manc = E1000_READ_REG(&adapter->hw, MANC);
  4026. manc &= ~(E1000_MANC_ARP_EN);
  4027. E1000_WRITE_REG(&adapter->hw, MANC, manc);
  4028. }
  4029. switch (adapter->hw.mac_type) {
  4030. case e1000_82573:
  4031. swsm = E1000_READ_REG(&adapter->hw, SWSM);
  4032. E1000_WRITE_REG(&adapter->hw, SWSM,
  4033. swsm | E1000_SWSM_DRV_LOAD);
  4034. break;
  4035. default:
  4036. break;
  4037. }
  4038. if (netif_running(netdev))
  4039. mod_timer(&adapter->watchdog_timer, jiffies);
  4040. }
  4041. /* e1000_main.c */