Kconfig 26 KB

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  1. #
  2. # For a description of the syntax of this configuration file,
  3. # see Documentation/kbuild/kconfig-language.txt.
  4. #
  5. mainmenu "uClinux/Blackfin (w/o MMU) Kernel Configuration"
  6. config MMU
  7. bool
  8. default n
  9. config FPU
  10. bool
  11. default n
  12. config RWSEM_GENERIC_SPINLOCK
  13. bool
  14. default y
  15. config RWSEM_XCHGADD_ALGORITHM
  16. bool
  17. default n
  18. config BLACKFIN
  19. bool
  20. default y
  21. config ZONE_DMA
  22. bool
  23. default y
  24. config BFIN
  25. bool
  26. default y
  27. config SEMAPHORE_SLEEPERS
  28. bool
  29. default y
  30. config GENERIC_FIND_NEXT_BIT
  31. bool
  32. default y
  33. config GENERIC_HWEIGHT
  34. bool
  35. default y
  36. config GENERIC_HARDIRQS
  37. bool
  38. default y
  39. config GENERIC_IRQ_PROBE
  40. bool
  41. default y
  42. config GENERIC_TIME
  43. bool
  44. default n
  45. config GENERIC_GPIO
  46. bool
  47. default y
  48. config FORCE_MAX_ZONEORDER
  49. int
  50. default "14"
  51. config GENERIC_CALIBRATE_DELAY
  52. bool
  53. default y
  54. config IRQCHIP_DEMUX_GPIO
  55. bool
  56. depends on (BF53x || BF561 || BF54x)
  57. default y
  58. source "init/Kconfig"
  59. source "kernel/Kconfig.preempt"
  60. menu "Blackfin Processor Options"
  61. comment "Processor and Board Settings"
  62. choice
  63. prompt "CPU"
  64. default BF533
  65. config BF531
  66. bool "BF531"
  67. help
  68. BF531 Processor Support.
  69. config BF532
  70. bool "BF532"
  71. help
  72. BF532 Processor Support.
  73. config BF533
  74. bool "BF533"
  75. help
  76. BF533 Processor Support.
  77. config BF534
  78. bool "BF534"
  79. help
  80. BF534 Processor Support.
  81. config BF536
  82. bool "BF536"
  83. help
  84. BF536 Processor Support.
  85. config BF537
  86. bool "BF537"
  87. help
  88. BF537 Processor Support.
  89. config BF542
  90. bool "BF542"
  91. help
  92. BF542 Processor Support.
  93. config BF544
  94. bool "BF544"
  95. help
  96. BF544 Processor Support.
  97. config BF548
  98. bool "BF548"
  99. help
  100. BF548 Processor Support.
  101. config BF549
  102. bool "BF549"
  103. help
  104. BF549 Processor Support.
  105. config BF561
  106. bool "BF561"
  107. help
  108. Not Supported Yet - Work in progress - BF561 Processor Support.
  109. endchoice
  110. choice
  111. prompt "Silicon Rev"
  112. default BF_REV_0_2 if BF537
  113. default BF_REV_0_3 if BF533
  114. default BF_REV_0_0 if BF549
  115. config BF_REV_0_0
  116. bool "0.0"
  117. depends on (BF549)
  118. config BF_REV_0_2
  119. bool "0.2"
  120. depends on (BF537 || BF536 || BF534)
  121. config BF_REV_0_3
  122. bool "0.3"
  123. depends on (BF561 || BF537 || BF536 || BF534 || BF533 || BF532 || BF531)
  124. config BF_REV_0_4
  125. bool "0.4"
  126. depends on (BF561 || BF533 || BF532 || BF531)
  127. config BF_REV_0_5
  128. bool "0.5"
  129. depends on (BF561 || BF533 || BF532 || BF531)
  130. config BF_REV_ANY
  131. bool "any"
  132. config BF_REV_NONE
  133. bool "none"
  134. endchoice
  135. config BF53x
  136. bool
  137. depends on (BF531 || BF532 || BF533 || BF534 || BF536 || BF537)
  138. default y
  139. config BF54x
  140. bool
  141. depends on (BF542 || BF544 || BF548 || BF549)
  142. default y
  143. config BFIN_DUAL_CORE
  144. bool
  145. depends on (BF561)
  146. default y
  147. config BFIN_SINGLE_CORE
  148. bool
  149. depends on !BFIN_DUAL_CORE
  150. default y
  151. choice
  152. prompt "System type"
  153. default BFIN533_STAMP
  154. help
  155. Do NOT change the board here. Please use the top level
  156. configuration to ensure that all the other settings are
  157. correct.
  158. config BFIN533_EZKIT
  159. bool "BF533-EZKIT"
  160. depends on (BF533 || BF532 || BF531)
  161. help
  162. BF533-EZKIT-LITE board Support.
  163. config BFIN533_STAMP
  164. bool "BF533-STAMP"
  165. depends on (BF533 || BF532 || BF531)
  166. help
  167. BF533-STAMP board Support.
  168. config BFIN537_STAMP
  169. bool "BF537-STAMP"
  170. depends on (BF537 || BF536 || BF534)
  171. help
  172. BF537-STAMP board Support.
  173. config BFIN533_BLUETECHNIX_CM
  174. bool "Bluetechnix CM-BF533"
  175. depends on (BF533)
  176. help
  177. CM-BF533 support for EVAL- and DEV-Board.
  178. config BFIN537_BLUETECHNIX_CM
  179. bool "Bluetechnix CM-BF537"
  180. depends on (BF537)
  181. help
  182. CM-BF537 support for EVAL- and DEV-Board.
  183. config BFIN548_EZKIT
  184. bool "BF548-EZKIT"
  185. depends on (BF548 || BF549)
  186. help
  187. BFIN548-EZKIT board Support.
  188. config BFIN561_BLUETECHNIX_CM
  189. bool "Bluetechnix CM-BF561"
  190. depends on (BF561)
  191. help
  192. CM-BF561 support for EVAL- and DEV-Board.
  193. config BFIN561_EZKIT
  194. bool "BF561-EZKIT"
  195. depends on (BF561)
  196. help
  197. BF561-EZKIT-LITE board Support.
  198. config BFIN561_TEPLA
  199. bool "BF561-TEPLA"
  200. depends on (BF561)
  201. help
  202. BF561-TEPLA board Support.
  203. config PNAV10
  204. bool "PNAV 1.0 board"
  205. depends on (BF537)
  206. help
  207. PNAV 1.0 board Support.
  208. config GENERIC_BOARD
  209. bool "Custom"
  210. depends on (BF537 || BF536 \
  211. || BF534 || BF561 || BF535 || BF533 || BF532 || BF531)
  212. help
  213. GENERIC or Custom board Support.
  214. endchoice
  215. config MEM_GENERIC_BOARD
  216. bool
  217. depends on GENERIC_BOARD
  218. default y
  219. config MEM_MT48LC64M4A2FB_7E
  220. bool
  221. depends on (BFIN533_STAMP)
  222. default y
  223. config MEM_MT48LC16M16A2TG_75
  224. bool
  225. depends on (BFIN533_EZKIT || BFIN561_EZKIT \
  226. || BFIN533_BLUETECHNIX_CM || BFIN537_BLUETECHNIX_CM)
  227. default y
  228. config MEM_MT48LC32M8A2_75
  229. bool
  230. depends on (BFIN537_STAMP || PNAV10)
  231. default y
  232. config MEM_MT48LC8M32B2B5_7
  233. bool
  234. depends on (BFIN561_BLUETECHNIX_CM)
  235. default y
  236. config BFIN_SHARED_FLASH_ENET
  237. bool
  238. depends on (BFIN533_STAMP)
  239. default y
  240. source "arch/blackfin/mach-bf533/Kconfig"
  241. source "arch/blackfin/mach-bf561/Kconfig"
  242. source "arch/blackfin/mach-bf537/Kconfig"
  243. source "arch/blackfin/mach-bf548/Kconfig"
  244. menu "Board customizations"
  245. config CMDLINE_BOOL
  246. bool "Default bootloader kernel arguments"
  247. config CMDLINE
  248. string "Initial kernel command string"
  249. depends on CMDLINE_BOOL
  250. default "console=ttyBF0,57600"
  251. help
  252. If you don't have a boot loader capable of passing a command line string
  253. to the kernel, you may specify one here. As a minimum, you should specify
  254. the memory size and the root device (e.g., mem=8M, root=/dev/nfs).
  255. comment "Clock/PLL Setup"
  256. config CLKIN_HZ
  257. int "Crystal Frequency in Hz"
  258. default "11059200" if BFIN533_STAMP
  259. default "27000000" if BFIN533_EZKIT
  260. default "25000000" if BFIN537_STAMP
  261. default "30000000" if BFIN561_EZKIT
  262. default "24576000" if PNAV10
  263. help
  264. The frequency of CLKIN crystal oscillator on the board in Hz.
  265. config BFIN_KERNEL_CLOCK
  266. bool "Re-program Clocks while Kernel boots?"
  267. default n
  268. help
  269. This option decides if kernel clocks are re-programed from the
  270. bootloader settings. If the clocks are not set, the SDRAM settings
  271. are also not changed, and the Bootloader does 100% of the hardware
  272. configuration.
  273. config PLL_BYPASS
  274. bool "Bypass PLL"
  275. depends on BFIN_KERNEL_CLOCK
  276. default n
  277. config CLKIN_HALF
  278. bool "Half Clock In"
  279. depends on BFIN_KERNEL_CLOCK && (! PLL_BYPASS)
  280. default n
  281. help
  282. If this is set the clock will be divided by 2, before it goes to the PLL.
  283. config VCO_MULT
  284. int "VCO Multiplier"
  285. depends on BFIN_KERNEL_CLOCK && (! PLL_BYPASS)
  286. range 1 64
  287. default "22" if BFIN533_EZKIT
  288. default "45" if BFIN533_STAMP
  289. default "20" if BFIN537_STAMP
  290. default "22" if BFIN533_BLUETECHNIX_CM
  291. default "20" if BFIN537_BLUETECHNIX_CM
  292. default "20" if BFIN561_BLUETECHNIX_CM
  293. default "20" if BFIN561_EZKIT
  294. help
  295. This controls the frequency of the on-chip PLL. This can be between 1 and 64.
  296. PLL Frequency = (Crystal Frequency) * (this setting)
  297. choice
  298. prompt "Core Clock Divider"
  299. depends on BFIN_KERNEL_CLOCK
  300. default CCLK_DIV_1
  301. help
  302. This sets the frequency of the core. It can be 1, 2, 4 or 8
  303. Core Frequency = (PLL frequency) / (this setting)
  304. config CCLK_DIV_1
  305. bool "1"
  306. config CCLK_DIV_2
  307. bool "2"
  308. config CCLK_DIV_4
  309. bool "4"
  310. config CCLK_DIV_8
  311. bool "8"
  312. endchoice
  313. config SCLK_DIV
  314. int "System Clock Divider"
  315. depends on BFIN_KERNEL_CLOCK
  316. range 1 15
  317. default 5 if BFIN533_EZKIT
  318. default 5 if BFIN533_STAMP
  319. default 4 if BFIN537_STAMP
  320. default 5 if BFIN533_BLUETECHNIX_CM
  321. default 4 if BFIN537_BLUETECHNIX_CM
  322. default 4 if BFIN561_BLUETECHNIX_CM
  323. default 5 if BFIN561_EZKIT
  324. help
  325. This sets the frequency of the system clock (including SDRAM or DDR).
  326. This can be between 1 and 15
  327. System Clock = (PLL frequency) / (this setting)
  328. #
  329. # Max & Min Speeds for various Chips
  330. #
  331. config MAX_VCO_HZ
  332. int
  333. default 600000000 if BF522
  334. default 600000000 if BF525
  335. default 600000000 if BF527
  336. default 400000000 if BF531
  337. default 400000000 if BF532
  338. default 750000000 if BF533
  339. default 500000000 if BF534
  340. default 400000000 if BF536
  341. default 600000000 if BF537
  342. default 533000000 if BF538
  343. default 533000000 if BF539
  344. default 600000000 if BF542
  345. default 533000000 if BF544
  346. default 533000000 if BF549
  347. default 600000000 if BF561
  348. config MIN_VCO_HZ
  349. int
  350. default 50000000
  351. config MAX_SCLK_HZ
  352. int
  353. default 133000000
  354. config MIN_SCLK_HZ
  355. int
  356. default 27000000
  357. comment "Kernel Timer/Scheduler"
  358. source kernel/Kconfig.hz
  359. comment "Memory Setup"
  360. config MEM_SIZE
  361. int "SDRAM Memory Size in MBytes"
  362. default 32 if BFIN533_EZKIT
  363. default 64 if BFIN537_STAMP
  364. default 64 if BFIN561_EZKIT
  365. default 128 if BFIN533_STAMP
  366. default 64 if PNAV10
  367. config MEM_ADD_WIDTH
  368. int "SDRAM Memory Address Width"
  369. default 9 if BFIN533_EZKIT
  370. default 9 if BFIN561_EZKIT
  371. default 10 if BFIN537_STAMP
  372. default 11 if BFIN533_STAMP
  373. default 10 if PNAV10
  374. config ENET_FLASH_PIN
  375. int "PF port/pin used for flash and ethernet sharing"
  376. depends on (BFIN533_STAMP)
  377. default 0
  378. help
  379. PF port/pin used for flash and ethernet sharing to allow other PF
  380. pins to be used on other platforms without having to touch common
  381. code.
  382. For example: PF0 --> 0,PF1 --> 1,PF2 --> 2, etc.
  383. config BOOT_LOAD
  384. hex "Kernel load address for booting"
  385. default "0x1000"
  386. range 0x1000 0x20000000
  387. help
  388. This option allows you to set the load address of the kernel.
  389. This can be useful if you are on a board which has a small amount
  390. of memory or you wish to reserve some memory at the beginning of
  391. the address space.
  392. Note that you need to keep this value above 4k (0x1000) as this
  393. memory region is used to capture NULL pointer references as well
  394. as some core kernel functions.
  395. comment "LED Status Indicators"
  396. depends on (BFIN533_STAMP || BFIN533_BLUETECHNIX_CM)
  397. config BFIN_ALIVE_LED
  398. bool "Enable Board Alive"
  399. depends on (BFIN533_STAMP || BFIN533_BLUETECHNIX_CM)
  400. default n
  401. help
  402. Blink the LEDs you select when the kernel is running. Helps detect
  403. a hung kernel.
  404. config BFIN_ALIVE_LED_NUM
  405. int "LED"
  406. depends on BFIN_ALIVE_LED
  407. range 1 3 if BFIN533_STAMP
  408. default "3" if BFIN533_STAMP
  409. help
  410. Select the LED (marked on the board) for you to blink.
  411. config BFIN_IDLE_LED
  412. bool "Enable System Load/Idle LED"
  413. depends on (BFIN533_STAMP || BFIN533_BLUETECHNIX_CM)
  414. default n
  415. help
  416. Blinks the LED you select when to determine kernel load.
  417. config BFIN_IDLE_LED_NUM
  418. int "LED"
  419. depends on BFIN_IDLE_LED
  420. range 1 3 if BFIN533_STAMP
  421. default "2" if BFIN533_STAMP
  422. help
  423. Select the LED (marked on the board) for you to blink.
  424. #
  425. # Sorry - but you need to put the hex address here -
  426. #
  427. # Flag Data register
  428. config BFIN_ALIVE_LED_PORT
  429. hex
  430. default 0xFFC00700 if (BFIN533_STAMP)
  431. # Peripheral Flag Direction Register
  432. config BFIN_ALIVE_LED_DPORT
  433. hex
  434. default 0xFFC00730 if (BFIN533_STAMP)
  435. config BFIN_ALIVE_LED_PIN
  436. hex
  437. default 0x04 if (BFIN533_STAMP && BFIN_ALIVE_LED_NUM = 1)
  438. default 0x08 if (BFIN533_STAMP && BFIN_ALIVE_LED_NUM = 2)
  439. default 0x10 if (BFIN533_STAMP && BFIN_ALIVE_LED_NUM = 3)
  440. config BFIN_IDLE_LED_PORT
  441. hex
  442. default 0xFFC00700 if (BFIN533_STAMP)
  443. # Peripheral Flag Direction Register
  444. config BFIN_IDLE_LED_DPORT
  445. hex
  446. default 0xFFC00730 if (BFIN533_STAMP)
  447. config BFIN_IDLE_LED_PIN
  448. hex
  449. default 0x04 if (BFIN533_STAMP && BFIN_IDLE_LED_NUM = 1)
  450. default 0x08 if (BFIN533_STAMP && BFIN_IDLE_LED_NUM = 2)
  451. default 0x10 if (BFIN533_STAMP && BFIN_IDLE_LED_NUM = 3)
  452. endmenu
  453. menu "Blackfin Kernel Optimizations"
  454. comment "Memory Optimizations"
  455. config I_ENTRY_L1
  456. bool "Locate interrupt entry code in L1 Memory"
  457. default y
  458. help
  459. If enabled interrupt entry code (STORE/RESTORE CONTEXT) is linked
  460. into L1 instruction memory.(less latency)
  461. config EXCPT_IRQ_SYSC_L1
  462. bool "Locate entire ASM lowlevel excepetion / interrupt - Syscall and CPLB handler code in L1 Memory"
  463. default y
  464. help
  465. If enabled entire ASM lowlevel exception and interrupt entry code (STORE/RESTORE CONTEXT) is linked
  466. into L1 instruction memory.(less latency)
  467. config DO_IRQ_L1
  468. bool "Locate frequently called do_irq dispatcher function in L1 Memory"
  469. default y
  470. help
  471. If enabled frequently called do_irq dispatcher function is linked
  472. into L1 instruction memory.(less latency)
  473. config CORE_TIMER_IRQ_L1
  474. bool "Locate frequently called timer_interrupt() function in L1 Memory"
  475. default y
  476. help
  477. If enabled frequently called timer_interrupt() function is linked
  478. into L1 instruction memory.(less latency)
  479. config IDLE_L1
  480. bool "Locate frequently idle function in L1 Memory"
  481. default y
  482. help
  483. If enabled frequently called idle function is linked
  484. into L1 instruction memory.(less latency)
  485. config SCHEDULE_L1
  486. bool "Locate kernel schedule function in L1 Memory"
  487. default y
  488. help
  489. If enabled frequently called kernel schedule is linked
  490. into L1 instruction memory.(less latency)
  491. config ARITHMETIC_OPS_L1
  492. bool "Locate kernel owned arithmetic functions in L1 Memory"
  493. default y
  494. help
  495. If enabled arithmetic functions are linked
  496. into L1 instruction memory.(less latency)
  497. config ACCESS_OK_L1
  498. bool "Locate access_ok function in L1 Memory"
  499. default y
  500. help
  501. If enabled access_ok function is linked
  502. into L1 instruction memory.(less latency)
  503. config MEMSET_L1
  504. bool "Locate memset function in L1 Memory"
  505. default y
  506. help
  507. If enabled memset function is linked
  508. into L1 instruction memory.(less latency)
  509. config MEMCPY_L1
  510. bool "Locate memcpy function in L1 Memory"
  511. default y
  512. help
  513. If enabled memcpy function is linked
  514. into L1 instruction memory.(less latency)
  515. config SYS_BFIN_SPINLOCK_L1
  516. bool "Locate sys_bfin_spinlock function in L1 Memory"
  517. default y
  518. help
  519. If enabled sys_bfin_spinlock function is linked
  520. into L1 instruction memory.(less latency)
  521. config IP_CHECKSUM_L1
  522. bool "Locate IP Checksum function in L1 Memory"
  523. default n
  524. help
  525. If enabled IP Checksum function is linked
  526. into L1 instruction memory.(less latency)
  527. config CACHELINE_ALIGNED_L1
  528. bool "Locate cacheline_aligned data to L1 Data Memory"
  529. default y if !BF54x
  530. default n if BF54x
  531. depends on !BF531
  532. help
  533. If enabled cacheline_anligned data is linked
  534. into L1 data memory.(less latency)
  535. config SYSCALL_TAB_L1
  536. bool "Locate Syscall Table L1 Data Memory"
  537. default n
  538. depends on !BF531
  539. help
  540. If enabled the Syscall LUT is linked
  541. into L1 data memory.(less latency)
  542. config CPLB_SWITCH_TAB_L1
  543. bool "Locate CPLB Switch Tables L1 Data Memory"
  544. default n
  545. depends on !BF531
  546. help
  547. If enabled the CPLB Switch Tables are linked
  548. into L1 data memory.(less latency)
  549. endmenu
  550. choice
  551. prompt "Kernel executes from"
  552. help
  553. Choose the memory type that the kernel will be running in.
  554. config RAMKERNEL
  555. bool "RAM"
  556. help
  557. The kernel will be resident in RAM when running.
  558. config ROMKERNEL
  559. bool "ROM"
  560. help
  561. The kernel will be resident in FLASH/ROM when running.
  562. endchoice
  563. source "mm/Kconfig"
  564. config LARGE_ALLOCS
  565. bool "Allow allocating large blocks (> 1MB) of memory"
  566. help
  567. Allow the slab memory allocator to keep chains for very large
  568. memory sizes - upto 32MB. You may need this if your system has
  569. a lot of RAM, and you need to able to allocate very large
  570. contiguous chunks. If unsure, say N.
  571. config BFIN_DMA_5XX
  572. bool "Enable DMA Support"
  573. depends on (BF533 || BF532 || BF531 || BF537 || BF536 || BF534 || BF561 || BF54x)
  574. default y
  575. help
  576. DMA driver for BF5xx.
  577. choice
  578. prompt "Uncached SDRAM region"
  579. default DMA_UNCACHED_1M
  580. depends BFIN_DMA_5XX
  581. config DMA_UNCACHED_2M
  582. bool "Enable 2M DMA region"
  583. config DMA_UNCACHED_1M
  584. bool "Enable 1M DMA region"
  585. config DMA_UNCACHED_NONE
  586. bool "Disable DMA region"
  587. endchoice
  588. comment "Cache Support"
  589. config BFIN_ICACHE
  590. bool "Enable ICACHE"
  591. config BFIN_DCACHE
  592. bool "Enable DCACHE"
  593. config BFIN_DCACHE_BANKA
  594. bool "Enable only 16k BankA DCACHE - BankB is SRAM"
  595. depends on BFIN_DCACHE && !BF531
  596. default n
  597. config BFIN_ICACHE_LOCK
  598. bool "Enable Instruction Cache Locking"
  599. choice
  600. prompt "Policy"
  601. depends on BFIN_DCACHE
  602. default BFIN_WB
  603. config BFIN_WB
  604. bool "Write back"
  605. help
  606. Write Back Policy:
  607. Cached data will be written back to SDRAM only when needed.
  608. This can give a nice increase in performance, but beware of
  609. broken drivers that do not properly invalidate/flush their
  610. cache.
  611. Write Through Policy:
  612. Cached data will always be written back to SDRAM when the
  613. cache is updated. This is a completely safe setting, but
  614. performance is worse than Write Back.
  615. If you are unsure of the options and you want to be safe,
  616. then go with Write Through.
  617. config BFIN_WT
  618. bool "Write through"
  619. help
  620. Write Back Policy:
  621. Cached data will be written back to SDRAM only when needed.
  622. This can give a nice increase in performance, but beware of
  623. broken drivers that do not properly invalidate/flush their
  624. cache.
  625. Write Through Policy:
  626. Cached data will always be written back to SDRAM when the
  627. cache is updated. This is a completely safe setting, but
  628. performance is worse than Write Back.
  629. If you are unsure of the options and you want to be safe,
  630. then go with Write Through.
  631. endchoice
  632. config L1_MAX_PIECE
  633. int "Set the max L1 SRAM pieces"
  634. default 16
  635. help
  636. Set the max memory pieces for the L1 SRAM allocation algorithm.
  637. Min value is 16. Max value is 1024.
  638. comment "Asynchonous Memory Configuration"
  639. menu "EBIU_AMBCTL Global Control"
  640. config C_AMCKEN
  641. bool "Enable CLKOUT"
  642. default y
  643. config C_CDPRIO
  644. bool "DMA has priority over core for ext. accesses"
  645. depends on !BF54x
  646. default n
  647. config C_B0PEN
  648. depends on BF561
  649. bool "Bank 0 16 bit packing enable"
  650. default y
  651. config C_B1PEN
  652. depends on BF561
  653. bool "Bank 1 16 bit packing enable"
  654. default y
  655. config C_B2PEN
  656. depends on BF561
  657. bool "Bank 2 16 bit packing enable"
  658. default y
  659. config C_B3PEN
  660. depends on BF561
  661. bool "Bank 3 16 bit packing enable"
  662. default n
  663. choice
  664. prompt"Enable Asynchonous Memory Banks"
  665. default C_AMBEN_ALL
  666. config C_AMBEN
  667. bool "Disable All Banks"
  668. config C_AMBEN_B0
  669. bool "Enable Bank 0"
  670. config C_AMBEN_B0_B1
  671. bool "Enable Bank 0 & 1"
  672. config C_AMBEN_B0_B1_B2
  673. bool "Enable Bank 0 & 1 & 2"
  674. config C_AMBEN_ALL
  675. bool "Enable All Banks"
  676. endchoice
  677. endmenu
  678. menu "EBIU_AMBCTL Control"
  679. config BANK_0
  680. hex "Bank 0"
  681. default 0x7BB0
  682. config BANK_1
  683. hex "Bank 1"
  684. default 0x7BB0
  685. config BANK_2
  686. hex "Bank 2"
  687. default 0x7BB0
  688. config BANK_3
  689. hex "Bank 3"
  690. default 0x99B3
  691. endmenu
  692. endmenu
  693. #############################################################################
  694. menu "Bus options (PCI, PCMCIA, EISA, MCA, ISA)"
  695. config PCI
  696. bool "PCI support"
  697. help
  698. Support for PCI bus.
  699. source "drivers/pci/Kconfig"
  700. config HOTPLUG
  701. bool "Support for hot-pluggable device"
  702. help
  703. Say Y here if you want to plug devices into your computer while
  704. the system is running, and be able to use them quickly. In many
  705. cases, the devices can likewise be unplugged at any time too.
  706. One well known example of this is PCMCIA- or PC-cards, credit-card
  707. size devices such as network cards, modems or hard drives which are
  708. plugged into slots found on all modern laptop computers. Another
  709. example, used on modern desktops as well as laptops, is USB.
  710. Enable HOTPLUG and KMOD, and build a modular kernel. Get agent
  711. software (at <http://linux-hotplug.sourceforge.net/>) and install it.
  712. Then your kernel will automatically call out to a user mode "policy
  713. agent" (/sbin/hotplug) to load modules and set up software needed
  714. to use devices as you hotplug them.
  715. source "drivers/pcmcia/Kconfig"
  716. source "drivers/pci/hotplug/Kconfig"
  717. endmenu
  718. menu "Executable file formats"
  719. source "fs/Kconfig.binfmt"
  720. endmenu
  721. menu "Power management options"
  722. source "kernel/power/Kconfig"
  723. choice
  724. prompt "Select PM Wakeup Event Source"
  725. default PM_WAKEUP_GPIO_BY_SIC_IWR
  726. depends on PM
  727. help
  728. If you have a GPIO already configured as input with the corresponding PORTx_MASK
  729. bit set - "Specify Wakeup Event by SIC_IWR value"
  730. config PM_WAKEUP_GPIO_BY_SIC_IWR
  731. bool "Specify Wakeup Event by SIC_IWR value"
  732. config PM_WAKEUP_BY_GPIO
  733. bool "Cause Wakeup Event by GPIO"
  734. config PM_WAKEUP_GPIO_API
  735. bool "Configure Wakeup Event by PM GPIO API"
  736. endchoice
  737. config PM_WAKEUP_SIC_IWR
  738. hex "Wakeup Events (SIC_IWR)"
  739. depends on PM_WAKEUP_GPIO_BY_SIC_IWR
  740. default 0x80000000 if (BF537 || BF536 || BF534)
  741. default 0x100000 if (BF533 || BF532 || BF531)
  742. config PM_WAKEUP_GPIO_NUMBER
  743. int "Wakeup GPIO number"
  744. range 0 47
  745. depends on PM_WAKEUP_BY_GPIO
  746. default 2 if BFIN537_STAMP
  747. choice
  748. prompt "GPIO Polarity"
  749. depends on PM_WAKEUP_BY_GPIO
  750. default PM_WAKEUP_GPIO_POLAR_H
  751. config PM_WAKEUP_GPIO_POLAR_H
  752. bool "Active High"
  753. config PM_WAKEUP_GPIO_POLAR_L
  754. bool "Active Low"
  755. config PM_WAKEUP_GPIO_POLAR_EDGE_F
  756. bool "Falling EDGE"
  757. config PM_WAKEUP_GPIO_POLAR_EDGE_R
  758. bool "Rising EDGE"
  759. config PM_WAKEUP_GPIO_POLAR_EDGE_B
  760. bool "Both EDGE"
  761. endchoice
  762. endmenu
  763. if (BF537 || BF533 || BF54x)
  764. menu "CPU Frequency scaling"
  765. source "drivers/cpufreq/Kconfig"
  766. config CPU_FREQ
  767. bool
  768. default n
  769. help
  770. If you want to enable this option, you should select the
  771. DPMC driver from Character Devices.
  772. endmenu
  773. endif
  774. source "net/Kconfig"
  775. source "drivers/Kconfig"
  776. source "fs/Kconfig"
  777. source "arch/blackfin/oprofile/Kconfig"
  778. menu "Kernel hacking"
  779. source "lib/Kconfig.debug"
  780. config DEBUG_HWERR
  781. bool "Hardware error interrupt debugging"
  782. depends on DEBUG_KERNEL
  783. help
  784. When enabled, the hardware error interrupt is never disabled, and
  785. will happen immediately when an error condition occurs. This comes
  786. at a slight cost in code size, but is necessary if you are getting
  787. hardware error interrupts and need to know where they are coming
  788. from.
  789. config DEBUG_ICACHE_CHECK
  790. bool "Check Instruction cache coherancy"
  791. depends on DEBUG_KERNEL
  792. depends on DEBUG_HWERR
  793. help
  794. Say Y here if you are getting wierd unexplained errors. This will
  795. ensure that icache is what SDRAM says it should be, by doing a
  796. byte wise comparision between SDRAM and instruction cache. This
  797. also relocates the irq_panic() function to L1 memory, (which is
  798. un-cached).
  799. config DEBUG_KERNEL_START
  800. bool "Debug Kernel Startup"
  801. depends on DEBUG_KERNEL
  802. help
  803. Say Y here to put in an mini-execption handler before the kernel
  804. replaces the bootloader exception handler. This will stop kernels
  805. from dieing at startup with no visible error messages.
  806. config DEBUG_SERIAL_EARLY_INIT
  807. bool "Initialize serial driver early"
  808. default n
  809. depends on SERIAL_BFIN
  810. help
  811. Say Y here if you want to get kernel output early when kernel
  812. crashes before the normal console initialization. If this option
  813. is enable, console output will always go to the ttyBF0, no matter
  814. what kernel boot paramters you set.
  815. config DEBUG_HUNT_FOR_ZERO
  816. bool "Catch NULL pointer reads/writes"
  817. default y
  818. help
  819. Say Y here to catch reads/writes to anywhere in the memory range
  820. from 0x0000 - 0x0FFF (the first 4k) of memory. This is useful in
  821. catching common programming errors such as NULL pointer dereferences.
  822. Misbehaving applications will be killed (generate a SEGV) while the
  823. kernel will trigger a panic.
  824. Enabling this option will take up an extra entry in CPLB table.
  825. Otherwise, there is no extra overhead.
  826. config DEBUG_BFIN_HWTRACE_ON
  827. bool "Turn on Blackfin's Hardware Trace"
  828. default y
  829. help
  830. All Blackfins include a Trace Unit which stores a history of the last
  831. 16 changes in program flow taken by the program sequencer. The history
  832. allows the user to recreate the program sequencer’s recent path. This
  833. can be handy when an application dies - we print out the execution
  834. path of how it got to the offending instruction.
  835. By turning this off, you may save a tiny amount of power.
  836. choice
  837. prompt "Omit loop Tracing"
  838. default DEBUG_BFIN_HWTRACE_COMPRESSION_OFF
  839. depends on DEBUG_BFIN_HWTRACE_ON
  840. help
  841. The trace buffer can be configured to omit recording of changes in
  842. program flow that match either the last entry or one of the last
  843. two entries. Omitting one of these entries from the record prevents
  844. the trace buffer from overflowing because of any sort of loop (for, do
  845. while, etc) in the program.
  846. Because zero-overhead Hardware loops are not recorded in the trace buffer,
  847. this feature can be used to prevent trace overflow from loops that
  848. are nested four deep.
  849. config DEBUG_BFIN_HWTRACE_COMPRESSION_OFF
  850. bool "Trace all Loops"
  851. help
  852. The trace buffer records all changes of flow
  853. config DEBUG_BFIN_HWTRACE_COMPRESSION_ONE
  854. bool "Compress single-level loops"
  855. help
  856. The trace buffer does not record single loops - helpful if trace
  857. is spinning on a while or do loop.
  858. config DEBUG_BFIN_HWTRACE_COMPRESSION_TWO
  859. bool "Compress two-level loops"
  860. help
  861. The trace buffer does not record loops two levels deep. Helpful if
  862. the trace is spinning in a nested loop
  863. endchoice
  864. config DEBUG_BFIN_HWTRACE_COMPRESSION
  865. int
  866. depends on DEBUG_BFIN_HWTRACE_ON
  867. default 0 if DEBUG_BFIN_HWTRACE_COMPRESSION_OFF
  868. default 1 if DEBUG_BFIN_HWTRACE_COMPRESSION_ONE
  869. default 2 if DEBUG_BFIN_HWTRACE_COMPRESSION_TWO
  870. config DEBUG_BFIN_HWTRACE_EXPAND
  871. bool "Expand Trace Buffer greater than 16 entries"
  872. depends on DEBUG_BFIN_HWTRACE_ON
  873. default n
  874. help
  875. By selecting this option, every time the 16 hardware entries in
  876. the Blackfin's HW Trace buffer are full, the kernel will move them
  877. into a software buffer, for dumping when there is an issue. This
  878. has a great impact on performance, (an interrupt every 16 change of
  879. flows) and should normally be turned off, except in those nasty
  880. debugging sessions
  881. config DEBUG_BFIN_HWTRACE_EXPAND_LEN
  882. int "Size of Trace buffer (in power of 2k)"
  883. range 0 4
  884. depends on DEBUG_BFIN_HWTRACE_EXPAND
  885. default 1
  886. help
  887. This sets the size of the software buffer that the trace information
  888. is kept in.
  889. 0 for (2^0) 1k, or 256 entries,
  890. 1 for (2^1) 2k, or 512 entries,
  891. 2 for (2^2) 4k, or 1024 entries,
  892. 3 for (2^3) 8k, or 2048 entries,
  893. 4 for (2^4) 16k, or 4096 entries
  894. config DEBUG_BFIN_NO_KERN_HWTRACE
  895. bool "Trace user apps (turn off hwtrace in kernel)"
  896. depends on DEBUG_BFIN_HWTRACE_ON
  897. default n
  898. help
  899. Some pieces of the kernel contain a lot of flow changes which can
  900. quickly fill up the hardware trace buffer. When debugging crashes,
  901. the hardware trace may indicate that the problem lies in kernel
  902. space when in reality an application is buggy.
  903. Say Y here to disable hardware tracing in some known "jumpy" pieces
  904. of code so that the trace buffer will extend further back.
  905. config DUAL_CORE_TEST_MODULE
  906. tristate "Dual Core Test Module"
  907. depends on (BF561)
  908. default n
  909. help
  910. Say Y here to build-in dual core test module for dual core test.
  911. config CPLB_INFO
  912. bool "Display the CPLB information"
  913. help
  914. Display the CPLB information.
  915. config ACCESS_CHECK
  916. bool "Check the user pointer address"
  917. default y
  918. help
  919. Usually the pointer transfer from user space is checked to see if its
  920. address is in the kernel space.
  921. Say N here to disable that check to improve the performance.
  922. endmenu
  923. source "security/Kconfig"
  924. source "crypto/Kconfig"
  925. source "lib/Kconfig"