i2s.c 26 KB

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  1. /* sound/soc/samsung/i2s.c
  2. *
  3. * ALSA SoC Audio Layer - Samsung I2S Controller driver
  4. *
  5. * Copyright (c) 2010 Samsung Electronics Co. Ltd.
  6. * Jaswinder Singh <jassisinghbrar@gmail.com>
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License version 2 as
  10. * published by the Free Software Foundation.
  11. */
  12. #include <linux/delay.h>
  13. #include <linux/slab.h>
  14. #include <linux/clk.h>
  15. #include <linux/io.h>
  16. #include <linux/module.h>
  17. #include <linux/pm_runtime.h>
  18. #include <sound/soc.h>
  19. #include <sound/pcm_params.h>
  20. #include <linux/platform_data/asoc-s3c.h>
  21. #include "dma.h"
  22. #include "idma.h"
  23. #include "i2s.h"
  24. #include "i2s-regs.h"
  25. #define msecs_to_loops(t) (loops_per_jiffy / 1000 * HZ * t)
  26. enum samsung_dai_type {
  27. TYPE_PRI,
  28. TYPE_SEC,
  29. };
  30. struct i2s_dai {
  31. /* Platform device for this DAI */
  32. struct platform_device *pdev;
  33. /* IOREMAP'd SFRs */
  34. void __iomem *addr;
  35. /* Physical base address of SFRs */
  36. u32 base;
  37. /* Rate of RCLK source clock */
  38. unsigned long rclk_srcrate;
  39. /* Frame Clock */
  40. unsigned frmclk;
  41. /*
  42. * Specifically requested RCLK,BCLK by MACHINE Driver.
  43. * 0 indicates CPU driver is free to choose any value.
  44. */
  45. unsigned rfs, bfs;
  46. /* I2S Controller's core clock */
  47. struct clk *clk;
  48. /* Clock for generating I2S signals */
  49. struct clk *op_clk;
  50. /* Pointer to the Primary_Fifo if this is Sec_Fifo, NULL otherwise */
  51. struct i2s_dai *pri_dai;
  52. /* Pointer to the Secondary_Fifo if it has one, NULL otherwise */
  53. struct i2s_dai *sec_dai;
  54. #define DAI_OPENED (1 << 0) /* Dai is opened */
  55. #define DAI_MANAGER (1 << 1) /* Dai is the manager */
  56. unsigned mode;
  57. /* Driver for this DAI */
  58. struct snd_soc_dai_driver i2s_dai_drv;
  59. /* DMA parameters */
  60. struct s3c_dma_params dma_playback;
  61. struct s3c_dma_params dma_capture;
  62. struct s3c_dma_params idma_playback;
  63. u32 quirks;
  64. u32 suspend_i2smod;
  65. u32 suspend_i2scon;
  66. u32 suspend_i2spsr;
  67. };
  68. /* Lock for cross i/f checks */
  69. static DEFINE_SPINLOCK(lock);
  70. /* If this is the 'overlay' stereo DAI */
  71. static inline bool is_secondary(struct i2s_dai *i2s)
  72. {
  73. return i2s->pri_dai ? true : false;
  74. }
  75. /* If operating in SoC-Slave mode */
  76. static inline bool is_slave(struct i2s_dai *i2s)
  77. {
  78. return (readl(i2s->addr + I2SMOD) & MOD_SLAVE) ? true : false;
  79. }
  80. /* If this interface of the controller is transmitting data */
  81. static inline bool tx_active(struct i2s_dai *i2s)
  82. {
  83. u32 active;
  84. if (!i2s)
  85. return false;
  86. active = readl(i2s->addr + I2SCON);
  87. if (is_secondary(i2s))
  88. active &= CON_TXSDMA_ACTIVE;
  89. else
  90. active &= CON_TXDMA_ACTIVE;
  91. return active ? true : false;
  92. }
  93. /* If the other interface of the controller is transmitting data */
  94. static inline bool other_tx_active(struct i2s_dai *i2s)
  95. {
  96. struct i2s_dai *other = i2s->pri_dai ? : i2s->sec_dai;
  97. return tx_active(other);
  98. }
  99. /* If any interface of the controller is transmitting data */
  100. static inline bool any_tx_active(struct i2s_dai *i2s)
  101. {
  102. return tx_active(i2s) || other_tx_active(i2s);
  103. }
  104. /* If this interface of the controller is receiving data */
  105. static inline bool rx_active(struct i2s_dai *i2s)
  106. {
  107. u32 active;
  108. if (!i2s)
  109. return false;
  110. active = readl(i2s->addr + I2SCON) & CON_RXDMA_ACTIVE;
  111. return active ? true : false;
  112. }
  113. /* If the other interface of the controller is receiving data */
  114. static inline bool other_rx_active(struct i2s_dai *i2s)
  115. {
  116. struct i2s_dai *other = i2s->pri_dai ? : i2s->sec_dai;
  117. return rx_active(other);
  118. }
  119. /* If any interface of the controller is receiving data */
  120. static inline bool any_rx_active(struct i2s_dai *i2s)
  121. {
  122. return rx_active(i2s) || other_rx_active(i2s);
  123. }
  124. /* If the other DAI is transmitting or receiving data */
  125. static inline bool other_active(struct i2s_dai *i2s)
  126. {
  127. return other_rx_active(i2s) || other_tx_active(i2s);
  128. }
  129. /* If this DAI is transmitting or receiving data */
  130. static inline bool this_active(struct i2s_dai *i2s)
  131. {
  132. return tx_active(i2s) || rx_active(i2s);
  133. }
  134. /* If the controller is active anyway */
  135. static inline bool any_active(struct i2s_dai *i2s)
  136. {
  137. return this_active(i2s) || other_active(i2s);
  138. }
  139. static inline struct i2s_dai *to_info(struct snd_soc_dai *dai)
  140. {
  141. return snd_soc_dai_get_drvdata(dai);
  142. }
  143. static inline bool is_opened(struct i2s_dai *i2s)
  144. {
  145. if (i2s && (i2s->mode & DAI_OPENED))
  146. return true;
  147. else
  148. return false;
  149. }
  150. static inline bool is_manager(struct i2s_dai *i2s)
  151. {
  152. if (is_opened(i2s) && (i2s->mode & DAI_MANAGER))
  153. return true;
  154. else
  155. return false;
  156. }
  157. /* Read RCLK of I2S (in multiples of LRCLK) */
  158. static inline unsigned get_rfs(struct i2s_dai *i2s)
  159. {
  160. u32 rfs = (readl(i2s->addr + I2SMOD) >> 3) & 0x3;
  161. switch (rfs) {
  162. case 3: return 768;
  163. case 2: return 384;
  164. case 1: return 512;
  165. default: return 256;
  166. }
  167. }
  168. /* Write RCLK of I2S (in multiples of LRCLK) */
  169. static inline void set_rfs(struct i2s_dai *i2s, unsigned rfs)
  170. {
  171. u32 mod = readl(i2s->addr + I2SMOD);
  172. mod &= ~MOD_RCLK_MASK;
  173. switch (rfs) {
  174. case 768:
  175. mod |= MOD_RCLK_768FS;
  176. break;
  177. case 512:
  178. mod |= MOD_RCLK_512FS;
  179. break;
  180. case 384:
  181. mod |= MOD_RCLK_384FS;
  182. break;
  183. default:
  184. mod |= MOD_RCLK_256FS;
  185. break;
  186. }
  187. writel(mod, i2s->addr + I2SMOD);
  188. }
  189. /* Read Bit-Clock of I2S (in multiples of LRCLK) */
  190. static inline unsigned get_bfs(struct i2s_dai *i2s)
  191. {
  192. u32 bfs = (readl(i2s->addr + I2SMOD) >> 1) & 0x3;
  193. switch (bfs) {
  194. case 3: return 24;
  195. case 2: return 16;
  196. case 1: return 48;
  197. default: return 32;
  198. }
  199. }
  200. /* Write Bit-Clock of I2S (in multiples of LRCLK) */
  201. static inline void set_bfs(struct i2s_dai *i2s, unsigned bfs)
  202. {
  203. u32 mod = readl(i2s->addr + I2SMOD);
  204. mod &= ~MOD_BCLK_MASK;
  205. switch (bfs) {
  206. case 48:
  207. mod |= MOD_BCLK_48FS;
  208. break;
  209. case 32:
  210. mod |= MOD_BCLK_32FS;
  211. break;
  212. case 24:
  213. mod |= MOD_BCLK_24FS;
  214. break;
  215. case 16:
  216. mod |= MOD_BCLK_16FS;
  217. break;
  218. default:
  219. dev_err(&i2s->pdev->dev, "Wrong BCLK Divider!\n");
  220. return;
  221. }
  222. writel(mod, i2s->addr + I2SMOD);
  223. }
  224. /* Sample-Size */
  225. static inline int get_blc(struct i2s_dai *i2s)
  226. {
  227. int blc = readl(i2s->addr + I2SMOD);
  228. blc = (blc >> 13) & 0x3;
  229. switch (blc) {
  230. case 2: return 24;
  231. case 1: return 8;
  232. default: return 16;
  233. }
  234. }
  235. /* TX Channel Control */
  236. static void i2s_txctrl(struct i2s_dai *i2s, int on)
  237. {
  238. void __iomem *addr = i2s->addr;
  239. u32 con = readl(addr + I2SCON);
  240. u32 mod = readl(addr + I2SMOD) & ~MOD_MASK;
  241. if (on) {
  242. con |= CON_ACTIVE;
  243. con &= ~CON_TXCH_PAUSE;
  244. if (is_secondary(i2s)) {
  245. con |= CON_TXSDMA_ACTIVE;
  246. con &= ~CON_TXSDMA_PAUSE;
  247. } else {
  248. con |= CON_TXDMA_ACTIVE;
  249. con &= ~CON_TXDMA_PAUSE;
  250. }
  251. if (any_rx_active(i2s))
  252. mod |= MOD_TXRX;
  253. else
  254. mod |= MOD_TXONLY;
  255. } else {
  256. if (is_secondary(i2s)) {
  257. con |= CON_TXSDMA_PAUSE;
  258. con &= ~CON_TXSDMA_ACTIVE;
  259. } else {
  260. con |= CON_TXDMA_PAUSE;
  261. con &= ~CON_TXDMA_ACTIVE;
  262. }
  263. if (other_tx_active(i2s)) {
  264. writel(con, addr + I2SCON);
  265. return;
  266. }
  267. con |= CON_TXCH_PAUSE;
  268. if (any_rx_active(i2s))
  269. mod |= MOD_RXONLY;
  270. else
  271. con &= ~CON_ACTIVE;
  272. }
  273. writel(mod, addr + I2SMOD);
  274. writel(con, addr + I2SCON);
  275. }
  276. /* RX Channel Control */
  277. static void i2s_rxctrl(struct i2s_dai *i2s, int on)
  278. {
  279. void __iomem *addr = i2s->addr;
  280. u32 con = readl(addr + I2SCON);
  281. u32 mod = readl(addr + I2SMOD) & ~MOD_MASK;
  282. if (on) {
  283. con |= CON_RXDMA_ACTIVE | CON_ACTIVE;
  284. con &= ~(CON_RXDMA_PAUSE | CON_RXCH_PAUSE);
  285. if (any_tx_active(i2s))
  286. mod |= MOD_TXRX;
  287. else
  288. mod |= MOD_RXONLY;
  289. } else {
  290. con |= CON_RXDMA_PAUSE | CON_RXCH_PAUSE;
  291. con &= ~CON_RXDMA_ACTIVE;
  292. if (any_tx_active(i2s))
  293. mod |= MOD_TXONLY;
  294. else
  295. con &= ~CON_ACTIVE;
  296. }
  297. writel(mod, addr + I2SMOD);
  298. writel(con, addr + I2SCON);
  299. }
  300. /* Flush FIFO of an interface */
  301. static inline void i2s_fifo(struct i2s_dai *i2s, u32 flush)
  302. {
  303. void __iomem *fic;
  304. u32 val;
  305. if (!i2s)
  306. return;
  307. if (is_secondary(i2s))
  308. fic = i2s->addr + I2SFICS;
  309. else
  310. fic = i2s->addr + I2SFIC;
  311. /* Flush the FIFO */
  312. writel(readl(fic) | flush, fic);
  313. /* Be patient */
  314. val = msecs_to_loops(1) / 1000; /* 1 usec */
  315. while (--val)
  316. cpu_relax();
  317. writel(readl(fic) & ~flush, fic);
  318. }
  319. static int i2s_set_sysclk(struct snd_soc_dai *dai,
  320. int clk_id, unsigned int rfs, int dir)
  321. {
  322. struct i2s_dai *i2s = to_info(dai);
  323. struct i2s_dai *other = i2s->pri_dai ? : i2s->sec_dai;
  324. u32 mod = readl(i2s->addr + I2SMOD);
  325. switch (clk_id) {
  326. case SAMSUNG_I2S_CDCLK:
  327. /* Shouldn't matter in GATING(CLOCK_IN) mode */
  328. if (dir == SND_SOC_CLOCK_IN)
  329. rfs = 0;
  330. if ((rfs && other->rfs && (other->rfs != rfs)) ||
  331. (any_active(i2s) &&
  332. (((dir == SND_SOC_CLOCK_IN)
  333. && !(mod & MOD_CDCLKCON)) ||
  334. ((dir == SND_SOC_CLOCK_OUT)
  335. && (mod & MOD_CDCLKCON))))) {
  336. dev_err(&i2s->pdev->dev,
  337. "%s:%d Other DAI busy\n", __func__, __LINE__);
  338. return -EAGAIN;
  339. }
  340. if (dir == SND_SOC_CLOCK_IN)
  341. mod |= MOD_CDCLKCON;
  342. else
  343. mod &= ~MOD_CDCLKCON;
  344. i2s->rfs = rfs;
  345. break;
  346. case SAMSUNG_I2S_RCLKSRC_0: /* clock corrsponding to IISMOD[10] := 0 */
  347. case SAMSUNG_I2S_RCLKSRC_1: /* clock corrsponding to IISMOD[10] := 1 */
  348. if ((i2s->quirks & QUIRK_NO_MUXPSR)
  349. || (clk_id == SAMSUNG_I2S_RCLKSRC_0))
  350. clk_id = 0;
  351. else
  352. clk_id = 1;
  353. if (!any_active(i2s)) {
  354. if (i2s->op_clk) {
  355. if ((clk_id && !(mod & MOD_IMS_SYSMUX)) ||
  356. (!clk_id && (mod & MOD_IMS_SYSMUX))) {
  357. clk_disable_unprepare(i2s->op_clk);
  358. clk_put(i2s->op_clk);
  359. } else {
  360. i2s->rclk_srcrate =
  361. clk_get_rate(i2s->op_clk);
  362. return 0;
  363. }
  364. }
  365. if (clk_id)
  366. i2s->op_clk = clk_get(&i2s->pdev->dev,
  367. "i2s_opclk1");
  368. else
  369. i2s->op_clk = clk_get(&i2s->pdev->dev,
  370. "i2s_opclk0");
  371. clk_prepare_enable(i2s->op_clk);
  372. i2s->rclk_srcrate = clk_get_rate(i2s->op_clk);
  373. /* Over-ride the other's */
  374. if (other) {
  375. other->op_clk = i2s->op_clk;
  376. other->rclk_srcrate = i2s->rclk_srcrate;
  377. }
  378. } else if ((!clk_id && (mod & MOD_IMS_SYSMUX))
  379. || (clk_id && !(mod & MOD_IMS_SYSMUX))) {
  380. dev_err(&i2s->pdev->dev,
  381. "%s:%d Other DAI busy\n", __func__, __LINE__);
  382. return -EAGAIN;
  383. } else {
  384. /* Call can't be on the active DAI */
  385. i2s->op_clk = other->op_clk;
  386. i2s->rclk_srcrate = other->rclk_srcrate;
  387. return 0;
  388. }
  389. if (clk_id == 0)
  390. mod &= ~MOD_IMS_SYSMUX;
  391. else
  392. mod |= MOD_IMS_SYSMUX;
  393. break;
  394. default:
  395. dev_err(&i2s->pdev->dev, "We don't serve that!\n");
  396. return -EINVAL;
  397. }
  398. writel(mod, i2s->addr + I2SMOD);
  399. return 0;
  400. }
  401. static int i2s_set_fmt(struct snd_soc_dai *dai,
  402. unsigned int fmt)
  403. {
  404. struct i2s_dai *i2s = to_info(dai);
  405. u32 mod = readl(i2s->addr + I2SMOD);
  406. u32 tmp = 0;
  407. /* Format is priority */
  408. switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
  409. case SND_SOC_DAIFMT_RIGHT_J:
  410. tmp |= MOD_LR_RLOW;
  411. tmp |= MOD_SDF_MSB;
  412. break;
  413. case SND_SOC_DAIFMT_LEFT_J:
  414. tmp |= MOD_LR_RLOW;
  415. tmp |= MOD_SDF_LSB;
  416. break;
  417. case SND_SOC_DAIFMT_I2S:
  418. tmp |= MOD_SDF_IIS;
  419. break;
  420. default:
  421. dev_err(&i2s->pdev->dev, "Format not supported\n");
  422. return -EINVAL;
  423. }
  424. /*
  425. * INV flag is relative to the FORMAT flag - if set it simply
  426. * flips the polarity specified by the Standard
  427. */
  428. switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
  429. case SND_SOC_DAIFMT_NB_NF:
  430. break;
  431. case SND_SOC_DAIFMT_NB_IF:
  432. if (tmp & MOD_LR_RLOW)
  433. tmp &= ~MOD_LR_RLOW;
  434. else
  435. tmp |= MOD_LR_RLOW;
  436. break;
  437. default:
  438. dev_err(&i2s->pdev->dev, "Polarity not supported\n");
  439. return -EINVAL;
  440. }
  441. switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
  442. case SND_SOC_DAIFMT_CBM_CFM:
  443. tmp |= MOD_SLAVE;
  444. break;
  445. case SND_SOC_DAIFMT_CBS_CFS:
  446. /* Set default source clock in Master mode */
  447. if (i2s->rclk_srcrate == 0)
  448. i2s_set_sysclk(dai, SAMSUNG_I2S_RCLKSRC_0,
  449. 0, SND_SOC_CLOCK_IN);
  450. break;
  451. default:
  452. dev_err(&i2s->pdev->dev, "master/slave format not supported\n");
  453. return -EINVAL;
  454. }
  455. if (any_active(i2s) &&
  456. ((mod & (MOD_SDF_MASK | MOD_LR_RLOW
  457. | MOD_SLAVE)) != tmp)) {
  458. dev_err(&i2s->pdev->dev,
  459. "%s:%d Other DAI busy\n", __func__, __LINE__);
  460. return -EAGAIN;
  461. }
  462. mod &= ~(MOD_SDF_MASK | MOD_LR_RLOW | MOD_SLAVE);
  463. mod |= tmp;
  464. writel(mod, i2s->addr + I2SMOD);
  465. return 0;
  466. }
  467. static int i2s_hw_params(struct snd_pcm_substream *substream,
  468. struct snd_pcm_hw_params *params, struct snd_soc_dai *dai)
  469. {
  470. struct i2s_dai *i2s = to_info(dai);
  471. u32 mod = readl(i2s->addr + I2SMOD);
  472. if (!is_secondary(i2s))
  473. mod &= ~(MOD_DC2_EN | MOD_DC1_EN);
  474. switch (params_channels(params)) {
  475. case 6:
  476. mod |= MOD_DC2_EN;
  477. case 4:
  478. mod |= MOD_DC1_EN;
  479. break;
  480. case 2:
  481. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
  482. i2s->dma_playback.dma_size = 4;
  483. else
  484. i2s->dma_capture.dma_size = 4;
  485. break;
  486. case 1:
  487. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
  488. i2s->dma_playback.dma_size = 2;
  489. else
  490. i2s->dma_capture.dma_size = 2;
  491. break;
  492. default:
  493. dev_err(&i2s->pdev->dev, "%d channels not supported\n",
  494. params_channels(params));
  495. return -EINVAL;
  496. }
  497. if (is_secondary(i2s))
  498. mod &= ~MOD_BLCS_MASK;
  499. else
  500. mod &= ~MOD_BLCP_MASK;
  501. if (is_manager(i2s))
  502. mod &= ~MOD_BLC_MASK;
  503. switch (params_format(params)) {
  504. case SNDRV_PCM_FORMAT_S8:
  505. if (is_secondary(i2s))
  506. mod |= MOD_BLCS_8BIT;
  507. else
  508. mod |= MOD_BLCP_8BIT;
  509. if (is_manager(i2s))
  510. mod |= MOD_BLC_8BIT;
  511. break;
  512. case SNDRV_PCM_FORMAT_S16_LE:
  513. if (is_secondary(i2s))
  514. mod |= MOD_BLCS_16BIT;
  515. else
  516. mod |= MOD_BLCP_16BIT;
  517. if (is_manager(i2s))
  518. mod |= MOD_BLC_16BIT;
  519. break;
  520. case SNDRV_PCM_FORMAT_S24_LE:
  521. if (is_secondary(i2s))
  522. mod |= MOD_BLCS_24BIT;
  523. else
  524. mod |= MOD_BLCP_24BIT;
  525. if (is_manager(i2s))
  526. mod |= MOD_BLC_24BIT;
  527. break;
  528. default:
  529. dev_err(&i2s->pdev->dev, "Format(%d) not supported\n",
  530. params_format(params));
  531. return -EINVAL;
  532. }
  533. writel(mod, i2s->addr + I2SMOD);
  534. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
  535. snd_soc_dai_set_dma_data(dai, substream,
  536. (void *)&i2s->dma_playback);
  537. else
  538. snd_soc_dai_set_dma_data(dai, substream,
  539. (void *)&i2s->dma_capture);
  540. i2s->frmclk = params_rate(params);
  541. return 0;
  542. }
  543. /* We set constraints on the substream acc to the version of I2S */
  544. static int i2s_startup(struct snd_pcm_substream *substream,
  545. struct snd_soc_dai *dai)
  546. {
  547. struct i2s_dai *i2s = to_info(dai);
  548. struct i2s_dai *other = i2s->pri_dai ? : i2s->sec_dai;
  549. unsigned long flags;
  550. spin_lock_irqsave(&lock, flags);
  551. i2s->mode |= DAI_OPENED;
  552. if (is_manager(other))
  553. i2s->mode &= ~DAI_MANAGER;
  554. else
  555. i2s->mode |= DAI_MANAGER;
  556. /* Enforce set_sysclk in Master mode */
  557. i2s->rclk_srcrate = 0;
  558. if (!any_active(i2s) && (i2s->quirks & QUIRK_NEED_RSTCLR))
  559. writel(CON_RSTCLR, i2s->addr + I2SCON);
  560. spin_unlock_irqrestore(&lock, flags);
  561. return 0;
  562. }
  563. static void i2s_shutdown(struct snd_pcm_substream *substream,
  564. struct snd_soc_dai *dai)
  565. {
  566. struct i2s_dai *i2s = to_info(dai);
  567. struct i2s_dai *other = i2s->pri_dai ? : i2s->sec_dai;
  568. unsigned long flags;
  569. spin_lock_irqsave(&lock, flags);
  570. i2s->mode &= ~DAI_OPENED;
  571. i2s->mode &= ~DAI_MANAGER;
  572. if (is_opened(other))
  573. other->mode |= DAI_MANAGER;
  574. /* Reset any constraint on RFS and BFS */
  575. i2s->rfs = 0;
  576. i2s->bfs = 0;
  577. spin_unlock_irqrestore(&lock, flags);
  578. /* Gate CDCLK by default */
  579. if (!is_opened(other))
  580. i2s_set_sysclk(dai, SAMSUNG_I2S_CDCLK,
  581. 0, SND_SOC_CLOCK_IN);
  582. }
  583. static int config_setup(struct i2s_dai *i2s)
  584. {
  585. struct i2s_dai *other = i2s->pri_dai ? : i2s->sec_dai;
  586. unsigned rfs, bfs, blc;
  587. u32 psr;
  588. blc = get_blc(i2s);
  589. bfs = i2s->bfs;
  590. if (!bfs && other)
  591. bfs = other->bfs;
  592. /* Select least possible multiple(2) if no constraint set */
  593. if (!bfs)
  594. bfs = blc * 2;
  595. rfs = i2s->rfs;
  596. if (!rfs && other)
  597. rfs = other->rfs;
  598. if ((rfs == 256 || rfs == 512) && (blc == 24)) {
  599. dev_err(&i2s->pdev->dev,
  600. "%d-RFS not supported for 24-blc\n", rfs);
  601. return -EINVAL;
  602. }
  603. if (!rfs) {
  604. if (bfs == 16 || bfs == 32)
  605. rfs = 256;
  606. else
  607. rfs = 384;
  608. }
  609. /* If already setup and running */
  610. if (any_active(i2s) && (get_rfs(i2s) != rfs || get_bfs(i2s) != bfs)) {
  611. dev_err(&i2s->pdev->dev,
  612. "%s:%d Other DAI busy\n", __func__, __LINE__);
  613. return -EAGAIN;
  614. }
  615. /* Don't bother RFS, BFS & PSR in Slave mode */
  616. if (is_slave(i2s))
  617. return 0;
  618. set_bfs(i2s, bfs);
  619. set_rfs(i2s, rfs);
  620. if (!(i2s->quirks & QUIRK_NO_MUXPSR)) {
  621. psr = i2s->rclk_srcrate / i2s->frmclk / rfs;
  622. writel(((psr - 1) << 8) | PSR_PSREN, i2s->addr + I2SPSR);
  623. dev_dbg(&i2s->pdev->dev,
  624. "RCLK_SRC=%luHz PSR=%u, RCLK=%dfs, BCLK=%dfs\n",
  625. i2s->rclk_srcrate, psr, rfs, bfs);
  626. }
  627. return 0;
  628. }
  629. static int i2s_trigger(struct snd_pcm_substream *substream,
  630. int cmd, struct snd_soc_dai *dai)
  631. {
  632. int capture = (substream->stream == SNDRV_PCM_STREAM_CAPTURE);
  633. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  634. struct i2s_dai *i2s = to_info(rtd->cpu_dai);
  635. unsigned long flags;
  636. switch (cmd) {
  637. case SNDRV_PCM_TRIGGER_START:
  638. case SNDRV_PCM_TRIGGER_RESUME:
  639. case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
  640. local_irq_save(flags);
  641. if (config_setup(i2s)) {
  642. local_irq_restore(flags);
  643. return -EINVAL;
  644. }
  645. if (capture)
  646. i2s_rxctrl(i2s, 1);
  647. else
  648. i2s_txctrl(i2s, 1);
  649. local_irq_restore(flags);
  650. break;
  651. case SNDRV_PCM_TRIGGER_STOP:
  652. case SNDRV_PCM_TRIGGER_SUSPEND:
  653. case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
  654. local_irq_save(flags);
  655. if (capture) {
  656. i2s_rxctrl(i2s, 0);
  657. i2s_fifo(i2s, FIC_RXFLUSH);
  658. } else {
  659. i2s_txctrl(i2s, 0);
  660. i2s_fifo(i2s, FIC_TXFLUSH);
  661. }
  662. local_irq_restore(flags);
  663. break;
  664. }
  665. return 0;
  666. }
  667. static int i2s_set_clkdiv(struct snd_soc_dai *dai,
  668. int div_id, int div)
  669. {
  670. struct i2s_dai *i2s = to_info(dai);
  671. struct i2s_dai *other = i2s->pri_dai ? : i2s->sec_dai;
  672. switch (div_id) {
  673. case SAMSUNG_I2S_DIV_BCLK:
  674. if ((any_active(i2s) && div && (get_bfs(i2s) != div))
  675. || (other && other->bfs && (other->bfs != div))) {
  676. dev_err(&i2s->pdev->dev,
  677. "%s:%d Other DAI busy\n", __func__, __LINE__);
  678. return -EAGAIN;
  679. }
  680. i2s->bfs = div;
  681. break;
  682. default:
  683. dev_err(&i2s->pdev->dev,
  684. "Invalid clock divider(%d)\n", div_id);
  685. return -EINVAL;
  686. }
  687. return 0;
  688. }
  689. static snd_pcm_sframes_t
  690. i2s_delay(struct snd_pcm_substream *substream, struct snd_soc_dai *dai)
  691. {
  692. struct i2s_dai *i2s = to_info(dai);
  693. u32 reg = readl(i2s->addr + I2SFIC);
  694. snd_pcm_sframes_t delay;
  695. if (substream->stream == SNDRV_PCM_STREAM_CAPTURE)
  696. delay = FIC_RXCOUNT(reg);
  697. else if (is_secondary(i2s))
  698. delay = FICS_TXCOUNT(readl(i2s->addr + I2SFICS));
  699. else
  700. delay = FIC_TXCOUNT(reg);
  701. return delay;
  702. }
  703. #ifdef CONFIG_PM
  704. static int i2s_suspend(struct snd_soc_dai *dai)
  705. {
  706. struct i2s_dai *i2s = to_info(dai);
  707. if (dai->active) {
  708. i2s->suspend_i2smod = readl(i2s->addr + I2SMOD);
  709. i2s->suspend_i2scon = readl(i2s->addr + I2SCON);
  710. i2s->suspend_i2spsr = readl(i2s->addr + I2SPSR);
  711. }
  712. return 0;
  713. }
  714. static int i2s_resume(struct snd_soc_dai *dai)
  715. {
  716. struct i2s_dai *i2s = to_info(dai);
  717. if (dai->active) {
  718. writel(i2s->suspend_i2scon, i2s->addr + I2SCON);
  719. writel(i2s->suspend_i2smod, i2s->addr + I2SMOD);
  720. writel(i2s->suspend_i2spsr, i2s->addr + I2SPSR);
  721. }
  722. return 0;
  723. }
  724. #else
  725. #define i2s_suspend NULL
  726. #define i2s_resume NULL
  727. #endif
  728. static int samsung_i2s_dai_probe(struct snd_soc_dai *dai)
  729. {
  730. struct i2s_dai *i2s = to_info(dai);
  731. struct i2s_dai *other = i2s->pri_dai ? : i2s->sec_dai;
  732. if (other && other->clk) /* If this is probe on secondary */
  733. goto probe_exit;
  734. i2s->addr = ioremap(i2s->base, 0x100);
  735. if (i2s->addr == NULL) {
  736. dev_err(&i2s->pdev->dev, "cannot ioremap registers\n");
  737. return -ENXIO;
  738. }
  739. i2s->clk = clk_get(&i2s->pdev->dev, "iis");
  740. if (IS_ERR(i2s->clk)) {
  741. dev_err(&i2s->pdev->dev, "failed to get i2s_clock\n");
  742. iounmap(i2s->addr);
  743. return -ENOENT;
  744. }
  745. clk_prepare_enable(i2s->clk);
  746. if (other) {
  747. other->addr = i2s->addr;
  748. other->clk = i2s->clk;
  749. }
  750. if (i2s->quirks & QUIRK_NEED_RSTCLR)
  751. writel(CON_RSTCLR, i2s->addr + I2SCON);
  752. if (i2s->quirks & QUIRK_SEC_DAI)
  753. idma_reg_addr_init(i2s->addr,
  754. i2s->sec_dai->idma_playback.dma_addr);
  755. probe_exit:
  756. /* Reset any constraint on RFS and BFS */
  757. i2s->rfs = 0;
  758. i2s->bfs = 0;
  759. i2s_txctrl(i2s, 0);
  760. i2s_rxctrl(i2s, 0);
  761. i2s_fifo(i2s, FIC_TXFLUSH);
  762. i2s_fifo(other, FIC_TXFLUSH);
  763. i2s_fifo(i2s, FIC_RXFLUSH);
  764. /* Gate CDCLK by default */
  765. if (!is_opened(other))
  766. i2s_set_sysclk(dai, SAMSUNG_I2S_CDCLK,
  767. 0, SND_SOC_CLOCK_IN);
  768. return 0;
  769. }
  770. static int samsung_i2s_dai_remove(struct snd_soc_dai *dai)
  771. {
  772. struct i2s_dai *i2s = snd_soc_dai_get_drvdata(dai);
  773. struct i2s_dai *other = i2s->pri_dai ? : i2s->sec_dai;
  774. if (!other || !other->clk) {
  775. if (i2s->quirks & QUIRK_NEED_RSTCLR)
  776. writel(0, i2s->addr + I2SCON);
  777. clk_disable_unprepare(i2s->clk);
  778. clk_put(i2s->clk);
  779. iounmap(i2s->addr);
  780. }
  781. i2s->clk = NULL;
  782. return 0;
  783. }
  784. static const struct snd_soc_dai_ops samsung_i2s_dai_ops = {
  785. .trigger = i2s_trigger,
  786. .hw_params = i2s_hw_params,
  787. .set_fmt = i2s_set_fmt,
  788. .set_clkdiv = i2s_set_clkdiv,
  789. .set_sysclk = i2s_set_sysclk,
  790. .startup = i2s_startup,
  791. .shutdown = i2s_shutdown,
  792. .delay = i2s_delay,
  793. };
  794. #define SAMSUNG_I2S_RATES SNDRV_PCM_RATE_8000_96000
  795. #define SAMSUNG_I2S_FMTS (SNDRV_PCM_FMTBIT_S8 | \
  796. SNDRV_PCM_FMTBIT_S16_LE | \
  797. SNDRV_PCM_FMTBIT_S24_LE)
  798. static struct i2s_dai *i2s_alloc_dai(struct platform_device *pdev, bool sec)
  799. {
  800. struct i2s_dai *i2s;
  801. i2s = devm_kzalloc(&pdev->dev, sizeof(struct i2s_dai), GFP_KERNEL);
  802. if (i2s == NULL)
  803. return NULL;
  804. i2s->pdev = pdev;
  805. i2s->pri_dai = NULL;
  806. i2s->sec_dai = NULL;
  807. i2s->i2s_dai_drv.symmetric_rates = 1;
  808. i2s->i2s_dai_drv.probe = samsung_i2s_dai_probe;
  809. i2s->i2s_dai_drv.remove = samsung_i2s_dai_remove;
  810. i2s->i2s_dai_drv.ops = &samsung_i2s_dai_ops;
  811. i2s->i2s_dai_drv.suspend = i2s_suspend;
  812. i2s->i2s_dai_drv.resume = i2s_resume;
  813. i2s->i2s_dai_drv.playback.channels_min = 2;
  814. i2s->i2s_dai_drv.playback.channels_max = 2;
  815. i2s->i2s_dai_drv.playback.rates = SAMSUNG_I2S_RATES;
  816. i2s->i2s_dai_drv.playback.formats = SAMSUNG_I2S_FMTS;
  817. if (!sec) {
  818. i2s->i2s_dai_drv.capture.channels_min = 1;
  819. i2s->i2s_dai_drv.capture.channels_max = 2;
  820. i2s->i2s_dai_drv.capture.rates = SAMSUNG_I2S_RATES;
  821. i2s->i2s_dai_drv.capture.formats = SAMSUNG_I2S_FMTS;
  822. } else { /* Create a new platform_device for Secondary */
  823. i2s->pdev = platform_device_register_resndata(NULL,
  824. "samsung-i2s-sec", -1, NULL, 0, NULL, 0);
  825. if (IS_ERR(i2s->pdev))
  826. return NULL;
  827. }
  828. /* Pre-assign snd_soc_dai_set_drvdata */
  829. dev_set_drvdata(&i2s->pdev->dev, i2s);
  830. return i2s;
  831. }
  832. static inline int samsung_i2s_get_driver_data(struct platform_device *pdev)
  833. {
  834. return platform_get_device_id(pdev)->driver_data;
  835. }
  836. static int samsung_i2s_probe(struct platform_device *pdev)
  837. {
  838. u32 dma_pl_chan, dma_cp_chan, dma_pl_sec_chan;
  839. struct i2s_dai *pri_dai, *sec_dai = NULL;
  840. struct s3c_audio_pdata *i2s_pdata;
  841. struct samsung_i2s *i2s_cfg;
  842. struct resource *res;
  843. u32 regs_base, quirks;
  844. enum samsung_dai_type samsung_dai_type;
  845. int ret = 0;
  846. /* Call during Seconday interface registration */
  847. samsung_dai_type = samsung_i2s_get_driver_data(pdev);
  848. if (samsung_dai_type == TYPE_SEC) {
  849. sec_dai = dev_get_drvdata(&pdev->dev);
  850. snd_soc_register_dai(&sec_dai->pdev->dev,
  851. &sec_dai->i2s_dai_drv);
  852. asoc_dma_platform_register(&pdev->dev);
  853. return 0;
  854. }
  855. i2s_pdata = pdev->dev.platform_data;
  856. if (i2s_pdata == NULL) {
  857. dev_err(&pdev->dev, "Can't work without s3c_audio_pdata\n");
  858. return -EINVAL;
  859. }
  860. res = platform_get_resource(pdev, IORESOURCE_DMA, 0);
  861. if (!res) {
  862. dev_err(&pdev->dev, "Unable to get I2S-TX dma resource\n");
  863. return -ENXIO;
  864. }
  865. dma_pl_chan = res->start;
  866. res = platform_get_resource(pdev, IORESOURCE_DMA, 1);
  867. if (!res) {
  868. dev_err(&pdev->dev, "Unable to get I2S-RX dma resource\n");
  869. return -ENXIO;
  870. }
  871. dma_cp_chan = res->start;
  872. res = platform_get_resource(pdev, IORESOURCE_DMA, 2);
  873. if (res)
  874. dma_pl_sec_chan = res->start;
  875. else
  876. dma_pl_sec_chan = 0;
  877. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  878. if (!res) {
  879. dev_err(&pdev->dev, "Unable to get I2S SFR address\n");
  880. return -ENXIO;
  881. }
  882. if (!request_mem_region(res->start, resource_size(res),
  883. "samsung-i2s")) {
  884. dev_err(&pdev->dev, "Unable to request SFR region\n");
  885. return -EBUSY;
  886. }
  887. regs_base = res->start;
  888. i2s_cfg = &i2s_pdata->type.i2s;
  889. quirks = i2s_cfg->quirks;
  890. pri_dai = i2s_alloc_dai(pdev, false);
  891. if (!pri_dai) {
  892. dev_err(&pdev->dev, "Unable to alloc I2S_pri\n");
  893. ret = -ENOMEM;
  894. goto err;
  895. }
  896. pri_dai->dma_playback.dma_addr = regs_base + I2STXD;
  897. pri_dai->dma_capture.dma_addr = regs_base + I2SRXD;
  898. pri_dai->dma_playback.client =
  899. (struct s3c2410_dma_client *)&pri_dai->dma_playback;
  900. pri_dai->dma_capture.client =
  901. (struct s3c2410_dma_client *)&pri_dai->dma_capture;
  902. pri_dai->dma_playback.channel = dma_pl_chan;
  903. pri_dai->dma_capture.channel = dma_cp_chan;
  904. pri_dai->dma_playback.dma_size = 4;
  905. pri_dai->dma_capture.dma_size = 4;
  906. pri_dai->base = regs_base;
  907. pri_dai->quirks = quirks;
  908. if (quirks & QUIRK_PRI_6CHAN)
  909. pri_dai->i2s_dai_drv.playback.channels_max = 6;
  910. if (quirks & QUIRK_SEC_DAI) {
  911. sec_dai = i2s_alloc_dai(pdev, true);
  912. if (!sec_dai) {
  913. dev_err(&pdev->dev, "Unable to alloc I2S_sec\n");
  914. ret = -ENOMEM;
  915. goto err;
  916. }
  917. sec_dai->dma_playback.dma_addr = regs_base + I2STXDS;
  918. sec_dai->dma_playback.client =
  919. (struct s3c2410_dma_client *)&sec_dai->dma_playback;
  920. /* Use iDMA always if SysDMA not provided */
  921. sec_dai->dma_playback.channel = dma_pl_sec_chan ? : -1;
  922. sec_dai->dma_playback.dma_size = 4;
  923. sec_dai->base = regs_base;
  924. sec_dai->quirks = quirks;
  925. sec_dai->idma_playback.dma_addr = i2s_cfg->idma_addr;
  926. sec_dai->pri_dai = pri_dai;
  927. pri_dai->sec_dai = sec_dai;
  928. }
  929. if (i2s_pdata->cfg_gpio && i2s_pdata->cfg_gpio(pdev)) {
  930. dev_err(&pdev->dev, "Unable to configure gpio\n");
  931. ret = -EINVAL;
  932. goto err;
  933. }
  934. snd_soc_register_dai(&pri_dai->pdev->dev, &pri_dai->i2s_dai_drv);
  935. pm_runtime_enable(&pdev->dev);
  936. asoc_dma_platform_register(&pdev->dev);
  937. return 0;
  938. err:
  939. release_mem_region(regs_base, resource_size(res));
  940. return ret;
  941. }
  942. static int samsung_i2s_remove(struct platform_device *pdev)
  943. {
  944. struct i2s_dai *i2s, *other;
  945. struct resource *res;
  946. i2s = dev_get_drvdata(&pdev->dev);
  947. other = i2s->pri_dai ? : i2s->sec_dai;
  948. if (other) {
  949. other->pri_dai = NULL;
  950. other->sec_dai = NULL;
  951. } else {
  952. pm_runtime_disable(&pdev->dev);
  953. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  954. if (res)
  955. release_mem_region(res->start, resource_size(res));
  956. }
  957. i2s->pri_dai = NULL;
  958. i2s->sec_dai = NULL;
  959. asoc_dma_platform_unregister(&pdev->dev);
  960. snd_soc_unregister_dai(&pdev->dev);
  961. return 0;
  962. }
  963. static struct platform_device_id samsung_i2s_driver_ids[] = {
  964. {
  965. .name = "samsung-i2s",
  966. .driver_data = TYPE_PRI,
  967. }, {
  968. .name = "samsung-i2s-sec",
  969. .driver_data = TYPE_SEC,
  970. },
  971. {},
  972. };
  973. MODULE_DEVICE_TABLE(platform, samsung-i2s-driver-ids);
  974. static struct platform_driver samsung_i2s_driver = {
  975. .probe = samsung_i2s_probe,
  976. .remove = samsung_i2s_remove,
  977. .id_table = samsung_i2s_driver_ids,
  978. .driver = {
  979. .name = "samsung-i2s",
  980. .owner = THIS_MODULE,
  981. },
  982. };
  983. module_platform_driver(samsung_i2s_driver);
  984. /* Module information */
  985. MODULE_AUTHOR("Jaswinder Singh, <jassisinghbrar@gmail.com>");
  986. MODULE_DESCRIPTION("Samsung I2S Interface");
  987. MODULE_ALIAS("platform:samsung-i2s");
  988. MODULE_LICENSE("GPL");