share.h 17 KB

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  1. /*
  2. * Copyright 1998-2008 VIA Technologies, Inc. All Rights Reserved.
  3. * Copyright 2001-2008 S3 Graphics, Inc. All Rights Reserved.
  4. * This program is free software; you can redistribute it and/or
  5. * modify it under the terms of the GNU General Public
  6. * License as published by the Free Software Foundation;
  7. * either version 2, or (at your option) any later version.
  8. * This program is distributed in the hope that it will be useful,
  9. * but WITHOUT ANY WARRANTIES OR REPRESENTATIONS; without even
  10. * the implied warranty of MERCHANTABILITY or FITNESS FOR
  11. * A PARTICULAR PURPOSE.See the GNU General Public License
  12. * for more details.
  13. * You should have received a copy of the GNU General Public License
  14. * along with this program; if not, write to the Free Software
  15. * Foundation, Inc.,
  16. * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  17. */
  18. #ifndef __SHARE_H__
  19. #define __SHARE_H__
  20. #include "via_modesetting.h"
  21. /* Define Bit Field */
  22. #define BIT0 0x01
  23. #define BIT1 0x02
  24. #define BIT2 0x04
  25. #define BIT3 0x08
  26. #define BIT4 0x10
  27. #define BIT5 0x20
  28. #define BIT6 0x40
  29. #define BIT7 0x80
  30. /* Video Memory Size */
  31. #define VIDEO_MEMORY_SIZE_16M 0x1000000
  32. /*
  33. * Lengths of the VPIT structure arrays.
  34. */
  35. #define StdCR 0x19
  36. #define StdSR 0x04
  37. #define StdGR 0x09
  38. #define StdAR 0x14
  39. #define PatchCR 11
  40. /* Display path */
  41. #define IGA1 1
  42. #define IGA2 2
  43. /* Define Color Depth */
  44. #define MODE_8BPP 1
  45. #define MODE_16BPP 2
  46. #define MODE_32BPP 4
  47. #define GR20 0x20
  48. #define GR21 0x21
  49. #define GR22 0x22
  50. /* Sequencer Registers */
  51. #define SR01 0x01
  52. #define SR10 0x10
  53. #define SR12 0x12
  54. #define SR15 0x15
  55. #define SR16 0x16
  56. #define SR17 0x17
  57. #define SR18 0x18
  58. #define SR1B 0x1B
  59. #define SR1A 0x1A
  60. #define SR1C 0x1C
  61. #define SR1D 0x1D
  62. #define SR1E 0x1E
  63. #define SR1F 0x1F
  64. #define SR20 0x20
  65. #define SR21 0x21
  66. #define SR22 0x22
  67. #define SR2A 0x2A
  68. #define SR2D 0x2D
  69. #define SR2E 0x2E
  70. #define SR30 0x30
  71. #define SR39 0x39
  72. #define SR3D 0x3D
  73. #define SR3E 0x3E
  74. #define SR3F 0x3F
  75. #define SR40 0x40
  76. #define SR43 0x43
  77. #define SR44 0x44
  78. #define SR45 0x45
  79. #define SR46 0x46
  80. #define SR47 0x47
  81. #define SR48 0x48
  82. #define SR49 0x49
  83. #define SR4A 0x4A
  84. #define SR4B 0x4B
  85. #define SR4C 0x4C
  86. #define SR52 0x52
  87. #define SR57 0x57
  88. #define SR58 0x58
  89. #define SR59 0x59
  90. #define SR5D 0x5D
  91. #define SR5E 0x5E
  92. #define SR65 0x65
  93. /* CRT Controller Registers */
  94. #define CR00 0x00
  95. #define CR01 0x01
  96. #define CR02 0x02
  97. #define CR03 0x03
  98. #define CR04 0x04
  99. #define CR05 0x05
  100. #define CR06 0x06
  101. #define CR07 0x07
  102. #define CR08 0x08
  103. #define CR09 0x09
  104. #define CR0A 0x0A
  105. #define CR0B 0x0B
  106. #define CR0C 0x0C
  107. #define CR0D 0x0D
  108. #define CR0E 0x0E
  109. #define CR0F 0x0F
  110. #define CR10 0x10
  111. #define CR11 0x11
  112. #define CR12 0x12
  113. #define CR13 0x13
  114. #define CR14 0x14
  115. #define CR15 0x15
  116. #define CR16 0x16
  117. #define CR17 0x17
  118. #define CR18 0x18
  119. /* Extend CRT Controller Registers */
  120. #define CR30 0x30
  121. #define CR31 0x31
  122. #define CR32 0x32
  123. #define CR33 0x33
  124. #define CR34 0x34
  125. #define CR35 0x35
  126. #define CR36 0x36
  127. #define CR37 0x37
  128. #define CR38 0x38
  129. #define CR39 0x39
  130. #define CR3A 0x3A
  131. #define CR3B 0x3B
  132. #define CR3C 0x3C
  133. #define CR3D 0x3D
  134. #define CR3E 0x3E
  135. #define CR3F 0x3F
  136. #define CR40 0x40
  137. #define CR41 0x41
  138. #define CR42 0x42
  139. #define CR43 0x43
  140. #define CR44 0x44
  141. #define CR45 0x45
  142. #define CR46 0x46
  143. #define CR47 0x47
  144. #define CR48 0x48
  145. #define CR49 0x49
  146. #define CR4A 0x4A
  147. #define CR4B 0x4B
  148. #define CR4C 0x4C
  149. #define CR4D 0x4D
  150. #define CR4E 0x4E
  151. #define CR4F 0x4F
  152. #define CR50 0x50
  153. #define CR51 0x51
  154. #define CR52 0x52
  155. #define CR53 0x53
  156. #define CR54 0x54
  157. #define CR55 0x55
  158. #define CR56 0x56
  159. #define CR57 0x57
  160. #define CR58 0x58
  161. #define CR59 0x59
  162. #define CR5A 0x5A
  163. #define CR5B 0x5B
  164. #define CR5C 0x5C
  165. #define CR5D 0x5D
  166. #define CR5E 0x5E
  167. #define CR5F 0x5F
  168. #define CR60 0x60
  169. #define CR61 0x61
  170. #define CR62 0x62
  171. #define CR63 0x63
  172. #define CR64 0x64
  173. #define CR65 0x65
  174. #define CR66 0x66
  175. #define CR67 0x67
  176. #define CR68 0x68
  177. #define CR69 0x69
  178. #define CR6A 0x6A
  179. #define CR6B 0x6B
  180. #define CR6C 0x6C
  181. #define CR6D 0x6D
  182. #define CR6E 0x6E
  183. #define CR6F 0x6F
  184. #define CR70 0x70
  185. #define CR71 0x71
  186. #define CR72 0x72
  187. #define CR73 0x73
  188. #define CR74 0x74
  189. #define CR75 0x75
  190. #define CR76 0x76
  191. #define CR77 0x77
  192. #define CR78 0x78
  193. #define CR79 0x79
  194. #define CR7A 0x7A
  195. #define CR7B 0x7B
  196. #define CR7C 0x7C
  197. #define CR7D 0x7D
  198. #define CR7E 0x7E
  199. #define CR7F 0x7F
  200. #define CR80 0x80
  201. #define CR81 0x81
  202. #define CR82 0x82
  203. #define CR83 0x83
  204. #define CR84 0x84
  205. #define CR85 0x85
  206. #define CR86 0x86
  207. #define CR87 0x87
  208. #define CR88 0x88
  209. #define CR89 0x89
  210. #define CR8A 0x8A
  211. #define CR8B 0x8B
  212. #define CR8C 0x8C
  213. #define CR8D 0x8D
  214. #define CR8E 0x8E
  215. #define CR8F 0x8F
  216. #define CR90 0x90
  217. #define CR91 0x91
  218. #define CR92 0x92
  219. #define CR93 0x93
  220. #define CR94 0x94
  221. #define CR95 0x95
  222. #define CR96 0x96
  223. #define CR97 0x97
  224. #define CR98 0x98
  225. #define CR99 0x99
  226. #define CR9A 0x9A
  227. #define CR9B 0x9B
  228. #define CR9C 0x9C
  229. #define CR9D 0x9D
  230. #define CR9E 0x9E
  231. #define CR9F 0x9F
  232. #define CRA0 0xA0
  233. #define CRA1 0xA1
  234. #define CRA2 0xA2
  235. #define CRA3 0xA3
  236. #define CRD2 0xD2
  237. #define CRD3 0xD3
  238. #define CRD4 0xD4
  239. /* LUT Table*/
  240. #define LUT_DATA 0x3C9 /* DACDATA */
  241. #define LUT_INDEX_READ 0x3C7 /* DACRX */
  242. #define LUT_INDEX_WRITE 0x3C8 /* DACWX */
  243. #define DACMASK 0x3C6
  244. /* Definition Device */
  245. #define DEVICE_CRT 0x01
  246. #define DEVICE_DVI 0x03
  247. #define DEVICE_LCD 0x04
  248. /* Device output interface */
  249. #define INTERFACE_NONE 0x00
  250. #define INTERFACE_ANALOG_RGB 0x01
  251. #define INTERFACE_DVP0 0x02
  252. #define INTERFACE_DVP1 0x03
  253. #define INTERFACE_DFP_HIGH 0x04
  254. #define INTERFACE_DFP_LOW 0x05
  255. #define INTERFACE_DFP 0x06
  256. #define INTERFACE_LVDS0 0x07
  257. #define INTERFACE_LVDS1 0x08
  258. #define INTERFACE_LVDS0LVDS1 0x09
  259. #define INTERFACE_TMDS 0x0A
  260. #define HW_LAYOUT_LCD_ONLY 0x01
  261. #define HW_LAYOUT_DVI_ONLY 0x02
  262. #define HW_LAYOUT_LCD_DVI 0x03
  263. #define HW_LAYOUT_LCD1_LCD2 0x04
  264. #define HW_LAYOUT_LCD_EXTERNAL_LCD2 0x10
  265. /* Definition Refresh Rate */
  266. #define REFRESH_49 49
  267. #define REFRESH_50 50
  268. #define REFRESH_60 60
  269. #define REFRESH_75 75
  270. #define REFRESH_85 85
  271. #define REFRESH_100 100
  272. #define REFRESH_120 120
  273. /* Definition Sync Polarity*/
  274. #define NEGATIVE 1
  275. #define POSITIVE 0
  276. /*480x640@60 Sync Polarity (GTF)
  277. */
  278. #define M480X640_R60_HSP NEGATIVE
  279. #define M480X640_R60_VSP POSITIVE
  280. /*640x480@60 Sync Polarity (VESA Mode)
  281. */
  282. #define M640X480_R60_HSP NEGATIVE
  283. #define M640X480_R60_VSP NEGATIVE
  284. /*640x480@75 Sync Polarity (VESA Mode)
  285. */
  286. #define M640X480_R75_HSP NEGATIVE
  287. #define M640X480_R75_VSP NEGATIVE
  288. /*640x480@85 Sync Polarity (VESA Mode)
  289. */
  290. #define M640X480_R85_HSP NEGATIVE
  291. #define M640X480_R85_VSP NEGATIVE
  292. /*640x480@100 Sync Polarity (GTF Mode)
  293. */
  294. #define M640X480_R100_HSP NEGATIVE
  295. #define M640X480_R100_VSP POSITIVE
  296. /*640x480@120 Sync Polarity (GTF Mode)
  297. */
  298. #define M640X480_R120_HSP NEGATIVE
  299. #define M640X480_R120_VSP POSITIVE
  300. /*720x480@60 Sync Polarity (GTF Mode)
  301. */
  302. #define M720X480_R60_HSP NEGATIVE
  303. #define M720X480_R60_VSP POSITIVE
  304. /*720x576@60 Sync Polarity (GTF Mode)
  305. */
  306. #define M720X576_R60_HSP NEGATIVE
  307. #define M720X576_R60_VSP POSITIVE
  308. /*800x600@60 Sync Polarity (VESA Mode)
  309. */
  310. #define M800X600_R60_HSP POSITIVE
  311. #define M800X600_R60_VSP POSITIVE
  312. /*800x600@75 Sync Polarity (VESA Mode)
  313. */
  314. #define M800X600_R75_HSP POSITIVE
  315. #define M800X600_R75_VSP POSITIVE
  316. /*800x600@85 Sync Polarity (VESA Mode)
  317. */
  318. #define M800X600_R85_HSP POSITIVE
  319. #define M800X600_R85_VSP POSITIVE
  320. /*800x600@100 Sync Polarity (GTF Mode)
  321. */
  322. #define M800X600_R100_HSP NEGATIVE
  323. #define M800X600_R100_VSP POSITIVE
  324. /*800x600@120 Sync Polarity (GTF Mode)
  325. */
  326. #define M800X600_R120_HSP NEGATIVE
  327. #define M800X600_R120_VSP POSITIVE
  328. /*800x480@60 Sync Polarity (CVT Mode)
  329. */
  330. #define M800X480_R60_HSP NEGATIVE
  331. #define M800X480_R60_VSP POSITIVE
  332. /*848x480@60 Sync Polarity (CVT Mode)
  333. */
  334. #define M848X480_R60_HSP NEGATIVE
  335. #define M848X480_R60_VSP POSITIVE
  336. /*852x480@60 Sync Polarity (GTF Mode)
  337. */
  338. #define M852X480_R60_HSP NEGATIVE
  339. #define M852X480_R60_VSP POSITIVE
  340. /*1024x512@60 Sync Polarity (GTF Mode)
  341. */
  342. #define M1024X512_R60_HSP NEGATIVE
  343. #define M1024X512_R60_VSP POSITIVE
  344. /*1024x600@60 Sync Polarity (GTF Mode)
  345. */
  346. #define M1024X600_R60_HSP NEGATIVE
  347. #define M1024X600_R60_VSP POSITIVE
  348. /*1024x768@60 Sync Polarity (VESA Mode)
  349. */
  350. #define M1024X768_R60_HSP NEGATIVE
  351. #define M1024X768_R60_VSP NEGATIVE
  352. /*1024x768@75 Sync Polarity (VESA Mode)
  353. */
  354. #define M1024X768_R75_HSP POSITIVE
  355. #define M1024X768_R75_VSP POSITIVE
  356. /*1024x768@85 Sync Polarity (VESA Mode)
  357. */
  358. #define M1024X768_R85_HSP POSITIVE
  359. #define M1024X768_R85_VSP POSITIVE
  360. /*1024x768@100 Sync Polarity (GTF Mode)
  361. */
  362. #define M1024X768_R100_HSP NEGATIVE
  363. #define M1024X768_R100_VSP POSITIVE
  364. /*1152x864@75 Sync Polarity (VESA Mode)
  365. */
  366. #define M1152X864_R75_HSP POSITIVE
  367. #define M1152X864_R75_VSP POSITIVE
  368. /*1280x720@60 Sync Polarity (GTF Mode)
  369. */
  370. #define M1280X720_R60_HSP NEGATIVE
  371. #define M1280X720_R60_VSP POSITIVE
  372. /* 1280x768@50 Sync Polarity (GTF Mode) */
  373. #define M1280X768_R50_HSP NEGATIVE
  374. #define M1280X768_R50_VSP POSITIVE
  375. /*1280x768@60 Sync Polarity (GTF Mode)
  376. */
  377. #define M1280X768_R60_HSP NEGATIVE
  378. #define M1280X768_R60_VSP POSITIVE
  379. /*1280x800@60 Sync Polarity (CVT Mode)
  380. */
  381. #define M1280X800_R60_HSP NEGATIVE
  382. #define M1280X800_R60_VSP POSITIVE
  383. /*1280x960@60 Sync Polarity (VESA Mode)
  384. */
  385. #define M1280X960_R60_HSP POSITIVE
  386. #define M1280X960_R60_VSP POSITIVE
  387. /*1280x1024@60 Sync Polarity (VESA Mode)
  388. */
  389. #define M1280X1024_R60_HSP POSITIVE
  390. #define M1280X1024_R60_VSP POSITIVE
  391. /* 1360x768@60 Sync Polarity (CVT Mode) */
  392. #define M1360X768_R60_HSP POSITIVE
  393. #define M1360X768_R60_VSP POSITIVE
  394. /* 1360x768@60 Sync Polarity (CVT Reduce Blanking Mode) */
  395. #define M1360X768_RB_R60_HSP POSITIVE
  396. #define M1360X768_RB_R60_VSP NEGATIVE
  397. /* 1368x768@50 Sync Polarity (GTF Mode) */
  398. #define M1368X768_R50_HSP NEGATIVE
  399. #define M1368X768_R50_VSP POSITIVE
  400. /* 1368x768@60 Sync Polarity (VESA Mode) */
  401. #define M1368X768_R60_HSP NEGATIVE
  402. #define M1368X768_R60_VSP POSITIVE
  403. /*1280x1024@75 Sync Polarity (VESA Mode)
  404. */
  405. #define M1280X1024_R75_HSP POSITIVE
  406. #define M1280X1024_R75_VSP POSITIVE
  407. /*1280x1024@85 Sync Polarity (VESA Mode)
  408. */
  409. #define M1280X1024_R85_HSP POSITIVE
  410. #define M1280X1024_R85_VSP POSITIVE
  411. /*1440x1050@60 Sync Polarity (GTF Mode)
  412. */
  413. #define M1440X1050_R60_HSP NEGATIVE
  414. #define M1440X1050_R60_VSP POSITIVE
  415. /*1600x1200@60 Sync Polarity (VESA Mode)
  416. */
  417. #define M1600X1200_R60_HSP POSITIVE
  418. #define M1600X1200_R60_VSP POSITIVE
  419. /*1600x1200@75 Sync Polarity (VESA Mode)
  420. */
  421. #define M1600X1200_R75_HSP POSITIVE
  422. #define M1600X1200_R75_VSP POSITIVE
  423. /* 1680x1050@60 Sync Polarity (CVT Mode) */
  424. #define M1680x1050_R60_HSP NEGATIVE
  425. #define M1680x1050_R60_VSP NEGATIVE
  426. /* 1680x1050@60 Sync Polarity (CVT Reduce Blanking Mode) */
  427. #define M1680x1050_RB_R60_HSP POSITIVE
  428. #define M1680x1050_RB_R60_VSP NEGATIVE
  429. /* 1680x1050@75 Sync Polarity (CVT Mode) */
  430. #define M1680x1050_R75_HSP NEGATIVE
  431. #define M1680x1050_R75_VSP POSITIVE
  432. /*1920x1080@60 Sync Polarity (CVT Mode)
  433. */
  434. #define M1920X1080_R60_HSP NEGATIVE
  435. #define M1920X1080_R60_VSP POSITIVE
  436. /* 1920x1080@60 Sync Polarity (CVT Reduce Blanking Mode) */
  437. #define M1920X1080_RB_R60_HSP POSITIVE
  438. #define M1920X1080_RB_R60_VSP NEGATIVE
  439. /*1920x1440@60 Sync Polarity (VESA Mode)
  440. */
  441. #define M1920X1440_R60_HSP NEGATIVE
  442. #define M1920X1440_R60_VSP POSITIVE
  443. /*1920x1440@75 Sync Polarity (VESA Mode)
  444. */
  445. #define M1920X1440_R75_HSP NEGATIVE
  446. #define M1920X1440_R75_VSP POSITIVE
  447. #if 0
  448. /* 1400x1050@60 Sync Polarity (VESA Mode) */
  449. #define M1400X1050_R60_HSP NEGATIVE
  450. #define M1400X1050_R60_VSP NEGATIVE
  451. #endif
  452. /* 1400x1050@60 Sync Polarity (CVT Mode) */
  453. #define M1400X1050_R60_HSP NEGATIVE
  454. #define M1400X1050_R60_VSP POSITIVE
  455. /* 1400x1050@60 Sync Polarity (CVT Reduce Blanking Mode) */
  456. #define M1400X1050_RB_R60_HSP POSITIVE
  457. #define M1400X1050_RB_R60_VSP NEGATIVE
  458. /* 1400x1050@75 Sync Polarity (CVT Mode) */
  459. #define M1400X1050_R75_HSP NEGATIVE
  460. #define M1400X1050_R75_VSP POSITIVE
  461. /* 960x600@60 Sync Polarity (CVT Mode) */
  462. #define M960X600_R60_HSP NEGATIVE
  463. #define M960X600_R60_VSP POSITIVE
  464. /* 1000x600@60 Sync Polarity (GTF Mode) */
  465. #define M1000X600_R60_HSP NEGATIVE
  466. #define M1000X600_R60_VSP POSITIVE
  467. /* 1024x576@60 Sync Polarity (GTF Mode) */
  468. #define M1024X576_R60_HSP NEGATIVE
  469. #define M1024X576_R60_VSP POSITIVE
  470. /*1024x600@60 Sync Polarity (GTF Mode)*/
  471. #define M1024X600_R60_HSP NEGATIVE
  472. #define M1024X600_R60_VSP POSITIVE
  473. /* 1088x612@60 Sync Polarity (CVT Mode) */
  474. #define M1088X612_R60_HSP NEGATIVE
  475. #define M1088X612_R60_VSP POSITIVE
  476. /* 1152x720@60 Sync Polarity (CVT Mode) */
  477. #define M1152X720_R60_HSP NEGATIVE
  478. #define M1152X720_R60_VSP POSITIVE
  479. /* 1200x720@60 Sync Polarity (GTF Mode) */
  480. #define M1200X720_R60_HSP NEGATIVE
  481. #define M1200X720_R60_VSP POSITIVE
  482. /* 1200x900@60 Sync Polarity (DCON) */
  483. #define M1200X900_R60_HSP POSITIVE
  484. #define M1200X900_R60_VSP POSITIVE
  485. /* 1280x600@60 Sync Polarity (GTF Mode) */
  486. #define M1280x600_R60_HSP NEGATIVE
  487. #define M1280x600_R60_VSP POSITIVE
  488. /* 1280x720@50 Sync Polarity (GTF Mode) */
  489. #define M1280X720_R50_HSP NEGATIVE
  490. #define M1280X720_R50_VSP POSITIVE
  491. /* 1440x900@60 Sync Polarity (CVT Mode) */
  492. #define M1440X900_R60_HSP NEGATIVE
  493. #define M1440X900_R60_VSP POSITIVE
  494. /* 1440x900@75 Sync Polarity (CVT Mode) */
  495. #define M1440X900_R75_HSP NEGATIVE
  496. #define M1440X900_R75_VSP POSITIVE
  497. /* 1440x900@60 Sync Polarity (CVT Reduce Blanking Mode) */
  498. #define M1440X900_RB_R60_HSP POSITIVE
  499. #define M1440X900_RB_R60_VSP NEGATIVE
  500. /* 1600x900@60 Sync Polarity (CVT Mode) */
  501. #define M1600X900_R60_HSP NEGATIVE
  502. #define M1600X900_R60_VSP POSITIVE
  503. /* 1600x900@60 Sync Polarity (CVT Reduce Blanking Mode) */
  504. #define M1600X900_RB_R60_HSP POSITIVE
  505. #define M1600X900_RB_R60_VSP NEGATIVE
  506. /* 1600x1024@60 Sync Polarity (GTF Mode) */
  507. #define M1600X1024_R60_HSP NEGATIVE
  508. #define M1600X1024_R60_VSP POSITIVE
  509. /* 1792x1344@60 Sync Polarity (DMT Mode) */
  510. #define M1792x1344_R60_HSP NEGATIVE
  511. #define M1792x1344_R60_VSP POSITIVE
  512. /* 1856x1392@60 Sync Polarity (DMT Mode) */
  513. #define M1856x1392_R60_HSP NEGATIVE
  514. #define M1856x1392_R60_VSP POSITIVE
  515. /* 1920x1200@60 Sync Polarity (CVT Mode) */
  516. #define M1920X1200_R60_HSP NEGATIVE
  517. #define M1920X1200_R60_VSP POSITIVE
  518. /* 1920x1200@60 Sync Polarity (CVT Reduce Blanking Mode) */
  519. #define M1920X1200_RB_R60_HSP POSITIVE
  520. #define M1920X1200_RB_R60_VSP NEGATIVE
  521. /* 2048x1536@60 Sync Polarity (CVT Mode) */
  522. #define M2048x1536_R60_HSP NEGATIVE
  523. #define M2048x1536_R60_VSP POSITIVE
  524. /* Definition CRTC Timing Index */
  525. #define H_TOTAL_INDEX 0
  526. #define H_ADDR_INDEX 1
  527. #define H_BLANK_START_INDEX 2
  528. #define H_BLANK_END_INDEX 3
  529. #define H_SYNC_START_INDEX 4
  530. #define H_SYNC_END_INDEX 5
  531. #define V_TOTAL_INDEX 6
  532. #define V_ADDR_INDEX 7
  533. #define V_BLANK_START_INDEX 8
  534. #define V_BLANK_END_INDEX 9
  535. #define V_SYNC_START_INDEX 10
  536. #define V_SYNC_END_INDEX 11
  537. #define H_TOTAL_SHADOW_INDEX 12
  538. #define H_BLANK_END_SHADOW_INDEX 13
  539. #define V_TOTAL_SHADOW_INDEX 14
  540. #define V_ADDR_SHADOW_INDEX 15
  541. #define V_BLANK_SATRT_SHADOW_INDEX 16
  542. #define V_BLANK_END_SHADOW_INDEX 17
  543. #define V_SYNC_SATRT_SHADOW_INDEX 18
  544. #define V_SYNC_END_SHADOW_INDEX 19
  545. /* LCD display method
  546. */
  547. #define LCD_EXPANDSION 0x00
  548. #define LCD_CENTERING 0x01
  549. /* LCD mode
  550. */
  551. #define LCD_OPENLDI 0x00
  552. #define LCD_SPWG 0x01
  553. struct crt_mode_table {
  554. int refresh_rate;
  555. int h_sync_polarity;
  556. int v_sync_polarity;
  557. struct display_timing crtc;
  558. };
  559. struct io_reg {
  560. int port;
  561. u8 index;
  562. u8 mask;
  563. u8 value;
  564. };
  565. #endif /* __SHARE_H__ */