sh_mobile_lcdcfb.c 45 KB

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  1. /*
  2. * SuperH Mobile LCDC Framebuffer
  3. *
  4. * Copyright (c) 2008 Magnus Damm
  5. *
  6. * This file is subject to the terms and conditions of the GNU General Public
  7. * License. See the file "COPYING" in the main directory of this archive
  8. * for more details.
  9. */
  10. #include <linux/kernel.h>
  11. #include <linux/init.h>
  12. #include <linux/delay.h>
  13. #include <linux/mm.h>
  14. #include <linux/clk.h>
  15. #include <linux/pm_runtime.h>
  16. #include <linux/platform_device.h>
  17. #include <linux/dma-mapping.h>
  18. #include <linux/interrupt.h>
  19. #include <linux/videodev2.h>
  20. #include <linux/vmalloc.h>
  21. #include <linux/ioctl.h>
  22. #include <linux/slab.h>
  23. #include <linux/console.h>
  24. #include <linux/backlight.h>
  25. #include <linux/gpio.h>
  26. #include <linux/module.h>
  27. #include <video/sh_mobile_lcdc.h>
  28. #include <video/sh_mobile_meram.h>
  29. #include <linux/atomic.h>
  30. #include "sh_mobile_lcdcfb.h"
  31. #define SIDE_B_OFFSET 0x1000
  32. #define MIRROR_OFFSET 0x2000
  33. #define MAX_XRES 1920
  34. #define MAX_YRES 1080
  35. static unsigned long lcdc_offs_mainlcd[NR_CH_REGS] = {
  36. [LDDCKPAT1R] = 0x400,
  37. [LDDCKPAT2R] = 0x404,
  38. [LDMT1R] = 0x418,
  39. [LDMT2R] = 0x41c,
  40. [LDMT3R] = 0x420,
  41. [LDDFR] = 0x424,
  42. [LDSM1R] = 0x428,
  43. [LDSM2R] = 0x42c,
  44. [LDSA1R] = 0x430,
  45. [LDSA2R] = 0x434,
  46. [LDMLSR] = 0x438,
  47. [LDHCNR] = 0x448,
  48. [LDHSYNR] = 0x44c,
  49. [LDVLNR] = 0x450,
  50. [LDVSYNR] = 0x454,
  51. [LDPMR] = 0x460,
  52. [LDHAJR] = 0x4a0,
  53. };
  54. static unsigned long lcdc_offs_sublcd[NR_CH_REGS] = {
  55. [LDDCKPAT1R] = 0x408,
  56. [LDDCKPAT2R] = 0x40c,
  57. [LDMT1R] = 0x600,
  58. [LDMT2R] = 0x604,
  59. [LDMT3R] = 0x608,
  60. [LDDFR] = 0x60c,
  61. [LDSM1R] = 0x610,
  62. [LDSM2R] = 0x614,
  63. [LDSA1R] = 0x618,
  64. [LDMLSR] = 0x620,
  65. [LDHCNR] = 0x624,
  66. [LDHSYNR] = 0x628,
  67. [LDVLNR] = 0x62c,
  68. [LDVSYNR] = 0x630,
  69. [LDPMR] = 0x63c,
  70. };
  71. static const struct fb_videomode default_720p = {
  72. .name = "HDMI 720p",
  73. .xres = 1280,
  74. .yres = 720,
  75. .left_margin = 220,
  76. .right_margin = 110,
  77. .hsync_len = 40,
  78. .upper_margin = 20,
  79. .lower_margin = 5,
  80. .vsync_len = 5,
  81. .pixclock = 13468,
  82. .refresh = 60,
  83. .sync = FB_SYNC_VERT_HIGH_ACT | FB_SYNC_HOR_HIGH_ACT,
  84. };
  85. struct sh_mobile_lcdc_priv {
  86. void __iomem *base;
  87. int irq;
  88. atomic_t hw_usecnt;
  89. struct device *dev;
  90. struct clk *dot_clk;
  91. unsigned long lddckr;
  92. struct sh_mobile_lcdc_chan ch[2];
  93. struct notifier_block notifier;
  94. int started;
  95. int forced_fourcc; /* 2 channel LCDC must share fourcc setting */
  96. struct sh_mobile_meram_info *meram_dev;
  97. };
  98. static bool banked(int reg_nr)
  99. {
  100. switch (reg_nr) {
  101. case LDMT1R:
  102. case LDMT2R:
  103. case LDMT3R:
  104. case LDDFR:
  105. case LDSM1R:
  106. case LDSA1R:
  107. case LDSA2R:
  108. case LDMLSR:
  109. case LDHCNR:
  110. case LDHSYNR:
  111. case LDVLNR:
  112. case LDVSYNR:
  113. return true;
  114. }
  115. return false;
  116. }
  117. static void lcdc_write_chan(struct sh_mobile_lcdc_chan *chan,
  118. int reg_nr, unsigned long data)
  119. {
  120. iowrite32(data, chan->lcdc->base + chan->reg_offs[reg_nr]);
  121. if (banked(reg_nr))
  122. iowrite32(data, chan->lcdc->base + chan->reg_offs[reg_nr] +
  123. SIDE_B_OFFSET);
  124. }
  125. static void lcdc_write_chan_mirror(struct sh_mobile_lcdc_chan *chan,
  126. int reg_nr, unsigned long data)
  127. {
  128. iowrite32(data, chan->lcdc->base + chan->reg_offs[reg_nr] +
  129. MIRROR_OFFSET);
  130. }
  131. static unsigned long lcdc_read_chan(struct sh_mobile_lcdc_chan *chan,
  132. int reg_nr)
  133. {
  134. return ioread32(chan->lcdc->base + chan->reg_offs[reg_nr]);
  135. }
  136. static void lcdc_write(struct sh_mobile_lcdc_priv *priv,
  137. unsigned long reg_offs, unsigned long data)
  138. {
  139. iowrite32(data, priv->base + reg_offs);
  140. }
  141. static unsigned long lcdc_read(struct sh_mobile_lcdc_priv *priv,
  142. unsigned long reg_offs)
  143. {
  144. return ioread32(priv->base + reg_offs);
  145. }
  146. static void lcdc_wait_bit(struct sh_mobile_lcdc_priv *priv,
  147. unsigned long reg_offs,
  148. unsigned long mask, unsigned long until)
  149. {
  150. while ((lcdc_read(priv, reg_offs) & mask) != until)
  151. cpu_relax();
  152. }
  153. static int lcdc_chan_is_sublcd(struct sh_mobile_lcdc_chan *chan)
  154. {
  155. return chan->cfg.chan == LCDC_CHAN_SUBLCD;
  156. }
  157. static void lcdc_sys_write_index(void *handle, unsigned long data)
  158. {
  159. struct sh_mobile_lcdc_chan *ch = handle;
  160. lcdc_write(ch->lcdc, _LDDWD0R, data | LDDWDxR_WDACT);
  161. lcdc_wait_bit(ch->lcdc, _LDSR, LDSR_AS, 0);
  162. lcdc_write(ch->lcdc, _LDDWAR, LDDWAR_WA |
  163. (lcdc_chan_is_sublcd(ch) ? 2 : 0));
  164. lcdc_wait_bit(ch->lcdc, _LDSR, LDSR_AS, 0);
  165. }
  166. static void lcdc_sys_write_data(void *handle, unsigned long data)
  167. {
  168. struct sh_mobile_lcdc_chan *ch = handle;
  169. lcdc_write(ch->lcdc, _LDDWD0R, data | LDDWDxR_WDACT | LDDWDxR_RSW);
  170. lcdc_wait_bit(ch->lcdc, _LDSR, LDSR_AS, 0);
  171. lcdc_write(ch->lcdc, _LDDWAR, LDDWAR_WA |
  172. (lcdc_chan_is_sublcd(ch) ? 2 : 0));
  173. lcdc_wait_bit(ch->lcdc, _LDSR, LDSR_AS, 0);
  174. }
  175. static unsigned long lcdc_sys_read_data(void *handle)
  176. {
  177. struct sh_mobile_lcdc_chan *ch = handle;
  178. lcdc_write(ch->lcdc, _LDDRDR, LDDRDR_RSR);
  179. lcdc_wait_bit(ch->lcdc, _LDSR, LDSR_AS, 0);
  180. lcdc_write(ch->lcdc, _LDDRAR, LDDRAR_RA |
  181. (lcdc_chan_is_sublcd(ch) ? 2 : 0));
  182. udelay(1);
  183. lcdc_wait_bit(ch->lcdc, _LDSR, LDSR_AS, 0);
  184. return lcdc_read(ch->lcdc, _LDDRDR) & LDDRDR_DRD_MASK;
  185. }
  186. struct sh_mobile_lcdc_sys_bus_ops sh_mobile_lcdc_sys_bus_ops = {
  187. lcdc_sys_write_index,
  188. lcdc_sys_write_data,
  189. lcdc_sys_read_data,
  190. };
  191. static int sh_mobile_format_fourcc(const struct fb_var_screeninfo *var)
  192. {
  193. if (var->grayscale > 1)
  194. return var->grayscale;
  195. switch (var->bits_per_pixel) {
  196. case 16:
  197. return V4L2_PIX_FMT_RGB565;
  198. case 24:
  199. return V4L2_PIX_FMT_BGR24;
  200. case 32:
  201. return V4L2_PIX_FMT_BGR32;
  202. default:
  203. return 0;
  204. }
  205. }
  206. static int sh_mobile_format_is_fourcc(const struct fb_var_screeninfo *var)
  207. {
  208. return var->grayscale > 1;
  209. }
  210. static bool sh_mobile_format_is_yuv(const struct fb_var_screeninfo *var)
  211. {
  212. if (var->grayscale <= 1)
  213. return false;
  214. switch (var->grayscale) {
  215. case V4L2_PIX_FMT_NV12:
  216. case V4L2_PIX_FMT_NV21:
  217. case V4L2_PIX_FMT_NV16:
  218. case V4L2_PIX_FMT_NV61:
  219. case V4L2_PIX_FMT_NV24:
  220. case V4L2_PIX_FMT_NV42:
  221. return true;
  222. default:
  223. return false;
  224. }
  225. }
  226. static void sh_mobile_lcdc_clk_on(struct sh_mobile_lcdc_priv *priv)
  227. {
  228. if (atomic_inc_and_test(&priv->hw_usecnt)) {
  229. if (priv->dot_clk)
  230. clk_enable(priv->dot_clk);
  231. pm_runtime_get_sync(priv->dev);
  232. if (priv->meram_dev && priv->meram_dev->pdev)
  233. pm_runtime_get_sync(&priv->meram_dev->pdev->dev);
  234. }
  235. }
  236. static void sh_mobile_lcdc_clk_off(struct sh_mobile_lcdc_priv *priv)
  237. {
  238. if (atomic_sub_return(1, &priv->hw_usecnt) == -1) {
  239. if (priv->meram_dev && priv->meram_dev->pdev)
  240. pm_runtime_put_sync(&priv->meram_dev->pdev->dev);
  241. pm_runtime_put(priv->dev);
  242. if (priv->dot_clk)
  243. clk_disable(priv->dot_clk);
  244. }
  245. }
  246. static int sh_mobile_lcdc_sginit(struct fb_info *info,
  247. struct list_head *pagelist)
  248. {
  249. struct sh_mobile_lcdc_chan *ch = info->par;
  250. unsigned int nr_pages_max = info->fix.smem_len >> PAGE_SHIFT;
  251. struct page *page;
  252. int nr_pages = 0;
  253. sg_init_table(ch->sglist, nr_pages_max);
  254. list_for_each_entry(page, pagelist, lru)
  255. sg_set_page(&ch->sglist[nr_pages++], page, PAGE_SIZE, 0);
  256. return nr_pages;
  257. }
  258. static void sh_mobile_lcdc_deferred_io(struct fb_info *info,
  259. struct list_head *pagelist)
  260. {
  261. struct sh_mobile_lcdc_chan *ch = info->par;
  262. struct sh_mobile_lcdc_board_cfg *bcfg = &ch->cfg.board_cfg;
  263. /* enable clocks before accessing hardware */
  264. sh_mobile_lcdc_clk_on(ch->lcdc);
  265. /*
  266. * It's possible to get here without anything on the pagelist via
  267. * sh_mobile_lcdc_deferred_io_touch() or via a userspace fsync()
  268. * invocation. In the former case, the acceleration routines are
  269. * stepped in to when using the framebuffer console causing the
  270. * workqueue to be scheduled without any dirty pages on the list.
  271. *
  272. * Despite this, a panel update is still needed given that the
  273. * acceleration routines have their own methods for writing in
  274. * that still need to be updated.
  275. *
  276. * The fsync() and empty pagelist case could be optimized for,
  277. * but we don't bother, as any application exhibiting such
  278. * behaviour is fundamentally broken anyways.
  279. */
  280. if (!list_empty(pagelist)) {
  281. unsigned int nr_pages = sh_mobile_lcdc_sginit(info, pagelist);
  282. /* trigger panel update */
  283. dma_map_sg(info->dev, ch->sglist, nr_pages, DMA_TO_DEVICE);
  284. if (bcfg->start_transfer)
  285. bcfg->start_transfer(bcfg->board_data, ch,
  286. &sh_mobile_lcdc_sys_bus_ops);
  287. lcdc_write_chan(ch, LDSM2R, LDSM2R_OSTRG);
  288. dma_unmap_sg(info->dev, ch->sglist, nr_pages, DMA_TO_DEVICE);
  289. } else {
  290. if (bcfg->start_transfer)
  291. bcfg->start_transfer(bcfg->board_data, ch,
  292. &sh_mobile_lcdc_sys_bus_ops);
  293. lcdc_write_chan(ch, LDSM2R, LDSM2R_OSTRG);
  294. }
  295. }
  296. static void sh_mobile_lcdc_deferred_io_touch(struct fb_info *info)
  297. {
  298. struct fb_deferred_io *fbdefio = info->fbdefio;
  299. if (fbdefio)
  300. schedule_delayed_work(&info->deferred_work, fbdefio->delay);
  301. }
  302. static irqreturn_t sh_mobile_lcdc_irq(int irq, void *data)
  303. {
  304. struct sh_mobile_lcdc_priv *priv = data;
  305. struct sh_mobile_lcdc_chan *ch;
  306. unsigned long ldintr;
  307. int is_sub;
  308. int k;
  309. /* Acknowledge interrupts and disable further VSYNC End IRQs. */
  310. ldintr = lcdc_read(priv, _LDINTR);
  311. lcdc_write(priv, _LDINTR, (ldintr ^ LDINTR_STATUS_MASK) & ~LDINTR_VEE);
  312. /* figure out if this interrupt is for main or sub lcd */
  313. is_sub = (lcdc_read(priv, _LDSR) & LDSR_MSS) ? 1 : 0;
  314. /* wake up channel and disable clocks */
  315. for (k = 0; k < ARRAY_SIZE(priv->ch); k++) {
  316. ch = &priv->ch[k];
  317. if (!ch->enabled)
  318. continue;
  319. /* Frame End */
  320. if (ldintr & LDINTR_FS) {
  321. if (is_sub == lcdc_chan_is_sublcd(ch)) {
  322. ch->frame_end = 1;
  323. wake_up(&ch->frame_end_wait);
  324. sh_mobile_lcdc_clk_off(priv);
  325. }
  326. }
  327. /* VSYNC End */
  328. if (ldintr & LDINTR_VES)
  329. complete(&ch->vsync_completion);
  330. }
  331. return IRQ_HANDLED;
  332. }
  333. static void sh_mobile_lcdc_start_stop(struct sh_mobile_lcdc_priv *priv,
  334. int start)
  335. {
  336. unsigned long tmp = lcdc_read(priv, _LDCNT2R);
  337. int k;
  338. /* start or stop the lcdc */
  339. if (start)
  340. lcdc_write(priv, _LDCNT2R, tmp | LDCNT2R_DO);
  341. else
  342. lcdc_write(priv, _LDCNT2R, tmp & ~LDCNT2R_DO);
  343. /* wait until power is applied/stopped on all channels */
  344. for (k = 0; k < ARRAY_SIZE(priv->ch); k++)
  345. if (lcdc_read(priv, _LDCNT2R) & priv->ch[k].enabled)
  346. while (1) {
  347. tmp = lcdc_read_chan(&priv->ch[k], LDPMR)
  348. & LDPMR_LPS;
  349. if (start && tmp == LDPMR_LPS)
  350. break;
  351. if (!start && tmp == 0)
  352. break;
  353. cpu_relax();
  354. }
  355. if (!start)
  356. lcdc_write(priv, _LDDCKSTPR, 1); /* stop dotclock */
  357. }
  358. static void sh_mobile_lcdc_geometry(struct sh_mobile_lcdc_chan *ch)
  359. {
  360. struct fb_var_screeninfo *var = &ch->info->var, *display_var = &ch->display_var;
  361. unsigned long h_total, hsync_pos, display_h_total;
  362. u32 tmp;
  363. tmp = ch->ldmt1r_value;
  364. tmp |= (var->sync & FB_SYNC_VERT_HIGH_ACT) ? 0 : LDMT1R_VPOL;
  365. tmp |= (var->sync & FB_SYNC_HOR_HIGH_ACT) ? 0 : LDMT1R_HPOL;
  366. tmp |= (ch->cfg.flags & LCDC_FLAGS_DWPOL) ? LDMT1R_DWPOL : 0;
  367. tmp |= (ch->cfg.flags & LCDC_FLAGS_DIPOL) ? LDMT1R_DIPOL : 0;
  368. tmp |= (ch->cfg.flags & LCDC_FLAGS_DAPOL) ? LDMT1R_DAPOL : 0;
  369. tmp |= (ch->cfg.flags & LCDC_FLAGS_HSCNT) ? LDMT1R_HSCNT : 0;
  370. tmp |= (ch->cfg.flags & LCDC_FLAGS_DWCNT) ? LDMT1R_DWCNT : 0;
  371. lcdc_write_chan(ch, LDMT1R, tmp);
  372. /* setup SYS bus */
  373. lcdc_write_chan(ch, LDMT2R, ch->cfg.sys_bus_cfg.ldmt2r);
  374. lcdc_write_chan(ch, LDMT3R, ch->cfg.sys_bus_cfg.ldmt3r);
  375. /* horizontal configuration */
  376. h_total = display_var->xres + display_var->hsync_len +
  377. display_var->left_margin + display_var->right_margin;
  378. tmp = h_total / 8; /* HTCN */
  379. tmp |= (min(display_var->xres, var->xres) / 8) << 16; /* HDCN */
  380. lcdc_write_chan(ch, LDHCNR, tmp);
  381. hsync_pos = display_var->xres + display_var->right_margin;
  382. tmp = hsync_pos / 8; /* HSYNP */
  383. tmp |= (display_var->hsync_len / 8) << 16; /* HSYNW */
  384. lcdc_write_chan(ch, LDHSYNR, tmp);
  385. /* vertical configuration */
  386. tmp = display_var->yres + display_var->vsync_len +
  387. display_var->upper_margin + display_var->lower_margin; /* VTLN */
  388. tmp |= min(display_var->yres, var->yres) << 16; /* VDLN */
  389. lcdc_write_chan(ch, LDVLNR, tmp);
  390. tmp = display_var->yres + display_var->lower_margin; /* VSYNP */
  391. tmp |= display_var->vsync_len << 16; /* VSYNW */
  392. lcdc_write_chan(ch, LDVSYNR, tmp);
  393. /* Adjust horizontal synchronisation for HDMI */
  394. display_h_total = display_var->xres + display_var->hsync_len +
  395. display_var->left_margin + display_var->right_margin;
  396. tmp = ((display_var->xres & 7) << 24) |
  397. ((display_h_total & 7) << 16) |
  398. ((display_var->hsync_len & 7) << 8) |
  399. (hsync_pos & 7);
  400. lcdc_write_chan(ch, LDHAJR, tmp);
  401. }
  402. /*
  403. * __sh_mobile_lcdc_start - Configure and tart the LCDC
  404. * @priv: LCDC device
  405. *
  406. * Configure all enabled channels and start the LCDC device. All external
  407. * devices (clocks, MERAM, panels, ...) are not touched by this function.
  408. */
  409. static void __sh_mobile_lcdc_start(struct sh_mobile_lcdc_priv *priv)
  410. {
  411. struct sh_mobile_lcdc_chan *ch;
  412. unsigned long tmp;
  413. int k, m;
  414. /* Enable LCDC channels. Read data from external memory, avoid using the
  415. * BEU for now.
  416. */
  417. lcdc_write(priv, _LDCNT2R, priv->ch[0].enabled | priv->ch[1].enabled);
  418. /* Stop the LCDC first and disable all interrupts. */
  419. sh_mobile_lcdc_start_stop(priv, 0);
  420. lcdc_write(priv, _LDINTR, 0);
  421. /* Configure power supply, dot clocks and start them. */
  422. tmp = priv->lddckr;
  423. for (k = 0; k < ARRAY_SIZE(priv->ch); k++) {
  424. ch = &priv->ch[k];
  425. if (!ch->enabled)
  426. continue;
  427. /* Power supply */
  428. lcdc_write_chan(ch, LDPMR, 0);
  429. m = ch->cfg.clock_divider;
  430. if (!m)
  431. continue;
  432. /* FIXME: sh7724 can only use 42, 48, 54 and 60 for the divider
  433. * denominator.
  434. */
  435. lcdc_write_chan(ch, LDDCKPAT1R, 0);
  436. lcdc_write_chan(ch, LDDCKPAT2R, (1 << (m/2)) - 1);
  437. if (m == 1)
  438. m = LDDCKR_MOSEL;
  439. tmp |= m << (lcdc_chan_is_sublcd(ch) ? 8 : 0);
  440. }
  441. lcdc_write(priv, _LDDCKR, tmp);
  442. lcdc_write(priv, _LDDCKSTPR, 0);
  443. lcdc_wait_bit(priv, _LDDCKSTPR, ~0, 0);
  444. /* Setup geometry, format, frame buffer memory and operation mode. */
  445. for (k = 0; k < ARRAY_SIZE(priv->ch); k++) {
  446. ch = &priv->ch[k];
  447. if (!ch->enabled)
  448. continue;
  449. sh_mobile_lcdc_geometry(ch);
  450. switch (sh_mobile_format_fourcc(&ch->info->var)) {
  451. case V4L2_PIX_FMT_RGB565:
  452. tmp = LDDFR_PKF_RGB16;
  453. break;
  454. case V4L2_PIX_FMT_BGR24:
  455. tmp = LDDFR_PKF_RGB24;
  456. break;
  457. case V4L2_PIX_FMT_BGR32:
  458. tmp = LDDFR_PKF_ARGB32;
  459. break;
  460. case V4L2_PIX_FMT_NV12:
  461. case V4L2_PIX_FMT_NV21:
  462. tmp = LDDFR_CC | LDDFR_YF_420;
  463. break;
  464. case V4L2_PIX_FMT_NV16:
  465. case V4L2_PIX_FMT_NV61:
  466. tmp = LDDFR_CC | LDDFR_YF_422;
  467. break;
  468. case V4L2_PIX_FMT_NV24:
  469. case V4L2_PIX_FMT_NV42:
  470. tmp = LDDFR_CC | LDDFR_YF_444;
  471. break;
  472. }
  473. if (sh_mobile_format_is_yuv(&ch->info->var)) {
  474. switch (ch->info->var.colorspace) {
  475. case V4L2_COLORSPACE_REC709:
  476. tmp |= LDDFR_CF1;
  477. break;
  478. case V4L2_COLORSPACE_JPEG:
  479. tmp |= LDDFR_CF0;
  480. break;
  481. }
  482. }
  483. lcdc_write_chan(ch, LDDFR, tmp);
  484. lcdc_write_chan(ch, LDMLSR, ch->pitch);
  485. lcdc_write_chan(ch, LDSA1R, ch->base_addr_y);
  486. if (sh_mobile_format_is_yuv(&ch->info->var))
  487. lcdc_write_chan(ch, LDSA2R, ch->base_addr_c);
  488. /* When using deferred I/O mode, configure the LCDC for one-shot
  489. * operation and enable the frame end interrupt. Otherwise use
  490. * continuous read mode.
  491. */
  492. if (ch->ldmt1r_value & LDMT1R_IFM &&
  493. ch->cfg.sys_bus_cfg.deferred_io_msec) {
  494. lcdc_write_chan(ch, LDSM1R, LDSM1R_OS);
  495. lcdc_write(priv, _LDINTR, LDINTR_FE);
  496. } else {
  497. lcdc_write_chan(ch, LDSM1R, 0);
  498. }
  499. }
  500. /* Word and long word swap. */
  501. switch (sh_mobile_format_fourcc(&priv->ch[0].info->var)) {
  502. case V4L2_PIX_FMT_RGB565:
  503. case V4L2_PIX_FMT_NV21:
  504. case V4L2_PIX_FMT_NV61:
  505. case V4L2_PIX_FMT_NV42:
  506. tmp = LDDDSR_LS | LDDDSR_WS;
  507. break;
  508. case V4L2_PIX_FMT_BGR24:
  509. case V4L2_PIX_FMT_NV12:
  510. case V4L2_PIX_FMT_NV16:
  511. case V4L2_PIX_FMT_NV24:
  512. tmp = LDDDSR_LS | LDDDSR_WS | LDDDSR_BS;
  513. break;
  514. case V4L2_PIX_FMT_BGR32:
  515. default:
  516. tmp = LDDDSR_LS;
  517. break;
  518. }
  519. lcdc_write(priv, _LDDDSR, tmp);
  520. /* Enable the display output. */
  521. lcdc_write(priv, _LDCNT1R, LDCNT1R_DE);
  522. sh_mobile_lcdc_start_stop(priv, 1);
  523. priv->started = 1;
  524. }
  525. static int sh_mobile_lcdc_start(struct sh_mobile_lcdc_priv *priv)
  526. {
  527. struct sh_mobile_meram_info *mdev = priv->meram_dev;
  528. struct sh_mobile_lcdc_board_cfg *board_cfg;
  529. struct sh_mobile_lcdc_chan *ch;
  530. unsigned long tmp;
  531. int ret;
  532. int k;
  533. /* enable clocks before accessing the hardware */
  534. for (k = 0; k < ARRAY_SIZE(priv->ch); k++) {
  535. if (priv->ch[k].enabled)
  536. sh_mobile_lcdc_clk_on(priv);
  537. }
  538. /* reset */
  539. lcdc_write(priv, _LDCNT2R, lcdc_read(priv, _LDCNT2R) | LDCNT2R_BR);
  540. lcdc_wait_bit(priv, _LDCNT2R, LDCNT2R_BR, 0);
  541. for (k = 0; k < ARRAY_SIZE(priv->ch); k++) {
  542. ch = &priv->ch[k];
  543. if (!ch->enabled)
  544. continue;
  545. board_cfg = &ch->cfg.board_cfg;
  546. if (board_cfg->setup_sys) {
  547. ret = board_cfg->setup_sys(board_cfg->board_data, ch,
  548. &sh_mobile_lcdc_sys_bus_ops);
  549. if (ret)
  550. return ret;
  551. }
  552. }
  553. /* Compute frame buffer base address and pitch for each channel. */
  554. for (k = 0; k < ARRAY_SIZE(priv->ch); k++) {
  555. struct sh_mobile_meram_cfg *cfg;
  556. int pixelformat;
  557. ch = &priv->ch[k];
  558. if (!ch->enabled)
  559. continue;
  560. ch->base_addr_y = ch->info->fix.smem_start;
  561. ch->base_addr_c = ch->base_addr_y
  562. + ch->info->var.xres
  563. * ch->info->var.yres_virtual;
  564. ch->pitch = ch->info->fix.line_length;
  565. /* Enable MERAM if possible. */
  566. cfg = ch->cfg.meram_cfg;
  567. if (mdev == NULL || mdev->ops == NULL || cfg == NULL)
  568. continue;
  569. /* we need to de-init configured ICBs before we can
  570. * re-initialize them.
  571. */
  572. if (ch->meram_enabled) {
  573. mdev->ops->meram_unregister(mdev, cfg);
  574. ch->meram_enabled = 0;
  575. }
  576. switch (sh_mobile_format_fourcc(&ch->info->var)) {
  577. case V4L2_PIX_FMT_NV12:
  578. case V4L2_PIX_FMT_NV21:
  579. case V4L2_PIX_FMT_NV16:
  580. case V4L2_PIX_FMT_NV61:
  581. pixelformat = SH_MOBILE_MERAM_PF_NV;
  582. break;
  583. case V4L2_PIX_FMT_NV24:
  584. case V4L2_PIX_FMT_NV42:
  585. pixelformat = SH_MOBILE_MERAM_PF_NV24;
  586. break;
  587. case V4L2_PIX_FMT_RGB565:
  588. case V4L2_PIX_FMT_BGR24:
  589. case V4L2_PIX_FMT_BGR32:
  590. default:
  591. pixelformat = SH_MOBILE_MERAM_PF_RGB;
  592. break;
  593. }
  594. ret = mdev->ops->meram_register(mdev, cfg, ch->pitch,
  595. ch->info->var.yres, pixelformat,
  596. ch->base_addr_y, ch->base_addr_c,
  597. &ch->base_addr_y, &ch->base_addr_c,
  598. &ch->pitch);
  599. if (!ret)
  600. ch->meram_enabled = 1;
  601. }
  602. /* Start the LCDC. */
  603. __sh_mobile_lcdc_start(priv);
  604. /* Setup deferred I/O, tell the board code to enable the panels, and
  605. * turn backlight on.
  606. */
  607. for (k = 0; k < ARRAY_SIZE(priv->ch); k++) {
  608. ch = &priv->ch[k];
  609. if (!ch->enabled)
  610. continue;
  611. tmp = ch->cfg.sys_bus_cfg.deferred_io_msec;
  612. if (ch->ldmt1r_value & LDMT1R_IFM && tmp) {
  613. ch->defio.deferred_io = sh_mobile_lcdc_deferred_io;
  614. ch->defio.delay = msecs_to_jiffies(tmp);
  615. ch->info->fbdefio = &ch->defio;
  616. fb_deferred_io_init(ch->info);
  617. }
  618. board_cfg = &ch->cfg.board_cfg;
  619. if (board_cfg->display_on && try_module_get(board_cfg->owner)) {
  620. board_cfg->display_on(board_cfg->board_data, ch->info);
  621. module_put(board_cfg->owner);
  622. }
  623. if (ch->bl) {
  624. ch->bl->props.power = FB_BLANK_UNBLANK;
  625. backlight_update_status(ch->bl);
  626. }
  627. }
  628. return 0;
  629. }
  630. static void sh_mobile_lcdc_stop(struct sh_mobile_lcdc_priv *priv)
  631. {
  632. struct sh_mobile_lcdc_chan *ch;
  633. struct sh_mobile_lcdc_board_cfg *board_cfg;
  634. int k;
  635. /* clean up deferred io and ask board code to disable panel */
  636. for (k = 0; k < ARRAY_SIZE(priv->ch); k++) {
  637. ch = &priv->ch[k];
  638. if (!ch->enabled)
  639. continue;
  640. /* deferred io mode:
  641. * flush frame, and wait for frame end interrupt
  642. * clean up deferred io and enable clock
  643. */
  644. if (ch->info && ch->info->fbdefio) {
  645. ch->frame_end = 0;
  646. schedule_delayed_work(&ch->info->deferred_work, 0);
  647. wait_event(ch->frame_end_wait, ch->frame_end);
  648. fb_deferred_io_cleanup(ch->info);
  649. ch->info->fbdefio = NULL;
  650. sh_mobile_lcdc_clk_on(priv);
  651. }
  652. if (ch->bl) {
  653. ch->bl->props.power = FB_BLANK_POWERDOWN;
  654. backlight_update_status(ch->bl);
  655. }
  656. board_cfg = &ch->cfg.board_cfg;
  657. if (board_cfg->display_off && try_module_get(board_cfg->owner)) {
  658. board_cfg->display_off(board_cfg->board_data);
  659. module_put(board_cfg->owner);
  660. }
  661. /* disable the meram */
  662. if (ch->meram_enabled) {
  663. struct sh_mobile_meram_cfg *cfg;
  664. struct sh_mobile_meram_info *mdev;
  665. cfg = ch->cfg.meram_cfg;
  666. mdev = priv->meram_dev;
  667. mdev->ops->meram_unregister(mdev, cfg);
  668. ch->meram_enabled = 0;
  669. }
  670. }
  671. /* stop the lcdc */
  672. if (priv->started) {
  673. sh_mobile_lcdc_start_stop(priv, 0);
  674. priv->started = 0;
  675. }
  676. /* stop clocks */
  677. for (k = 0; k < ARRAY_SIZE(priv->ch); k++)
  678. if (priv->ch[k].enabled)
  679. sh_mobile_lcdc_clk_off(priv);
  680. }
  681. static int sh_mobile_lcdc_check_interface(struct sh_mobile_lcdc_chan *ch)
  682. {
  683. int interface_type = ch->cfg.interface_type;
  684. switch (interface_type) {
  685. case RGB8:
  686. case RGB9:
  687. case RGB12A:
  688. case RGB12B:
  689. case RGB16:
  690. case RGB18:
  691. case RGB24:
  692. case SYS8A:
  693. case SYS8B:
  694. case SYS8C:
  695. case SYS8D:
  696. case SYS9:
  697. case SYS12:
  698. case SYS16A:
  699. case SYS16B:
  700. case SYS16C:
  701. case SYS18:
  702. case SYS24:
  703. break;
  704. default:
  705. return -EINVAL;
  706. }
  707. /* SUBLCD only supports SYS interface */
  708. if (lcdc_chan_is_sublcd(ch)) {
  709. if (!(interface_type & LDMT1R_IFM))
  710. return -EINVAL;
  711. interface_type &= ~LDMT1R_IFM;
  712. }
  713. ch->ldmt1r_value = interface_type;
  714. return 0;
  715. }
  716. static int sh_mobile_lcdc_setup_clocks(struct platform_device *pdev,
  717. int clock_source,
  718. struct sh_mobile_lcdc_priv *priv)
  719. {
  720. char *str;
  721. switch (clock_source) {
  722. case LCDC_CLK_BUS:
  723. str = "bus_clk";
  724. priv->lddckr = LDDCKR_ICKSEL_BUS;
  725. break;
  726. case LCDC_CLK_PERIPHERAL:
  727. str = "peripheral_clk";
  728. priv->lddckr = LDDCKR_ICKSEL_MIPI;
  729. break;
  730. case LCDC_CLK_EXTERNAL:
  731. str = NULL;
  732. priv->lddckr = LDDCKR_ICKSEL_HDMI;
  733. break;
  734. default:
  735. return -EINVAL;
  736. }
  737. if (str) {
  738. priv->dot_clk = clk_get(&pdev->dev, str);
  739. if (IS_ERR(priv->dot_clk)) {
  740. dev_err(&pdev->dev, "cannot get dot clock %s\n", str);
  741. return PTR_ERR(priv->dot_clk);
  742. }
  743. }
  744. /* Runtime PM support involves two step for this driver:
  745. * 1) Enable Runtime PM
  746. * 2) Force Runtime PM Resume since hardware is accessed from probe()
  747. */
  748. priv->dev = &pdev->dev;
  749. pm_runtime_enable(priv->dev);
  750. pm_runtime_resume(priv->dev);
  751. return 0;
  752. }
  753. static int sh_mobile_lcdc_setcolreg(u_int regno,
  754. u_int red, u_int green, u_int blue,
  755. u_int transp, struct fb_info *info)
  756. {
  757. u32 *palette = info->pseudo_palette;
  758. if (regno >= PALETTE_NR)
  759. return -EINVAL;
  760. /* only FB_VISUAL_TRUECOLOR supported */
  761. red >>= 16 - info->var.red.length;
  762. green >>= 16 - info->var.green.length;
  763. blue >>= 16 - info->var.blue.length;
  764. transp >>= 16 - info->var.transp.length;
  765. palette[regno] = (red << info->var.red.offset) |
  766. (green << info->var.green.offset) |
  767. (blue << info->var.blue.offset) |
  768. (transp << info->var.transp.offset);
  769. return 0;
  770. }
  771. static struct fb_fix_screeninfo sh_mobile_lcdc_fix = {
  772. .id = "SH Mobile LCDC",
  773. .type = FB_TYPE_PACKED_PIXELS,
  774. .visual = FB_VISUAL_TRUECOLOR,
  775. .accel = FB_ACCEL_NONE,
  776. .xpanstep = 0,
  777. .ypanstep = 1,
  778. .ywrapstep = 0,
  779. .capabilities = FB_CAP_FOURCC,
  780. };
  781. static void sh_mobile_lcdc_fillrect(struct fb_info *info,
  782. const struct fb_fillrect *rect)
  783. {
  784. sys_fillrect(info, rect);
  785. sh_mobile_lcdc_deferred_io_touch(info);
  786. }
  787. static void sh_mobile_lcdc_copyarea(struct fb_info *info,
  788. const struct fb_copyarea *area)
  789. {
  790. sys_copyarea(info, area);
  791. sh_mobile_lcdc_deferred_io_touch(info);
  792. }
  793. static void sh_mobile_lcdc_imageblit(struct fb_info *info,
  794. const struct fb_image *image)
  795. {
  796. sys_imageblit(info, image);
  797. sh_mobile_lcdc_deferred_io_touch(info);
  798. }
  799. static int sh_mobile_fb_pan_display(struct fb_var_screeninfo *var,
  800. struct fb_info *info)
  801. {
  802. struct sh_mobile_lcdc_chan *ch = info->par;
  803. struct sh_mobile_lcdc_priv *priv = ch->lcdc;
  804. unsigned long ldrcntr;
  805. unsigned long new_pan_offset;
  806. unsigned long base_addr_y, base_addr_c;
  807. unsigned long c_offset;
  808. bool yuv = sh_mobile_format_is_yuv(&info->var);
  809. if (!yuv)
  810. new_pan_offset = var->yoffset * info->fix.line_length
  811. + var->xoffset * (info->var.bits_per_pixel / 8);
  812. else
  813. new_pan_offset = var->yoffset * info->fix.line_length
  814. + var->xoffset;
  815. if (new_pan_offset == ch->pan_offset)
  816. return 0; /* No change, do nothing */
  817. ldrcntr = lcdc_read(priv, _LDRCNTR);
  818. /* Set the source address for the next refresh */
  819. base_addr_y = ch->dma_handle + new_pan_offset;
  820. if (yuv) {
  821. /* Set y offset */
  822. c_offset = var->yoffset * info->fix.line_length
  823. * (info->var.bits_per_pixel - 8) / 8;
  824. base_addr_c = ch->dma_handle
  825. + info->var.xres * info->var.yres_virtual
  826. + c_offset;
  827. /* Set x offset */
  828. if (sh_mobile_format_fourcc(&info->var) == V4L2_PIX_FMT_NV24)
  829. base_addr_c += 2 * var->xoffset;
  830. else
  831. base_addr_c += var->xoffset;
  832. }
  833. if (ch->meram_enabled) {
  834. struct sh_mobile_meram_cfg *cfg;
  835. struct sh_mobile_meram_info *mdev;
  836. int ret;
  837. cfg = ch->cfg.meram_cfg;
  838. mdev = priv->meram_dev;
  839. ret = mdev->ops->meram_update(mdev, cfg,
  840. base_addr_y, base_addr_c,
  841. &base_addr_y, &base_addr_c);
  842. if (ret)
  843. return ret;
  844. }
  845. ch->base_addr_y = base_addr_y;
  846. ch->base_addr_c = base_addr_c;
  847. lcdc_write_chan_mirror(ch, LDSA1R, base_addr_y);
  848. if (yuv)
  849. lcdc_write_chan_mirror(ch, LDSA2R, base_addr_c);
  850. if (lcdc_chan_is_sublcd(ch))
  851. lcdc_write(ch->lcdc, _LDRCNTR, ldrcntr ^ LDRCNTR_SRS);
  852. else
  853. lcdc_write(ch->lcdc, _LDRCNTR, ldrcntr ^ LDRCNTR_MRS);
  854. ch->pan_offset = new_pan_offset;
  855. sh_mobile_lcdc_deferred_io_touch(info);
  856. return 0;
  857. }
  858. static int sh_mobile_wait_for_vsync(struct fb_info *info)
  859. {
  860. struct sh_mobile_lcdc_chan *ch = info->par;
  861. unsigned long ldintr;
  862. int ret;
  863. /* Enable VSync End interrupt and be careful not to acknowledge any
  864. * pending interrupt.
  865. */
  866. ldintr = lcdc_read(ch->lcdc, _LDINTR);
  867. ldintr |= LDINTR_VEE | LDINTR_STATUS_MASK;
  868. lcdc_write(ch->lcdc, _LDINTR, ldintr);
  869. ret = wait_for_completion_interruptible_timeout(&ch->vsync_completion,
  870. msecs_to_jiffies(100));
  871. if (!ret)
  872. return -ETIMEDOUT;
  873. return 0;
  874. }
  875. static int sh_mobile_ioctl(struct fb_info *info, unsigned int cmd,
  876. unsigned long arg)
  877. {
  878. int retval;
  879. switch (cmd) {
  880. case FBIO_WAITFORVSYNC:
  881. retval = sh_mobile_wait_for_vsync(info);
  882. break;
  883. default:
  884. retval = -ENOIOCTLCMD;
  885. break;
  886. }
  887. return retval;
  888. }
  889. static void sh_mobile_fb_reconfig(struct fb_info *info)
  890. {
  891. struct sh_mobile_lcdc_chan *ch = info->par;
  892. struct fb_videomode mode1, mode2;
  893. struct fb_event event;
  894. int evnt = FB_EVENT_MODE_CHANGE_ALL;
  895. if (ch->use_count > 1 || (ch->use_count == 1 && !info->fbcon_par))
  896. /* More framebuffer users are active */
  897. return;
  898. fb_var_to_videomode(&mode1, &ch->display_var);
  899. fb_var_to_videomode(&mode2, &info->var);
  900. if (fb_mode_is_equal(&mode1, &mode2))
  901. return;
  902. /* Display has been re-plugged, framebuffer is free now, reconfigure */
  903. if (fb_set_var(info, &ch->display_var) < 0)
  904. /* Couldn't reconfigure, hopefully, can continue as before */
  905. return;
  906. /*
  907. * fb_set_var() calls the notifier change internally, only if
  908. * FBINFO_MISC_USEREVENT flag is set. Since we do not want to fake a
  909. * user event, we have to call the chain ourselves.
  910. */
  911. event.info = info;
  912. event.data = &mode1;
  913. fb_notifier_call_chain(evnt, &event);
  914. }
  915. /*
  916. * Locking: both .fb_release() and .fb_open() are called with info->lock held if
  917. * user == 1, or with console sem held, if user == 0.
  918. */
  919. static int sh_mobile_release(struct fb_info *info, int user)
  920. {
  921. struct sh_mobile_lcdc_chan *ch = info->par;
  922. mutex_lock(&ch->open_lock);
  923. dev_dbg(info->dev, "%s(): %d users\n", __func__, ch->use_count);
  924. ch->use_count--;
  925. /* Nothing to reconfigure, when called from fbcon */
  926. if (user) {
  927. console_lock();
  928. sh_mobile_fb_reconfig(info);
  929. console_unlock();
  930. }
  931. mutex_unlock(&ch->open_lock);
  932. return 0;
  933. }
  934. static int sh_mobile_open(struct fb_info *info, int user)
  935. {
  936. struct sh_mobile_lcdc_chan *ch = info->par;
  937. mutex_lock(&ch->open_lock);
  938. ch->use_count++;
  939. dev_dbg(info->dev, "%s(): %d users\n", __func__, ch->use_count);
  940. mutex_unlock(&ch->open_lock);
  941. return 0;
  942. }
  943. static int sh_mobile_check_var(struct fb_var_screeninfo *var, struct fb_info *info)
  944. {
  945. struct sh_mobile_lcdc_chan *ch = info->par;
  946. struct sh_mobile_lcdc_priv *p = ch->lcdc;
  947. unsigned int best_dist = (unsigned int)-1;
  948. unsigned int best_xres = 0;
  949. unsigned int best_yres = 0;
  950. unsigned int i;
  951. if (var->xres > MAX_XRES || var->yres > MAX_YRES)
  952. return -EINVAL;
  953. /* If board code provides us with a list of available modes, make sure
  954. * we use one of them. Find the mode closest to the requested one. The
  955. * distance between two modes is defined as the size of the
  956. * non-overlapping parts of the two rectangles.
  957. */
  958. for (i = 0; i < ch->cfg.num_cfg; ++i) {
  959. const struct fb_videomode *mode = &ch->cfg.lcd_cfg[i];
  960. unsigned int dist;
  961. /* We can only round up. */
  962. if (var->xres > mode->xres || var->yres > mode->yres)
  963. continue;
  964. dist = var->xres * var->yres + mode->xres * mode->yres
  965. - 2 * min(var->xres, mode->xres)
  966. * min(var->yres, mode->yres);
  967. if (dist < best_dist) {
  968. best_xres = mode->xres;
  969. best_yres = mode->yres;
  970. best_dist = dist;
  971. }
  972. }
  973. /* If no available mode can be used, return an error. */
  974. if (ch->cfg.num_cfg != 0) {
  975. if (best_dist == (unsigned int)-1)
  976. return -EINVAL;
  977. var->xres = best_xres;
  978. var->yres = best_yres;
  979. }
  980. /* Make sure the virtual resolution is at least as big as the visible
  981. * resolution.
  982. */
  983. if (var->xres_virtual < var->xres)
  984. var->xres_virtual = var->xres;
  985. if (var->yres_virtual < var->yres)
  986. var->yres_virtual = var->yres;
  987. if (sh_mobile_format_is_fourcc(var)) {
  988. switch (var->grayscale) {
  989. case V4L2_PIX_FMT_NV12:
  990. case V4L2_PIX_FMT_NV21:
  991. var->bits_per_pixel = 12;
  992. break;
  993. case V4L2_PIX_FMT_RGB565:
  994. case V4L2_PIX_FMT_NV16:
  995. case V4L2_PIX_FMT_NV61:
  996. var->bits_per_pixel = 16;
  997. break;
  998. case V4L2_PIX_FMT_BGR24:
  999. case V4L2_PIX_FMT_NV24:
  1000. case V4L2_PIX_FMT_NV42:
  1001. var->bits_per_pixel = 24;
  1002. break;
  1003. case V4L2_PIX_FMT_BGR32:
  1004. var->bits_per_pixel = 32;
  1005. break;
  1006. default:
  1007. return -EINVAL;
  1008. }
  1009. /* Default to RGB and JPEG color-spaces for RGB and YUV formats
  1010. * respectively.
  1011. */
  1012. if (!sh_mobile_format_is_yuv(var))
  1013. var->colorspace = V4L2_COLORSPACE_SRGB;
  1014. else if (var->colorspace != V4L2_COLORSPACE_REC709)
  1015. var->colorspace = V4L2_COLORSPACE_JPEG;
  1016. } else {
  1017. if (var->bits_per_pixel <= 16) { /* RGB 565 */
  1018. var->bits_per_pixel = 16;
  1019. var->red.offset = 11;
  1020. var->red.length = 5;
  1021. var->green.offset = 5;
  1022. var->green.length = 6;
  1023. var->blue.offset = 0;
  1024. var->blue.length = 5;
  1025. var->transp.offset = 0;
  1026. var->transp.length = 0;
  1027. } else if (var->bits_per_pixel <= 24) { /* RGB 888 */
  1028. var->bits_per_pixel = 24;
  1029. var->red.offset = 16;
  1030. var->red.length = 8;
  1031. var->green.offset = 8;
  1032. var->green.length = 8;
  1033. var->blue.offset = 0;
  1034. var->blue.length = 8;
  1035. var->transp.offset = 0;
  1036. var->transp.length = 0;
  1037. } else if (var->bits_per_pixel <= 32) { /* RGBA 888 */
  1038. var->bits_per_pixel = 32;
  1039. var->red.offset = 16;
  1040. var->red.length = 8;
  1041. var->green.offset = 8;
  1042. var->green.length = 8;
  1043. var->blue.offset = 0;
  1044. var->blue.length = 8;
  1045. var->transp.offset = 24;
  1046. var->transp.length = 8;
  1047. } else
  1048. return -EINVAL;
  1049. var->red.msb_right = 0;
  1050. var->green.msb_right = 0;
  1051. var->blue.msb_right = 0;
  1052. var->transp.msb_right = 0;
  1053. }
  1054. /* Make sure we don't exceed our allocated memory. */
  1055. if (var->xres_virtual * var->yres_virtual * var->bits_per_pixel / 8 >
  1056. info->fix.smem_len)
  1057. return -EINVAL;
  1058. /* only accept the forced_fourcc for dual channel configurations */
  1059. if (p->forced_fourcc &&
  1060. p->forced_fourcc != sh_mobile_format_fourcc(var))
  1061. return -EINVAL;
  1062. return 0;
  1063. }
  1064. static int sh_mobile_set_par(struct fb_info *info)
  1065. {
  1066. struct sh_mobile_lcdc_chan *ch = info->par;
  1067. u32 line_length = info->fix.line_length;
  1068. int ret;
  1069. sh_mobile_lcdc_stop(ch->lcdc);
  1070. if (sh_mobile_format_is_yuv(&info->var))
  1071. info->fix.line_length = info->var.xres;
  1072. else
  1073. info->fix.line_length = info->var.xres
  1074. * info->var.bits_per_pixel / 8;
  1075. ret = sh_mobile_lcdc_start(ch->lcdc);
  1076. if (ret < 0) {
  1077. dev_err(info->dev, "%s: unable to restart LCDC\n", __func__);
  1078. info->fix.line_length = line_length;
  1079. }
  1080. if (sh_mobile_format_is_fourcc(&info->var)) {
  1081. info->fix.type = FB_TYPE_FOURCC;
  1082. info->fix.visual = FB_VISUAL_FOURCC;
  1083. } else {
  1084. info->fix.type = FB_TYPE_PACKED_PIXELS;
  1085. info->fix.visual = FB_VISUAL_TRUECOLOR;
  1086. }
  1087. return ret;
  1088. }
  1089. /*
  1090. * Screen blanking. Behavior is as follows:
  1091. * FB_BLANK_UNBLANK: screen unblanked, clocks enabled
  1092. * FB_BLANK_NORMAL: screen blanked, clocks enabled
  1093. * FB_BLANK_VSYNC,
  1094. * FB_BLANK_HSYNC,
  1095. * FB_BLANK_POWEROFF: screen blanked, clocks disabled
  1096. */
  1097. static int sh_mobile_lcdc_blank(int blank, struct fb_info *info)
  1098. {
  1099. struct sh_mobile_lcdc_chan *ch = info->par;
  1100. struct sh_mobile_lcdc_priv *p = ch->lcdc;
  1101. /* blank the screen? */
  1102. if (blank > FB_BLANK_UNBLANK && ch->blank_status == FB_BLANK_UNBLANK) {
  1103. struct fb_fillrect rect = {
  1104. .width = info->var.xres,
  1105. .height = info->var.yres,
  1106. };
  1107. sh_mobile_lcdc_fillrect(info, &rect);
  1108. }
  1109. /* turn clocks on? */
  1110. if (blank <= FB_BLANK_NORMAL && ch->blank_status > FB_BLANK_NORMAL) {
  1111. sh_mobile_lcdc_clk_on(p);
  1112. }
  1113. /* turn clocks off? */
  1114. if (blank > FB_BLANK_NORMAL && ch->blank_status <= FB_BLANK_NORMAL) {
  1115. /* make sure the screen is updated with the black fill before
  1116. * switching the clocks off. one vsync is not enough since
  1117. * blanking may occur in the middle of a refresh. deferred io
  1118. * mode will reenable the clocks and update the screen in time,
  1119. * so it does not need this. */
  1120. if (!info->fbdefio) {
  1121. sh_mobile_wait_for_vsync(info);
  1122. sh_mobile_wait_for_vsync(info);
  1123. }
  1124. sh_mobile_lcdc_clk_off(p);
  1125. }
  1126. ch->blank_status = blank;
  1127. return 0;
  1128. }
  1129. static struct fb_ops sh_mobile_lcdc_ops = {
  1130. .owner = THIS_MODULE,
  1131. .fb_setcolreg = sh_mobile_lcdc_setcolreg,
  1132. .fb_read = fb_sys_read,
  1133. .fb_write = fb_sys_write,
  1134. .fb_fillrect = sh_mobile_lcdc_fillrect,
  1135. .fb_copyarea = sh_mobile_lcdc_copyarea,
  1136. .fb_imageblit = sh_mobile_lcdc_imageblit,
  1137. .fb_blank = sh_mobile_lcdc_blank,
  1138. .fb_pan_display = sh_mobile_fb_pan_display,
  1139. .fb_ioctl = sh_mobile_ioctl,
  1140. .fb_open = sh_mobile_open,
  1141. .fb_release = sh_mobile_release,
  1142. .fb_check_var = sh_mobile_check_var,
  1143. .fb_set_par = sh_mobile_set_par,
  1144. };
  1145. static int sh_mobile_lcdc_update_bl(struct backlight_device *bdev)
  1146. {
  1147. struct sh_mobile_lcdc_chan *ch = bl_get_data(bdev);
  1148. struct sh_mobile_lcdc_board_cfg *cfg = &ch->cfg.board_cfg;
  1149. int brightness = bdev->props.brightness;
  1150. if (bdev->props.power != FB_BLANK_UNBLANK ||
  1151. bdev->props.state & (BL_CORE_SUSPENDED | BL_CORE_FBBLANK))
  1152. brightness = 0;
  1153. return cfg->set_brightness(cfg->board_data, brightness);
  1154. }
  1155. static int sh_mobile_lcdc_get_brightness(struct backlight_device *bdev)
  1156. {
  1157. struct sh_mobile_lcdc_chan *ch = bl_get_data(bdev);
  1158. struct sh_mobile_lcdc_board_cfg *cfg = &ch->cfg.board_cfg;
  1159. return cfg->get_brightness(cfg->board_data);
  1160. }
  1161. static int sh_mobile_lcdc_check_fb(struct backlight_device *bdev,
  1162. struct fb_info *info)
  1163. {
  1164. return (info->bl_dev == bdev);
  1165. }
  1166. static struct backlight_ops sh_mobile_lcdc_bl_ops = {
  1167. .options = BL_CORE_SUSPENDRESUME,
  1168. .update_status = sh_mobile_lcdc_update_bl,
  1169. .get_brightness = sh_mobile_lcdc_get_brightness,
  1170. .check_fb = sh_mobile_lcdc_check_fb,
  1171. };
  1172. static struct backlight_device *sh_mobile_lcdc_bl_probe(struct device *parent,
  1173. struct sh_mobile_lcdc_chan *ch)
  1174. {
  1175. struct backlight_device *bl;
  1176. bl = backlight_device_register(ch->cfg.bl_info.name, parent, ch,
  1177. &sh_mobile_lcdc_bl_ops, NULL);
  1178. if (IS_ERR(bl)) {
  1179. dev_err(parent, "unable to register backlight device: %ld\n",
  1180. PTR_ERR(bl));
  1181. return NULL;
  1182. }
  1183. bl->props.max_brightness = ch->cfg.bl_info.max_brightness;
  1184. bl->props.brightness = bl->props.max_brightness;
  1185. backlight_update_status(bl);
  1186. return bl;
  1187. }
  1188. static void sh_mobile_lcdc_bl_remove(struct backlight_device *bdev)
  1189. {
  1190. backlight_device_unregister(bdev);
  1191. }
  1192. static int sh_mobile_lcdc_suspend(struct device *dev)
  1193. {
  1194. struct platform_device *pdev = to_platform_device(dev);
  1195. sh_mobile_lcdc_stop(platform_get_drvdata(pdev));
  1196. return 0;
  1197. }
  1198. static int sh_mobile_lcdc_resume(struct device *dev)
  1199. {
  1200. struct platform_device *pdev = to_platform_device(dev);
  1201. return sh_mobile_lcdc_start(platform_get_drvdata(pdev));
  1202. }
  1203. static int sh_mobile_lcdc_runtime_suspend(struct device *dev)
  1204. {
  1205. struct platform_device *pdev = to_platform_device(dev);
  1206. struct sh_mobile_lcdc_priv *priv = platform_get_drvdata(pdev);
  1207. /* turn off LCDC hardware */
  1208. lcdc_write(priv, _LDCNT1R, 0);
  1209. return 0;
  1210. }
  1211. static int sh_mobile_lcdc_runtime_resume(struct device *dev)
  1212. {
  1213. struct platform_device *pdev = to_platform_device(dev);
  1214. struct sh_mobile_lcdc_priv *priv = platform_get_drvdata(pdev);
  1215. __sh_mobile_lcdc_start(priv);
  1216. return 0;
  1217. }
  1218. static const struct dev_pm_ops sh_mobile_lcdc_dev_pm_ops = {
  1219. .suspend = sh_mobile_lcdc_suspend,
  1220. .resume = sh_mobile_lcdc_resume,
  1221. .runtime_suspend = sh_mobile_lcdc_runtime_suspend,
  1222. .runtime_resume = sh_mobile_lcdc_runtime_resume,
  1223. };
  1224. /* locking: called with info->lock held */
  1225. static int sh_mobile_lcdc_notify(struct notifier_block *nb,
  1226. unsigned long action, void *data)
  1227. {
  1228. struct fb_event *event = data;
  1229. struct fb_info *info = event->info;
  1230. struct sh_mobile_lcdc_chan *ch = info->par;
  1231. struct sh_mobile_lcdc_board_cfg *board_cfg = &ch->cfg.board_cfg;
  1232. if (&ch->lcdc->notifier != nb)
  1233. return NOTIFY_DONE;
  1234. dev_dbg(info->dev, "%s(): action = %lu, data = %p\n",
  1235. __func__, action, event->data);
  1236. switch(action) {
  1237. case FB_EVENT_SUSPEND:
  1238. if (board_cfg->display_off && try_module_get(board_cfg->owner)) {
  1239. board_cfg->display_off(board_cfg->board_data);
  1240. module_put(board_cfg->owner);
  1241. }
  1242. sh_mobile_lcdc_stop(ch->lcdc);
  1243. break;
  1244. case FB_EVENT_RESUME:
  1245. mutex_lock(&ch->open_lock);
  1246. sh_mobile_fb_reconfig(info);
  1247. mutex_unlock(&ch->open_lock);
  1248. /* HDMI must be enabled before LCDC configuration */
  1249. if (board_cfg->display_on && try_module_get(board_cfg->owner)) {
  1250. board_cfg->display_on(board_cfg->board_data, info);
  1251. module_put(board_cfg->owner);
  1252. }
  1253. sh_mobile_lcdc_start(ch->lcdc);
  1254. }
  1255. return NOTIFY_OK;
  1256. }
  1257. static int sh_mobile_lcdc_remove(struct platform_device *pdev)
  1258. {
  1259. struct sh_mobile_lcdc_priv *priv = platform_get_drvdata(pdev);
  1260. struct fb_info *info;
  1261. int i;
  1262. fb_unregister_client(&priv->notifier);
  1263. for (i = 0; i < ARRAY_SIZE(priv->ch); i++)
  1264. if (priv->ch[i].info && priv->ch[i].info->dev)
  1265. unregister_framebuffer(priv->ch[i].info);
  1266. sh_mobile_lcdc_stop(priv);
  1267. for (i = 0; i < ARRAY_SIZE(priv->ch); i++) {
  1268. info = priv->ch[i].info;
  1269. if (!info || !info->device)
  1270. continue;
  1271. if (priv->ch[i].sglist)
  1272. vfree(priv->ch[i].sglist);
  1273. if (info->screen_base)
  1274. dma_free_coherent(&pdev->dev, info->fix.smem_len,
  1275. info->screen_base,
  1276. priv->ch[i].dma_handle);
  1277. fb_dealloc_cmap(&info->cmap);
  1278. framebuffer_release(info);
  1279. }
  1280. for (i = 0; i < ARRAY_SIZE(priv->ch); i++) {
  1281. if (priv->ch[i].bl)
  1282. sh_mobile_lcdc_bl_remove(priv->ch[i].bl);
  1283. }
  1284. if (priv->dot_clk)
  1285. clk_put(priv->dot_clk);
  1286. if (priv->dev)
  1287. pm_runtime_disable(priv->dev);
  1288. if (priv->base)
  1289. iounmap(priv->base);
  1290. if (priv->irq)
  1291. free_irq(priv->irq, priv);
  1292. kfree(priv);
  1293. return 0;
  1294. }
  1295. static int __devinit sh_mobile_lcdc_channel_init(struct sh_mobile_lcdc_chan *ch,
  1296. struct device *dev)
  1297. {
  1298. struct sh_mobile_lcdc_chan_cfg *cfg = &ch->cfg;
  1299. const struct fb_videomode *max_mode;
  1300. const struct fb_videomode *mode;
  1301. struct fb_var_screeninfo *var;
  1302. struct fb_info *info;
  1303. unsigned int max_size;
  1304. int num_cfg;
  1305. void *buf;
  1306. int ret;
  1307. int i;
  1308. mutex_init(&ch->open_lock);
  1309. /* Allocate the frame buffer device. */
  1310. ch->info = framebuffer_alloc(0, dev);
  1311. if (!ch->info) {
  1312. dev_err(dev, "unable to allocate fb_info\n");
  1313. return -ENOMEM;
  1314. }
  1315. info = ch->info;
  1316. info->fbops = &sh_mobile_lcdc_ops;
  1317. info->par = ch;
  1318. info->pseudo_palette = &ch->pseudo_palette;
  1319. info->flags = FBINFO_FLAG_DEFAULT;
  1320. /* Iterate through the modes to validate them and find the highest
  1321. * resolution.
  1322. */
  1323. max_mode = NULL;
  1324. max_size = 0;
  1325. for (i = 0, mode = cfg->lcd_cfg; i < cfg->num_cfg; i++, mode++) {
  1326. unsigned int size = mode->yres * mode->xres;
  1327. /* NV12/NV21 buffers must have even number of lines */
  1328. if ((cfg->fourcc == V4L2_PIX_FMT_NV12 ||
  1329. cfg->fourcc == V4L2_PIX_FMT_NV21) && (mode->yres & 0x1)) {
  1330. dev_err(dev, "yres must be multiple of 2 for YCbCr420 "
  1331. "mode.\n");
  1332. return -EINVAL;
  1333. }
  1334. if (size > max_size) {
  1335. max_mode = mode;
  1336. max_size = size;
  1337. }
  1338. }
  1339. if (!max_size)
  1340. max_size = MAX_XRES * MAX_YRES;
  1341. else
  1342. dev_dbg(dev, "Found largest videomode %ux%u\n",
  1343. max_mode->xres, max_mode->yres);
  1344. /* Create the mode list. */
  1345. if (cfg->lcd_cfg == NULL) {
  1346. mode = &default_720p;
  1347. num_cfg = 1;
  1348. } else {
  1349. mode = cfg->lcd_cfg;
  1350. num_cfg = cfg->num_cfg;
  1351. }
  1352. fb_videomode_to_modelist(mode, num_cfg, &info->modelist);
  1353. /* Initialize variable screen information using the first mode as
  1354. * default. The default Y virtual resolution is twice the panel size to
  1355. * allow for double-buffering.
  1356. */
  1357. var = &info->var;
  1358. fb_videomode_to_var(var, mode);
  1359. var->width = cfg->lcd_size_cfg.width;
  1360. var->height = cfg->lcd_size_cfg.height;
  1361. var->yres_virtual = var->yres * 2;
  1362. var->activate = FB_ACTIVATE_NOW;
  1363. switch (cfg->fourcc) {
  1364. case V4L2_PIX_FMT_RGB565:
  1365. var->bits_per_pixel = 16;
  1366. break;
  1367. case V4L2_PIX_FMT_BGR24:
  1368. var->bits_per_pixel = 24;
  1369. break;
  1370. case V4L2_PIX_FMT_BGR32:
  1371. var->bits_per_pixel = 32;
  1372. break;
  1373. default:
  1374. var->grayscale = cfg->fourcc;
  1375. break;
  1376. }
  1377. /* Make sure the memory size check won't fail. smem_len is initialized
  1378. * later based on var.
  1379. */
  1380. info->fix.smem_len = UINT_MAX;
  1381. ret = sh_mobile_check_var(var, info);
  1382. if (ret)
  1383. return ret;
  1384. max_size = max_size * var->bits_per_pixel / 8 * 2;
  1385. /* Allocate frame buffer memory and color map. */
  1386. buf = dma_alloc_coherent(dev, max_size, &ch->dma_handle, GFP_KERNEL);
  1387. if (!buf) {
  1388. dev_err(dev, "unable to allocate buffer\n");
  1389. return -ENOMEM;
  1390. }
  1391. ret = fb_alloc_cmap(&info->cmap, PALETTE_NR, 0);
  1392. if (ret < 0) {
  1393. dev_err(dev, "unable to allocate cmap\n");
  1394. dma_free_coherent(dev, max_size, buf, ch->dma_handle);
  1395. return ret;
  1396. }
  1397. /* Initialize fixed screen information. Restrict pan to 2 lines steps
  1398. * for NV12 and NV21.
  1399. */
  1400. info->fix = sh_mobile_lcdc_fix;
  1401. info->fix.smem_start = ch->dma_handle;
  1402. info->fix.smem_len = max_size;
  1403. if (cfg->fourcc == V4L2_PIX_FMT_NV12 ||
  1404. cfg->fourcc == V4L2_PIX_FMT_NV21)
  1405. info->fix.ypanstep = 2;
  1406. if (sh_mobile_format_is_yuv(var)) {
  1407. info->fix.line_length = var->xres;
  1408. info->fix.visual = FB_VISUAL_FOURCC;
  1409. } else {
  1410. info->fix.line_length = var->xres * var->bits_per_pixel / 8;
  1411. info->fix.visual = FB_VISUAL_TRUECOLOR;
  1412. }
  1413. info->screen_base = buf;
  1414. info->device = dev;
  1415. ch->display_var = *var;
  1416. return 0;
  1417. }
  1418. static int __devinit sh_mobile_lcdc_probe(struct platform_device *pdev)
  1419. {
  1420. struct sh_mobile_lcdc_info *pdata = pdev->dev.platform_data;
  1421. struct sh_mobile_lcdc_priv *priv;
  1422. struct resource *res;
  1423. int num_channels;
  1424. int error;
  1425. int i;
  1426. if (!pdata) {
  1427. dev_err(&pdev->dev, "no platform data defined\n");
  1428. return -EINVAL;
  1429. }
  1430. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  1431. i = platform_get_irq(pdev, 0);
  1432. if (!res || i < 0) {
  1433. dev_err(&pdev->dev, "cannot get platform resources\n");
  1434. return -ENOENT;
  1435. }
  1436. priv = kzalloc(sizeof(*priv), GFP_KERNEL);
  1437. if (!priv) {
  1438. dev_err(&pdev->dev, "cannot allocate device data\n");
  1439. return -ENOMEM;
  1440. }
  1441. platform_set_drvdata(pdev, priv);
  1442. error = request_irq(i, sh_mobile_lcdc_irq, 0,
  1443. dev_name(&pdev->dev), priv);
  1444. if (error) {
  1445. dev_err(&pdev->dev, "unable to request irq\n");
  1446. goto err1;
  1447. }
  1448. priv->irq = i;
  1449. atomic_set(&priv->hw_usecnt, -1);
  1450. for (i = 0, num_channels = 0; i < ARRAY_SIZE(pdata->ch); i++) {
  1451. struct sh_mobile_lcdc_chan *ch = priv->ch + num_channels;
  1452. ch->lcdc = priv;
  1453. memcpy(&ch->cfg, &pdata->ch[i], sizeof(pdata->ch[i]));
  1454. error = sh_mobile_lcdc_check_interface(ch);
  1455. if (error) {
  1456. dev_err(&pdev->dev, "unsupported interface type\n");
  1457. goto err1;
  1458. }
  1459. init_waitqueue_head(&ch->frame_end_wait);
  1460. init_completion(&ch->vsync_completion);
  1461. ch->pan_offset = 0;
  1462. /* probe the backlight is there is one defined */
  1463. if (ch->cfg.bl_info.max_brightness)
  1464. ch->bl = sh_mobile_lcdc_bl_probe(&pdev->dev, ch);
  1465. switch (pdata->ch[i].chan) {
  1466. case LCDC_CHAN_MAINLCD:
  1467. ch->enabled = LDCNT2R_ME;
  1468. ch->reg_offs = lcdc_offs_mainlcd;
  1469. num_channels++;
  1470. break;
  1471. case LCDC_CHAN_SUBLCD:
  1472. ch->enabled = LDCNT2R_SE;
  1473. ch->reg_offs = lcdc_offs_sublcd;
  1474. num_channels++;
  1475. break;
  1476. }
  1477. }
  1478. if (!num_channels) {
  1479. dev_err(&pdev->dev, "no channels defined\n");
  1480. error = -EINVAL;
  1481. goto err1;
  1482. }
  1483. /* for dual channel LCDC (MAIN + SUB) force shared format setting */
  1484. if (num_channels == 2)
  1485. priv->forced_fourcc = pdata->ch[0].fourcc;
  1486. priv->base = ioremap_nocache(res->start, resource_size(res));
  1487. if (!priv->base)
  1488. goto err1;
  1489. error = sh_mobile_lcdc_setup_clocks(pdev, pdata->clock_source, priv);
  1490. if (error) {
  1491. dev_err(&pdev->dev, "unable to setup clocks\n");
  1492. goto err1;
  1493. }
  1494. priv->meram_dev = pdata->meram_dev;
  1495. for (i = 0; i < num_channels; i++) {
  1496. struct sh_mobile_lcdc_chan *ch = priv->ch + i;
  1497. error = sh_mobile_lcdc_channel_init(ch, &pdev->dev);
  1498. if (error)
  1499. goto err1;
  1500. }
  1501. error = sh_mobile_lcdc_start(priv);
  1502. if (error) {
  1503. dev_err(&pdev->dev, "unable to start hardware\n");
  1504. goto err1;
  1505. }
  1506. for (i = 0; i < num_channels; i++) {
  1507. struct sh_mobile_lcdc_chan *ch = priv->ch + i;
  1508. struct fb_info *info = ch->info;
  1509. if (info->fbdefio) {
  1510. ch->sglist = vmalloc(sizeof(struct scatterlist) *
  1511. info->fix.smem_len >> PAGE_SHIFT);
  1512. if (!ch->sglist) {
  1513. dev_err(&pdev->dev, "cannot allocate sglist\n");
  1514. goto err1;
  1515. }
  1516. }
  1517. info->bl_dev = ch->bl;
  1518. error = register_framebuffer(info);
  1519. if (error < 0)
  1520. goto err1;
  1521. dev_info(info->dev, "registered %s/%s as %dx%d %dbpp.\n",
  1522. pdev->name, (ch->cfg.chan == LCDC_CHAN_MAINLCD) ?
  1523. "mainlcd" : "sublcd", info->var.xres, info->var.yres,
  1524. info->var.bits_per_pixel);
  1525. /* deferred io mode: disable clock to save power */
  1526. if (info->fbdefio || info->state == FBINFO_STATE_SUSPENDED)
  1527. sh_mobile_lcdc_clk_off(priv);
  1528. }
  1529. /* Failure ignored */
  1530. priv->notifier.notifier_call = sh_mobile_lcdc_notify;
  1531. fb_register_client(&priv->notifier);
  1532. return 0;
  1533. err1:
  1534. sh_mobile_lcdc_remove(pdev);
  1535. return error;
  1536. }
  1537. static struct platform_driver sh_mobile_lcdc_driver = {
  1538. .driver = {
  1539. .name = "sh_mobile_lcdc_fb",
  1540. .owner = THIS_MODULE,
  1541. .pm = &sh_mobile_lcdc_dev_pm_ops,
  1542. },
  1543. .probe = sh_mobile_lcdc_probe,
  1544. .remove = sh_mobile_lcdc_remove,
  1545. };
  1546. module_platform_driver(sh_mobile_lcdc_driver);
  1547. MODULE_DESCRIPTION("SuperH Mobile LCDC Framebuffer driver");
  1548. MODULE_AUTHOR("Magnus Damm <damm@opensource.se>");
  1549. MODULE_LICENSE("GPL v2");