vpbe_venc.c 18 KB

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  1. /*
  2. * Copyright (C) 2010 Texas Instruments Inc
  3. *
  4. * This program is free software; you can redistribute it and/or modify
  5. * it under the terms of the GNU General Public License as published by
  6. * the Free Software Foundation version 2.
  7. *
  8. * This program is distributed in the hope that it will be useful,
  9. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  10. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  11. * GNU General Public License for more details.
  12. *
  13. * You should have received a copy of the GNU General Public License
  14. * along with this program; if not, write to the Free Software
  15. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  16. */
  17. #include <linux/module.h>
  18. #include <linux/kernel.h>
  19. #include <linux/init.h>
  20. #include <linux/ctype.h>
  21. #include <linux/delay.h>
  22. #include <linux/device.h>
  23. #include <linux/interrupt.h>
  24. #include <linux/platform_device.h>
  25. #include <linux/videodev2.h>
  26. #include <linux/slab.h>
  27. #include <mach/hardware.h>
  28. #include <mach/mux.h>
  29. #include <mach/io.h>
  30. #include <mach/i2c.h>
  31. #include <linux/io.h>
  32. #include <media/davinci/vpbe_types.h>
  33. #include <media/davinci/vpbe_venc.h>
  34. #include <media/davinci/vpss.h>
  35. #include <media/v4l2-device.h>
  36. #include "vpbe_venc_regs.h"
  37. #define MODULE_NAME VPBE_VENC_SUBDEV_NAME
  38. static int debug = 2;
  39. module_param(debug, int, 0644);
  40. MODULE_PARM_DESC(debug, "Debug level 0-2");
  41. struct venc_state {
  42. struct v4l2_subdev sd;
  43. struct venc_callback *callback;
  44. struct venc_platform_data *pdata;
  45. struct device *pdev;
  46. u32 output;
  47. v4l2_std_id std;
  48. spinlock_t lock;
  49. void __iomem *venc_base;
  50. void __iomem *vdaccfg_reg;
  51. };
  52. static inline struct venc_state *to_state(struct v4l2_subdev *sd)
  53. {
  54. return container_of(sd, struct venc_state, sd);
  55. }
  56. static inline u32 venc_read(struct v4l2_subdev *sd, u32 offset)
  57. {
  58. struct venc_state *venc = to_state(sd);
  59. return readl(venc->venc_base + offset);
  60. }
  61. static inline u32 venc_write(struct v4l2_subdev *sd, u32 offset, u32 val)
  62. {
  63. struct venc_state *venc = to_state(sd);
  64. writel(val, (venc->venc_base + offset));
  65. return val;
  66. }
  67. static inline u32 venc_modify(struct v4l2_subdev *sd, u32 offset,
  68. u32 val, u32 mask)
  69. {
  70. u32 new_val = (venc_read(sd, offset) & ~mask) | (val & mask);
  71. venc_write(sd, offset, new_val);
  72. return new_val;
  73. }
  74. static inline u32 vdaccfg_write(struct v4l2_subdev *sd, u32 val)
  75. {
  76. struct venc_state *venc = to_state(sd);
  77. writel(val, venc->vdaccfg_reg);
  78. val = readl(venc->vdaccfg_reg);
  79. return val;
  80. }
  81. #define VDAC_COMPONENT 0x543
  82. #define VDAC_S_VIDEO 0x210
  83. /* This function sets the dac of the VPBE for various outputs
  84. */
  85. static int venc_set_dac(struct v4l2_subdev *sd, u32 out_index)
  86. {
  87. switch (out_index) {
  88. case 0:
  89. v4l2_dbg(debug, 1, sd, "Setting output to Composite\n");
  90. venc_write(sd, VENC_DACSEL, 0);
  91. break;
  92. case 1:
  93. v4l2_dbg(debug, 1, sd, "Setting output to Component\n");
  94. venc_write(sd, VENC_DACSEL, VDAC_COMPONENT);
  95. break;
  96. case 2:
  97. v4l2_dbg(debug, 1, sd, "Setting output to S-video\n");
  98. venc_write(sd, VENC_DACSEL, VDAC_S_VIDEO);
  99. break;
  100. default:
  101. return -EINVAL;
  102. }
  103. return 0;
  104. }
  105. static void venc_enabledigitaloutput(struct v4l2_subdev *sd, int benable)
  106. {
  107. struct venc_state *venc = to_state(sd);
  108. struct venc_platform_data *pdata = venc->pdata;
  109. v4l2_dbg(debug, 2, sd, "venc_enabledigitaloutput\n");
  110. if (benable) {
  111. venc_write(sd, VENC_VMOD, 0);
  112. venc_write(sd, VENC_CVBS, 0);
  113. venc_write(sd, VENC_LCDOUT, 0);
  114. venc_write(sd, VENC_HSPLS, 0);
  115. venc_write(sd, VENC_HSTART, 0);
  116. venc_write(sd, VENC_HVALID, 0);
  117. venc_write(sd, VENC_HINT, 0);
  118. venc_write(sd, VENC_VSPLS, 0);
  119. venc_write(sd, VENC_VSTART, 0);
  120. venc_write(sd, VENC_VVALID, 0);
  121. venc_write(sd, VENC_VINT, 0);
  122. venc_write(sd, VENC_YCCCTL, 0);
  123. venc_write(sd, VENC_DACSEL, 0);
  124. } else {
  125. venc_write(sd, VENC_VMOD, 0);
  126. /* disable VCLK output pin enable */
  127. venc_write(sd, VENC_VIDCTL, 0x141);
  128. /* Disable output sync pins */
  129. venc_write(sd, VENC_SYNCCTL, 0);
  130. /* Disable DCLOCK */
  131. venc_write(sd, VENC_DCLKCTL, 0);
  132. venc_write(sd, VENC_DRGBX1, 0x0000057C);
  133. /* Disable LCD output control (accepting default polarity) */
  134. venc_write(sd, VENC_LCDOUT, 0);
  135. if (pdata->venc_type != VPBE_VERSION_3)
  136. venc_write(sd, VENC_CMPNT, 0x100);
  137. venc_write(sd, VENC_HSPLS, 0);
  138. venc_write(sd, VENC_HINT, 0);
  139. venc_write(sd, VENC_HSTART, 0);
  140. venc_write(sd, VENC_HVALID, 0);
  141. venc_write(sd, VENC_VSPLS, 0);
  142. venc_write(sd, VENC_VINT, 0);
  143. venc_write(sd, VENC_VSTART, 0);
  144. venc_write(sd, VENC_VVALID, 0);
  145. venc_write(sd, VENC_HSDLY, 0);
  146. venc_write(sd, VENC_VSDLY, 0);
  147. venc_write(sd, VENC_YCCCTL, 0);
  148. venc_write(sd, VENC_VSTARTA, 0);
  149. /* Set OSD clock and OSD Sync Adavance registers */
  150. venc_write(sd, VENC_OSDCLK0, 1);
  151. venc_write(sd, VENC_OSDCLK1, 2);
  152. }
  153. }
  154. #define VDAC_CONFIG_SD_V3 0x0E21A6B6
  155. #define VDAC_CONFIG_SD_V2 0x081141CF
  156. /*
  157. * setting NTSC mode
  158. */
  159. static int venc_set_ntsc(struct v4l2_subdev *sd)
  160. {
  161. u32 val;
  162. struct venc_state *venc = to_state(sd);
  163. struct venc_platform_data *pdata = venc->pdata;
  164. v4l2_dbg(debug, 2, sd, "venc_set_ntsc\n");
  165. /* Setup clock at VPSS & VENC for SD */
  166. vpss_enable_clock(VPSS_VENC_CLOCK_SEL, 1);
  167. if (pdata->setup_clock(VPBE_ENC_STD, V4L2_STD_525_60) < 0)
  168. return -EINVAL;
  169. venc_enabledigitaloutput(sd, 0);
  170. if (pdata->venc_type == VPBE_VERSION_3) {
  171. venc_write(sd, VENC_CLKCTL, 0x01);
  172. venc_write(sd, VENC_VIDCTL, 0);
  173. val = vdaccfg_write(sd, VDAC_CONFIG_SD_V3);
  174. } else if (pdata->venc_type == VPBE_VERSION_2) {
  175. venc_write(sd, VENC_CLKCTL, 0x01);
  176. venc_write(sd, VENC_VIDCTL, 0);
  177. vdaccfg_write(sd, VDAC_CONFIG_SD_V2);
  178. } else {
  179. /* to set VENC CLK DIV to 1 - final clock is 54 MHz */
  180. venc_modify(sd, VENC_VIDCTL, 0, 1 << 1);
  181. /* Set REC656 Mode */
  182. venc_write(sd, VENC_YCCCTL, 0x1);
  183. venc_modify(sd, VENC_VDPRO, 0, VENC_VDPRO_DAFRQ);
  184. venc_modify(sd, VENC_VDPRO, 0, VENC_VDPRO_DAUPS);
  185. }
  186. venc_write(sd, VENC_VMOD, 0);
  187. venc_modify(sd, VENC_VMOD, (1 << VENC_VMOD_VIE_SHIFT),
  188. VENC_VMOD_VIE);
  189. venc_modify(sd, VENC_VMOD, (0 << VENC_VMOD_VMD), VENC_VMOD_VMD);
  190. venc_modify(sd, VENC_VMOD, (0 << VENC_VMOD_TVTYP_SHIFT),
  191. VENC_VMOD_TVTYP);
  192. venc_write(sd, VENC_DACTST, 0x0);
  193. venc_modify(sd, VENC_VMOD, VENC_VMOD_VENC, VENC_VMOD_VENC);
  194. return 0;
  195. }
  196. /*
  197. * setting PAL mode
  198. */
  199. static int venc_set_pal(struct v4l2_subdev *sd)
  200. {
  201. struct venc_state *venc = to_state(sd);
  202. struct venc_platform_data *pdata = venc->pdata;
  203. v4l2_dbg(debug, 2, sd, "venc_set_pal\n");
  204. /* Setup clock at VPSS & VENC for SD */
  205. vpss_enable_clock(VPSS_VENC_CLOCK_SEL, 1);
  206. if (venc->pdata->setup_clock(VPBE_ENC_STD, V4L2_STD_625_50) < 0)
  207. return -EINVAL;
  208. venc_enabledigitaloutput(sd, 0);
  209. if (pdata->venc_type == VPBE_VERSION_3) {
  210. venc_write(sd, VENC_CLKCTL, 0x1);
  211. venc_write(sd, VENC_VIDCTL, 0);
  212. vdaccfg_write(sd, VDAC_CONFIG_SD_V3);
  213. } else if (pdata->venc_type == VPBE_VERSION_2) {
  214. venc_write(sd, VENC_CLKCTL, 0x1);
  215. venc_write(sd, VENC_VIDCTL, 0);
  216. vdaccfg_write(sd, VDAC_CONFIG_SD_V2);
  217. } else {
  218. /* to set VENC CLK DIV to 1 - final clock is 54 MHz */
  219. venc_modify(sd, VENC_VIDCTL, 0, 1 << 1);
  220. /* Set REC656 Mode */
  221. venc_write(sd, VENC_YCCCTL, 0x1);
  222. }
  223. venc_modify(sd, VENC_SYNCCTL, 1 << VENC_SYNCCTL_OVD_SHIFT,
  224. VENC_SYNCCTL_OVD);
  225. venc_write(sd, VENC_VMOD, 0);
  226. venc_modify(sd, VENC_VMOD,
  227. (1 << VENC_VMOD_VIE_SHIFT),
  228. VENC_VMOD_VIE);
  229. venc_modify(sd, VENC_VMOD,
  230. (0 << VENC_VMOD_VMD), VENC_VMOD_VMD);
  231. venc_modify(sd, VENC_VMOD,
  232. (1 << VENC_VMOD_TVTYP_SHIFT),
  233. VENC_VMOD_TVTYP);
  234. venc_write(sd, VENC_DACTST, 0x0);
  235. venc_modify(sd, VENC_VMOD, VENC_VMOD_VENC, VENC_VMOD_VENC);
  236. return 0;
  237. }
  238. #define VDAC_CONFIG_HD_V2 0x081141EF
  239. /*
  240. * venc_set_480p59_94
  241. *
  242. * This function configures the video encoder to EDTV(525p) component setting.
  243. */
  244. static int venc_set_480p59_94(struct v4l2_subdev *sd)
  245. {
  246. struct venc_state *venc = to_state(sd);
  247. struct venc_platform_data *pdata = venc->pdata;
  248. v4l2_dbg(debug, 2, sd, "venc_set_480p59_94\n");
  249. if ((pdata->venc_type != VPBE_VERSION_1) &&
  250. (pdata->venc_type != VPBE_VERSION_2))
  251. return -EINVAL;
  252. /* Setup clock at VPSS & VENC for SD */
  253. if (pdata->setup_clock(VPBE_ENC_DV_PRESET, V4L2_DV_480P59_94) < 0)
  254. return -EINVAL;
  255. venc_enabledigitaloutput(sd, 0);
  256. if (pdata->venc_type == VPBE_VERSION_2)
  257. vdaccfg_write(sd, VDAC_CONFIG_HD_V2);
  258. venc_write(sd, VENC_OSDCLK0, 0);
  259. venc_write(sd, VENC_OSDCLK1, 1);
  260. if (pdata->venc_type == VPBE_VERSION_1) {
  261. venc_modify(sd, VENC_VDPRO, VENC_VDPRO_DAFRQ,
  262. VENC_VDPRO_DAFRQ);
  263. venc_modify(sd, VENC_VDPRO, VENC_VDPRO_DAUPS,
  264. VENC_VDPRO_DAUPS);
  265. }
  266. venc_write(sd, VENC_VMOD, 0);
  267. venc_modify(sd, VENC_VMOD, (1 << VENC_VMOD_VIE_SHIFT),
  268. VENC_VMOD_VIE);
  269. venc_modify(sd, VENC_VMOD, VENC_VMOD_HDMD, VENC_VMOD_HDMD);
  270. venc_modify(sd, VENC_VMOD, (HDTV_525P << VENC_VMOD_TVTYP_SHIFT),
  271. VENC_VMOD_TVTYP);
  272. venc_modify(sd, VENC_VMOD, VENC_VMOD_VDMD_YCBCR8 <<
  273. VENC_VMOD_VDMD_SHIFT, VENC_VMOD_VDMD);
  274. venc_modify(sd, VENC_VMOD, VENC_VMOD_VENC, VENC_VMOD_VENC);
  275. return 0;
  276. }
  277. /*
  278. * venc_set_625p
  279. *
  280. * This function configures the video encoder to HDTV(625p) component setting
  281. */
  282. static int venc_set_576p50(struct v4l2_subdev *sd)
  283. {
  284. struct venc_state *venc = to_state(sd);
  285. struct venc_platform_data *pdata = venc->pdata;
  286. v4l2_dbg(debug, 2, sd, "venc_set_576p50\n");
  287. if ((pdata->venc_type != VPBE_VERSION_1) &&
  288. (pdata->venc_type != VPBE_VERSION_2))
  289. return -EINVAL;
  290. /* Setup clock at VPSS & VENC for SD */
  291. if (pdata->setup_clock(VPBE_ENC_DV_PRESET, V4L2_DV_576P50) < 0)
  292. return -EINVAL;
  293. venc_enabledigitaloutput(sd, 0);
  294. if (pdata->venc_type == VPBE_VERSION_2)
  295. vdaccfg_write(sd, VDAC_CONFIG_HD_V2);
  296. venc_write(sd, VENC_OSDCLK0, 0);
  297. venc_write(sd, VENC_OSDCLK1, 1);
  298. if (pdata->venc_type == VPBE_VERSION_1) {
  299. venc_modify(sd, VENC_VDPRO, VENC_VDPRO_DAFRQ,
  300. VENC_VDPRO_DAFRQ);
  301. venc_modify(sd, VENC_VDPRO, VENC_VDPRO_DAUPS,
  302. VENC_VDPRO_DAUPS);
  303. }
  304. venc_write(sd, VENC_VMOD, 0);
  305. venc_modify(sd, VENC_VMOD, (1 << VENC_VMOD_VIE_SHIFT),
  306. VENC_VMOD_VIE);
  307. venc_modify(sd, VENC_VMOD, VENC_VMOD_HDMD, VENC_VMOD_HDMD);
  308. venc_modify(sd, VENC_VMOD, (HDTV_625P << VENC_VMOD_TVTYP_SHIFT),
  309. VENC_VMOD_TVTYP);
  310. venc_modify(sd, VENC_VMOD, VENC_VMOD_VDMD_YCBCR8 <<
  311. VENC_VMOD_VDMD_SHIFT, VENC_VMOD_VDMD);
  312. venc_modify(sd, VENC_VMOD, VENC_VMOD_VENC, VENC_VMOD_VENC);
  313. return 0;
  314. }
  315. /*
  316. * venc_set_720p60_internal - Setup 720p60 in venc for dm365 only
  317. */
  318. static int venc_set_720p60_internal(struct v4l2_subdev *sd)
  319. {
  320. struct venc_state *venc = to_state(sd);
  321. struct venc_platform_data *pdata = venc->pdata;
  322. if (pdata->setup_clock(VPBE_ENC_DV_PRESET, V4L2_DV_720P60) < 0)
  323. return -EINVAL;
  324. venc_enabledigitaloutput(sd, 0);
  325. venc_write(sd, VENC_OSDCLK0, 0);
  326. venc_write(sd, VENC_OSDCLK1, 1);
  327. venc_write(sd, VENC_VMOD, 0);
  328. /* DM365 component HD mode */
  329. venc_modify(sd, VENC_VMOD, (1 << VENC_VMOD_VIE_SHIFT),
  330. VENC_VMOD_VIE);
  331. venc_modify(sd, VENC_VMOD, VENC_VMOD_HDMD, VENC_VMOD_HDMD);
  332. venc_modify(sd, VENC_VMOD, (HDTV_720P << VENC_VMOD_TVTYP_SHIFT),
  333. VENC_VMOD_TVTYP);
  334. venc_modify(sd, VENC_VMOD, VENC_VMOD_VENC, VENC_VMOD_VENC);
  335. venc_write(sd, VENC_XHINTVL, 0);
  336. return 0;
  337. }
  338. /*
  339. * venc_set_1080i30_internal - Setup 1080i30 in venc for dm365 only
  340. */
  341. static int venc_set_1080i30_internal(struct v4l2_subdev *sd)
  342. {
  343. struct venc_state *venc = to_state(sd);
  344. struct venc_platform_data *pdata = venc->pdata;
  345. if (pdata->setup_clock(VPBE_ENC_DV_PRESET, V4L2_DV_1080P30) < 0)
  346. return -EINVAL;
  347. venc_enabledigitaloutput(sd, 0);
  348. venc_write(sd, VENC_OSDCLK0, 0);
  349. venc_write(sd, VENC_OSDCLK1, 1);
  350. venc_write(sd, VENC_VMOD, 0);
  351. /* DM365 component HD mode */
  352. venc_modify(sd, VENC_VMOD, (1 << VENC_VMOD_VIE_SHIFT),
  353. VENC_VMOD_VIE);
  354. venc_modify(sd, VENC_VMOD, VENC_VMOD_HDMD, VENC_VMOD_HDMD);
  355. venc_modify(sd, VENC_VMOD, (HDTV_1080I << VENC_VMOD_TVTYP_SHIFT),
  356. VENC_VMOD_TVTYP);
  357. venc_modify(sd, VENC_VMOD, VENC_VMOD_VENC, VENC_VMOD_VENC);
  358. venc_write(sd, VENC_XHINTVL, 0);
  359. return 0;
  360. }
  361. static int venc_s_std_output(struct v4l2_subdev *sd, v4l2_std_id norm)
  362. {
  363. v4l2_dbg(debug, 1, sd, "venc_s_std_output\n");
  364. if (norm & V4L2_STD_525_60)
  365. return venc_set_ntsc(sd);
  366. else if (norm & V4L2_STD_625_50)
  367. return venc_set_pal(sd);
  368. return -EINVAL;
  369. }
  370. static int venc_s_dv_preset(struct v4l2_subdev *sd,
  371. struct v4l2_dv_preset *dv_preset)
  372. {
  373. struct venc_state *venc = to_state(sd);
  374. int ret;
  375. v4l2_dbg(debug, 1, sd, "venc_s_dv_preset\n");
  376. if (dv_preset->preset == V4L2_DV_576P50)
  377. return venc_set_576p50(sd);
  378. else if (dv_preset->preset == V4L2_DV_480P59_94)
  379. return venc_set_480p59_94(sd);
  380. else if ((dv_preset->preset == V4L2_DV_720P60) &&
  381. (venc->pdata->venc_type == VPBE_VERSION_2)) {
  382. /* TBD setup internal 720p mode here */
  383. ret = venc_set_720p60_internal(sd);
  384. /* for DM365 VPBE, there is DAC inside */
  385. vdaccfg_write(sd, VDAC_CONFIG_HD_V2);
  386. return ret;
  387. } else if ((dv_preset->preset == V4L2_DV_1080I30) &&
  388. (venc->pdata->venc_type == VPBE_VERSION_2)) {
  389. /* TBD setup internal 1080i mode here */
  390. ret = venc_set_1080i30_internal(sd);
  391. /* for DM365 VPBE, there is DAC inside */
  392. vdaccfg_write(sd, VDAC_CONFIG_HD_V2);
  393. return ret;
  394. }
  395. return -EINVAL;
  396. }
  397. static int venc_s_routing(struct v4l2_subdev *sd, u32 input, u32 output,
  398. u32 config)
  399. {
  400. struct venc_state *venc = to_state(sd);
  401. int ret;
  402. v4l2_dbg(debug, 1, sd, "venc_s_routing\n");
  403. ret = venc_set_dac(sd, output);
  404. if (!ret)
  405. venc->output = output;
  406. return ret;
  407. }
  408. static long venc_ioctl(struct v4l2_subdev *sd,
  409. unsigned int cmd,
  410. void *arg)
  411. {
  412. u32 val;
  413. switch (cmd) {
  414. case VENC_GET_FLD:
  415. val = venc_read(sd, VENC_VSTAT);
  416. *((int *)arg) = ((val & VENC_VSTAT_FIDST) ==
  417. VENC_VSTAT_FIDST);
  418. break;
  419. default:
  420. v4l2_err(sd, "Wrong IOCTL cmd\n");
  421. break;
  422. }
  423. return 0;
  424. }
  425. static const struct v4l2_subdev_core_ops venc_core_ops = {
  426. .ioctl = venc_ioctl,
  427. };
  428. static const struct v4l2_subdev_video_ops venc_video_ops = {
  429. .s_routing = venc_s_routing,
  430. .s_std_output = venc_s_std_output,
  431. .s_dv_preset = venc_s_dv_preset,
  432. };
  433. static const struct v4l2_subdev_ops venc_ops = {
  434. .core = &venc_core_ops,
  435. .video = &venc_video_ops,
  436. };
  437. static int venc_initialize(struct v4l2_subdev *sd)
  438. {
  439. struct venc_state *venc = to_state(sd);
  440. int ret;
  441. /* Set default to output to composite and std to NTSC */
  442. venc->output = 0;
  443. venc->std = V4L2_STD_525_60;
  444. ret = venc_s_routing(sd, 0, venc->output, 0);
  445. if (ret < 0) {
  446. v4l2_err(sd, "Error setting output during init\n");
  447. return -EINVAL;
  448. }
  449. ret = venc_s_std_output(sd, venc->std);
  450. if (ret < 0) {
  451. v4l2_err(sd, "Error setting std during init\n");
  452. return -EINVAL;
  453. }
  454. return ret;
  455. }
  456. static int venc_device_get(struct device *dev, void *data)
  457. {
  458. struct platform_device *pdev = to_platform_device(dev);
  459. struct venc_state **venc = data;
  460. if (strcmp(MODULE_NAME, pdev->name) == 0)
  461. *venc = platform_get_drvdata(pdev);
  462. return 0;
  463. }
  464. struct v4l2_subdev *venc_sub_dev_init(struct v4l2_device *v4l2_dev,
  465. const char *venc_name)
  466. {
  467. struct venc_state *venc;
  468. int err;
  469. err = bus_for_each_dev(&platform_bus_type, NULL, &venc,
  470. venc_device_get);
  471. if (venc == NULL)
  472. return NULL;
  473. v4l2_subdev_init(&venc->sd, &venc_ops);
  474. strcpy(venc->sd.name, venc_name);
  475. if (v4l2_device_register_subdev(v4l2_dev, &venc->sd) < 0) {
  476. v4l2_err(v4l2_dev,
  477. "vpbe unable to register venc sub device\n");
  478. return NULL;
  479. }
  480. if (venc_initialize(&venc->sd)) {
  481. v4l2_err(v4l2_dev,
  482. "vpbe venc initialization failed\n");
  483. return NULL;
  484. }
  485. return &venc->sd;
  486. }
  487. EXPORT_SYMBOL(venc_sub_dev_init);
  488. static int venc_probe(struct platform_device *pdev)
  489. {
  490. struct venc_state *venc;
  491. struct resource *res;
  492. int ret;
  493. venc = kzalloc(sizeof(struct venc_state), GFP_KERNEL);
  494. if (venc == NULL)
  495. return -ENOMEM;
  496. venc->pdev = &pdev->dev;
  497. venc->pdata = pdev->dev.platform_data;
  498. if (NULL == venc->pdata) {
  499. dev_err(venc->pdev, "Unable to get platform data for"
  500. " VENC sub device");
  501. ret = -ENOENT;
  502. goto free_mem;
  503. }
  504. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  505. if (!res) {
  506. dev_err(venc->pdev,
  507. "Unable to get VENC register address map\n");
  508. ret = -ENODEV;
  509. goto free_mem;
  510. }
  511. if (!request_mem_region(res->start, resource_size(res), "venc")) {
  512. dev_err(venc->pdev, "Unable to reserve VENC MMIO region\n");
  513. ret = -ENODEV;
  514. goto free_mem;
  515. }
  516. venc->venc_base = ioremap_nocache(res->start, resource_size(res));
  517. if (!venc->venc_base) {
  518. dev_err(venc->pdev, "Unable to map VENC IO space\n");
  519. ret = -ENODEV;
  520. goto release_venc_mem_region;
  521. }
  522. if (venc->pdata->venc_type != VPBE_VERSION_1) {
  523. res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
  524. if (!res) {
  525. dev_err(venc->pdev,
  526. "Unable to get VDAC_CONFIG address map\n");
  527. ret = -ENODEV;
  528. goto unmap_venc_io;
  529. }
  530. if (!request_mem_region(res->start,
  531. resource_size(res), "venc")) {
  532. dev_err(venc->pdev,
  533. "Unable to reserve VDAC_CONFIG MMIO region\n");
  534. ret = -ENODEV;
  535. goto unmap_venc_io;
  536. }
  537. venc->vdaccfg_reg = ioremap_nocache(res->start,
  538. resource_size(res));
  539. if (!venc->vdaccfg_reg) {
  540. dev_err(venc->pdev,
  541. "Unable to map VDAC_CONFIG IO space\n");
  542. ret = -ENODEV;
  543. goto release_vdaccfg_mem_region;
  544. }
  545. }
  546. spin_lock_init(&venc->lock);
  547. platform_set_drvdata(pdev, venc);
  548. dev_notice(venc->pdev, "VENC sub device probe success\n");
  549. return 0;
  550. release_vdaccfg_mem_region:
  551. release_mem_region(res->start, resource_size(res));
  552. unmap_venc_io:
  553. iounmap(venc->venc_base);
  554. release_venc_mem_region:
  555. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  556. release_mem_region(res->start, resource_size(res));
  557. free_mem:
  558. kfree(venc);
  559. return ret;
  560. }
  561. static int venc_remove(struct platform_device *pdev)
  562. {
  563. struct venc_state *venc = platform_get_drvdata(pdev);
  564. struct resource *res;
  565. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  566. iounmap((void *)venc->venc_base);
  567. release_mem_region(res->start, resource_size(res));
  568. if (venc->pdata->venc_type != VPBE_VERSION_1) {
  569. res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
  570. iounmap((void *)venc->vdaccfg_reg);
  571. release_mem_region(res->start, resource_size(res));
  572. }
  573. kfree(venc);
  574. return 0;
  575. }
  576. static struct platform_driver venc_driver = {
  577. .probe = venc_probe,
  578. .remove = venc_remove,
  579. .driver = {
  580. .name = MODULE_NAME,
  581. .owner = THIS_MODULE,
  582. },
  583. };
  584. module_platform_driver(venc_driver);
  585. MODULE_LICENSE("GPL");
  586. MODULE_DESCRIPTION("VPBE VENC Driver");
  587. MODULE_AUTHOR("Texas Instruments");