hisax_fcpcipnp.c 25 KB

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  1. /*
  2. * Driver for AVM Fritz!PCI, Fritz!PCI v2, Fritz!PnP ISDN cards
  3. *
  4. * Author Kai Germaschewski
  5. * Copyright 2001 by Kai Germaschewski <kai.germaschewski@gmx.de>
  6. * 2001 by Karsten Keil <keil@isdn4linux.de>
  7. *
  8. * based upon Karsten Keil's original avm_pci.c driver
  9. *
  10. * This software may be used and distributed according to the terms
  11. * of the GNU General Public License, incorporated herein by reference.
  12. *
  13. * Thanks to Wizard Computersysteme GmbH, Bremervoerde and
  14. * SoHaNet Technology GmbH, Berlin
  15. * for supporting the development of this driver
  16. */
  17. /* TODO:
  18. *
  19. * o POWER PC
  20. * o clean up debugging
  21. * o tx_skb at PH_DEACTIVATE time
  22. */
  23. #include <linux/module.h>
  24. #include <linux/init.h>
  25. #include <linux/interrupt.h>
  26. #include <linux/pci.h>
  27. #include <linux/isapnp.h>
  28. #include <linux/kmod.h>
  29. #include <linux/slab.h>
  30. #include <linux/skbuff.h>
  31. #include <linux/netdevice.h>
  32. #include <linux/delay.h>
  33. #include <asm/io.h>
  34. #include "hisax_fcpcipnp.h"
  35. // debugging cruft
  36. #define __debug_variable debug
  37. #include "hisax_debug.h"
  38. #ifdef CONFIG_HISAX_DEBUG
  39. static int debug = 0;
  40. /* static int hdlcfifosize = 32; */
  41. module_param(debug, int, 0);
  42. /* module_param(hdlcfifosize, int, 0); */
  43. #endif
  44. MODULE_AUTHOR("Kai Germaschewski <kai.germaschewski@gmx.de>/Karsten Keil <kkeil@suse.de>");
  45. MODULE_DESCRIPTION("AVM Fritz!PCI/PnP ISDN driver");
  46. static struct pci_device_id fcpci_ids[] = {
  47. { .vendor = PCI_VENDOR_ID_AVM,
  48. .device = PCI_DEVICE_ID_AVM_A1,
  49. .subvendor = PCI_ANY_ID,
  50. .subdevice = PCI_ANY_ID,
  51. .driver_data = (unsigned long) "Fritz!Card PCI",
  52. },
  53. { .vendor = PCI_VENDOR_ID_AVM,
  54. .device = PCI_DEVICE_ID_AVM_A1_V2,
  55. .subvendor = PCI_ANY_ID,
  56. .subdevice = PCI_ANY_ID,
  57. .driver_data = (unsigned long) "Fritz!Card PCI v2" },
  58. {}
  59. };
  60. MODULE_DEVICE_TABLE(pci, fcpci_ids);
  61. #ifdef CONFIG_PNP
  62. static struct pnp_device_id fcpnp_ids[] __devinitdata = {
  63. {
  64. .id = "AVM0900",
  65. .driver_data = (unsigned long) "Fritz!Card PnP",
  66. },
  67. { .id = "" }
  68. };
  69. MODULE_DEVICE_TABLE(pnp, fcpnp_ids);
  70. #endif
  71. static int protocol = 2; /* EURO-ISDN Default */
  72. module_param(protocol, int, 0);
  73. MODULE_LICENSE("GPL");
  74. // ----------------------------------------------------------------------
  75. #define AVM_INDEX 0x04
  76. #define AVM_DATA 0x10
  77. #define AVM_IDX_HDLC_1 0x00
  78. #define AVM_IDX_HDLC_2 0x01
  79. #define AVM_IDX_ISAC_FIFO 0x02
  80. #define AVM_IDX_ISAC_REG_LOW 0x04
  81. #define AVM_IDX_ISAC_REG_HIGH 0x06
  82. #define AVM_STATUS0 0x02
  83. #define AVM_STATUS0_IRQ_ISAC 0x01
  84. #define AVM_STATUS0_IRQ_HDLC 0x02
  85. #define AVM_STATUS0_IRQ_TIMER 0x04
  86. #define AVM_STATUS0_IRQ_MASK 0x07
  87. #define AVM_STATUS0_RESET 0x01
  88. #define AVM_STATUS0_DIS_TIMER 0x02
  89. #define AVM_STATUS0_RES_TIMER 0x04
  90. #define AVM_STATUS0_ENA_IRQ 0x08
  91. #define AVM_STATUS0_TESTBIT 0x10
  92. #define AVM_STATUS1 0x03
  93. #define AVM_STATUS1_ENA_IOM 0x80
  94. #define HDLC_FIFO 0x0
  95. #define HDLC_STATUS 0x4
  96. #define HDLC_CTRL 0x4
  97. #define HDLC_MODE_ITF_FLG 0x01
  98. #define HDLC_MODE_TRANS 0x02
  99. #define HDLC_MODE_CCR_7 0x04
  100. #define HDLC_MODE_CCR_16 0x08
  101. #define HDLC_MODE_TESTLOOP 0x80
  102. #define HDLC_INT_XPR 0x80
  103. #define HDLC_INT_XDU 0x40
  104. #define HDLC_INT_RPR 0x20
  105. #define HDLC_INT_MASK 0xE0
  106. #define HDLC_STAT_RME 0x01
  107. #define HDLC_STAT_RDO 0x10
  108. #define HDLC_STAT_CRCVFRRAB 0x0E
  109. #define HDLC_STAT_CRCVFR 0x06
  110. #define HDLC_STAT_RML_MASK 0xff00
  111. #define HDLC_CMD_XRS 0x80
  112. #define HDLC_CMD_XME 0x01
  113. #define HDLC_CMD_RRS 0x20
  114. #define HDLC_CMD_XML_MASK 0xff00
  115. #define AVM_HDLC_FIFO_1 0x10
  116. #define AVM_HDLC_FIFO_2 0x18
  117. #define AVM_HDLC_STATUS_1 0x14
  118. #define AVM_HDLC_STATUS_2 0x1c
  119. #define AVM_ISACSX_INDEX 0x04
  120. #define AVM_ISACSX_DATA 0x08
  121. // ----------------------------------------------------------------------
  122. // Fritz!PCI
  123. static unsigned char fcpci_read_isac(struct isac *isac, unsigned char offset)
  124. {
  125. struct fritz_adapter *adapter = isac->priv;
  126. unsigned char idx = (offset > 0x2f) ?
  127. AVM_IDX_ISAC_REG_HIGH : AVM_IDX_ISAC_REG_LOW;
  128. unsigned char val;
  129. unsigned long flags;
  130. spin_lock_irqsave(&adapter->hw_lock, flags);
  131. outb(idx, adapter->io + AVM_INDEX);
  132. val = inb(adapter->io + AVM_DATA + (offset & 0xf));
  133. spin_unlock_irqrestore(&adapter->hw_lock, flags);
  134. DBG(0x1000, " port %#x, value %#x",
  135. offset, val);
  136. return val;
  137. }
  138. static void fcpci_write_isac(struct isac *isac, unsigned char offset,
  139. unsigned char value)
  140. {
  141. struct fritz_adapter *adapter = isac->priv;
  142. unsigned char idx = (offset > 0x2f) ?
  143. AVM_IDX_ISAC_REG_HIGH : AVM_IDX_ISAC_REG_LOW;
  144. unsigned long flags;
  145. DBG(0x1000, " port %#x, value %#x",
  146. offset, value);
  147. spin_lock_irqsave(&adapter->hw_lock, flags);
  148. outb(idx, adapter->io + AVM_INDEX);
  149. outb(value, adapter->io + AVM_DATA + (offset & 0xf));
  150. spin_unlock_irqrestore(&adapter->hw_lock, flags);
  151. }
  152. static void fcpci_read_isac_fifo(struct isac *isac, unsigned char * data,
  153. int size)
  154. {
  155. struct fritz_adapter *adapter = isac->priv;
  156. unsigned long flags;
  157. spin_lock_irqsave(&adapter->hw_lock, flags);
  158. outb(AVM_IDX_ISAC_FIFO, adapter->io + AVM_INDEX);
  159. insb(adapter->io + AVM_DATA, data, size);
  160. spin_unlock_irqrestore(&adapter->hw_lock, flags);
  161. }
  162. static void fcpci_write_isac_fifo(struct isac *isac, unsigned char * data,
  163. int size)
  164. {
  165. struct fritz_adapter *adapter = isac->priv;
  166. unsigned long flags;
  167. spin_lock_irqsave(&adapter->hw_lock, flags);
  168. outb(AVM_IDX_ISAC_FIFO, adapter->io + AVM_INDEX);
  169. outsb(adapter->io + AVM_DATA, data, size);
  170. spin_unlock_irqrestore(&adapter->hw_lock, flags);
  171. }
  172. static u32 fcpci_read_hdlc_status(struct fritz_adapter *adapter, int nr)
  173. {
  174. u32 val;
  175. int idx = nr ? AVM_IDX_HDLC_2 : AVM_IDX_HDLC_1;
  176. unsigned long flags;
  177. spin_lock_irqsave(&adapter->hw_lock, flags);
  178. outl(idx, adapter->io + AVM_INDEX);
  179. val = inl(adapter->io + AVM_DATA + HDLC_STATUS);
  180. spin_unlock_irqrestore(&adapter->hw_lock, flags);
  181. return val;
  182. }
  183. static void __fcpci_write_ctrl(struct fritz_bcs *bcs, int which)
  184. {
  185. struct fritz_adapter *adapter = bcs->adapter;
  186. int idx = bcs->channel ? AVM_IDX_HDLC_2 : AVM_IDX_HDLC_1;
  187. DBG(0x40, "hdlc %c wr%x ctrl %x",
  188. 'A' + bcs->channel, which, bcs->ctrl.ctrl);
  189. outl(idx, adapter->io + AVM_INDEX);
  190. outl(bcs->ctrl.ctrl, adapter->io + AVM_DATA + HDLC_CTRL);
  191. }
  192. static void fcpci_write_ctrl(struct fritz_bcs *bcs, int which)
  193. {
  194. struct fritz_adapter *adapter = bcs->adapter;
  195. unsigned long flags;
  196. spin_lock_irqsave(&adapter->hw_lock, flags);
  197. __fcpci_write_ctrl(bcs, which);
  198. spin_unlock_irqrestore(&adapter->hw_lock, flags);
  199. }
  200. // ----------------------------------------------------------------------
  201. // Fritz!PCI v2
  202. static unsigned char fcpci2_read_isac(struct isac *isac, unsigned char offset)
  203. {
  204. struct fritz_adapter *adapter = isac->priv;
  205. unsigned char val;
  206. unsigned long flags;
  207. spin_lock_irqsave(&adapter->hw_lock, flags);
  208. outl(offset, adapter->io + AVM_ISACSX_INDEX);
  209. val = inl(adapter->io + AVM_ISACSX_DATA);
  210. spin_unlock_irqrestore(&adapter->hw_lock, flags);
  211. DBG(0x1000, " port %#x, value %#x",
  212. offset, val);
  213. return val;
  214. }
  215. static void fcpci2_write_isac(struct isac *isac, unsigned char offset,
  216. unsigned char value)
  217. {
  218. struct fritz_adapter *adapter = isac->priv;
  219. unsigned long flags;
  220. DBG(0x1000, " port %#x, value %#x",
  221. offset, value);
  222. spin_lock_irqsave(&adapter->hw_lock, flags);
  223. outl(offset, adapter->io + AVM_ISACSX_INDEX);
  224. outl(value, adapter->io + AVM_ISACSX_DATA);
  225. spin_unlock_irqrestore(&adapter->hw_lock, flags);
  226. }
  227. static void fcpci2_read_isac_fifo(struct isac *isac, unsigned char * data,
  228. int size)
  229. {
  230. struct fritz_adapter *adapter = isac->priv;
  231. int i;
  232. unsigned long flags;
  233. spin_lock_irqsave(&adapter->hw_lock, flags);
  234. outl(0, adapter->io + AVM_ISACSX_INDEX);
  235. for (i = 0; i < size; i++)
  236. data[i] = inl(adapter->io + AVM_ISACSX_DATA);
  237. spin_unlock_irqrestore(&adapter->hw_lock, flags);
  238. }
  239. static void fcpci2_write_isac_fifo(struct isac *isac, unsigned char * data,
  240. int size)
  241. {
  242. struct fritz_adapter *adapter = isac->priv;
  243. int i;
  244. unsigned long flags;
  245. spin_lock_irqsave(&adapter->hw_lock, flags);
  246. outl(0, adapter->io + AVM_ISACSX_INDEX);
  247. for (i = 0; i < size; i++)
  248. outl(data[i], adapter->io + AVM_ISACSX_DATA);
  249. spin_unlock_irqrestore(&adapter->hw_lock, flags);
  250. }
  251. static u32 fcpci2_read_hdlc_status(struct fritz_adapter *adapter, int nr)
  252. {
  253. int offset = nr ? AVM_HDLC_STATUS_2 : AVM_HDLC_STATUS_1;
  254. return inl(adapter->io + offset);
  255. }
  256. static void fcpci2_write_ctrl(struct fritz_bcs *bcs, int which)
  257. {
  258. struct fritz_adapter *adapter = bcs->adapter;
  259. int offset = bcs->channel ? AVM_HDLC_STATUS_2 : AVM_HDLC_STATUS_1;
  260. DBG(0x40, "hdlc %c wr%x ctrl %x",
  261. 'A' + bcs->channel, which, bcs->ctrl.ctrl);
  262. outl(bcs->ctrl.ctrl, adapter->io + offset);
  263. }
  264. // ----------------------------------------------------------------------
  265. // Fritz!PnP (ISAC access as for Fritz!PCI)
  266. static u32 fcpnp_read_hdlc_status(struct fritz_adapter *adapter, int nr)
  267. {
  268. unsigned char idx = nr ? AVM_IDX_HDLC_2 : AVM_IDX_HDLC_1;
  269. u32 val;
  270. unsigned long flags;
  271. spin_lock_irqsave(&adapter->hw_lock, flags);
  272. outb(idx, adapter->io + AVM_INDEX);
  273. val = inb(adapter->io + AVM_DATA + HDLC_STATUS);
  274. if (val & HDLC_INT_RPR)
  275. val |= inb(adapter->io + AVM_DATA + HDLC_STATUS + 1) << 8;
  276. spin_unlock_irqrestore(&adapter->hw_lock, flags);
  277. return val;
  278. }
  279. static void __fcpnp_write_ctrl(struct fritz_bcs *bcs, int which)
  280. {
  281. struct fritz_adapter *adapter = bcs->adapter;
  282. unsigned char idx = bcs->channel ? AVM_IDX_HDLC_2 : AVM_IDX_HDLC_1;
  283. DBG(0x40, "hdlc %c wr%x ctrl %x",
  284. 'A' + bcs->channel, which, bcs->ctrl.ctrl);
  285. outb(idx, adapter->io + AVM_INDEX);
  286. if (which & 4)
  287. outb(bcs->ctrl.sr.mode,
  288. adapter->io + AVM_DATA + HDLC_STATUS + 2);
  289. if (which & 2)
  290. outb(bcs->ctrl.sr.xml,
  291. adapter->io + AVM_DATA + HDLC_STATUS + 1);
  292. if (which & 1)
  293. outb(bcs->ctrl.sr.cmd,
  294. adapter->io + AVM_DATA + HDLC_STATUS + 0);
  295. }
  296. static void fcpnp_write_ctrl(struct fritz_bcs *bcs, int which)
  297. {
  298. struct fritz_adapter *adapter = bcs->adapter;
  299. unsigned long flags;
  300. spin_lock_irqsave(&adapter->hw_lock, flags);
  301. __fcpnp_write_ctrl(bcs, which);
  302. spin_unlock_irqrestore(&adapter->hw_lock, flags);
  303. }
  304. // ----------------------------------------------------------------------
  305. static inline void B_L1L2(struct fritz_bcs *bcs, int pr, void *arg)
  306. {
  307. struct hisax_if *ifc = (struct hisax_if *) &bcs->b_if;
  308. DBG(2, "pr %#x", pr);
  309. ifc->l1l2(ifc, pr, arg);
  310. }
  311. static void hdlc_fill_fifo(struct fritz_bcs *bcs)
  312. {
  313. struct fritz_adapter *adapter = bcs->adapter;
  314. struct sk_buff *skb = bcs->tx_skb;
  315. int count;
  316. unsigned long flags;
  317. unsigned char *p;
  318. DBG(0x40, "hdlc_fill_fifo");
  319. BUG_ON(skb->len == 0);
  320. bcs->ctrl.sr.cmd &= ~HDLC_CMD_XME;
  321. if (bcs->tx_skb->len > bcs->fifo_size) {
  322. count = bcs->fifo_size;
  323. } else {
  324. count = bcs->tx_skb->len;
  325. if (bcs->mode != L1_MODE_TRANS)
  326. bcs->ctrl.sr.cmd |= HDLC_CMD_XME;
  327. }
  328. DBG(0x40, "hdlc_fill_fifo %d/%d", count, bcs->tx_skb->len);
  329. p = bcs->tx_skb->data;
  330. skb_pull(bcs->tx_skb, count);
  331. bcs->tx_cnt += count;
  332. bcs->ctrl.sr.xml = ((count == bcs->fifo_size) ? 0 : count);
  333. switch (adapter->type) {
  334. case AVM_FRITZ_PCI:
  335. spin_lock_irqsave(&adapter->hw_lock, flags);
  336. // sets the correct AVM_INDEX, too
  337. __fcpci_write_ctrl(bcs, 3);
  338. outsl(adapter->io + AVM_DATA + HDLC_FIFO,
  339. p, (count + 3) / 4);
  340. spin_unlock_irqrestore(&adapter->hw_lock, flags);
  341. break;
  342. case AVM_FRITZ_PCIV2:
  343. fcpci2_write_ctrl(bcs, 3);
  344. outsl(adapter->io +
  345. (bcs->channel ? AVM_HDLC_FIFO_2 : AVM_HDLC_FIFO_1),
  346. p, (count + 3) / 4);
  347. break;
  348. case AVM_FRITZ_PNP:
  349. spin_lock_irqsave(&adapter->hw_lock, flags);
  350. // sets the correct AVM_INDEX, too
  351. __fcpnp_write_ctrl(bcs, 3);
  352. outsb(adapter->io + AVM_DATA, p, count);
  353. spin_unlock_irqrestore(&adapter->hw_lock, flags);
  354. break;
  355. }
  356. }
  357. static inline void hdlc_empty_fifo(struct fritz_bcs *bcs, int count)
  358. {
  359. struct fritz_adapter *adapter = bcs->adapter;
  360. unsigned char *p;
  361. unsigned char idx = bcs->channel ? AVM_IDX_HDLC_2 : AVM_IDX_HDLC_1;
  362. DBG(0x10, "hdlc_empty_fifo %d", count);
  363. if (bcs->rcvidx + count > HSCX_BUFMAX) {
  364. DBG(0x10, "hdlc_empty_fifo: incoming packet too large");
  365. return;
  366. }
  367. p = bcs->rcvbuf + bcs->rcvidx;
  368. bcs->rcvidx += count;
  369. switch (adapter->type) {
  370. case AVM_FRITZ_PCI:
  371. spin_lock(&adapter->hw_lock);
  372. outl(idx, adapter->io + AVM_INDEX);
  373. insl(adapter->io + AVM_DATA + HDLC_FIFO,
  374. p, (count + 3) / 4);
  375. spin_unlock(&adapter->hw_lock);
  376. break;
  377. case AVM_FRITZ_PCIV2:
  378. insl(adapter->io +
  379. (bcs->channel ? AVM_HDLC_FIFO_2 : AVM_HDLC_FIFO_1),
  380. p, (count + 3) / 4);
  381. break;
  382. case AVM_FRITZ_PNP:
  383. spin_lock(&adapter->hw_lock);
  384. outb(idx, adapter->io + AVM_INDEX);
  385. insb(adapter->io + AVM_DATA, p, count);
  386. spin_unlock(&adapter->hw_lock);
  387. break;
  388. }
  389. }
  390. static inline void hdlc_rpr_irq(struct fritz_bcs *bcs, u32 stat)
  391. {
  392. struct fritz_adapter *adapter = bcs->adapter;
  393. struct sk_buff *skb;
  394. int len;
  395. if (stat & HDLC_STAT_RDO) {
  396. DBG(0x10, "RDO");
  397. bcs->ctrl.sr.xml = 0;
  398. bcs->ctrl.sr.cmd |= HDLC_CMD_RRS;
  399. adapter->write_ctrl(bcs, 1);
  400. bcs->ctrl.sr.cmd &= ~HDLC_CMD_RRS;
  401. adapter->write_ctrl(bcs, 1);
  402. bcs->rcvidx = 0;
  403. return;
  404. }
  405. len = (stat & HDLC_STAT_RML_MASK) >> 8;
  406. if (len == 0)
  407. len = bcs->fifo_size;
  408. hdlc_empty_fifo(bcs, len);
  409. if ((stat & HDLC_STAT_RME) || (bcs->mode == L1_MODE_TRANS)) {
  410. if (((stat & HDLC_STAT_CRCVFRRAB)== HDLC_STAT_CRCVFR) ||
  411. (bcs->mode == L1_MODE_TRANS)) {
  412. skb = dev_alloc_skb(bcs->rcvidx);
  413. if (!skb) {
  414. printk(KERN_WARNING "HDLC: receive out of memory\n");
  415. } else {
  416. memcpy(skb_put(skb, bcs->rcvidx), bcs->rcvbuf,
  417. bcs->rcvidx);
  418. DBG_SKB(1, skb);
  419. B_L1L2(bcs, PH_DATA | INDICATION, skb);
  420. }
  421. bcs->rcvidx = 0;
  422. } else {
  423. DBG(0x10, "ch%d invalid frame %#x",
  424. bcs->channel, stat);
  425. bcs->rcvidx = 0;
  426. }
  427. }
  428. }
  429. static inline void hdlc_xdu_irq(struct fritz_bcs *bcs)
  430. {
  431. struct fritz_adapter *adapter = bcs->adapter;
  432. /* Here we lost an TX interrupt, so
  433. * restart transmitting the whole frame.
  434. */
  435. bcs->ctrl.sr.xml = 0;
  436. bcs->ctrl.sr.cmd |= HDLC_CMD_XRS;
  437. adapter->write_ctrl(bcs, 1);
  438. bcs->ctrl.sr.cmd &= ~HDLC_CMD_XRS;
  439. if (!bcs->tx_skb) {
  440. DBG(0x10, "XDU without skb");
  441. adapter->write_ctrl(bcs, 1);
  442. return;
  443. }
  444. /* only hdlc restarts the frame, transparent mode must continue */
  445. if (bcs->mode == L1_MODE_HDLC) {
  446. skb_push(bcs->tx_skb, bcs->tx_cnt);
  447. bcs->tx_cnt = 0;
  448. }
  449. }
  450. static inline void hdlc_xpr_irq(struct fritz_bcs *bcs)
  451. {
  452. struct sk_buff *skb;
  453. skb = bcs->tx_skb;
  454. if (!skb)
  455. return;
  456. if (skb->len) {
  457. hdlc_fill_fifo(bcs);
  458. return;
  459. }
  460. bcs->tx_cnt = 0;
  461. bcs->tx_skb = NULL;
  462. B_L1L2(bcs, PH_DATA | CONFIRM, (void *)(unsigned long)skb->truesize);
  463. dev_kfree_skb_irq(skb);
  464. }
  465. static void hdlc_irq_one(struct fritz_bcs *bcs, u32 stat)
  466. {
  467. DBG(0x10, "ch%d stat %#x", bcs->channel, stat);
  468. if (stat & HDLC_INT_RPR) {
  469. DBG(0x10, "RPR");
  470. hdlc_rpr_irq(bcs, stat);
  471. }
  472. if (stat & HDLC_INT_XDU) {
  473. DBG(0x10, "XDU");
  474. hdlc_xdu_irq(bcs);
  475. hdlc_xpr_irq(bcs);
  476. return;
  477. }
  478. if (stat & HDLC_INT_XPR) {
  479. DBG(0x10, "XPR");
  480. hdlc_xpr_irq(bcs);
  481. }
  482. }
  483. static inline void hdlc_irq(struct fritz_adapter *adapter)
  484. {
  485. int nr;
  486. u32 stat;
  487. for (nr = 0; nr < 2; nr++) {
  488. stat = adapter->read_hdlc_status(adapter, nr);
  489. DBG(0x10, "HDLC %c stat %#x", 'A' + nr, stat);
  490. if (stat & HDLC_INT_MASK)
  491. hdlc_irq_one(&adapter->bcs[nr], stat);
  492. }
  493. }
  494. static void modehdlc(struct fritz_bcs *bcs, int mode)
  495. {
  496. struct fritz_adapter *adapter = bcs->adapter;
  497. DBG(0x40, "hdlc %c mode %d --> %d",
  498. 'A' + bcs->channel, bcs->mode, mode);
  499. if (bcs->mode == mode)
  500. return;
  501. bcs->fifo_size = 32;
  502. bcs->ctrl.ctrl = 0;
  503. bcs->ctrl.sr.cmd = HDLC_CMD_XRS | HDLC_CMD_RRS;
  504. switch (mode) {
  505. case L1_MODE_NULL:
  506. bcs->ctrl.sr.mode = HDLC_MODE_TRANS;
  507. adapter->write_ctrl(bcs, 5);
  508. break;
  509. case L1_MODE_TRANS:
  510. case L1_MODE_HDLC:
  511. bcs->rcvidx = 0;
  512. bcs->tx_cnt = 0;
  513. bcs->tx_skb = NULL;
  514. if (mode == L1_MODE_TRANS) {
  515. bcs->ctrl.sr.mode = HDLC_MODE_TRANS;
  516. } else {
  517. bcs->ctrl.sr.mode = HDLC_MODE_ITF_FLG;
  518. }
  519. adapter->write_ctrl(bcs, 5);
  520. bcs->ctrl.sr.cmd = HDLC_CMD_XRS;
  521. adapter->write_ctrl(bcs, 1);
  522. bcs->ctrl.sr.cmd = 0;
  523. break;
  524. }
  525. bcs->mode = mode;
  526. }
  527. static void fritz_b_l2l1(struct hisax_if *ifc, int pr, void *arg)
  528. {
  529. struct fritz_bcs *bcs = ifc->priv;
  530. struct sk_buff *skb = arg;
  531. int mode;
  532. DBG(0x10, "pr %#x", pr);
  533. switch (pr) {
  534. case PH_DATA | REQUEST:
  535. BUG_ON(bcs->tx_skb);
  536. bcs->tx_skb = skb;
  537. DBG_SKB(1, skb);
  538. hdlc_fill_fifo(bcs);
  539. break;
  540. case PH_ACTIVATE | REQUEST:
  541. mode = (long) arg;
  542. DBG(4,"B%d,PH_ACTIVATE_REQUEST %d", bcs->channel + 1, mode);
  543. modehdlc(bcs, mode);
  544. B_L1L2(bcs, PH_ACTIVATE | INDICATION, NULL);
  545. break;
  546. case PH_DEACTIVATE | REQUEST:
  547. DBG(4,"B%d,PH_DEACTIVATE_REQUEST", bcs->channel + 1);
  548. modehdlc(bcs, L1_MODE_NULL);
  549. B_L1L2(bcs, PH_DEACTIVATE | INDICATION, NULL);
  550. break;
  551. }
  552. }
  553. // ----------------------------------------------------------------------
  554. static irqreturn_t
  555. fcpci2_irq(int intno, void *dev)
  556. {
  557. struct fritz_adapter *adapter = dev;
  558. unsigned char val;
  559. val = inb(adapter->io + AVM_STATUS0);
  560. if (!(val & AVM_STATUS0_IRQ_MASK))
  561. /* hopefully a shared IRQ reqest */
  562. return IRQ_NONE;
  563. DBG(2, "STATUS0 %#x", val);
  564. if (val & AVM_STATUS0_IRQ_ISAC)
  565. isacsx_irq(&adapter->isac);
  566. if (val & AVM_STATUS0_IRQ_HDLC)
  567. hdlc_irq(adapter);
  568. if (val & AVM_STATUS0_IRQ_ISAC)
  569. isacsx_irq(&adapter->isac);
  570. return IRQ_HANDLED;
  571. }
  572. static irqreturn_t
  573. fcpci_irq(int intno, void *dev)
  574. {
  575. struct fritz_adapter *adapter = dev;
  576. unsigned char sval;
  577. sval = inb(adapter->io + 2);
  578. if ((sval & AVM_STATUS0_IRQ_MASK) == AVM_STATUS0_IRQ_MASK)
  579. /* possibly a shared IRQ reqest */
  580. return IRQ_NONE;
  581. DBG(2, "sval %#x", sval);
  582. if (!(sval & AVM_STATUS0_IRQ_ISAC))
  583. isac_irq(&adapter->isac);
  584. if (!(sval & AVM_STATUS0_IRQ_HDLC))
  585. hdlc_irq(adapter);
  586. return IRQ_HANDLED;
  587. }
  588. // ----------------------------------------------------------------------
  589. static inline void fcpci2_init(struct fritz_adapter *adapter)
  590. {
  591. outb(AVM_STATUS0_RES_TIMER, adapter->io + AVM_STATUS0);
  592. outb(AVM_STATUS0_ENA_IRQ, adapter->io + AVM_STATUS0);
  593. }
  594. static inline void fcpci_init(struct fritz_adapter *adapter)
  595. {
  596. outb(AVM_STATUS0_DIS_TIMER | AVM_STATUS0_RES_TIMER |
  597. AVM_STATUS0_ENA_IRQ, adapter->io + AVM_STATUS0);
  598. outb(AVM_STATUS1_ENA_IOM | adapter->irq,
  599. adapter->io + AVM_STATUS1);
  600. mdelay(10);
  601. }
  602. // ----------------------------------------------------------------------
  603. static int __devinit fcpcipnp_setup(struct fritz_adapter *adapter)
  604. {
  605. u32 val = 0;
  606. int retval;
  607. DBG(1,"");
  608. isac_init(&adapter->isac); // FIXME is this okay now
  609. retval = -EBUSY;
  610. if (!request_region(adapter->io, 32, "fcpcipnp"))
  611. goto err;
  612. switch (adapter->type) {
  613. case AVM_FRITZ_PCIV2:
  614. case AVM_FRITZ_PCI:
  615. val = inl(adapter->io);
  616. break;
  617. case AVM_FRITZ_PNP:
  618. val = inb(adapter->io);
  619. val |= inb(adapter->io + 1) << 8;
  620. break;
  621. }
  622. DBG(1, "stat %#x Class %X Rev %d",
  623. val, val & 0xff, (val>>8) & 0xff);
  624. spin_lock_init(&adapter->hw_lock);
  625. adapter->isac.priv = adapter;
  626. switch (adapter->type) {
  627. case AVM_FRITZ_PCIV2:
  628. adapter->isac.read_isac = &fcpci2_read_isac;
  629. adapter->isac.write_isac = &fcpci2_write_isac;
  630. adapter->isac.read_isac_fifo = &fcpci2_read_isac_fifo;
  631. adapter->isac.write_isac_fifo = &fcpci2_write_isac_fifo;
  632. adapter->read_hdlc_status = &fcpci2_read_hdlc_status;
  633. adapter->write_ctrl = &fcpci2_write_ctrl;
  634. break;
  635. case AVM_FRITZ_PCI:
  636. adapter->isac.read_isac = &fcpci_read_isac;
  637. adapter->isac.write_isac = &fcpci_write_isac;
  638. adapter->isac.read_isac_fifo = &fcpci_read_isac_fifo;
  639. adapter->isac.write_isac_fifo = &fcpci_write_isac_fifo;
  640. adapter->read_hdlc_status = &fcpci_read_hdlc_status;
  641. adapter->write_ctrl = &fcpci_write_ctrl;
  642. break;
  643. case AVM_FRITZ_PNP:
  644. adapter->isac.read_isac = &fcpci_read_isac;
  645. adapter->isac.write_isac = &fcpci_write_isac;
  646. adapter->isac.read_isac_fifo = &fcpci_read_isac_fifo;
  647. adapter->isac.write_isac_fifo = &fcpci_write_isac_fifo;
  648. adapter->read_hdlc_status = &fcpnp_read_hdlc_status;
  649. adapter->write_ctrl = &fcpnp_write_ctrl;
  650. break;
  651. }
  652. // Reset
  653. outb(0, adapter->io + AVM_STATUS0);
  654. mdelay(10);
  655. outb(AVM_STATUS0_RESET, adapter->io + AVM_STATUS0);
  656. mdelay(10);
  657. outb(0, adapter->io + AVM_STATUS0);
  658. mdelay(10);
  659. switch (adapter->type) {
  660. case AVM_FRITZ_PCIV2:
  661. retval = request_irq(adapter->irq, fcpci2_irq, IRQF_SHARED,
  662. "fcpcipnp", adapter);
  663. break;
  664. case AVM_FRITZ_PCI:
  665. retval = request_irq(adapter->irq, fcpci_irq, IRQF_SHARED,
  666. "fcpcipnp", adapter);
  667. break;
  668. case AVM_FRITZ_PNP:
  669. retval = request_irq(adapter->irq, fcpci_irq, 0,
  670. "fcpcipnp", adapter);
  671. break;
  672. }
  673. if (retval)
  674. goto err_region;
  675. switch (adapter->type) {
  676. case AVM_FRITZ_PCIV2:
  677. fcpci2_init(adapter);
  678. isacsx_setup(&adapter->isac);
  679. break;
  680. case AVM_FRITZ_PCI:
  681. case AVM_FRITZ_PNP:
  682. fcpci_init(adapter);
  683. isac_setup(&adapter->isac);
  684. break;
  685. }
  686. val = adapter->read_hdlc_status(adapter, 0);
  687. DBG(0x20, "HDLC A STA %x", val);
  688. val = adapter->read_hdlc_status(adapter, 1);
  689. DBG(0x20, "HDLC B STA %x", val);
  690. adapter->bcs[0].mode = -1;
  691. adapter->bcs[1].mode = -1;
  692. modehdlc(&adapter->bcs[0], L1_MODE_NULL);
  693. modehdlc(&adapter->bcs[1], L1_MODE_NULL);
  694. return 0;
  695. err_region:
  696. release_region(adapter->io, 32);
  697. err:
  698. return retval;
  699. }
  700. static void __devexit fcpcipnp_release(struct fritz_adapter *adapter)
  701. {
  702. DBG(1,"");
  703. outb(0, adapter->io + AVM_STATUS0);
  704. free_irq(adapter->irq, adapter);
  705. release_region(adapter->io, 32);
  706. }
  707. // ----------------------------------------------------------------------
  708. static struct fritz_adapter * __devinit
  709. new_adapter(void)
  710. {
  711. struct fritz_adapter *adapter;
  712. struct hisax_b_if *b_if[2];
  713. int i;
  714. adapter = kzalloc(sizeof(struct fritz_adapter), GFP_KERNEL);
  715. if (!adapter)
  716. return NULL;
  717. adapter->isac.hisax_d_if.owner = THIS_MODULE;
  718. adapter->isac.hisax_d_if.ifc.priv = &adapter->isac;
  719. adapter->isac.hisax_d_if.ifc.l2l1 = isac_d_l2l1;
  720. for (i = 0; i < 2; i++) {
  721. adapter->bcs[i].adapter = adapter;
  722. adapter->bcs[i].channel = i;
  723. adapter->bcs[i].b_if.ifc.priv = &adapter->bcs[i];
  724. adapter->bcs[i].b_if.ifc.l2l1 = fritz_b_l2l1;
  725. }
  726. for (i = 0; i < 2; i++)
  727. b_if[i] = &adapter->bcs[i].b_if;
  728. if (hisax_register(&adapter->isac.hisax_d_if, b_if, "fcpcipnp",
  729. protocol) != 0) {
  730. kfree(adapter);
  731. adapter = NULL;
  732. }
  733. return adapter;
  734. }
  735. static void delete_adapter(struct fritz_adapter *adapter)
  736. {
  737. hisax_unregister(&adapter->isac.hisax_d_if);
  738. kfree(adapter);
  739. }
  740. static int __devinit fcpci_probe(struct pci_dev *pdev,
  741. const struct pci_device_id *ent)
  742. {
  743. struct fritz_adapter *adapter;
  744. int retval;
  745. retval = -ENOMEM;
  746. adapter = new_adapter();
  747. if (!adapter)
  748. goto err;
  749. pci_set_drvdata(pdev, adapter);
  750. if (pdev->device == PCI_DEVICE_ID_AVM_A1_V2)
  751. adapter->type = AVM_FRITZ_PCIV2;
  752. else
  753. adapter->type = AVM_FRITZ_PCI;
  754. retval = pci_enable_device(pdev);
  755. if (retval)
  756. goto err_free;
  757. adapter->io = pci_resource_start(pdev, 1);
  758. adapter->irq = pdev->irq;
  759. printk(KERN_INFO "hisax_fcpcipnp: found adapter %s at %s\n",
  760. (char *) ent->driver_data, pci_name(pdev));
  761. retval = fcpcipnp_setup(adapter);
  762. if (retval)
  763. goto err_free;
  764. return 0;
  765. err_free:
  766. delete_adapter(adapter);
  767. err:
  768. return retval;
  769. }
  770. #ifdef CONFIG_PNP
  771. static int __devinit fcpnp_probe(struct pnp_dev *pdev, const struct pnp_device_id *dev_id)
  772. {
  773. struct fritz_adapter *adapter;
  774. int retval;
  775. if (!pdev)
  776. return(-ENODEV);
  777. retval = -ENOMEM;
  778. adapter = new_adapter();
  779. if (!adapter)
  780. goto err;
  781. pnp_set_drvdata(pdev, adapter);
  782. adapter->type = AVM_FRITZ_PNP;
  783. pnp_disable_dev(pdev);
  784. retval = pnp_activate_dev(pdev);
  785. if (retval < 0) {
  786. printk(KERN_WARNING "%s: pnp_activate_dev(%s) ret(%d)\n", __func__,
  787. (char *)dev_id->driver_data, retval);
  788. goto err_free;
  789. }
  790. adapter->io = pnp_port_start(pdev, 0);
  791. adapter->irq = pnp_irq(pdev, 0);
  792. printk(KERN_INFO "hisax_fcpcipnp: found adapter %s at IO %#x irq %d\n",
  793. (char *) dev_id->driver_data, adapter->io, adapter->irq);
  794. retval = fcpcipnp_setup(adapter);
  795. if (retval)
  796. goto err_free;
  797. return 0;
  798. err_free:
  799. delete_adapter(adapter);
  800. err:
  801. return retval;
  802. }
  803. static void __devexit fcpnp_remove(struct pnp_dev *pdev)
  804. {
  805. struct fritz_adapter *adapter = pnp_get_drvdata(pdev);
  806. if (adapter) {
  807. fcpcipnp_release(adapter);
  808. delete_adapter(adapter);
  809. }
  810. pnp_disable_dev(pdev);
  811. }
  812. static struct pnp_driver fcpnp_driver = {
  813. .name = "fcpnp",
  814. .probe = fcpnp_probe,
  815. .remove = __devexit_p(fcpnp_remove),
  816. .id_table = fcpnp_ids,
  817. };
  818. #endif
  819. static void __devexit fcpci_remove(struct pci_dev *pdev)
  820. {
  821. struct fritz_adapter *adapter = pci_get_drvdata(pdev);
  822. fcpcipnp_release(adapter);
  823. pci_disable_device(pdev);
  824. delete_adapter(adapter);
  825. }
  826. static struct pci_driver fcpci_driver = {
  827. .name = "fcpci",
  828. .probe = fcpci_probe,
  829. .remove = __devexit_p(fcpci_remove),
  830. .id_table = fcpci_ids,
  831. };
  832. static int __init hisax_fcpcipnp_init(void)
  833. {
  834. int retval;
  835. printk(KERN_INFO "hisax_fcpcipnp: Fritz!Card PCI/PCIv2/PnP ISDN driver v0.0.1\n");
  836. retval = pci_register_driver(&fcpci_driver);
  837. if (retval)
  838. return retval;
  839. #ifdef CONFIG_PNP
  840. retval = pnp_register_driver(&fcpnp_driver);
  841. if (retval < 0) {
  842. pci_unregister_driver(&fcpci_driver);
  843. return retval;
  844. }
  845. #endif
  846. return 0;
  847. }
  848. static void __exit hisax_fcpcipnp_exit(void)
  849. {
  850. #ifdef CONFIG_PNP
  851. pnp_unregister_driver(&fcpnp_driver);
  852. #endif
  853. pci_unregister_driver(&fcpci_driver);
  854. }
  855. module_init(hisax_fcpcipnp_init);
  856. module_exit(hisax_fcpcipnp_exit);