tegra-kbc.c 22 KB

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  1. /*
  2. * Keyboard class input driver for the NVIDIA Tegra SoC internal matrix
  3. * keyboard controller
  4. *
  5. * Copyright (c) 2009-2011, NVIDIA Corporation.
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License as published by
  9. * the Free Software Foundation; either version 2 of the License, or
  10. * (at your option) any later version.
  11. *
  12. * This program is distributed in the hope that it will be useful, but WITHOUT
  13. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  14. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  15. * more details.
  16. *
  17. * You should have received a copy of the GNU General Public License along
  18. * with this program; if not, write to the Free Software Foundation, Inc.,
  19. * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
  20. */
  21. #include <linux/kernel.h>
  22. #include <linux/module.h>
  23. #include <linux/input.h>
  24. #include <linux/platform_device.h>
  25. #include <linux/delay.h>
  26. #include <linux/io.h>
  27. #include <linux/interrupt.h>
  28. #include <linux/of.h>
  29. #include <linux/clk.h>
  30. #include <linux/slab.h>
  31. #include <mach/clk.h>
  32. #include <mach/kbc.h>
  33. #define KBC_MAX_DEBOUNCE_CNT 0x3ffu
  34. /* KBC row scan time and delay for beginning the row scan. */
  35. #define KBC_ROW_SCAN_TIME 16
  36. #define KBC_ROW_SCAN_DLY 5
  37. /* KBC uses a 32KHz clock so a cycle = 1/32Khz */
  38. #define KBC_CYCLE_MS 32
  39. /* KBC Registers */
  40. /* KBC Control Register */
  41. #define KBC_CONTROL_0 0x0
  42. #define KBC_FIFO_TH_CNT_SHIFT(cnt) (cnt << 14)
  43. #define KBC_DEBOUNCE_CNT_SHIFT(cnt) (cnt << 4)
  44. #define KBC_CONTROL_FIFO_CNT_INT_EN (1 << 3)
  45. #define KBC_CONTROL_KBC_EN (1 << 0)
  46. /* KBC Interrupt Register */
  47. #define KBC_INT_0 0x4
  48. #define KBC_INT_FIFO_CNT_INT_STATUS (1 << 2)
  49. #define KBC_INT_KEYPRESS_INT_STATUS (1 << 0)
  50. #define KBC_ROW_CFG0_0 0x8
  51. #define KBC_COL_CFG0_0 0x18
  52. #define KBC_TO_CNT_0 0x24
  53. #define KBC_INIT_DLY_0 0x28
  54. #define KBC_RPT_DLY_0 0x2c
  55. #define KBC_KP_ENT0_0 0x30
  56. #define KBC_KP_ENT1_0 0x34
  57. #define KBC_ROW0_MASK_0 0x38
  58. #define KBC_ROW_SHIFT 3
  59. struct tegra_kbc {
  60. void __iomem *mmio;
  61. struct input_dev *idev;
  62. unsigned int irq;
  63. spinlock_t lock;
  64. unsigned int repoll_dly;
  65. unsigned long cp_dly_jiffies;
  66. unsigned int cp_to_wkup_dly;
  67. bool use_fn_map;
  68. bool use_ghost_filter;
  69. bool keypress_caused_wake;
  70. const struct tegra_kbc_platform_data *pdata;
  71. unsigned short keycode[KBC_MAX_KEY * 2];
  72. unsigned short current_keys[KBC_MAX_KPENT];
  73. unsigned int num_pressed_keys;
  74. u32 wakeup_key;
  75. struct timer_list timer;
  76. struct clk *clk;
  77. };
  78. static const u32 tegra_kbc_default_keymap[] __devinitdata = {
  79. KEY(0, 2, KEY_W),
  80. KEY(0, 3, KEY_S),
  81. KEY(0, 4, KEY_A),
  82. KEY(0, 5, KEY_Z),
  83. KEY(0, 7, KEY_FN),
  84. KEY(1, 7, KEY_LEFTMETA),
  85. KEY(2, 6, KEY_RIGHTALT),
  86. KEY(2, 7, KEY_LEFTALT),
  87. KEY(3, 0, KEY_5),
  88. KEY(3, 1, KEY_4),
  89. KEY(3, 2, KEY_R),
  90. KEY(3, 3, KEY_E),
  91. KEY(3, 4, KEY_F),
  92. KEY(3, 5, KEY_D),
  93. KEY(3, 6, KEY_X),
  94. KEY(4, 0, KEY_7),
  95. KEY(4, 1, KEY_6),
  96. KEY(4, 2, KEY_T),
  97. KEY(4, 3, KEY_H),
  98. KEY(4, 4, KEY_G),
  99. KEY(4, 5, KEY_V),
  100. KEY(4, 6, KEY_C),
  101. KEY(4, 7, KEY_SPACE),
  102. KEY(5, 0, KEY_9),
  103. KEY(5, 1, KEY_8),
  104. KEY(5, 2, KEY_U),
  105. KEY(5, 3, KEY_Y),
  106. KEY(5, 4, KEY_J),
  107. KEY(5, 5, KEY_N),
  108. KEY(5, 6, KEY_B),
  109. KEY(5, 7, KEY_BACKSLASH),
  110. KEY(6, 0, KEY_MINUS),
  111. KEY(6, 1, KEY_0),
  112. KEY(6, 2, KEY_O),
  113. KEY(6, 3, KEY_I),
  114. KEY(6, 4, KEY_L),
  115. KEY(6, 5, KEY_K),
  116. KEY(6, 6, KEY_COMMA),
  117. KEY(6, 7, KEY_M),
  118. KEY(7, 1, KEY_EQUAL),
  119. KEY(7, 2, KEY_RIGHTBRACE),
  120. KEY(7, 3, KEY_ENTER),
  121. KEY(7, 7, KEY_MENU),
  122. KEY(8, 4, KEY_RIGHTSHIFT),
  123. KEY(8, 5, KEY_LEFTSHIFT),
  124. KEY(9, 5, KEY_RIGHTCTRL),
  125. KEY(9, 7, KEY_LEFTCTRL),
  126. KEY(11, 0, KEY_LEFTBRACE),
  127. KEY(11, 1, KEY_P),
  128. KEY(11, 2, KEY_APOSTROPHE),
  129. KEY(11, 3, KEY_SEMICOLON),
  130. KEY(11, 4, KEY_SLASH),
  131. KEY(11, 5, KEY_DOT),
  132. KEY(12, 0, KEY_F10),
  133. KEY(12, 1, KEY_F9),
  134. KEY(12, 2, KEY_BACKSPACE),
  135. KEY(12, 3, KEY_3),
  136. KEY(12, 4, KEY_2),
  137. KEY(12, 5, KEY_UP),
  138. KEY(12, 6, KEY_PRINT),
  139. KEY(12, 7, KEY_PAUSE),
  140. KEY(13, 0, KEY_INSERT),
  141. KEY(13, 1, KEY_DELETE),
  142. KEY(13, 3, KEY_PAGEUP),
  143. KEY(13, 4, KEY_PAGEDOWN),
  144. KEY(13, 5, KEY_RIGHT),
  145. KEY(13, 6, KEY_DOWN),
  146. KEY(13, 7, KEY_LEFT),
  147. KEY(14, 0, KEY_F11),
  148. KEY(14, 1, KEY_F12),
  149. KEY(14, 2, KEY_F8),
  150. KEY(14, 3, KEY_Q),
  151. KEY(14, 4, KEY_F4),
  152. KEY(14, 5, KEY_F3),
  153. KEY(14, 6, KEY_1),
  154. KEY(14, 7, KEY_F7),
  155. KEY(15, 0, KEY_ESC),
  156. KEY(15, 1, KEY_GRAVE),
  157. KEY(15, 2, KEY_F5),
  158. KEY(15, 3, KEY_TAB),
  159. KEY(15, 4, KEY_F1),
  160. KEY(15, 5, KEY_F2),
  161. KEY(15, 6, KEY_CAPSLOCK),
  162. KEY(15, 7, KEY_F6),
  163. /* Software Handled Function Keys */
  164. KEY(20, 0, KEY_KP7),
  165. KEY(21, 0, KEY_KP9),
  166. KEY(21, 1, KEY_KP8),
  167. KEY(21, 2, KEY_KP4),
  168. KEY(21, 4, KEY_KP1),
  169. KEY(22, 1, KEY_KPSLASH),
  170. KEY(22, 2, KEY_KP6),
  171. KEY(22, 3, KEY_KP5),
  172. KEY(22, 4, KEY_KP3),
  173. KEY(22, 5, KEY_KP2),
  174. KEY(22, 7, KEY_KP0),
  175. KEY(27, 1, KEY_KPASTERISK),
  176. KEY(27, 3, KEY_KPMINUS),
  177. KEY(27, 4, KEY_KPPLUS),
  178. KEY(27, 5, KEY_KPDOT),
  179. KEY(28, 5, KEY_VOLUMEUP),
  180. KEY(29, 3, KEY_HOME),
  181. KEY(29, 4, KEY_END),
  182. KEY(29, 5, KEY_BRIGHTNESSDOWN),
  183. KEY(29, 6, KEY_VOLUMEDOWN),
  184. KEY(29, 7, KEY_BRIGHTNESSUP),
  185. KEY(30, 0, KEY_NUMLOCK),
  186. KEY(30, 1, KEY_SCROLLLOCK),
  187. KEY(30, 2, KEY_MUTE),
  188. KEY(31, 4, KEY_HELP),
  189. };
  190. static const
  191. struct matrix_keymap_data tegra_kbc_default_keymap_data __devinitdata = {
  192. .keymap = tegra_kbc_default_keymap,
  193. .keymap_size = ARRAY_SIZE(tegra_kbc_default_keymap),
  194. };
  195. static void tegra_kbc_report_released_keys(struct input_dev *input,
  196. unsigned short old_keycodes[],
  197. unsigned int old_num_keys,
  198. unsigned short new_keycodes[],
  199. unsigned int new_num_keys)
  200. {
  201. unsigned int i, j;
  202. for (i = 0; i < old_num_keys; i++) {
  203. for (j = 0; j < new_num_keys; j++)
  204. if (old_keycodes[i] == new_keycodes[j])
  205. break;
  206. if (j == new_num_keys)
  207. input_report_key(input, old_keycodes[i], 0);
  208. }
  209. }
  210. static void tegra_kbc_report_pressed_keys(struct input_dev *input,
  211. unsigned char scancodes[],
  212. unsigned short keycodes[],
  213. unsigned int num_pressed_keys)
  214. {
  215. unsigned int i;
  216. for (i = 0; i < num_pressed_keys; i++) {
  217. input_event(input, EV_MSC, MSC_SCAN, scancodes[i]);
  218. input_report_key(input, keycodes[i], 1);
  219. }
  220. }
  221. static void tegra_kbc_report_keys(struct tegra_kbc *kbc)
  222. {
  223. unsigned char scancodes[KBC_MAX_KPENT];
  224. unsigned short keycodes[KBC_MAX_KPENT];
  225. u32 val = 0;
  226. unsigned int i;
  227. unsigned int num_down = 0;
  228. bool fn_keypress = false;
  229. bool key_in_same_row = false;
  230. bool key_in_same_col = false;
  231. for (i = 0; i < KBC_MAX_KPENT; i++) {
  232. if ((i % 4) == 0)
  233. val = readl(kbc->mmio + KBC_KP_ENT0_0 + i);
  234. if (val & 0x80) {
  235. unsigned int col = val & 0x07;
  236. unsigned int row = (val >> 3) & 0x0f;
  237. unsigned char scancode =
  238. MATRIX_SCAN_CODE(row, col, KBC_ROW_SHIFT);
  239. scancodes[num_down] = scancode;
  240. keycodes[num_down] = kbc->keycode[scancode];
  241. /* If driver uses Fn map, do not report the Fn key. */
  242. if ((keycodes[num_down] == KEY_FN) && kbc->use_fn_map)
  243. fn_keypress = true;
  244. else
  245. num_down++;
  246. }
  247. val >>= 8;
  248. }
  249. /*
  250. * Matrix keyboard designs are prone to keyboard ghosting.
  251. * Ghosting occurs if there are 3 keys such that -
  252. * any 2 of the 3 keys share a row, and any 2 of them share a column.
  253. * If so ignore the key presses for this iteration.
  254. */
  255. if (kbc->use_ghost_filter && num_down >= 3) {
  256. for (i = 0; i < num_down; i++) {
  257. unsigned int j;
  258. u8 curr_col = scancodes[i] & 0x07;
  259. u8 curr_row = scancodes[i] >> KBC_ROW_SHIFT;
  260. /*
  261. * Find 2 keys such that one key is in the same row
  262. * and the other is in the same column as the i-th key.
  263. */
  264. for (j = i + 1; j < num_down; j++) {
  265. u8 col = scancodes[j] & 0x07;
  266. u8 row = scancodes[j] >> KBC_ROW_SHIFT;
  267. if (col == curr_col)
  268. key_in_same_col = true;
  269. if (row == curr_row)
  270. key_in_same_row = true;
  271. }
  272. }
  273. }
  274. /*
  275. * If the platform uses Fn keymaps, translate keys on a Fn keypress.
  276. * Function keycodes are KBC_MAX_KEY apart from the plain keycodes.
  277. */
  278. if (fn_keypress) {
  279. for (i = 0; i < num_down; i++) {
  280. scancodes[i] += KBC_MAX_KEY;
  281. keycodes[i] = kbc->keycode[scancodes[i]];
  282. }
  283. }
  284. /* Ignore the key presses for this iteration? */
  285. if (key_in_same_col && key_in_same_row)
  286. return;
  287. tegra_kbc_report_released_keys(kbc->idev,
  288. kbc->current_keys, kbc->num_pressed_keys,
  289. keycodes, num_down);
  290. tegra_kbc_report_pressed_keys(kbc->idev, scancodes, keycodes, num_down);
  291. input_sync(kbc->idev);
  292. memcpy(kbc->current_keys, keycodes, sizeof(kbc->current_keys));
  293. kbc->num_pressed_keys = num_down;
  294. }
  295. static void tegra_kbc_set_fifo_interrupt(struct tegra_kbc *kbc, bool enable)
  296. {
  297. u32 val;
  298. val = readl(kbc->mmio + KBC_CONTROL_0);
  299. if (enable)
  300. val |= KBC_CONTROL_FIFO_CNT_INT_EN;
  301. else
  302. val &= ~KBC_CONTROL_FIFO_CNT_INT_EN;
  303. writel(val, kbc->mmio + KBC_CONTROL_0);
  304. }
  305. static void tegra_kbc_keypress_timer(unsigned long data)
  306. {
  307. struct tegra_kbc *kbc = (struct tegra_kbc *)data;
  308. unsigned long flags;
  309. u32 val;
  310. unsigned int i;
  311. spin_lock_irqsave(&kbc->lock, flags);
  312. val = (readl(kbc->mmio + KBC_INT_0) >> 4) & 0xf;
  313. if (val) {
  314. unsigned long dly;
  315. tegra_kbc_report_keys(kbc);
  316. /*
  317. * If more than one keys are pressed we need not wait
  318. * for the repoll delay.
  319. */
  320. dly = (val == 1) ? kbc->repoll_dly : 1;
  321. mod_timer(&kbc->timer, jiffies + msecs_to_jiffies(dly));
  322. } else {
  323. /* Release any pressed keys and exit the polling loop */
  324. for (i = 0; i < kbc->num_pressed_keys; i++)
  325. input_report_key(kbc->idev, kbc->current_keys[i], 0);
  326. input_sync(kbc->idev);
  327. kbc->num_pressed_keys = 0;
  328. /* All keys are released so enable the keypress interrupt */
  329. tegra_kbc_set_fifo_interrupt(kbc, true);
  330. }
  331. spin_unlock_irqrestore(&kbc->lock, flags);
  332. }
  333. static irqreturn_t tegra_kbc_isr(int irq, void *args)
  334. {
  335. struct tegra_kbc *kbc = args;
  336. unsigned long flags;
  337. u32 val;
  338. spin_lock_irqsave(&kbc->lock, flags);
  339. /*
  340. * Quickly bail out & reenable interrupts if the fifo threshold
  341. * count interrupt wasn't the interrupt source
  342. */
  343. val = readl(kbc->mmio + KBC_INT_0);
  344. writel(val, kbc->mmio + KBC_INT_0);
  345. if (val & KBC_INT_FIFO_CNT_INT_STATUS) {
  346. /*
  347. * Until all keys are released, defer further processing to
  348. * the polling loop in tegra_kbc_keypress_timer.
  349. */
  350. tegra_kbc_set_fifo_interrupt(kbc, false);
  351. mod_timer(&kbc->timer, jiffies + kbc->cp_dly_jiffies);
  352. } else if (val & KBC_INT_KEYPRESS_INT_STATUS) {
  353. /* We can be here only through system resume path */
  354. kbc->keypress_caused_wake = true;
  355. }
  356. spin_unlock_irqrestore(&kbc->lock, flags);
  357. return IRQ_HANDLED;
  358. }
  359. static void tegra_kbc_setup_wakekeys(struct tegra_kbc *kbc, bool filter)
  360. {
  361. const struct tegra_kbc_platform_data *pdata = kbc->pdata;
  362. int i;
  363. unsigned int rst_val;
  364. /* Either mask all keys or none. */
  365. rst_val = (filter && !pdata->wakeup) ? ~0 : 0;
  366. for (i = 0; i < KBC_MAX_ROW; i++)
  367. writel(rst_val, kbc->mmio + KBC_ROW0_MASK_0 + i * 4);
  368. }
  369. static void tegra_kbc_config_pins(struct tegra_kbc *kbc)
  370. {
  371. const struct tegra_kbc_platform_data *pdata = kbc->pdata;
  372. int i;
  373. for (i = 0; i < KBC_MAX_GPIO; i++) {
  374. u32 r_shft = 5 * (i % 6);
  375. u32 c_shft = 4 * (i % 8);
  376. u32 r_mask = 0x1f << r_shft;
  377. u32 c_mask = 0x0f << c_shft;
  378. u32 r_offs = (i / 6) * 4 + KBC_ROW_CFG0_0;
  379. u32 c_offs = (i / 8) * 4 + KBC_COL_CFG0_0;
  380. u32 row_cfg = readl(kbc->mmio + r_offs);
  381. u32 col_cfg = readl(kbc->mmio + c_offs);
  382. row_cfg &= ~r_mask;
  383. col_cfg &= ~c_mask;
  384. if (pdata->pin_cfg[i].is_row)
  385. row_cfg |= ((pdata->pin_cfg[i].num << 1) | 1) << r_shft;
  386. else
  387. col_cfg |= ((pdata->pin_cfg[i].num << 1) | 1) << c_shft;
  388. writel(row_cfg, kbc->mmio + r_offs);
  389. writel(col_cfg, kbc->mmio + c_offs);
  390. }
  391. }
  392. static int tegra_kbc_start(struct tegra_kbc *kbc)
  393. {
  394. const struct tegra_kbc_platform_data *pdata = kbc->pdata;
  395. unsigned int debounce_cnt;
  396. u32 val = 0;
  397. clk_enable(kbc->clk);
  398. /* Reset the KBC controller to clear all previous status.*/
  399. tegra_periph_reset_assert(kbc->clk);
  400. udelay(100);
  401. tegra_periph_reset_deassert(kbc->clk);
  402. udelay(100);
  403. tegra_kbc_config_pins(kbc);
  404. tegra_kbc_setup_wakekeys(kbc, false);
  405. writel(pdata->repeat_cnt, kbc->mmio + KBC_RPT_DLY_0);
  406. /* Keyboard debounce count is maximum of 12 bits. */
  407. debounce_cnt = min(pdata->debounce_cnt, KBC_MAX_DEBOUNCE_CNT);
  408. val = KBC_DEBOUNCE_CNT_SHIFT(debounce_cnt);
  409. val |= KBC_FIFO_TH_CNT_SHIFT(1); /* set fifo interrupt threshold to 1 */
  410. val |= KBC_CONTROL_FIFO_CNT_INT_EN; /* interrupt on FIFO threshold */
  411. val |= KBC_CONTROL_KBC_EN; /* enable */
  412. writel(val, kbc->mmio + KBC_CONTROL_0);
  413. /*
  414. * Compute the delay(ns) from interrupt mode to continuous polling
  415. * mode so the timer routine is scheduled appropriately.
  416. */
  417. val = readl(kbc->mmio + KBC_INIT_DLY_0);
  418. kbc->cp_dly_jiffies = usecs_to_jiffies((val & 0xfffff) * 32);
  419. kbc->num_pressed_keys = 0;
  420. /*
  421. * Atomically clear out any remaining entries in the key FIFO
  422. * and enable keyboard interrupts.
  423. */
  424. while (1) {
  425. val = readl(kbc->mmio + KBC_INT_0);
  426. val >>= 4;
  427. if (!val)
  428. break;
  429. val = readl(kbc->mmio + KBC_KP_ENT0_0);
  430. val = readl(kbc->mmio + KBC_KP_ENT1_0);
  431. }
  432. writel(0x7, kbc->mmio + KBC_INT_0);
  433. enable_irq(kbc->irq);
  434. return 0;
  435. }
  436. static void tegra_kbc_stop(struct tegra_kbc *kbc)
  437. {
  438. unsigned long flags;
  439. u32 val;
  440. spin_lock_irqsave(&kbc->lock, flags);
  441. val = readl(kbc->mmio + KBC_CONTROL_0);
  442. val &= ~1;
  443. writel(val, kbc->mmio + KBC_CONTROL_0);
  444. spin_unlock_irqrestore(&kbc->lock, flags);
  445. disable_irq(kbc->irq);
  446. del_timer_sync(&kbc->timer);
  447. clk_disable(kbc->clk);
  448. }
  449. static int tegra_kbc_open(struct input_dev *dev)
  450. {
  451. struct tegra_kbc *kbc = input_get_drvdata(dev);
  452. return tegra_kbc_start(kbc);
  453. }
  454. static void tegra_kbc_close(struct input_dev *dev)
  455. {
  456. struct tegra_kbc *kbc = input_get_drvdata(dev);
  457. return tegra_kbc_stop(kbc);
  458. }
  459. static bool __devinit
  460. tegra_kbc_check_pin_cfg(const struct tegra_kbc_platform_data *pdata,
  461. struct device *dev, unsigned int *num_rows)
  462. {
  463. int i;
  464. *num_rows = 0;
  465. for (i = 0; i < KBC_MAX_GPIO; i++) {
  466. const struct tegra_kbc_pin_cfg *pin_cfg = &pdata->pin_cfg[i];
  467. if (pin_cfg->is_row) {
  468. if (pin_cfg->num >= KBC_MAX_ROW) {
  469. dev_err(dev,
  470. "pin_cfg[%d]: invalid row number %d\n",
  471. i, pin_cfg->num);
  472. return false;
  473. }
  474. (*num_rows)++;
  475. } else {
  476. if (pin_cfg->num >= KBC_MAX_COL) {
  477. dev_err(dev,
  478. "pin_cfg[%d]: invalid column number %d\n",
  479. i, pin_cfg->num);
  480. return false;
  481. }
  482. }
  483. }
  484. return true;
  485. }
  486. #ifdef CONFIG_OF
  487. static struct tegra_kbc_platform_data * __devinit
  488. tegra_kbc_dt_parse_pdata(struct platform_device *pdev)
  489. {
  490. struct tegra_kbc_platform_data *pdata;
  491. struct device_node *np = pdev->dev.of_node;
  492. if (!np)
  493. return NULL;
  494. pdata = kzalloc(sizeof(*pdata), GFP_KERNEL);
  495. if (!pdata)
  496. return NULL;
  497. if (!of_property_read_u32(np, "debounce-delay", &prop))
  498. pdata->debounce_cnt = prop;
  499. if (!of_property_read_u32(np, "repeat-delay", &prop))
  500. pdata->repeat_cnt = prop;
  501. if (of_find_property(np, "needs-ghost-filter", NULL))
  502. pdata->use_ghost_filter = true;
  503. if (of_find_property(np, "wakeup-source", NULL))
  504. pdata->wakeup = true;
  505. /*
  506. * All currently known keymaps with device tree support use the same
  507. * pin_cfg, so set it up here.
  508. */
  509. for (i = 0; i < KBC_MAX_ROW; i++) {
  510. pdata->pin_cfg[i].num = i;
  511. pdata->pin_cfg[i].is_row = true;
  512. }
  513. for (i = 0; i < KBC_MAX_COL; i++) {
  514. pdata->pin_cfg[KBC_MAX_ROW + i].num = i;
  515. pdata->pin_cfg[KBC_MAX_ROW + i].is_row = false;
  516. }
  517. return pdata;
  518. }
  519. #else
  520. static inline struct tegra_kbc_platform_data *tegra_kbc_dt_parse_pdata(
  521. struct platform_device *pdev)
  522. {
  523. return NULL;
  524. }
  525. #endif
  526. static int __devinit tegra_kbc_probe(struct platform_device *pdev)
  527. {
  528. const struct tegra_kbc_platform_data *pdata = pdev->dev.platform_data;
  529. const struct matrix_keymap_data *keymap_data;
  530. struct tegra_kbc *kbc;
  531. struct input_dev *input_dev;
  532. struct resource *res;
  533. int irq;
  534. int err;
  535. int num_rows = 0;
  536. unsigned int debounce_cnt;
  537. unsigned int scan_time_rows;
  538. if (!pdata)
  539. pdata = tegra_kbc_dt_parse_pdata(pdev);
  540. if (!pdata)
  541. return -EINVAL;
  542. if (!tegra_kbc_check_pin_cfg(pdata, &pdev->dev, &num_rows)) {
  543. err = -EINVAL;
  544. goto err_free_pdata;
  545. }
  546. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  547. if (!res) {
  548. dev_err(&pdev->dev, "failed to get I/O memory\n");
  549. err = -ENXIO;
  550. goto err_free_pdata;
  551. }
  552. irq = platform_get_irq(pdev, 0);
  553. if (irq < 0) {
  554. dev_err(&pdev->dev, "failed to get keyboard IRQ\n");
  555. err = -ENXIO;
  556. goto err_free_pdata;
  557. }
  558. kbc = kzalloc(sizeof(*kbc), GFP_KERNEL);
  559. input_dev = input_allocate_device();
  560. if (!kbc || !input_dev) {
  561. err = -ENOMEM;
  562. goto err_free_mem;
  563. }
  564. kbc->pdata = pdata;
  565. kbc->idev = input_dev;
  566. kbc->irq = irq;
  567. spin_lock_init(&kbc->lock);
  568. setup_timer(&kbc->timer, tegra_kbc_keypress_timer, (unsigned long)kbc);
  569. res = request_mem_region(res->start, resource_size(res), pdev->name);
  570. if (!res) {
  571. dev_err(&pdev->dev, "failed to request I/O memory\n");
  572. err = -EBUSY;
  573. goto err_free_mem;
  574. }
  575. kbc->mmio = ioremap(res->start, resource_size(res));
  576. if (!kbc->mmio) {
  577. dev_err(&pdev->dev, "failed to remap I/O memory\n");
  578. err = -ENXIO;
  579. goto err_free_mem_region;
  580. }
  581. kbc->clk = clk_get(&pdev->dev, NULL);
  582. if (IS_ERR(kbc->clk)) {
  583. dev_err(&pdev->dev, "failed to get keyboard clock\n");
  584. err = PTR_ERR(kbc->clk);
  585. goto err_iounmap;
  586. }
  587. /*
  588. * The time delay between two consecutive reads of the FIFO is
  589. * the sum of the repeat time and the time taken for scanning
  590. * the rows. There is an additional delay before the row scanning
  591. * starts. The repoll delay is computed in milliseconds.
  592. */
  593. debounce_cnt = min(pdata->debounce_cnt, KBC_MAX_DEBOUNCE_CNT);
  594. scan_time_rows = (KBC_ROW_SCAN_TIME + debounce_cnt) * num_rows;
  595. kbc->repoll_dly = KBC_ROW_SCAN_DLY + scan_time_rows + pdata->repeat_cnt;
  596. kbc->repoll_dly = DIV_ROUND_UP(kbc->repoll_dly, KBC_CYCLE_MS);
  597. input_dev->name = pdev->name;
  598. input_dev->id.bustype = BUS_HOST;
  599. input_dev->dev.parent = &pdev->dev;
  600. input_dev->open = tegra_kbc_open;
  601. input_dev->close = tegra_kbc_close;
  602. input_set_drvdata(input_dev, kbc);
  603. input_dev->evbit[0] = BIT_MASK(EV_KEY) | BIT_MASK(EV_REP);
  604. input_set_capability(input_dev, EV_MSC, MSC_SCAN);
  605. input_dev->keycode = kbc->keycode;
  606. input_dev->keycodesize = sizeof(kbc->keycode[0]);
  607. input_dev->keycodemax = KBC_MAX_KEY;
  608. if (pdata->use_fn_map)
  609. input_dev->keycodemax *= 2;
  610. kbc->use_fn_map = pdata->use_fn_map;
  611. kbc->use_ghost_filter = pdata->use_ghost_filter;
  612. keymap_data = pdata->keymap_data ?: &tegra_kbc_default_keymap_data;
  613. matrix_keypad_build_keymap(keymap_data, KBC_ROW_SHIFT,
  614. input_dev->keycode, input_dev->keybit);
  615. kbc->wakeup_key = pdata->wakeup_key;
  616. err = request_irq(kbc->irq, tegra_kbc_isr,
  617. IRQF_NO_SUSPEND | IRQF_TRIGGER_HIGH, pdev->name, kbc);
  618. if (err) {
  619. dev_err(&pdev->dev, "failed to request keyboard IRQ\n");
  620. goto err_put_clk;
  621. }
  622. disable_irq(kbc->irq);
  623. err = input_register_device(kbc->idev);
  624. if (err) {
  625. dev_err(&pdev->dev, "failed to register input device\n");
  626. goto err_free_irq;
  627. }
  628. platform_set_drvdata(pdev, kbc);
  629. device_init_wakeup(&pdev->dev, pdata->wakeup);
  630. return 0;
  631. err_free_irq:
  632. free_irq(kbc->irq, pdev);
  633. err_put_clk:
  634. clk_put(kbc->clk);
  635. err_iounmap:
  636. iounmap(kbc->mmio);
  637. err_free_mem_region:
  638. release_mem_region(res->start, resource_size(res));
  639. err_free_mem:
  640. input_free_device(input_dev);
  641. kfree(kbc);
  642. err_free_pdata:
  643. if (!pdev->dev.platform_data)
  644. kfree(pdata);
  645. return err;
  646. }
  647. static int __devexit tegra_kbc_remove(struct platform_device *pdev)
  648. {
  649. struct tegra_kbc *kbc = platform_get_drvdata(pdev);
  650. struct resource *res;
  651. platform_set_drvdata(pdev, NULL);
  652. free_irq(kbc->irq, pdev);
  653. clk_put(kbc->clk);
  654. input_unregister_device(kbc->idev);
  655. iounmap(kbc->mmio);
  656. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  657. release_mem_region(res->start, resource_size(res));
  658. /*
  659. * If we do not have platform data attached to the device we
  660. * allocated it ourselves and thus need to free it.
  661. */
  662. if (!pdev->dev.platform_data)
  663. kfree(kbc->pdata);
  664. kfree(kbc);
  665. return 0;
  666. }
  667. #ifdef CONFIG_PM_SLEEP
  668. static int tegra_kbc_suspend(struct device *dev)
  669. {
  670. struct platform_device *pdev = to_platform_device(dev);
  671. struct tegra_kbc *kbc = platform_get_drvdata(pdev);
  672. mutex_lock(&kbc->idev->mutex);
  673. if (device_may_wakeup(&pdev->dev)) {
  674. disable_irq(kbc->irq);
  675. del_timer_sync(&kbc->timer);
  676. tegra_kbc_set_fifo_interrupt(kbc, false);
  677. /* Forcefully clear the interrupt status */
  678. writel(0x7, kbc->mmio + KBC_INT_0);
  679. /*
  680. * Store the previous resident time of continuous polling mode.
  681. * Force the keyboard into interrupt mode.
  682. */
  683. kbc->cp_to_wkup_dly = readl(kbc->mmio + KBC_TO_CNT_0);
  684. writel(0, kbc->mmio + KBC_TO_CNT_0);
  685. tegra_kbc_setup_wakekeys(kbc, true);
  686. msleep(30);
  687. kbc->keypress_caused_wake = false;
  688. enable_irq(kbc->irq);
  689. enable_irq_wake(kbc->irq);
  690. } else {
  691. if (kbc->idev->users)
  692. tegra_kbc_stop(kbc);
  693. }
  694. mutex_unlock(&kbc->idev->mutex);
  695. return 0;
  696. }
  697. static int tegra_kbc_resume(struct device *dev)
  698. {
  699. struct platform_device *pdev = to_platform_device(dev);
  700. struct tegra_kbc *kbc = platform_get_drvdata(pdev);
  701. int err = 0;
  702. mutex_lock(&kbc->idev->mutex);
  703. if (device_may_wakeup(&pdev->dev)) {
  704. disable_irq_wake(kbc->irq);
  705. tegra_kbc_setup_wakekeys(kbc, false);
  706. /* Restore the resident time of continuous polling mode. */
  707. writel(kbc->cp_to_wkup_dly, kbc->mmio + KBC_TO_CNT_0);
  708. tegra_kbc_set_fifo_interrupt(kbc, true);
  709. if (kbc->keypress_caused_wake && kbc->wakeup_key) {
  710. /*
  711. * We can't report events directly from the ISR
  712. * because timekeeping is stopped when processing
  713. * wakeup request and we get a nasty warning when
  714. * we try to call do_gettimeofday() in evdev
  715. * handler.
  716. */
  717. input_report_key(kbc->idev, kbc->wakeup_key, 1);
  718. input_sync(kbc->idev);
  719. input_report_key(kbc->idev, kbc->wakeup_key, 0);
  720. input_sync(kbc->idev);
  721. }
  722. } else {
  723. if (kbc->idev->users)
  724. err = tegra_kbc_start(kbc);
  725. }
  726. mutex_unlock(&kbc->idev->mutex);
  727. return err;
  728. }
  729. #endif
  730. static SIMPLE_DEV_PM_OPS(tegra_kbc_pm_ops, tegra_kbc_suspend, tegra_kbc_resume);
  731. static const struct of_device_id tegra_kbc_of_match[] = {
  732. { .compatible = "nvidia,tegra20-kbc", },
  733. { },
  734. };
  735. MODULE_DEVICE_TABLE(of, tegra_kbc_of_match);
  736. static struct platform_driver tegra_kbc_driver = {
  737. .probe = tegra_kbc_probe,
  738. .remove = __devexit_p(tegra_kbc_remove),
  739. .driver = {
  740. .name = "tegra-kbc",
  741. .owner = THIS_MODULE,
  742. .pm = &tegra_kbc_pm_ops,
  743. .of_match_table = tegra_kbc_of_match,
  744. },
  745. };
  746. module_platform_driver(tegra_kbc_driver);
  747. MODULE_LICENSE("GPL");
  748. MODULE_AUTHOR("Rakesh Iyer <riyer@nvidia.com>");
  749. MODULE_DESCRIPTION("Tegra matrix keyboard controller driver");
  750. MODULE_ALIAS("platform:tegra-kbc");