radeon_gem.c 13 KB

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  1. /*
  2. * Copyright 2008 Advanced Micro Devices, Inc.
  3. * Copyright 2008 Red Hat Inc.
  4. * Copyright 2009 Jerome Glisse.
  5. *
  6. * Permission is hereby granted, free of charge, to any person obtaining a
  7. * copy of this software and associated documentation files (the "Software"),
  8. * to deal in the Software without restriction, including without limitation
  9. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  10. * and/or sell copies of the Software, and to permit persons to whom the
  11. * Software is furnished to do so, subject to the following conditions:
  12. *
  13. * The above copyright notice and this permission notice shall be included in
  14. * all copies or substantial portions of the Software.
  15. *
  16. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  19. * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  20. * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  21. * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  22. * OTHER DEALINGS IN THE SOFTWARE.
  23. *
  24. * Authors: Dave Airlie
  25. * Alex Deucher
  26. * Jerome Glisse
  27. */
  28. #include "drmP.h"
  29. #include "drm.h"
  30. #include "radeon_drm.h"
  31. #include "radeon.h"
  32. int radeon_gem_object_init(struct drm_gem_object *obj)
  33. {
  34. BUG();
  35. return 0;
  36. }
  37. void radeon_gem_object_free(struct drm_gem_object *gobj)
  38. {
  39. struct radeon_bo *robj = gem_to_radeon_bo(gobj);
  40. if (robj) {
  41. radeon_bo_unref(&robj);
  42. }
  43. }
  44. int radeon_gem_object_create(struct radeon_device *rdev, int size,
  45. int alignment, int initial_domain,
  46. bool discardable, bool kernel,
  47. struct drm_gem_object **obj)
  48. {
  49. struct radeon_bo *robj;
  50. int r;
  51. *obj = NULL;
  52. /* At least align on page size */
  53. if (alignment < PAGE_SIZE) {
  54. alignment = PAGE_SIZE;
  55. }
  56. r = radeon_bo_create(rdev, size, alignment, kernel, initial_domain, &robj);
  57. if (r) {
  58. if (r != -ERESTARTSYS)
  59. DRM_ERROR("Failed to allocate GEM object (%d, %d, %u, %d)\n",
  60. size, initial_domain, alignment, r);
  61. return r;
  62. }
  63. *obj = &robj->gem_base;
  64. mutex_lock(&rdev->gem.mutex);
  65. list_add_tail(&robj->list, &rdev->gem.objects);
  66. mutex_unlock(&rdev->gem.mutex);
  67. return 0;
  68. }
  69. int radeon_gem_object_pin(struct drm_gem_object *obj, uint32_t pin_domain,
  70. uint64_t *gpu_addr)
  71. {
  72. struct radeon_bo *robj = gem_to_radeon_bo(obj);
  73. int r;
  74. r = radeon_bo_reserve(robj, false);
  75. if (unlikely(r != 0))
  76. return r;
  77. r = radeon_bo_pin(robj, pin_domain, gpu_addr);
  78. radeon_bo_unreserve(robj);
  79. return r;
  80. }
  81. void radeon_gem_object_unpin(struct drm_gem_object *obj)
  82. {
  83. struct radeon_bo *robj = gem_to_radeon_bo(obj);
  84. int r;
  85. r = radeon_bo_reserve(robj, false);
  86. if (likely(r == 0)) {
  87. radeon_bo_unpin(robj);
  88. radeon_bo_unreserve(robj);
  89. }
  90. }
  91. int radeon_gem_set_domain(struct drm_gem_object *gobj,
  92. uint32_t rdomain, uint32_t wdomain)
  93. {
  94. struct radeon_bo *robj;
  95. uint32_t domain;
  96. int r;
  97. /* FIXME: reeimplement */
  98. robj = gem_to_radeon_bo(gobj);
  99. /* work out where to validate the buffer to */
  100. domain = wdomain;
  101. if (!domain) {
  102. domain = rdomain;
  103. }
  104. if (!domain) {
  105. /* Do nothings */
  106. printk(KERN_WARNING "Set domain withou domain !\n");
  107. return 0;
  108. }
  109. if (domain == RADEON_GEM_DOMAIN_CPU) {
  110. /* Asking for cpu access wait for object idle */
  111. r = radeon_bo_wait(robj, NULL, false);
  112. if (r) {
  113. printk(KERN_ERR "Failed to wait for object !\n");
  114. return r;
  115. }
  116. }
  117. return 0;
  118. }
  119. int radeon_gem_init(struct radeon_device *rdev)
  120. {
  121. INIT_LIST_HEAD(&rdev->gem.objects);
  122. return 0;
  123. }
  124. void radeon_gem_fini(struct radeon_device *rdev)
  125. {
  126. radeon_bo_force_delete(rdev);
  127. }
  128. /*
  129. * Call from drm_gem_handle_create which appear in both new and open ioctl
  130. * case.
  131. */
  132. int radeon_gem_object_open(struct drm_gem_object *obj, struct drm_file *file_priv)
  133. {
  134. return 0;
  135. }
  136. void radeon_gem_object_close(struct drm_gem_object *obj,
  137. struct drm_file *file_priv)
  138. {
  139. struct radeon_bo *rbo = gem_to_radeon_bo(obj);
  140. struct radeon_device *rdev = rbo->rdev;
  141. struct radeon_fpriv *fpriv = file_priv->driver_priv;
  142. struct radeon_vm *vm = &fpriv->vm;
  143. struct radeon_bo_va *bo_va, *tmp;
  144. if (rdev->family < CHIP_CAYMAN) {
  145. return;
  146. }
  147. if (radeon_bo_reserve(rbo, false)) {
  148. return;
  149. }
  150. list_for_each_entry_safe(bo_va, tmp, &rbo->va, bo_list) {
  151. if (bo_va->vm == vm) {
  152. /* remove from this vm address space */
  153. mutex_lock(&vm->mutex);
  154. list_del(&bo_va->vm_list);
  155. mutex_unlock(&vm->mutex);
  156. list_del(&bo_va->bo_list);
  157. kfree(bo_va);
  158. }
  159. }
  160. radeon_bo_unreserve(rbo);
  161. }
  162. /*
  163. * GEM ioctls.
  164. */
  165. int radeon_gem_info_ioctl(struct drm_device *dev, void *data,
  166. struct drm_file *filp)
  167. {
  168. struct radeon_device *rdev = dev->dev_private;
  169. struct drm_radeon_gem_info *args = data;
  170. struct ttm_mem_type_manager *man;
  171. unsigned i;
  172. man = &rdev->mman.bdev.man[TTM_PL_VRAM];
  173. args->vram_size = rdev->mc.real_vram_size;
  174. args->vram_visible = (u64)man->size << PAGE_SHIFT;
  175. if (rdev->stollen_vga_memory)
  176. args->vram_visible -= radeon_bo_size(rdev->stollen_vga_memory);
  177. args->vram_visible -= radeon_fbdev_total_size(rdev);
  178. args->gart_size = rdev->mc.gtt_size - 4096 - RADEON_IB_POOL_SIZE*64*1024;
  179. for(i = 0; i < RADEON_NUM_RINGS; ++i)
  180. args->gart_size -= rdev->ring[i].ring_size;
  181. return 0;
  182. }
  183. int radeon_gem_pread_ioctl(struct drm_device *dev, void *data,
  184. struct drm_file *filp)
  185. {
  186. /* TODO: implement */
  187. DRM_ERROR("unimplemented %s\n", __func__);
  188. return -ENOSYS;
  189. }
  190. int radeon_gem_pwrite_ioctl(struct drm_device *dev, void *data,
  191. struct drm_file *filp)
  192. {
  193. /* TODO: implement */
  194. DRM_ERROR("unimplemented %s\n", __func__);
  195. return -ENOSYS;
  196. }
  197. int radeon_gem_create_ioctl(struct drm_device *dev, void *data,
  198. struct drm_file *filp)
  199. {
  200. struct radeon_device *rdev = dev->dev_private;
  201. struct drm_radeon_gem_create *args = data;
  202. struct drm_gem_object *gobj;
  203. uint32_t handle;
  204. int r;
  205. /* create a gem object to contain this object in */
  206. args->size = roundup(args->size, PAGE_SIZE);
  207. r = radeon_gem_object_create(rdev, args->size, args->alignment,
  208. args->initial_domain, false,
  209. false, &gobj);
  210. if (r) {
  211. return r;
  212. }
  213. r = drm_gem_handle_create(filp, gobj, &handle);
  214. /* drop reference from allocate - handle holds it now */
  215. drm_gem_object_unreference_unlocked(gobj);
  216. if (r) {
  217. return r;
  218. }
  219. args->handle = handle;
  220. return 0;
  221. }
  222. int radeon_gem_set_domain_ioctl(struct drm_device *dev, void *data,
  223. struct drm_file *filp)
  224. {
  225. /* transition the BO to a domain -
  226. * just validate the BO into a certain domain */
  227. struct drm_radeon_gem_set_domain *args = data;
  228. struct drm_gem_object *gobj;
  229. struct radeon_bo *robj;
  230. int r;
  231. /* for now if someone requests domain CPU -
  232. * just make sure the buffer is finished with */
  233. /* just do a BO wait for now */
  234. gobj = drm_gem_object_lookup(dev, filp, args->handle);
  235. if (gobj == NULL) {
  236. return -ENOENT;
  237. }
  238. robj = gem_to_radeon_bo(gobj);
  239. r = radeon_gem_set_domain(gobj, args->read_domains, args->write_domain);
  240. drm_gem_object_unreference_unlocked(gobj);
  241. return r;
  242. }
  243. int radeon_mode_dumb_mmap(struct drm_file *filp,
  244. struct drm_device *dev,
  245. uint32_t handle, uint64_t *offset_p)
  246. {
  247. struct drm_gem_object *gobj;
  248. struct radeon_bo *robj;
  249. gobj = drm_gem_object_lookup(dev, filp, handle);
  250. if (gobj == NULL) {
  251. return -ENOENT;
  252. }
  253. robj = gem_to_radeon_bo(gobj);
  254. *offset_p = radeon_bo_mmap_offset(robj);
  255. drm_gem_object_unreference_unlocked(gobj);
  256. return 0;
  257. }
  258. int radeon_gem_mmap_ioctl(struct drm_device *dev, void *data,
  259. struct drm_file *filp)
  260. {
  261. struct drm_radeon_gem_mmap *args = data;
  262. return radeon_mode_dumb_mmap(filp, dev, args->handle, &args->addr_ptr);
  263. }
  264. int radeon_gem_busy_ioctl(struct drm_device *dev, void *data,
  265. struct drm_file *filp)
  266. {
  267. struct drm_radeon_gem_busy *args = data;
  268. struct drm_gem_object *gobj;
  269. struct radeon_bo *robj;
  270. int r;
  271. uint32_t cur_placement = 0;
  272. gobj = drm_gem_object_lookup(dev, filp, args->handle);
  273. if (gobj == NULL) {
  274. return -ENOENT;
  275. }
  276. robj = gem_to_radeon_bo(gobj);
  277. r = radeon_bo_wait(robj, &cur_placement, true);
  278. switch (cur_placement) {
  279. case TTM_PL_VRAM:
  280. args->domain = RADEON_GEM_DOMAIN_VRAM;
  281. break;
  282. case TTM_PL_TT:
  283. args->domain = RADEON_GEM_DOMAIN_GTT;
  284. break;
  285. case TTM_PL_SYSTEM:
  286. args->domain = RADEON_GEM_DOMAIN_CPU;
  287. default:
  288. break;
  289. }
  290. drm_gem_object_unreference_unlocked(gobj);
  291. return r;
  292. }
  293. int radeon_gem_wait_idle_ioctl(struct drm_device *dev, void *data,
  294. struct drm_file *filp)
  295. {
  296. struct drm_radeon_gem_wait_idle *args = data;
  297. struct drm_gem_object *gobj;
  298. struct radeon_bo *robj;
  299. int r;
  300. gobj = drm_gem_object_lookup(dev, filp, args->handle);
  301. if (gobj == NULL) {
  302. return -ENOENT;
  303. }
  304. robj = gem_to_radeon_bo(gobj);
  305. r = radeon_bo_wait(robj, NULL, false);
  306. /* callback hw specific functions if any */
  307. if (robj->rdev->asic->ioctl_wait_idle)
  308. robj->rdev->asic->ioctl_wait_idle(robj->rdev, robj);
  309. drm_gem_object_unreference_unlocked(gobj);
  310. return r;
  311. }
  312. int radeon_gem_set_tiling_ioctl(struct drm_device *dev, void *data,
  313. struct drm_file *filp)
  314. {
  315. struct drm_radeon_gem_set_tiling *args = data;
  316. struct drm_gem_object *gobj;
  317. struct radeon_bo *robj;
  318. int r = 0;
  319. DRM_DEBUG("%d \n", args->handle);
  320. gobj = drm_gem_object_lookup(dev, filp, args->handle);
  321. if (gobj == NULL)
  322. return -ENOENT;
  323. robj = gem_to_radeon_bo(gobj);
  324. r = radeon_bo_set_tiling_flags(robj, args->tiling_flags, args->pitch);
  325. drm_gem_object_unreference_unlocked(gobj);
  326. return r;
  327. }
  328. int radeon_gem_get_tiling_ioctl(struct drm_device *dev, void *data,
  329. struct drm_file *filp)
  330. {
  331. struct drm_radeon_gem_get_tiling *args = data;
  332. struct drm_gem_object *gobj;
  333. struct radeon_bo *rbo;
  334. int r = 0;
  335. DRM_DEBUG("\n");
  336. gobj = drm_gem_object_lookup(dev, filp, args->handle);
  337. if (gobj == NULL)
  338. return -ENOENT;
  339. rbo = gem_to_radeon_bo(gobj);
  340. r = radeon_bo_reserve(rbo, false);
  341. if (unlikely(r != 0))
  342. goto out;
  343. radeon_bo_get_tiling_flags(rbo, &args->tiling_flags, &args->pitch);
  344. radeon_bo_unreserve(rbo);
  345. out:
  346. drm_gem_object_unreference_unlocked(gobj);
  347. return r;
  348. }
  349. int radeon_gem_va_ioctl(struct drm_device *dev, void *data,
  350. struct drm_file *filp)
  351. {
  352. struct drm_radeon_gem_va *args = data;
  353. struct drm_gem_object *gobj;
  354. struct radeon_device *rdev = dev->dev_private;
  355. struct radeon_fpriv *fpriv = filp->driver_priv;
  356. struct radeon_bo *rbo;
  357. struct radeon_bo_va *bo_va;
  358. u32 invalid_flags;
  359. int r = 0;
  360. if (!rdev->vm_manager.enabled) {
  361. args->operation = RADEON_VA_RESULT_ERROR;
  362. return -ENOTTY;
  363. }
  364. /* !! DONT REMOVE !!
  365. * We don't support vm_id yet, to be sure we don't have have broken
  366. * userspace, reject anyone trying to use non 0 value thus moving
  367. * forward we can use those fields without breaking existant userspace
  368. */
  369. if (args->vm_id) {
  370. args->operation = RADEON_VA_RESULT_ERROR;
  371. return -EINVAL;
  372. }
  373. if (args->offset < RADEON_VA_RESERVED_SIZE) {
  374. dev_err(&dev->pdev->dev,
  375. "offset 0x%lX is in reserved area 0x%X\n",
  376. (unsigned long)args->offset,
  377. RADEON_VA_RESERVED_SIZE);
  378. args->operation = RADEON_VA_RESULT_ERROR;
  379. return -EINVAL;
  380. }
  381. /* don't remove, we need to enforce userspace to set the snooped flag
  382. * otherwise we will endup with broken userspace and we won't be able
  383. * to enable this feature without adding new interface
  384. */
  385. invalid_flags = RADEON_VM_PAGE_VALID | RADEON_VM_PAGE_SYSTEM;
  386. if ((args->flags & invalid_flags)) {
  387. dev_err(&dev->pdev->dev, "invalid flags 0x%08X vs 0x%08X\n",
  388. args->flags, invalid_flags);
  389. args->operation = RADEON_VA_RESULT_ERROR;
  390. return -EINVAL;
  391. }
  392. if (!(args->flags & RADEON_VM_PAGE_SNOOPED)) {
  393. dev_err(&dev->pdev->dev, "only supported snooped mapping for now\n");
  394. args->operation = RADEON_VA_RESULT_ERROR;
  395. return -EINVAL;
  396. }
  397. switch (args->operation) {
  398. case RADEON_VA_MAP:
  399. case RADEON_VA_UNMAP:
  400. break;
  401. default:
  402. dev_err(&dev->pdev->dev, "unsupported operation %d\n",
  403. args->operation);
  404. args->operation = RADEON_VA_RESULT_ERROR;
  405. return -EINVAL;
  406. }
  407. gobj = drm_gem_object_lookup(dev, filp, args->handle);
  408. if (gobj == NULL) {
  409. args->operation = RADEON_VA_RESULT_ERROR;
  410. return -ENOENT;
  411. }
  412. rbo = gem_to_radeon_bo(gobj);
  413. r = radeon_bo_reserve(rbo, false);
  414. if (r) {
  415. args->operation = RADEON_VA_RESULT_ERROR;
  416. drm_gem_object_unreference_unlocked(gobj);
  417. return r;
  418. }
  419. switch (args->operation) {
  420. case RADEON_VA_MAP:
  421. bo_va = radeon_bo_va(rbo, &fpriv->vm);
  422. if (bo_va) {
  423. args->operation = RADEON_VA_RESULT_VA_EXIST;
  424. args->offset = bo_va->soffset;
  425. goto out;
  426. }
  427. r = radeon_vm_bo_add(rdev, &fpriv->vm, rbo,
  428. args->offset, args->flags);
  429. break;
  430. case RADEON_VA_UNMAP:
  431. r = radeon_vm_bo_rmv(rdev, &fpriv->vm, rbo);
  432. break;
  433. default:
  434. break;
  435. }
  436. args->operation = RADEON_VA_RESULT_OK;
  437. if (r) {
  438. args->operation = RADEON_VA_RESULT_ERROR;
  439. }
  440. out:
  441. radeon_bo_unreserve(rbo);
  442. drm_gem_object_unreference_unlocked(gobj);
  443. return r;
  444. }
  445. int radeon_mode_dumb_create(struct drm_file *file_priv,
  446. struct drm_device *dev,
  447. struct drm_mode_create_dumb *args)
  448. {
  449. struct radeon_device *rdev = dev->dev_private;
  450. struct drm_gem_object *gobj;
  451. uint32_t handle;
  452. int r;
  453. args->pitch = radeon_align_pitch(rdev, args->width, args->bpp, 0) * ((args->bpp + 1) / 8);
  454. args->size = args->pitch * args->height;
  455. args->size = ALIGN(args->size, PAGE_SIZE);
  456. r = radeon_gem_object_create(rdev, args->size, 0,
  457. RADEON_GEM_DOMAIN_VRAM,
  458. false, ttm_bo_type_device,
  459. &gobj);
  460. if (r)
  461. return -ENOMEM;
  462. r = drm_gem_handle_create(file_priv, gobj, &handle);
  463. /* drop reference from allocate - handle holds it now */
  464. drm_gem_object_unreference_unlocked(gobj);
  465. if (r) {
  466. return r;
  467. }
  468. args->handle = handle;
  469. return 0;
  470. }
  471. int radeon_mode_dumb_destroy(struct drm_file *file_priv,
  472. struct drm_device *dev,
  473. uint32_t handle)
  474. {
  475. return drm_gem_handle_delete(file_priv, handle);
  476. }