nv50_sor.c 8.9 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337
  1. /*
  2. * Copyright (C) 2008 Maarten Maathuis.
  3. * All Rights Reserved.
  4. *
  5. * Permission is hereby granted, free of charge, to any person obtaining
  6. * a copy of this software and associated documentation files (the
  7. * "Software"), to deal in the Software without restriction, including
  8. * without limitation the rights to use, copy, modify, merge, publish,
  9. * distribute, sublicense, and/or sell copies of the Software, and to
  10. * permit persons to whom the Software is furnished to do so, subject to
  11. * the following conditions:
  12. *
  13. * The above copyright notice and this permission notice (including the
  14. * next paragraph) shall be included in all copies or substantial
  15. * portions of the Software.
  16. *
  17. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  18. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  19. * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
  20. * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
  21. * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
  22. * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
  23. * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  24. *
  25. */
  26. #include "drmP.h"
  27. #include "drm_crtc_helper.h"
  28. #define NOUVEAU_DMA_DEBUG (nouveau_reg_debug & NOUVEAU_REG_DEBUG_EVO)
  29. #include "nouveau_reg.h"
  30. #include "nouveau_drv.h"
  31. #include "nouveau_dma.h"
  32. #include "nouveau_encoder.h"
  33. #include "nouveau_connector.h"
  34. #include "nouveau_crtc.h"
  35. #include "nv50_display.h"
  36. static void
  37. nv50_sor_disconnect(struct drm_encoder *encoder)
  38. {
  39. struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder);
  40. struct drm_device *dev = encoder->dev;
  41. struct nouveau_channel *evo = nv50_display(dev)->master;
  42. int ret;
  43. if (!nv_encoder->crtc)
  44. return;
  45. nv50_crtc_blank(nouveau_crtc(nv_encoder->crtc), true);
  46. NV_DEBUG_KMS(dev, "Disconnecting SOR %d\n", nv_encoder->or);
  47. ret = RING_SPACE(evo, 4);
  48. if (ret) {
  49. NV_ERROR(dev, "no space while disconnecting SOR\n");
  50. return;
  51. }
  52. BEGIN_RING(evo, 0, NV50_EVO_SOR(nv_encoder->or, MODE_CTRL), 1);
  53. OUT_RING (evo, 0);
  54. BEGIN_RING(evo, 0, NV50_EVO_UPDATE, 1);
  55. OUT_RING (evo, 0);
  56. nouveau_hdmi_mode_set(encoder, NULL);
  57. nv_encoder->crtc = NULL;
  58. nv_encoder->last_dpms = DRM_MODE_DPMS_OFF;
  59. }
  60. static void
  61. nv50_sor_dpms(struct drm_encoder *encoder, int mode)
  62. {
  63. struct drm_device *dev = encoder->dev;
  64. struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder);
  65. struct drm_encoder *enc;
  66. uint32_t val;
  67. int or = nv_encoder->or;
  68. NV_DEBUG_KMS(dev, "or %d type %d mode %d\n", or, nv_encoder->dcb->type, mode);
  69. nv_encoder->last_dpms = mode;
  70. list_for_each_entry(enc, &dev->mode_config.encoder_list, head) {
  71. struct nouveau_encoder *nvenc = nouveau_encoder(enc);
  72. if (nvenc == nv_encoder ||
  73. (nvenc->dcb->type != OUTPUT_TMDS &&
  74. nvenc->dcb->type != OUTPUT_LVDS &&
  75. nvenc->dcb->type != OUTPUT_DP) ||
  76. nvenc->dcb->or != nv_encoder->dcb->or)
  77. continue;
  78. if (nvenc->last_dpms == DRM_MODE_DPMS_ON)
  79. return;
  80. }
  81. /* wait for it to be done */
  82. if (!nv_wait(dev, NV50_PDISPLAY_SOR_DPMS_CTRL(or),
  83. NV50_PDISPLAY_SOR_DPMS_CTRL_PENDING, 0)) {
  84. NV_ERROR(dev, "timeout: SOR_DPMS_CTRL_PENDING(%d) == 0\n", or);
  85. NV_ERROR(dev, "SOR_DPMS_CTRL(%d) = 0x%08x\n", or,
  86. nv_rd32(dev, NV50_PDISPLAY_SOR_DPMS_CTRL(or)));
  87. }
  88. val = nv_rd32(dev, NV50_PDISPLAY_SOR_DPMS_CTRL(or));
  89. if (mode == DRM_MODE_DPMS_ON)
  90. val |= NV50_PDISPLAY_SOR_DPMS_CTRL_ON;
  91. else
  92. val &= ~NV50_PDISPLAY_SOR_DPMS_CTRL_ON;
  93. nv_wr32(dev, NV50_PDISPLAY_SOR_DPMS_CTRL(or), val |
  94. NV50_PDISPLAY_SOR_DPMS_CTRL_PENDING);
  95. if (!nv_wait(dev, NV50_PDISPLAY_SOR_DPMS_STATE(or),
  96. NV50_PDISPLAY_SOR_DPMS_STATE_WAIT, 0)) {
  97. NV_ERROR(dev, "timeout: SOR_DPMS_STATE_WAIT(%d) == 0\n", or);
  98. NV_ERROR(dev, "SOR_DPMS_STATE(%d) = 0x%08x\n", or,
  99. nv_rd32(dev, NV50_PDISPLAY_SOR_DPMS_STATE(or)));
  100. }
  101. if (nv_encoder->dcb->type == OUTPUT_DP) {
  102. struct nouveau_i2c_chan *auxch;
  103. auxch = nouveau_i2c_find(dev, nv_encoder->dcb->i2c_index);
  104. if (!auxch)
  105. return;
  106. if (mode == DRM_MODE_DPMS_ON) {
  107. u8 status = DP_SET_POWER_D0;
  108. nouveau_dp_auxch(auxch, 8, DP_SET_POWER, &status, 1);
  109. nouveau_dp_link_train(encoder, nv_encoder->dp.datarate);
  110. } else {
  111. u8 status = DP_SET_POWER_D3;
  112. nouveau_dp_auxch(auxch, 8, DP_SET_POWER, &status, 1);
  113. }
  114. }
  115. }
  116. static void
  117. nv50_sor_save(struct drm_encoder *encoder)
  118. {
  119. NV_ERROR(encoder->dev, "!!\n");
  120. }
  121. static void
  122. nv50_sor_restore(struct drm_encoder *encoder)
  123. {
  124. NV_ERROR(encoder->dev, "!!\n");
  125. }
  126. static bool
  127. nv50_sor_mode_fixup(struct drm_encoder *encoder, struct drm_display_mode *mode,
  128. struct drm_display_mode *adjusted_mode)
  129. {
  130. struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder);
  131. struct nouveau_connector *connector;
  132. NV_DEBUG_KMS(encoder->dev, "or %d\n", nv_encoder->or);
  133. connector = nouveau_encoder_connector_get(nv_encoder);
  134. if (!connector) {
  135. NV_ERROR(encoder->dev, "Encoder has no connector\n");
  136. return false;
  137. }
  138. if (connector->scaling_mode != DRM_MODE_SCALE_NONE &&
  139. connector->native_mode) {
  140. int id = adjusted_mode->base.id;
  141. *adjusted_mode = *connector->native_mode;
  142. adjusted_mode->base.id = id;
  143. }
  144. return true;
  145. }
  146. static void
  147. nv50_sor_prepare(struct drm_encoder *encoder)
  148. {
  149. struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder);
  150. nv50_sor_disconnect(encoder);
  151. if (nv_encoder->dcb->type == OUTPUT_DP) {
  152. /* avoid race between link training and supervisor intr */
  153. nv50_display_sync(encoder->dev);
  154. }
  155. }
  156. static void
  157. nv50_sor_commit(struct drm_encoder *encoder)
  158. {
  159. }
  160. static void
  161. nv50_sor_mode_set(struct drm_encoder *encoder, struct drm_display_mode *umode,
  162. struct drm_display_mode *mode)
  163. {
  164. struct nouveau_channel *evo = nv50_display(encoder->dev)->master;
  165. struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder);
  166. struct drm_device *dev = encoder->dev;
  167. struct nouveau_crtc *crtc = nouveau_crtc(encoder->crtc);
  168. struct nouveau_connector *nv_connector;
  169. uint32_t mode_ctl = 0;
  170. int ret;
  171. NV_DEBUG_KMS(dev, "or %d type %d -> crtc %d\n",
  172. nv_encoder->or, nv_encoder->dcb->type, crtc->index);
  173. nv_encoder->crtc = encoder->crtc;
  174. switch (nv_encoder->dcb->type) {
  175. case OUTPUT_TMDS:
  176. if (nv_encoder->dcb->sorconf.link & 1) {
  177. if (mode->clock < 165000)
  178. mode_ctl = 0x0100;
  179. else
  180. mode_ctl = 0x0500;
  181. } else
  182. mode_ctl = 0x0200;
  183. nouveau_hdmi_mode_set(encoder, mode);
  184. break;
  185. case OUTPUT_DP:
  186. nv_connector = nouveau_encoder_connector_get(nv_encoder);
  187. if (nv_connector && nv_connector->base.display_info.bpc == 6) {
  188. nv_encoder->dp.datarate = mode->clock * 18 / 8;
  189. mode_ctl |= 0x00020000;
  190. } else {
  191. nv_encoder->dp.datarate = mode->clock * 24 / 8;
  192. mode_ctl |= 0x00050000;
  193. }
  194. if (nv_encoder->dcb->sorconf.link & 1)
  195. mode_ctl |= 0x00000800;
  196. else
  197. mode_ctl |= 0x00000900;
  198. break;
  199. default:
  200. break;
  201. }
  202. if (crtc->index == 1)
  203. mode_ctl |= NV50_EVO_SOR_MODE_CTRL_CRTC1;
  204. else
  205. mode_ctl |= NV50_EVO_SOR_MODE_CTRL_CRTC0;
  206. if (mode->flags & DRM_MODE_FLAG_NHSYNC)
  207. mode_ctl |= NV50_EVO_SOR_MODE_CTRL_NHSYNC;
  208. if (mode->flags & DRM_MODE_FLAG_NVSYNC)
  209. mode_ctl |= NV50_EVO_SOR_MODE_CTRL_NVSYNC;
  210. nv50_sor_dpms(encoder, DRM_MODE_DPMS_ON);
  211. ret = RING_SPACE(evo, 2);
  212. if (ret) {
  213. NV_ERROR(dev, "no space while connecting SOR\n");
  214. nv_encoder->crtc = NULL;
  215. return;
  216. }
  217. BEGIN_RING(evo, 0, NV50_EVO_SOR(nv_encoder->or, MODE_CTRL), 1);
  218. OUT_RING(evo, mode_ctl);
  219. }
  220. static struct drm_crtc *
  221. nv50_sor_crtc_get(struct drm_encoder *encoder)
  222. {
  223. return nouveau_encoder(encoder)->crtc;
  224. }
  225. static const struct drm_encoder_helper_funcs nv50_sor_helper_funcs = {
  226. .dpms = nv50_sor_dpms,
  227. .save = nv50_sor_save,
  228. .restore = nv50_sor_restore,
  229. .mode_fixup = nv50_sor_mode_fixup,
  230. .prepare = nv50_sor_prepare,
  231. .commit = nv50_sor_commit,
  232. .mode_set = nv50_sor_mode_set,
  233. .get_crtc = nv50_sor_crtc_get,
  234. .detect = NULL,
  235. .disable = nv50_sor_disconnect
  236. };
  237. static void
  238. nv50_sor_destroy(struct drm_encoder *encoder)
  239. {
  240. struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder);
  241. if (!encoder)
  242. return;
  243. NV_DEBUG_KMS(encoder->dev, "\n");
  244. drm_encoder_cleanup(encoder);
  245. kfree(nv_encoder);
  246. }
  247. static const struct drm_encoder_funcs nv50_sor_encoder_funcs = {
  248. .destroy = nv50_sor_destroy,
  249. };
  250. int
  251. nv50_sor_create(struct drm_connector *connector, struct dcb_entry *entry)
  252. {
  253. struct nouveau_encoder *nv_encoder = NULL;
  254. struct drm_device *dev = connector->dev;
  255. struct drm_encoder *encoder;
  256. int type;
  257. NV_DEBUG_KMS(dev, "\n");
  258. switch (entry->type) {
  259. case OUTPUT_TMDS:
  260. case OUTPUT_DP:
  261. type = DRM_MODE_ENCODER_TMDS;
  262. break;
  263. case OUTPUT_LVDS:
  264. type = DRM_MODE_ENCODER_LVDS;
  265. break;
  266. default:
  267. return -EINVAL;
  268. }
  269. nv_encoder = kzalloc(sizeof(*nv_encoder), GFP_KERNEL);
  270. if (!nv_encoder)
  271. return -ENOMEM;
  272. encoder = to_drm_encoder(nv_encoder);
  273. nv_encoder->dcb = entry;
  274. nv_encoder->or = ffs(entry->or) - 1;
  275. nv_encoder->last_dpms = DRM_MODE_DPMS_OFF;
  276. drm_encoder_init(dev, encoder, &nv50_sor_encoder_funcs, type);
  277. drm_encoder_helper_add(encoder, &nv50_sor_helper_funcs);
  278. encoder->possible_crtcs = entry->heads;
  279. encoder->possible_clones = 0;
  280. drm_mode_connector_attach_encoder(connector, encoder);
  281. return 0;
  282. }