time.c 46 KB

1234567891011121314151617181920212223242526272829303132333435363738394041424344454647484950515253545556575859606162636465666768697071727374757677787980818283848586878889909192939495969798991001011021031041051061071081091101111121131141151161171181191201211221231241251261271281291301311321331341351361371381391401411421431441451461471481491501511521531541551561571581591601611621631641651661671681691701711721731741751761771781791801811821831841851861871881891901911921931941951961971981992002012022032042052062072082092102112122132142152162172182192202212222232242252262272282292302312322332342352362372382392402412422432442452462472482492502512522532542552562572582592602612622632642652662672682692702712722732742752762772782792802812822832842852862872882892902912922932942952962972982993003013023033043053063073083093103113123133143153163173183193203213223233243253263273283293303313323333343353363373383393403413423433443453463473483493503513523533543553563573583593603613623633643653663673683693703713723733743753763773783793803813823833843853863873883893903913923933943953963973983994004014024034044054064074084094104114124134144154164174184194204214224234244254264274284294304314324334344354364374384394404414424434444454464474484494504514524534544554564574584594604614624634644654664674684694704714724734744754764774784794804814824834844854864874884894904914924934944954964974984995005015025035045055065075085095105115125135145155165175185195205215225235245255265275285295305315325335345355365375385395405415425435445455465475485495505515525535545555565575585595605615625635645655665675685695705715725735745755765775785795805815825835845855865875885895905915925935945955965975985996006016026036046056066076086096106116126136146156166176186196206216226236246256266276286296306316326336346356366376386396406416426436446456466476486496506516526536546556566576586596606616626636646656666676686696706716726736746756766776786796806816826836846856866876886896906916926936946956966976986997007017027037047057067077087097107117127137147157167177187197207217227237247257267277287297307317327337347357367377387397407417427437447457467477487497507517527537547557567577587597607617627637647657667677687697707717727737747757767777787797807817827837847857867877887897907917927937947957967977987998008018028038048058068078088098108118128138148158168178188198208218228238248258268278288298308318328338348358368378388398408418428438448458468478488498508518528538548558568578588598608618628638648658668678688698708718728738748758768778788798808818828838848858868878888898908918928938948958968978988999009019029039049059069079089099109119129139149159169179189199209219229239249259269279289299309319329339349359369379389399409419429439449459469479489499509519529539549559569579589599609619629639649659669679689699709719729739749759769779789799809819829839849859869879889899909919929939949959969979989991000100110021003100410051006100710081009101010111012101310141015101610171018101910201021102210231024102510261027102810291030103110321033103410351036103710381039104010411042104310441045104610471048104910501051105210531054105510561057105810591060106110621063106410651066106710681069107010711072107310741075107610771078107910801081108210831084108510861087108810891090109110921093109410951096109710981099110011011102110311041105110611071108110911101111111211131114111511161117111811191120112111221123112411251126112711281129113011311132113311341135113611371138113911401141114211431144114511461147114811491150115111521153115411551156115711581159116011611162116311641165116611671168116911701171117211731174117511761177117811791180118111821183118411851186118711881189119011911192119311941195119611971198119912001201120212031204120512061207120812091210121112121213121412151216121712181219122012211222122312241225122612271228122912301231123212331234123512361237123812391240124112421243124412451246124712481249125012511252125312541255125612571258125912601261126212631264126512661267126812691270127112721273127412751276127712781279128012811282128312841285128612871288128912901291129212931294129512961297129812991300130113021303130413051306130713081309131013111312131313141315131613171318131913201321132213231324132513261327132813291330133113321333133413351336133713381339134013411342134313441345134613471348134913501351135213531354135513561357135813591360136113621363136413651366136713681369137013711372137313741375137613771378137913801381138213831384138513861387138813891390139113921393139413951396139713981399140014011402140314041405140614071408140914101411141214131414141514161417141814191420142114221423142414251426142714281429143014311432143314341435143614371438143914401441144214431444144514461447144814491450145114521453145414551456145714581459146014611462146314641465146614671468146914701471147214731474147514761477147814791480148114821483148414851486148714881489149014911492149314941495149614971498149915001501150215031504150515061507150815091510151115121513151415151516151715181519152015211522152315241525152615271528152915301531153215331534153515361537153815391540154115421543154415451546154715481549155015511552155315541555155615571558155915601561156215631564156515661567156815691570157115721573157415751576157715781579158015811582158315841585158615871588158915901591159215931594159515961597159815991600160116021603160416051606160716081609161016111612161316141615161616171618161916201621162216231624162516261627162816291630163116321633163416351636163716381639164016411642164316441645164616471648164916501651165216531654165516561657165816591660166116621663166416651666166716681669167016711672167316741675167616771678167916801681168216831684168516861687168816891690169116921693169416951696169716981699170017011702170317041705170617071708170917101711171217131714171517161717171817191720172117221723172417251726172717281729173017311732173317341735173617371738173917401741174217431744174517461747174817491750175117521753175417551756175717581759176017611762176317641765176617671768176917701771177217731774177517761777177817791780178117821783178417851786
  1. /*
  2. * arch/s390/kernel/time.c
  3. * Time of day based timer functions.
  4. *
  5. * S390 version
  6. * Copyright IBM Corp. 1999, 2008
  7. * Author(s): Hartmut Penner (hp@de.ibm.com),
  8. * Martin Schwidefsky (schwidefsky@de.ibm.com),
  9. * Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com)
  10. *
  11. * Derived from "arch/i386/kernel/time.c"
  12. * Copyright (C) 1991, 1992, 1995 Linus Torvalds
  13. */
  14. #define KMSG_COMPONENT "time"
  15. #define pr_fmt(fmt) KMSG_COMPONENT ": " fmt
  16. #include <linux/kernel_stat.h>
  17. #include <linux/errno.h>
  18. #include <linux/module.h>
  19. #include <linux/sched.h>
  20. #include <linux/kernel.h>
  21. #include <linux/param.h>
  22. #include <linux/string.h>
  23. #include <linux/mm.h>
  24. #include <linux/interrupt.h>
  25. #include <linux/cpu.h>
  26. #include <linux/stop_machine.h>
  27. #include <linux/time.h>
  28. #include <linux/device.h>
  29. #include <linux/delay.h>
  30. #include <linux/init.h>
  31. #include <linux/smp.h>
  32. #include <linux/types.h>
  33. #include <linux/profile.h>
  34. #include <linux/timex.h>
  35. #include <linux/notifier.h>
  36. #include <linux/clocksource.h>
  37. #include <linux/clockchips.h>
  38. #include <linux/gfp.h>
  39. #include <linux/kprobes.h>
  40. #include <asm/uaccess.h>
  41. #include <asm/delay.h>
  42. #include <asm/div64.h>
  43. #include <asm/vdso.h>
  44. #include <asm/irq.h>
  45. #include <asm/irq_regs.h>
  46. #include <asm/timer.h>
  47. #include <asm/etr.h>
  48. #include <asm/cio.h>
  49. #include "entry.h"
  50. /* change this if you have some constant time drift */
  51. #define USECS_PER_JIFFY ((unsigned long) 1000000/HZ)
  52. #define CLK_TICKS_PER_JIFFY ((unsigned long) USECS_PER_JIFFY << 12)
  53. u64 sched_clock_base_cc = -1; /* Force to data section. */
  54. EXPORT_SYMBOL_GPL(sched_clock_base_cc);
  55. static DEFINE_PER_CPU(struct clock_event_device, comparators);
  56. /*
  57. * Scheduler clock - returns current time in nanosec units.
  58. */
  59. unsigned long long notrace __kprobes sched_clock(void)
  60. {
  61. return (get_clock_monotonic() * 125) >> 9;
  62. }
  63. /*
  64. * Monotonic_clock - returns # of nanoseconds passed since time_init()
  65. */
  66. unsigned long long monotonic_clock(void)
  67. {
  68. return sched_clock();
  69. }
  70. EXPORT_SYMBOL(monotonic_clock);
  71. void tod_to_timeval(__u64 todval, struct timespec *xt)
  72. {
  73. unsigned long long sec;
  74. sec = todval >> 12;
  75. do_div(sec, 1000000);
  76. xt->tv_sec = sec;
  77. todval -= (sec * 1000000) << 12;
  78. xt->tv_nsec = ((todval * 1000) >> 12);
  79. }
  80. EXPORT_SYMBOL(tod_to_timeval);
  81. void clock_comparator_work(void)
  82. {
  83. struct clock_event_device *cd;
  84. S390_lowcore.clock_comparator = -1ULL;
  85. set_clock_comparator(S390_lowcore.clock_comparator);
  86. cd = &__get_cpu_var(comparators);
  87. cd->event_handler(cd);
  88. }
  89. /*
  90. * Fixup the clock comparator.
  91. */
  92. static void fixup_clock_comparator(unsigned long long delta)
  93. {
  94. /* If nobody is waiting there's nothing to fix. */
  95. if (S390_lowcore.clock_comparator == -1ULL)
  96. return;
  97. S390_lowcore.clock_comparator += delta;
  98. set_clock_comparator(S390_lowcore.clock_comparator);
  99. }
  100. static int s390_next_ktime(ktime_t expires,
  101. struct clock_event_device *evt)
  102. {
  103. u64 nsecs;
  104. nsecs = ktime_to_ns(ktime_sub(expires, ktime_get_monotonic_offset()));
  105. do_div(nsecs, 125);
  106. S390_lowcore.clock_comparator = TOD_UNIX_EPOCH + (nsecs << 9);
  107. set_clock_comparator(S390_lowcore.clock_comparator);
  108. return 0;
  109. }
  110. static void s390_set_mode(enum clock_event_mode mode,
  111. struct clock_event_device *evt)
  112. {
  113. }
  114. /*
  115. * Set up lowcore and control register of the current cpu to
  116. * enable TOD clock and clock comparator interrupts.
  117. */
  118. void init_cpu_timer(void)
  119. {
  120. struct clock_event_device *cd;
  121. int cpu;
  122. S390_lowcore.clock_comparator = -1ULL;
  123. set_clock_comparator(S390_lowcore.clock_comparator);
  124. cpu = smp_processor_id();
  125. cd = &per_cpu(comparators, cpu);
  126. cd->name = "comparator";
  127. cd->features = CLOCK_EVT_FEAT_ONESHOT |
  128. CLOCK_EVT_FEAT_KTIME;
  129. cd->mult = 16777;
  130. cd->shift = 12;
  131. cd->min_delta_ns = 1;
  132. cd->max_delta_ns = LONG_MAX;
  133. cd->rating = 400;
  134. cd->cpumask = cpumask_of(cpu);
  135. cd->set_next_ktime = s390_next_ktime;
  136. cd->set_mode = s390_set_mode;
  137. clockevents_register_device(cd);
  138. /* Enable clock comparator timer interrupt. */
  139. __ctl_set_bit(0,11);
  140. /* Always allow the timing alert external interrupt. */
  141. __ctl_set_bit(0, 4);
  142. }
  143. static void clock_comparator_interrupt(unsigned int ext_int_code,
  144. unsigned int param32,
  145. unsigned long param64)
  146. {
  147. kstat_cpu(smp_processor_id()).irqs[EXTINT_CLK]++;
  148. if (S390_lowcore.clock_comparator == -1ULL)
  149. set_clock_comparator(S390_lowcore.clock_comparator);
  150. }
  151. static void etr_timing_alert(struct etr_irq_parm *);
  152. static void stp_timing_alert(struct stp_irq_parm *);
  153. static void timing_alert_interrupt(unsigned int ext_int_code,
  154. unsigned int param32, unsigned long param64)
  155. {
  156. kstat_cpu(smp_processor_id()).irqs[EXTINT_TLA]++;
  157. if (param32 & 0x00c40000)
  158. etr_timing_alert((struct etr_irq_parm *) &param32);
  159. if (param32 & 0x00038000)
  160. stp_timing_alert((struct stp_irq_parm *) &param32);
  161. }
  162. static void etr_reset(void);
  163. static void stp_reset(void);
  164. void read_persistent_clock(struct timespec *ts)
  165. {
  166. tod_to_timeval(get_clock() - TOD_UNIX_EPOCH, ts);
  167. }
  168. void read_boot_clock(struct timespec *ts)
  169. {
  170. tod_to_timeval(sched_clock_base_cc - TOD_UNIX_EPOCH, ts);
  171. }
  172. static cycle_t read_tod_clock(struct clocksource *cs)
  173. {
  174. return get_clock();
  175. }
  176. static struct clocksource clocksource_tod = {
  177. .name = "tod",
  178. .rating = 400,
  179. .read = read_tod_clock,
  180. .mask = -1ULL,
  181. .mult = 1000,
  182. .shift = 12,
  183. .flags = CLOCK_SOURCE_IS_CONTINUOUS,
  184. };
  185. struct clocksource * __init clocksource_default_clock(void)
  186. {
  187. return &clocksource_tod;
  188. }
  189. void update_vsyscall(struct timespec *wall_time, struct timespec *wtm,
  190. struct clocksource *clock, u32 mult)
  191. {
  192. if (clock != &clocksource_tod)
  193. return;
  194. /* Make userspace gettimeofday spin until we're done. */
  195. ++vdso_data->tb_update_count;
  196. smp_wmb();
  197. vdso_data->xtime_tod_stamp = clock->cycle_last;
  198. vdso_data->xtime_clock_sec = wall_time->tv_sec;
  199. vdso_data->xtime_clock_nsec = wall_time->tv_nsec;
  200. vdso_data->wtom_clock_sec = wtm->tv_sec;
  201. vdso_data->wtom_clock_nsec = wtm->tv_nsec;
  202. vdso_data->ntp_mult = mult;
  203. smp_wmb();
  204. ++vdso_data->tb_update_count;
  205. }
  206. extern struct timezone sys_tz;
  207. void update_vsyscall_tz(void)
  208. {
  209. /* Make userspace gettimeofday spin until we're done. */
  210. ++vdso_data->tb_update_count;
  211. smp_wmb();
  212. vdso_data->tz_minuteswest = sys_tz.tz_minuteswest;
  213. vdso_data->tz_dsttime = sys_tz.tz_dsttime;
  214. smp_wmb();
  215. ++vdso_data->tb_update_count;
  216. }
  217. /*
  218. * Initialize the TOD clock and the CPU timer of
  219. * the boot cpu.
  220. */
  221. void __init time_init(void)
  222. {
  223. /* Reset time synchronization interfaces. */
  224. etr_reset();
  225. stp_reset();
  226. /* request the clock comparator external interrupt */
  227. if (register_external_interrupt(0x1004, clock_comparator_interrupt))
  228. panic("Couldn't request external interrupt 0x1004");
  229. /* request the timing alert external interrupt */
  230. if (register_external_interrupt(0x1406, timing_alert_interrupt))
  231. panic("Couldn't request external interrupt 0x1406");
  232. if (clocksource_register(&clocksource_tod) != 0)
  233. panic("Could not register TOD clock source");
  234. /* Enable TOD clock interrupts on the boot cpu. */
  235. init_cpu_timer();
  236. /* Enable cpu timer interrupts on the boot cpu. */
  237. vtime_init();
  238. }
  239. /*
  240. * The time is "clock". old is what we think the time is.
  241. * Adjust the value by a multiple of jiffies and add the delta to ntp.
  242. * "delay" is an approximation how long the synchronization took. If
  243. * the time correction is positive, then "delay" is subtracted from
  244. * the time difference and only the remaining part is passed to ntp.
  245. */
  246. static unsigned long long adjust_time(unsigned long long old,
  247. unsigned long long clock,
  248. unsigned long long delay)
  249. {
  250. unsigned long long delta, ticks;
  251. struct timex adjust;
  252. if (clock > old) {
  253. /* It is later than we thought. */
  254. delta = ticks = clock - old;
  255. delta = ticks = (delta < delay) ? 0 : delta - delay;
  256. delta -= do_div(ticks, CLK_TICKS_PER_JIFFY);
  257. adjust.offset = ticks * (1000000 / HZ);
  258. } else {
  259. /* It is earlier than we thought. */
  260. delta = ticks = old - clock;
  261. delta -= do_div(ticks, CLK_TICKS_PER_JIFFY);
  262. delta = -delta;
  263. adjust.offset = -ticks * (1000000 / HZ);
  264. }
  265. sched_clock_base_cc += delta;
  266. if (adjust.offset != 0) {
  267. pr_notice("The ETR interface has adjusted the clock "
  268. "by %li microseconds\n", adjust.offset);
  269. adjust.modes = ADJ_OFFSET_SINGLESHOT;
  270. do_adjtimex(&adjust);
  271. }
  272. return delta;
  273. }
  274. static DEFINE_PER_CPU(atomic_t, clock_sync_word);
  275. static DEFINE_MUTEX(clock_sync_mutex);
  276. static unsigned long clock_sync_flags;
  277. #define CLOCK_SYNC_HAS_ETR 0
  278. #define CLOCK_SYNC_HAS_STP 1
  279. #define CLOCK_SYNC_ETR 2
  280. #define CLOCK_SYNC_STP 3
  281. /*
  282. * The synchronous get_clock function. It will write the current clock
  283. * value to the clock pointer and return 0 if the clock is in sync with
  284. * the external time source. If the clock mode is local it will return
  285. * -ENOSYS and -EAGAIN if the clock is not in sync with the external
  286. * reference.
  287. */
  288. int get_sync_clock(unsigned long long *clock)
  289. {
  290. atomic_t *sw_ptr;
  291. unsigned int sw0, sw1;
  292. sw_ptr = &get_cpu_var(clock_sync_word);
  293. sw0 = atomic_read(sw_ptr);
  294. *clock = get_clock();
  295. sw1 = atomic_read(sw_ptr);
  296. put_cpu_var(clock_sync_word);
  297. if (sw0 == sw1 && (sw0 & 0x80000000U))
  298. /* Success: time is in sync. */
  299. return 0;
  300. if (!test_bit(CLOCK_SYNC_HAS_ETR, &clock_sync_flags) &&
  301. !test_bit(CLOCK_SYNC_HAS_STP, &clock_sync_flags))
  302. return -ENOSYS;
  303. if (!test_bit(CLOCK_SYNC_ETR, &clock_sync_flags) &&
  304. !test_bit(CLOCK_SYNC_STP, &clock_sync_flags))
  305. return -EACCES;
  306. return -EAGAIN;
  307. }
  308. EXPORT_SYMBOL(get_sync_clock);
  309. /*
  310. * Make get_sync_clock return -EAGAIN.
  311. */
  312. static void disable_sync_clock(void *dummy)
  313. {
  314. atomic_t *sw_ptr = &__get_cpu_var(clock_sync_word);
  315. /*
  316. * Clear the in-sync bit 2^31. All get_sync_clock calls will
  317. * fail until the sync bit is turned back on. In addition
  318. * increase the "sequence" counter to avoid the race of an
  319. * etr event and the complete recovery against get_sync_clock.
  320. */
  321. atomic_clear_mask(0x80000000, sw_ptr);
  322. atomic_inc(sw_ptr);
  323. }
  324. /*
  325. * Make get_sync_clock return 0 again.
  326. * Needs to be called from a context disabled for preemption.
  327. */
  328. static void enable_sync_clock(void)
  329. {
  330. atomic_t *sw_ptr = &__get_cpu_var(clock_sync_word);
  331. atomic_set_mask(0x80000000, sw_ptr);
  332. }
  333. /*
  334. * Function to check if the clock is in sync.
  335. */
  336. static inline int check_sync_clock(void)
  337. {
  338. atomic_t *sw_ptr;
  339. int rc;
  340. sw_ptr = &get_cpu_var(clock_sync_word);
  341. rc = (atomic_read(sw_ptr) & 0x80000000U) != 0;
  342. put_cpu_var(clock_sync_word);
  343. return rc;
  344. }
  345. /* Single threaded workqueue used for etr and stp sync events */
  346. static struct workqueue_struct *time_sync_wq;
  347. static void __init time_init_wq(void)
  348. {
  349. if (time_sync_wq)
  350. return;
  351. time_sync_wq = create_singlethread_workqueue("timesync");
  352. }
  353. /*
  354. * External Time Reference (ETR) code.
  355. */
  356. static int etr_port0_online;
  357. static int etr_port1_online;
  358. static int etr_steai_available;
  359. static int __init early_parse_etr(char *p)
  360. {
  361. if (strncmp(p, "off", 3) == 0)
  362. etr_port0_online = etr_port1_online = 0;
  363. else if (strncmp(p, "port0", 5) == 0)
  364. etr_port0_online = 1;
  365. else if (strncmp(p, "port1", 5) == 0)
  366. etr_port1_online = 1;
  367. else if (strncmp(p, "on", 2) == 0)
  368. etr_port0_online = etr_port1_online = 1;
  369. return 0;
  370. }
  371. early_param("etr", early_parse_etr);
  372. enum etr_event {
  373. ETR_EVENT_PORT0_CHANGE,
  374. ETR_EVENT_PORT1_CHANGE,
  375. ETR_EVENT_PORT_ALERT,
  376. ETR_EVENT_SYNC_CHECK,
  377. ETR_EVENT_SWITCH_LOCAL,
  378. ETR_EVENT_UPDATE,
  379. };
  380. /*
  381. * Valid bit combinations of the eacr register are (x = don't care):
  382. * e0 e1 dp p0 p1 ea es sl
  383. * 0 0 x 0 0 0 0 0 initial, disabled state
  384. * 0 0 x 0 1 1 0 0 port 1 online
  385. * 0 0 x 1 0 1 0 0 port 0 online
  386. * 0 0 x 1 1 1 0 0 both ports online
  387. * 0 1 x 0 1 1 0 0 port 1 online and usable, ETR or PPS mode
  388. * 0 1 x 0 1 1 0 1 port 1 online, usable and ETR mode
  389. * 0 1 x 0 1 1 1 0 port 1 online, usable, PPS mode, in-sync
  390. * 0 1 x 0 1 1 1 1 port 1 online, usable, ETR mode, in-sync
  391. * 0 1 x 1 1 1 0 0 both ports online, port 1 usable
  392. * 0 1 x 1 1 1 1 0 both ports online, port 1 usable, PPS mode, in-sync
  393. * 0 1 x 1 1 1 1 1 both ports online, port 1 usable, ETR mode, in-sync
  394. * 1 0 x 1 0 1 0 0 port 0 online and usable, ETR or PPS mode
  395. * 1 0 x 1 0 1 0 1 port 0 online, usable and ETR mode
  396. * 1 0 x 1 0 1 1 0 port 0 online, usable, PPS mode, in-sync
  397. * 1 0 x 1 0 1 1 1 port 0 online, usable, ETR mode, in-sync
  398. * 1 0 x 1 1 1 0 0 both ports online, port 0 usable
  399. * 1 0 x 1 1 1 1 0 both ports online, port 0 usable, PPS mode, in-sync
  400. * 1 0 x 1 1 1 1 1 both ports online, port 0 usable, ETR mode, in-sync
  401. * 1 1 x 1 1 1 1 0 both ports online & usable, ETR, in-sync
  402. * 1 1 x 1 1 1 1 1 both ports online & usable, ETR, in-sync
  403. */
  404. static struct etr_eacr etr_eacr;
  405. static u64 etr_tolec; /* time of last eacr update */
  406. static struct etr_aib etr_port0;
  407. static int etr_port0_uptodate;
  408. static struct etr_aib etr_port1;
  409. static int etr_port1_uptodate;
  410. static unsigned long etr_events;
  411. static struct timer_list etr_timer;
  412. static void etr_timeout(unsigned long dummy);
  413. static void etr_work_fn(struct work_struct *work);
  414. static DEFINE_MUTEX(etr_work_mutex);
  415. static DECLARE_WORK(etr_work, etr_work_fn);
  416. /*
  417. * Reset ETR attachment.
  418. */
  419. static void etr_reset(void)
  420. {
  421. etr_eacr = (struct etr_eacr) {
  422. .e0 = 0, .e1 = 0, ._pad0 = 4, .dp = 0,
  423. .p0 = 0, .p1 = 0, ._pad1 = 0, .ea = 0,
  424. .es = 0, .sl = 0 };
  425. if (etr_setr(&etr_eacr) == 0) {
  426. etr_tolec = get_clock();
  427. set_bit(CLOCK_SYNC_HAS_ETR, &clock_sync_flags);
  428. if (etr_port0_online && etr_port1_online)
  429. set_bit(CLOCK_SYNC_ETR, &clock_sync_flags);
  430. } else if (etr_port0_online || etr_port1_online) {
  431. pr_warning("The real or virtual hardware system does "
  432. "not provide an ETR interface\n");
  433. etr_port0_online = etr_port1_online = 0;
  434. }
  435. }
  436. static int __init etr_init(void)
  437. {
  438. struct etr_aib aib;
  439. if (!test_bit(CLOCK_SYNC_HAS_ETR, &clock_sync_flags))
  440. return 0;
  441. time_init_wq();
  442. /* Check if this machine has the steai instruction. */
  443. if (etr_steai(&aib, ETR_STEAI_STEPPING_PORT) == 0)
  444. etr_steai_available = 1;
  445. setup_timer(&etr_timer, etr_timeout, 0UL);
  446. if (etr_port0_online) {
  447. set_bit(ETR_EVENT_PORT0_CHANGE, &etr_events);
  448. queue_work(time_sync_wq, &etr_work);
  449. }
  450. if (etr_port1_online) {
  451. set_bit(ETR_EVENT_PORT1_CHANGE, &etr_events);
  452. queue_work(time_sync_wq, &etr_work);
  453. }
  454. return 0;
  455. }
  456. arch_initcall(etr_init);
  457. /*
  458. * Two sorts of ETR machine checks. The architecture reads:
  459. * "When a machine-check niterruption occurs and if a switch-to-local or
  460. * ETR-sync-check interrupt request is pending but disabled, this pending
  461. * disabled interruption request is indicated and is cleared".
  462. * Which means that we can get etr_switch_to_local events from the machine
  463. * check handler although the interruption condition is disabled. Lovely..
  464. */
  465. /*
  466. * Switch to local machine check. This is called when the last usable
  467. * ETR port goes inactive. After switch to local the clock is not in sync.
  468. */
  469. void etr_switch_to_local(void)
  470. {
  471. if (!etr_eacr.sl)
  472. return;
  473. disable_sync_clock(NULL);
  474. if (!test_and_set_bit(ETR_EVENT_SWITCH_LOCAL, &etr_events)) {
  475. etr_eacr.es = etr_eacr.sl = 0;
  476. etr_setr(&etr_eacr);
  477. queue_work(time_sync_wq, &etr_work);
  478. }
  479. }
  480. /*
  481. * ETR sync check machine check. This is called when the ETR OTE and the
  482. * local clock OTE are farther apart than the ETR sync check tolerance.
  483. * After a ETR sync check the clock is not in sync. The machine check
  484. * is broadcasted to all cpus at the same time.
  485. */
  486. void etr_sync_check(void)
  487. {
  488. if (!etr_eacr.es)
  489. return;
  490. disable_sync_clock(NULL);
  491. if (!test_and_set_bit(ETR_EVENT_SYNC_CHECK, &etr_events)) {
  492. etr_eacr.es = 0;
  493. etr_setr(&etr_eacr);
  494. queue_work(time_sync_wq, &etr_work);
  495. }
  496. }
  497. /*
  498. * ETR timing alert. There are two causes:
  499. * 1) port state change, check the usability of the port
  500. * 2) port alert, one of the ETR-data-validity bits (v1-v2 bits of the
  501. * sldr-status word) or ETR-data word 1 (edf1) or ETR-data word 3 (edf3)
  502. * or ETR-data word 4 (edf4) has changed.
  503. */
  504. static void etr_timing_alert(struct etr_irq_parm *intparm)
  505. {
  506. if (intparm->pc0)
  507. /* ETR port 0 state change. */
  508. set_bit(ETR_EVENT_PORT0_CHANGE, &etr_events);
  509. if (intparm->pc1)
  510. /* ETR port 1 state change. */
  511. set_bit(ETR_EVENT_PORT1_CHANGE, &etr_events);
  512. if (intparm->eai)
  513. /*
  514. * ETR port alert on either port 0, 1 or both.
  515. * Both ports are not up-to-date now.
  516. */
  517. set_bit(ETR_EVENT_PORT_ALERT, &etr_events);
  518. queue_work(time_sync_wq, &etr_work);
  519. }
  520. static void etr_timeout(unsigned long dummy)
  521. {
  522. set_bit(ETR_EVENT_UPDATE, &etr_events);
  523. queue_work(time_sync_wq, &etr_work);
  524. }
  525. /*
  526. * Check if the etr mode is pss.
  527. */
  528. static inline int etr_mode_is_pps(struct etr_eacr eacr)
  529. {
  530. return eacr.es && !eacr.sl;
  531. }
  532. /*
  533. * Check if the etr mode is etr.
  534. */
  535. static inline int etr_mode_is_etr(struct etr_eacr eacr)
  536. {
  537. return eacr.es && eacr.sl;
  538. }
  539. /*
  540. * Check if the port can be used for TOD synchronization.
  541. * For PPS mode the port has to receive OTEs. For ETR mode
  542. * the port has to receive OTEs, the ETR stepping bit has to
  543. * be zero and the validity bits for data frame 1, 2, and 3
  544. * have to be 1.
  545. */
  546. static int etr_port_valid(struct etr_aib *aib, int port)
  547. {
  548. unsigned int psc;
  549. /* Check that this port is receiving OTEs. */
  550. if (aib->tsp == 0)
  551. return 0;
  552. psc = port ? aib->esw.psc1 : aib->esw.psc0;
  553. if (psc == etr_lpsc_pps_mode)
  554. return 1;
  555. if (psc == etr_lpsc_operational_step)
  556. return !aib->esw.y && aib->slsw.v1 &&
  557. aib->slsw.v2 && aib->slsw.v3;
  558. return 0;
  559. }
  560. /*
  561. * Check if two ports are on the same network.
  562. */
  563. static int etr_compare_network(struct etr_aib *aib1, struct etr_aib *aib2)
  564. {
  565. // FIXME: any other fields we have to compare?
  566. return aib1->edf1.net_id == aib2->edf1.net_id;
  567. }
  568. /*
  569. * Wrapper for etr_stei that converts physical port states
  570. * to logical port states to be consistent with the output
  571. * of stetr (see etr_psc vs. etr_lpsc).
  572. */
  573. static void etr_steai_cv(struct etr_aib *aib, unsigned int func)
  574. {
  575. BUG_ON(etr_steai(aib, func) != 0);
  576. /* Convert port state to logical port state. */
  577. if (aib->esw.psc0 == 1)
  578. aib->esw.psc0 = 2;
  579. else if (aib->esw.psc0 == 0 && aib->esw.p == 0)
  580. aib->esw.psc0 = 1;
  581. if (aib->esw.psc1 == 1)
  582. aib->esw.psc1 = 2;
  583. else if (aib->esw.psc1 == 0 && aib->esw.p == 1)
  584. aib->esw.psc1 = 1;
  585. }
  586. /*
  587. * Check if the aib a2 is still connected to the same attachment as
  588. * aib a1, the etv values differ by one and a2 is valid.
  589. */
  590. static int etr_aib_follows(struct etr_aib *a1, struct etr_aib *a2, int p)
  591. {
  592. int state_a1, state_a2;
  593. /* Paranoia check: e0/e1 should better be the same. */
  594. if (a1->esw.eacr.e0 != a2->esw.eacr.e0 ||
  595. a1->esw.eacr.e1 != a2->esw.eacr.e1)
  596. return 0;
  597. /* Still connected to the same etr ? */
  598. state_a1 = p ? a1->esw.psc1 : a1->esw.psc0;
  599. state_a2 = p ? a2->esw.psc1 : a2->esw.psc0;
  600. if (state_a1 == etr_lpsc_operational_step) {
  601. if (state_a2 != etr_lpsc_operational_step ||
  602. a1->edf1.net_id != a2->edf1.net_id ||
  603. a1->edf1.etr_id != a2->edf1.etr_id ||
  604. a1->edf1.etr_pn != a2->edf1.etr_pn)
  605. return 0;
  606. } else if (state_a2 != etr_lpsc_pps_mode)
  607. return 0;
  608. /* The ETV value of a2 needs to be ETV of a1 + 1. */
  609. if (a1->edf2.etv + 1 != a2->edf2.etv)
  610. return 0;
  611. if (!etr_port_valid(a2, p))
  612. return 0;
  613. return 1;
  614. }
  615. struct clock_sync_data {
  616. atomic_t cpus;
  617. int in_sync;
  618. unsigned long long fixup_cc;
  619. int etr_port;
  620. struct etr_aib *etr_aib;
  621. };
  622. static void clock_sync_cpu(struct clock_sync_data *sync)
  623. {
  624. atomic_dec(&sync->cpus);
  625. enable_sync_clock();
  626. /*
  627. * This looks like a busy wait loop but it isn't. etr_sync_cpus
  628. * is called on all other cpus while the TOD clocks is stopped.
  629. * __udelay will stop the cpu on an enabled wait psw until the
  630. * TOD is running again.
  631. */
  632. while (sync->in_sync == 0) {
  633. __udelay(1);
  634. /*
  635. * A different cpu changes *in_sync. Therefore use
  636. * barrier() to force memory access.
  637. */
  638. barrier();
  639. }
  640. if (sync->in_sync != 1)
  641. /* Didn't work. Clear per-cpu in sync bit again. */
  642. disable_sync_clock(NULL);
  643. /*
  644. * This round of TOD syncing is done. Set the clock comparator
  645. * to the next tick and let the processor continue.
  646. */
  647. fixup_clock_comparator(sync->fixup_cc);
  648. }
  649. /*
  650. * Sync the TOD clock using the port referred to by aibp. This port
  651. * has to be enabled and the other port has to be disabled. The
  652. * last eacr update has to be more than 1.6 seconds in the past.
  653. */
  654. static int etr_sync_clock(void *data)
  655. {
  656. static int first;
  657. unsigned long long clock, old_clock, delay, delta;
  658. struct clock_sync_data *etr_sync;
  659. struct etr_aib *sync_port, *aib;
  660. int port;
  661. int rc;
  662. etr_sync = data;
  663. if (xchg(&first, 1) == 1) {
  664. /* Slave */
  665. clock_sync_cpu(etr_sync);
  666. return 0;
  667. }
  668. /* Wait until all other cpus entered the sync function. */
  669. while (atomic_read(&etr_sync->cpus) != 0)
  670. cpu_relax();
  671. port = etr_sync->etr_port;
  672. aib = etr_sync->etr_aib;
  673. sync_port = (port == 0) ? &etr_port0 : &etr_port1;
  674. enable_sync_clock();
  675. /* Set clock to next OTE. */
  676. __ctl_set_bit(14, 21);
  677. __ctl_set_bit(0, 29);
  678. clock = ((unsigned long long) (aib->edf2.etv + 1)) << 32;
  679. old_clock = get_clock();
  680. if (set_clock(clock) == 0) {
  681. __udelay(1); /* Wait for the clock to start. */
  682. __ctl_clear_bit(0, 29);
  683. __ctl_clear_bit(14, 21);
  684. etr_stetr(aib);
  685. /* Adjust Linux timing variables. */
  686. delay = (unsigned long long)
  687. (aib->edf2.etv - sync_port->edf2.etv) << 32;
  688. delta = adjust_time(old_clock, clock, delay);
  689. etr_sync->fixup_cc = delta;
  690. fixup_clock_comparator(delta);
  691. /* Verify that the clock is properly set. */
  692. if (!etr_aib_follows(sync_port, aib, port)) {
  693. /* Didn't work. */
  694. disable_sync_clock(NULL);
  695. etr_sync->in_sync = -EAGAIN;
  696. rc = -EAGAIN;
  697. } else {
  698. etr_sync->in_sync = 1;
  699. rc = 0;
  700. }
  701. } else {
  702. /* Could not set the clock ?!? */
  703. __ctl_clear_bit(0, 29);
  704. __ctl_clear_bit(14, 21);
  705. disable_sync_clock(NULL);
  706. etr_sync->in_sync = -EAGAIN;
  707. rc = -EAGAIN;
  708. }
  709. xchg(&first, 0);
  710. return rc;
  711. }
  712. static int etr_sync_clock_stop(struct etr_aib *aib, int port)
  713. {
  714. struct clock_sync_data etr_sync;
  715. struct etr_aib *sync_port;
  716. int follows;
  717. int rc;
  718. /* Check if the current aib is adjacent to the sync port aib. */
  719. sync_port = (port == 0) ? &etr_port0 : &etr_port1;
  720. follows = etr_aib_follows(sync_port, aib, port);
  721. memcpy(sync_port, aib, sizeof(*aib));
  722. if (!follows)
  723. return -EAGAIN;
  724. memset(&etr_sync, 0, sizeof(etr_sync));
  725. etr_sync.etr_aib = aib;
  726. etr_sync.etr_port = port;
  727. get_online_cpus();
  728. atomic_set(&etr_sync.cpus, num_online_cpus() - 1);
  729. rc = stop_machine(etr_sync_clock, &etr_sync, cpu_online_mask);
  730. put_online_cpus();
  731. return rc;
  732. }
  733. /*
  734. * Handle the immediate effects of the different events.
  735. * The port change event is used for online/offline changes.
  736. */
  737. static struct etr_eacr etr_handle_events(struct etr_eacr eacr)
  738. {
  739. if (test_and_clear_bit(ETR_EVENT_SYNC_CHECK, &etr_events))
  740. eacr.es = 0;
  741. if (test_and_clear_bit(ETR_EVENT_SWITCH_LOCAL, &etr_events))
  742. eacr.es = eacr.sl = 0;
  743. if (test_and_clear_bit(ETR_EVENT_PORT_ALERT, &etr_events))
  744. etr_port0_uptodate = etr_port1_uptodate = 0;
  745. if (test_and_clear_bit(ETR_EVENT_PORT0_CHANGE, &etr_events)) {
  746. if (eacr.e0)
  747. /*
  748. * Port change of an enabled port. We have to
  749. * assume that this can have caused an stepping
  750. * port switch.
  751. */
  752. etr_tolec = get_clock();
  753. eacr.p0 = etr_port0_online;
  754. if (!eacr.p0)
  755. eacr.e0 = 0;
  756. etr_port0_uptodate = 0;
  757. }
  758. if (test_and_clear_bit(ETR_EVENT_PORT1_CHANGE, &etr_events)) {
  759. if (eacr.e1)
  760. /*
  761. * Port change of an enabled port. We have to
  762. * assume that this can have caused an stepping
  763. * port switch.
  764. */
  765. etr_tolec = get_clock();
  766. eacr.p1 = etr_port1_online;
  767. if (!eacr.p1)
  768. eacr.e1 = 0;
  769. etr_port1_uptodate = 0;
  770. }
  771. clear_bit(ETR_EVENT_UPDATE, &etr_events);
  772. return eacr;
  773. }
  774. /*
  775. * Set up a timer that expires after the etr_tolec + 1.6 seconds if
  776. * one of the ports needs an update.
  777. */
  778. static void etr_set_tolec_timeout(unsigned long long now)
  779. {
  780. unsigned long micros;
  781. if ((!etr_eacr.p0 || etr_port0_uptodate) &&
  782. (!etr_eacr.p1 || etr_port1_uptodate))
  783. return;
  784. micros = (now > etr_tolec) ? ((now - etr_tolec) >> 12) : 0;
  785. micros = (micros > 1600000) ? 0 : 1600000 - micros;
  786. mod_timer(&etr_timer, jiffies + (micros * HZ) / 1000000 + 1);
  787. }
  788. /*
  789. * Set up a time that expires after 1/2 second.
  790. */
  791. static void etr_set_sync_timeout(void)
  792. {
  793. mod_timer(&etr_timer, jiffies + HZ/2);
  794. }
  795. /*
  796. * Update the aib information for one or both ports.
  797. */
  798. static struct etr_eacr etr_handle_update(struct etr_aib *aib,
  799. struct etr_eacr eacr)
  800. {
  801. /* With both ports disabled the aib information is useless. */
  802. if (!eacr.e0 && !eacr.e1)
  803. return eacr;
  804. /* Update port0 or port1 with aib stored in etr_work_fn. */
  805. if (aib->esw.q == 0) {
  806. /* Information for port 0 stored. */
  807. if (eacr.p0 && !etr_port0_uptodate) {
  808. etr_port0 = *aib;
  809. if (etr_port0_online)
  810. etr_port0_uptodate = 1;
  811. }
  812. } else {
  813. /* Information for port 1 stored. */
  814. if (eacr.p1 && !etr_port1_uptodate) {
  815. etr_port1 = *aib;
  816. if (etr_port0_online)
  817. etr_port1_uptodate = 1;
  818. }
  819. }
  820. /*
  821. * Do not try to get the alternate port aib if the clock
  822. * is not in sync yet.
  823. */
  824. if (!eacr.es || !check_sync_clock())
  825. return eacr;
  826. /*
  827. * If steai is available we can get the information about
  828. * the other port immediately. If only stetr is available the
  829. * data-port bit toggle has to be used.
  830. */
  831. if (etr_steai_available) {
  832. if (eacr.p0 && !etr_port0_uptodate) {
  833. etr_steai_cv(&etr_port0, ETR_STEAI_PORT_0);
  834. etr_port0_uptodate = 1;
  835. }
  836. if (eacr.p1 && !etr_port1_uptodate) {
  837. etr_steai_cv(&etr_port1, ETR_STEAI_PORT_1);
  838. etr_port1_uptodate = 1;
  839. }
  840. } else {
  841. /*
  842. * One port was updated above, if the other
  843. * port is not uptodate toggle dp bit.
  844. */
  845. if ((eacr.p0 && !etr_port0_uptodate) ||
  846. (eacr.p1 && !etr_port1_uptodate))
  847. eacr.dp ^= 1;
  848. else
  849. eacr.dp = 0;
  850. }
  851. return eacr;
  852. }
  853. /*
  854. * Write new etr control register if it differs from the current one.
  855. * Return 1 if etr_tolec has been updated as well.
  856. */
  857. static void etr_update_eacr(struct etr_eacr eacr)
  858. {
  859. int dp_changed;
  860. if (memcmp(&etr_eacr, &eacr, sizeof(eacr)) == 0)
  861. /* No change, return. */
  862. return;
  863. /*
  864. * The disable of an active port of the change of the data port
  865. * bit can/will cause a change in the data port.
  866. */
  867. dp_changed = etr_eacr.e0 > eacr.e0 || etr_eacr.e1 > eacr.e1 ||
  868. (etr_eacr.dp ^ eacr.dp) != 0;
  869. etr_eacr = eacr;
  870. etr_setr(&etr_eacr);
  871. if (dp_changed)
  872. etr_tolec = get_clock();
  873. }
  874. /*
  875. * ETR work. In this function you'll find the main logic. In
  876. * particular this is the only function that calls etr_update_eacr(),
  877. * it "controls" the etr control register.
  878. */
  879. static void etr_work_fn(struct work_struct *work)
  880. {
  881. unsigned long long now;
  882. struct etr_eacr eacr;
  883. struct etr_aib aib;
  884. int sync_port;
  885. /* prevent multiple execution. */
  886. mutex_lock(&etr_work_mutex);
  887. /* Create working copy of etr_eacr. */
  888. eacr = etr_eacr;
  889. /* Check for the different events and their immediate effects. */
  890. eacr = etr_handle_events(eacr);
  891. /* Check if ETR is supposed to be active. */
  892. eacr.ea = eacr.p0 || eacr.p1;
  893. if (!eacr.ea) {
  894. /* Both ports offline. Reset everything. */
  895. eacr.dp = eacr.es = eacr.sl = 0;
  896. on_each_cpu(disable_sync_clock, NULL, 1);
  897. del_timer_sync(&etr_timer);
  898. etr_update_eacr(eacr);
  899. goto out_unlock;
  900. }
  901. /* Store aib to get the current ETR status word. */
  902. BUG_ON(etr_stetr(&aib) != 0);
  903. etr_port0.esw = etr_port1.esw = aib.esw; /* Copy status word. */
  904. now = get_clock();
  905. /*
  906. * Update the port information if the last stepping port change
  907. * or data port change is older than 1.6 seconds.
  908. */
  909. if (now >= etr_tolec + (1600000 << 12))
  910. eacr = etr_handle_update(&aib, eacr);
  911. /*
  912. * Select ports to enable. The preferred synchronization mode is PPS.
  913. * If a port can be enabled depends on a number of things:
  914. * 1) The port needs to be online and uptodate. A port is not
  915. * disabled just because it is not uptodate, but it is only
  916. * enabled if it is uptodate.
  917. * 2) The port needs to have the same mode (pps / etr).
  918. * 3) The port needs to be usable -> etr_port_valid() == 1
  919. * 4) To enable the second port the clock needs to be in sync.
  920. * 5) If both ports are useable and are ETR ports, the network id
  921. * has to be the same.
  922. * The eacr.sl bit is used to indicate etr mode vs. pps mode.
  923. */
  924. if (eacr.p0 && aib.esw.psc0 == etr_lpsc_pps_mode) {
  925. eacr.sl = 0;
  926. eacr.e0 = 1;
  927. if (!etr_mode_is_pps(etr_eacr))
  928. eacr.es = 0;
  929. if (!eacr.es || !eacr.p1 || aib.esw.psc1 != etr_lpsc_pps_mode)
  930. eacr.e1 = 0;
  931. // FIXME: uptodate checks ?
  932. else if (etr_port0_uptodate && etr_port1_uptodate)
  933. eacr.e1 = 1;
  934. sync_port = (etr_port0_uptodate &&
  935. etr_port_valid(&etr_port0, 0)) ? 0 : -1;
  936. } else if (eacr.p1 && aib.esw.psc1 == etr_lpsc_pps_mode) {
  937. eacr.sl = 0;
  938. eacr.e0 = 0;
  939. eacr.e1 = 1;
  940. if (!etr_mode_is_pps(etr_eacr))
  941. eacr.es = 0;
  942. sync_port = (etr_port1_uptodate &&
  943. etr_port_valid(&etr_port1, 1)) ? 1 : -1;
  944. } else if (eacr.p0 && aib.esw.psc0 == etr_lpsc_operational_step) {
  945. eacr.sl = 1;
  946. eacr.e0 = 1;
  947. if (!etr_mode_is_etr(etr_eacr))
  948. eacr.es = 0;
  949. if (!eacr.es || !eacr.p1 ||
  950. aib.esw.psc1 != etr_lpsc_operational_alt)
  951. eacr.e1 = 0;
  952. else if (etr_port0_uptodate && etr_port1_uptodate &&
  953. etr_compare_network(&etr_port0, &etr_port1))
  954. eacr.e1 = 1;
  955. sync_port = (etr_port0_uptodate &&
  956. etr_port_valid(&etr_port0, 0)) ? 0 : -1;
  957. } else if (eacr.p1 && aib.esw.psc1 == etr_lpsc_operational_step) {
  958. eacr.sl = 1;
  959. eacr.e0 = 0;
  960. eacr.e1 = 1;
  961. if (!etr_mode_is_etr(etr_eacr))
  962. eacr.es = 0;
  963. sync_port = (etr_port1_uptodate &&
  964. etr_port_valid(&etr_port1, 1)) ? 1 : -1;
  965. } else {
  966. /* Both ports not usable. */
  967. eacr.es = eacr.sl = 0;
  968. sync_port = -1;
  969. }
  970. /*
  971. * If the clock is in sync just update the eacr and return.
  972. * If there is no valid sync port wait for a port update.
  973. */
  974. if ((eacr.es && check_sync_clock()) || sync_port < 0) {
  975. etr_update_eacr(eacr);
  976. etr_set_tolec_timeout(now);
  977. goto out_unlock;
  978. }
  979. /*
  980. * Prepare control register for clock syncing
  981. * (reset data port bit, set sync check control.
  982. */
  983. eacr.dp = 0;
  984. eacr.es = 1;
  985. /*
  986. * Update eacr and try to synchronize the clock. If the update
  987. * of eacr caused a stepping port switch (or if we have to
  988. * assume that a stepping port switch has occurred) or the
  989. * clock syncing failed, reset the sync check control bit
  990. * and set up a timer to try again after 0.5 seconds
  991. */
  992. etr_update_eacr(eacr);
  993. if (now < etr_tolec + (1600000 << 12) ||
  994. etr_sync_clock_stop(&aib, sync_port) != 0) {
  995. /* Sync failed. Try again in 1/2 second. */
  996. eacr.es = 0;
  997. etr_update_eacr(eacr);
  998. etr_set_sync_timeout();
  999. } else
  1000. etr_set_tolec_timeout(now);
  1001. out_unlock:
  1002. mutex_unlock(&etr_work_mutex);
  1003. }
  1004. /*
  1005. * Sysfs interface functions
  1006. */
  1007. static struct bus_type etr_subsys = {
  1008. .name = "etr",
  1009. .dev_name = "etr",
  1010. };
  1011. static struct device etr_port0_dev = {
  1012. .id = 0,
  1013. .bus = &etr_subsys,
  1014. };
  1015. static struct device etr_port1_dev = {
  1016. .id = 1,
  1017. .bus = &etr_subsys,
  1018. };
  1019. /*
  1020. * ETR subsys attributes
  1021. */
  1022. static ssize_t etr_stepping_port_show(struct device *dev,
  1023. struct device_attribute *attr,
  1024. char *buf)
  1025. {
  1026. return sprintf(buf, "%i\n", etr_port0.esw.p);
  1027. }
  1028. static DEVICE_ATTR(stepping_port, 0400, etr_stepping_port_show, NULL);
  1029. static ssize_t etr_stepping_mode_show(struct device *dev,
  1030. struct device_attribute *attr,
  1031. char *buf)
  1032. {
  1033. char *mode_str;
  1034. if (etr_mode_is_pps(etr_eacr))
  1035. mode_str = "pps";
  1036. else if (etr_mode_is_etr(etr_eacr))
  1037. mode_str = "etr";
  1038. else
  1039. mode_str = "local";
  1040. return sprintf(buf, "%s\n", mode_str);
  1041. }
  1042. static DEVICE_ATTR(stepping_mode, 0400, etr_stepping_mode_show, NULL);
  1043. /*
  1044. * ETR port attributes
  1045. */
  1046. static inline struct etr_aib *etr_aib_from_dev(struct device *dev)
  1047. {
  1048. if (dev == &etr_port0_dev)
  1049. return etr_port0_online ? &etr_port0 : NULL;
  1050. else
  1051. return etr_port1_online ? &etr_port1 : NULL;
  1052. }
  1053. static ssize_t etr_online_show(struct device *dev,
  1054. struct device_attribute *attr,
  1055. char *buf)
  1056. {
  1057. unsigned int online;
  1058. online = (dev == &etr_port0_dev) ? etr_port0_online : etr_port1_online;
  1059. return sprintf(buf, "%i\n", online);
  1060. }
  1061. static ssize_t etr_online_store(struct device *dev,
  1062. struct device_attribute *attr,
  1063. const char *buf, size_t count)
  1064. {
  1065. unsigned int value;
  1066. value = simple_strtoul(buf, NULL, 0);
  1067. if (value != 0 && value != 1)
  1068. return -EINVAL;
  1069. if (!test_bit(CLOCK_SYNC_HAS_ETR, &clock_sync_flags))
  1070. return -EOPNOTSUPP;
  1071. mutex_lock(&clock_sync_mutex);
  1072. if (dev == &etr_port0_dev) {
  1073. if (etr_port0_online == value)
  1074. goto out; /* Nothing to do. */
  1075. etr_port0_online = value;
  1076. if (etr_port0_online && etr_port1_online)
  1077. set_bit(CLOCK_SYNC_ETR, &clock_sync_flags);
  1078. else
  1079. clear_bit(CLOCK_SYNC_ETR, &clock_sync_flags);
  1080. set_bit(ETR_EVENT_PORT0_CHANGE, &etr_events);
  1081. queue_work(time_sync_wq, &etr_work);
  1082. } else {
  1083. if (etr_port1_online == value)
  1084. goto out; /* Nothing to do. */
  1085. etr_port1_online = value;
  1086. if (etr_port0_online && etr_port1_online)
  1087. set_bit(CLOCK_SYNC_ETR, &clock_sync_flags);
  1088. else
  1089. clear_bit(CLOCK_SYNC_ETR, &clock_sync_flags);
  1090. set_bit(ETR_EVENT_PORT1_CHANGE, &etr_events);
  1091. queue_work(time_sync_wq, &etr_work);
  1092. }
  1093. out:
  1094. mutex_unlock(&clock_sync_mutex);
  1095. return count;
  1096. }
  1097. static DEVICE_ATTR(online, 0600, etr_online_show, etr_online_store);
  1098. static ssize_t etr_stepping_control_show(struct device *dev,
  1099. struct device_attribute *attr,
  1100. char *buf)
  1101. {
  1102. return sprintf(buf, "%i\n", (dev == &etr_port0_dev) ?
  1103. etr_eacr.e0 : etr_eacr.e1);
  1104. }
  1105. static DEVICE_ATTR(stepping_control, 0400, etr_stepping_control_show, NULL);
  1106. static ssize_t etr_mode_code_show(struct device *dev,
  1107. struct device_attribute *attr, char *buf)
  1108. {
  1109. if (!etr_port0_online && !etr_port1_online)
  1110. /* Status word is not uptodate if both ports are offline. */
  1111. return -ENODATA;
  1112. return sprintf(buf, "%i\n", (dev == &etr_port0_dev) ?
  1113. etr_port0.esw.psc0 : etr_port0.esw.psc1);
  1114. }
  1115. static DEVICE_ATTR(state_code, 0400, etr_mode_code_show, NULL);
  1116. static ssize_t etr_untuned_show(struct device *dev,
  1117. struct device_attribute *attr, char *buf)
  1118. {
  1119. struct etr_aib *aib = etr_aib_from_dev(dev);
  1120. if (!aib || !aib->slsw.v1)
  1121. return -ENODATA;
  1122. return sprintf(buf, "%i\n", aib->edf1.u);
  1123. }
  1124. static DEVICE_ATTR(untuned, 0400, etr_untuned_show, NULL);
  1125. static ssize_t etr_network_id_show(struct device *dev,
  1126. struct device_attribute *attr, char *buf)
  1127. {
  1128. struct etr_aib *aib = etr_aib_from_dev(dev);
  1129. if (!aib || !aib->slsw.v1)
  1130. return -ENODATA;
  1131. return sprintf(buf, "%i\n", aib->edf1.net_id);
  1132. }
  1133. static DEVICE_ATTR(network, 0400, etr_network_id_show, NULL);
  1134. static ssize_t etr_id_show(struct device *dev,
  1135. struct device_attribute *attr, char *buf)
  1136. {
  1137. struct etr_aib *aib = etr_aib_from_dev(dev);
  1138. if (!aib || !aib->slsw.v1)
  1139. return -ENODATA;
  1140. return sprintf(buf, "%i\n", aib->edf1.etr_id);
  1141. }
  1142. static DEVICE_ATTR(id, 0400, etr_id_show, NULL);
  1143. static ssize_t etr_port_number_show(struct device *dev,
  1144. struct device_attribute *attr, char *buf)
  1145. {
  1146. struct etr_aib *aib = etr_aib_from_dev(dev);
  1147. if (!aib || !aib->slsw.v1)
  1148. return -ENODATA;
  1149. return sprintf(buf, "%i\n", aib->edf1.etr_pn);
  1150. }
  1151. static DEVICE_ATTR(port, 0400, etr_port_number_show, NULL);
  1152. static ssize_t etr_coupled_show(struct device *dev,
  1153. struct device_attribute *attr, char *buf)
  1154. {
  1155. struct etr_aib *aib = etr_aib_from_dev(dev);
  1156. if (!aib || !aib->slsw.v3)
  1157. return -ENODATA;
  1158. return sprintf(buf, "%i\n", aib->edf3.c);
  1159. }
  1160. static DEVICE_ATTR(coupled, 0400, etr_coupled_show, NULL);
  1161. static ssize_t etr_local_time_show(struct device *dev,
  1162. struct device_attribute *attr, char *buf)
  1163. {
  1164. struct etr_aib *aib = etr_aib_from_dev(dev);
  1165. if (!aib || !aib->slsw.v3)
  1166. return -ENODATA;
  1167. return sprintf(buf, "%i\n", aib->edf3.blto);
  1168. }
  1169. static DEVICE_ATTR(local_time, 0400, etr_local_time_show, NULL);
  1170. static ssize_t etr_utc_offset_show(struct device *dev,
  1171. struct device_attribute *attr, char *buf)
  1172. {
  1173. struct etr_aib *aib = etr_aib_from_dev(dev);
  1174. if (!aib || !aib->slsw.v3)
  1175. return -ENODATA;
  1176. return sprintf(buf, "%i\n", aib->edf3.buo);
  1177. }
  1178. static DEVICE_ATTR(utc_offset, 0400, etr_utc_offset_show, NULL);
  1179. static struct device_attribute *etr_port_attributes[] = {
  1180. &dev_attr_online,
  1181. &dev_attr_stepping_control,
  1182. &dev_attr_state_code,
  1183. &dev_attr_untuned,
  1184. &dev_attr_network,
  1185. &dev_attr_id,
  1186. &dev_attr_port,
  1187. &dev_attr_coupled,
  1188. &dev_attr_local_time,
  1189. &dev_attr_utc_offset,
  1190. NULL
  1191. };
  1192. static int __init etr_register_port(struct device *dev)
  1193. {
  1194. struct device_attribute **attr;
  1195. int rc;
  1196. rc = device_register(dev);
  1197. if (rc)
  1198. goto out;
  1199. for (attr = etr_port_attributes; *attr; attr++) {
  1200. rc = device_create_file(dev, *attr);
  1201. if (rc)
  1202. goto out_unreg;
  1203. }
  1204. return 0;
  1205. out_unreg:
  1206. for (; attr >= etr_port_attributes; attr--)
  1207. device_remove_file(dev, *attr);
  1208. device_unregister(dev);
  1209. out:
  1210. return rc;
  1211. }
  1212. static void __init etr_unregister_port(struct device *dev)
  1213. {
  1214. struct device_attribute **attr;
  1215. for (attr = etr_port_attributes; *attr; attr++)
  1216. device_remove_file(dev, *attr);
  1217. device_unregister(dev);
  1218. }
  1219. static int __init etr_init_sysfs(void)
  1220. {
  1221. int rc;
  1222. rc = subsys_system_register(&etr_subsys, NULL);
  1223. if (rc)
  1224. goto out;
  1225. rc = device_create_file(etr_subsys.dev_root, &dev_attr_stepping_port);
  1226. if (rc)
  1227. goto out_unreg_subsys;
  1228. rc = device_create_file(etr_subsys.dev_root, &dev_attr_stepping_mode);
  1229. if (rc)
  1230. goto out_remove_stepping_port;
  1231. rc = etr_register_port(&etr_port0_dev);
  1232. if (rc)
  1233. goto out_remove_stepping_mode;
  1234. rc = etr_register_port(&etr_port1_dev);
  1235. if (rc)
  1236. goto out_remove_port0;
  1237. return 0;
  1238. out_remove_port0:
  1239. etr_unregister_port(&etr_port0_dev);
  1240. out_remove_stepping_mode:
  1241. device_remove_file(etr_subsys.dev_root, &dev_attr_stepping_mode);
  1242. out_remove_stepping_port:
  1243. device_remove_file(etr_subsys.dev_root, &dev_attr_stepping_port);
  1244. out_unreg_subsys:
  1245. bus_unregister(&etr_subsys);
  1246. out:
  1247. return rc;
  1248. }
  1249. device_initcall(etr_init_sysfs);
  1250. /*
  1251. * Server Time Protocol (STP) code.
  1252. */
  1253. static int stp_online;
  1254. static struct stp_sstpi stp_info;
  1255. static void *stp_page;
  1256. static void stp_work_fn(struct work_struct *work);
  1257. static DEFINE_MUTEX(stp_work_mutex);
  1258. static DECLARE_WORK(stp_work, stp_work_fn);
  1259. static struct timer_list stp_timer;
  1260. static int __init early_parse_stp(char *p)
  1261. {
  1262. if (strncmp(p, "off", 3) == 0)
  1263. stp_online = 0;
  1264. else if (strncmp(p, "on", 2) == 0)
  1265. stp_online = 1;
  1266. return 0;
  1267. }
  1268. early_param("stp", early_parse_stp);
  1269. /*
  1270. * Reset STP attachment.
  1271. */
  1272. static void __init stp_reset(void)
  1273. {
  1274. int rc;
  1275. stp_page = (void *) get_zeroed_page(GFP_ATOMIC);
  1276. rc = chsc_sstpc(stp_page, STP_OP_CTRL, 0x0000);
  1277. if (rc == 0)
  1278. set_bit(CLOCK_SYNC_HAS_STP, &clock_sync_flags);
  1279. else if (stp_online) {
  1280. pr_warning("The real or virtual hardware system does "
  1281. "not provide an STP interface\n");
  1282. free_page((unsigned long) stp_page);
  1283. stp_page = NULL;
  1284. stp_online = 0;
  1285. }
  1286. }
  1287. static void stp_timeout(unsigned long dummy)
  1288. {
  1289. queue_work(time_sync_wq, &stp_work);
  1290. }
  1291. static int __init stp_init(void)
  1292. {
  1293. if (!test_bit(CLOCK_SYNC_HAS_STP, &clock_sync_flags))
  1294. return 0;
  1295. setup_timer(&stp_timer, stp_timeout, 0UL);
  1296. time_init_wq();
  1297. if (!stp_online)
  1298. return 0;
  1299. queue_work(time_sync_wq, &stp_work);
  1300. return 0;
  1301. }
  1302. arch_initcall(stp_init);
  1303. /*
  1304. * STP timing alert. There are three causes:
  1305. * 1) timing status change
  1306. * 2) link availability change
  1307. * 3) time control parameter change
  1308. * In all three cases we are only interested in the clock source state.
  1309. * If a STP clock source is now available use it.
  1310. */
  1311. static void stp_timing_alert(struct stp_irq_parm *intparm)
  1312. {
  1313. if (intparm->tsc || intparm->lac || intparm->tcpc)
  1314. queue_work(time_sync_wq, &stp_work);
  1315. }
  1316. /*
  1317. * STP sync check machine check. This is called when the timing state
  1318. * changes from the synchronized state to the unsynchronized state.
  1319. * After a STP sync check the clock is not in sync. The machine check
  1320. * is broadcasted to all cpus at the same time.
  1321. */
  1322. void stp_sync_check(void)
  1323. {
  1324. disable_sync_clock(NULL);
  1325. queue_work(time_sync_wq, &stp_work);
  1326. }
  1327. /*
  1328. * STP island condition machine check. This is called when an attached
  1329. * server attempts to communicate over an STP link and the servers
  1330. * have matching CTN ids and have a valid stratum-1 configuration
  1331. * but the configurations do not match.
  1332. */
  1333. void stp_island_check(void)
  1334. {
  1335. disable_sync_clock(NULL);
  1336. queue_work(time_sync_wq, &stp_work);
  1337. }
  1338. static int stp_sync_clock(void *data)
  1339. {
  1340. static int first;
  1341. unsigned long long old_clock, delta;
  1342. struct clock_sync_data *stp_sync;
  1343. int rc;
  1344. stp_sync = data;
  1345. if (xchg(&first, 1) == 1) {
  1346. /* Slave */
  1347. clock_sync_cpu(stp_sync);
  1348. return 0;
  1349. }
  1350. /* Wait until all other cpus entered the sync function. */
  1351. while (atomic_read(&stp_sync->cpus) != 0)
  1352. cpu_relax();
  1353. enable_sync_clock();
  1354. rc = 0;
  1355. if (stp_info.todoff[0] || stp_info.todoff[1] ||
  1356. stp_info.todoff[2] || stp_info.todoff[3] ||
  1357. stp_info.tmd != 2) {
  1358. old_clock = get_clock();
  1359. rc = chsc_sstpc(stp_page, STP_OP_SYNC, 0);
  1360. if (rc == 0) {
  1361. delta = adjust_time(old_clock, get_clock(), 0);
  1362. fixup_clock_comparator(delta);
  1363. rc = chsc_sstpi(stp_page, &stp_info,
  1364. sizeof(struct stp_sstpi));
  1365. if (rc == 0 && stp_info.tmd != 2)
  1366. rc = -EAGAIN;
  1367. }
  1368. }
  1369. if (rc) {
  1370. disable_sync_clock(NULL);
  1371. stp_sync->in_sync = -EAGAIN;
  1372. } else
  1373. stp_sync->in_sync = 1;
  1374. xchg(&first, 0);
  1375. return 0;
  1376. }
  1377. /*
  1378. * STP work. Check for the STP state and take over the clock
  1379. * synchronization if the STP clock source is usable.
  1380. */
  1381. static void stp_work_fn(struct work_struct *work)
  1382. {
  1383. struct clock_sync_data stp_sync;
  1384. int rc;
  1385. /* prevent multiple execution. */
  1386. mutex_lock(&stp_work_mutex);
  1387. if (!stp_online) {
  1388. chsc_sstpc(stp_page, STP_OP_CTRL, 0x0000);
  1389. del_timer_sync(&stp_timer);
  1390. goto out_unlock;
  1391. }
  1392. rc = chsc_sstpc(stp_page, STP_OP_CTRL, 0xb0e0);
  1393. if (rc)
  1394. goto out_unlock;
  1395. rc = chsc_sstpi(stp_page, &stp_info, sizeof(struct stp_sstpi));
  1396. if (rc || stp_info.c == 0)
  1397. goto out_unlock;
  1398. /* Skip synchronization if the clock is already in sync. */
  1399. if (check_sync_clock())
  1400. goto out_unlock;
  1401. memset(&stp_sync, 0, sizeof(stp_sync));
  1402. get_online_cpus();
  1403. atomic_set(&stp_sync.cpus, num_online_cpus() - 1);
  1404. stop_machine(stp_sync_clock, &stp_sync, cpu_online_mask);
  1405. put_online_cpus();
  1406. if (!check_sync_clock())
  1407. /*
  1408. * There is a usable clock but the synchonization failed.
  1409. * Retry after a second.
  1410. */
  1411. mod_timer(&stp_timer, jiffies + HZ);
  1412. out_unlock:
  1413. mutex_unlock(&stp_work_mutex);
  1414. }
  1415. /*
  1416. * STP subsys sysfs interface functions
  1417. */
  1418. static struct bus_type stp_subsys = {
  1419. .name = "stp",
  1420. .dev_name = "stp",
  1421. };
  1422. static ssize_t stp_ctn_id_show(struct device *dev,
  1423. struct device_attribute *attr,
  1424. char *buf)
  1425. {
  1426. if (!stp_online)
  1427. return -ENODATA;
  1428. return sprintf(buf, "%016llx\n",
  1429. *(unsigned long long *) stp_info.ctnid);
  1430. }
  1431. static DEVICE_ATTR(ctn_id, 0400, stp_ctn_id_show, NULL);
  1432. static ssize_t stp_ctn_type_show(struct device *dev,
  1433. struct device_attribute *attr,
  1434. char *buf)
  1435. {
  1436. if (!stp_online)
  1437. return -ENODATA;
  1438. return sprintf(buf, "%i\n", stp_info.ctn);
  1439. }
  1440. static DEVICE_ATTR(ctn_type, 0400, stp_ctn_type_show, NULL);
  1441. static ssize_t stp_dst_offset_show(struct device *dev,
  1442. struct device_attribute *attr,
  1443. char *buf)
  1444. {
  1445. if (!stp_online || !(stp_info.vbits & 0x2000))
  1446. return -ENODATA;
  1447. return sprintf(buf, "%i\n", (int)(s16) stp_info.dsto);
  1448. }
  1449. static DEVICE_ATTR(dst_offset, 0400, stp_dst_offset_show, NULL);
  1450. static ssize_t stp_leap_seconds_show(struct device *dev,
  1451. struct device_attribute *attr,
  1452. char *buf)
  1453. {
  1454. if (!stp_online || !(stp_info.vbits & 0x8000))
  1455. return -ENODATA;
  1456. return sprintf(buf, "%i\n", (int)(s16) stp_info.leaps);
  1457. }
  1458. static DEVICE_ATTR(leap_seconds, 0400, stp_leap_seconds_show, NULL);
  1459. static ssize_t stp_stratum_show(struct device *dev,
  1460. struct device_attribute *attr,
  1461. char *buf)
  1462. {
  1463. if (!stp_online)
  1464. return -ENODATA;
  1465. return sprintf(buf, "%i\n", (int)(s16) stp_info.stratum);
  1466. }
  1467. static DEVICE_ATTR(stratum, 0400, stp_stratum_show, NULL);
  1468. static ssize_t stp_time_offset_show(struct device *dev,
  1469. struct device_attribute *attr,
  1470. char *buf)
  1471. {
  1472. if (!stp_online || !(stp_info.vbits & 0x0800))
  1473. return -ENODATA;
  1474. return sprintf(buf, "%i\n", (int) stp_info.tto);
  1475. }
  1476. static DEVICE_ATTR(time_offset, 0400, stp_time_offset_show, NULL);
  1477. static ssize_t stp_time_zone_offset_show(struct device *dev,
  1478. struct device_attribute *attr,
  1479. char *buf)
  1480. {
  1481. if (!stp_online || !(stp_info.vbits & 0x4000))
  1482. return -ENODATA;
  1483. return sprintf(buf, "%i\n", (int)(s16) stp_info.tzo);
  1484. }
  1485. static DEVICE_ATTR(time_zone_offset, 0400,
  1486. stp_time_zone_offset_show, NULL);
  1487. static ssize_t stp_timing_mode_show(struct device *dev,
  1488. struct device_attribute *attr,
  1489. char *buf)
  1490. {
  1491. if (!stp_online)
  1492. return -ENODATA;
  1493. return sprintf(buf, "%i\n", stp_info.tmd);
  1494. }
  1495. static DEVICE_ATTR(timing_mode, 0400, stp_timing_mode_show, NULL);
  1496. static ssize_t stp_timing_state_show(struct device *dev,
  1497. struct device_attribute *attr,
  1498. char *buf)
  1499. {
  1500. if (!stp_online)
  1501. return -ENODATA;
  1502. return sprintf(buf, "%i\n", stp_info.tst);
  1503. }
  1504. static DEVICE_ATTR(timing_state, 0400, stp_timing_state_show, NULL);
  1505. static ssize_t stp_online_show(struct device *dev,
  1506. struct device_attribute *attr,
  1507. char *buf)
  1508. {
  1509. return sprintf(buf, "%i\n", stp_online);
  1510. }
  1511. static ssize_t stp_online_store(struct device *dev,
  1512. struct device_attribute *attr,
  1513. const char *buf, size_t count)
  1514. {
  1515. unsigned int value;
  1516. value = simple_strtoul(buf, NULL, 0);
  1517. if (value != 0 && value != 1)
  1518. return -EINVAL;
  1519. if (!test_bit(CLOCK_SYNC_HAS_STP, &clock_sync_flags))
  1520. return -EOPNOTSUPP;
  1521. mutex_lock(&clock_sync_mutex);
  1522. stp_online = value;
  1523. if (stp_online)
  1524. set_bit(CLOCK_SYNC_STP, &clock_sync_flags);
  1525. else
  1526. clear_bit(CLOCK_SYNC_STP, &clock_sync_flags);
  1527. queue_work(time_sync_wq, &stp_work);
  1528. mutex_unlock(&clock_sync_mutex);
  1529. return count;
  1530. }
  1531. /*
  1532. * Can't use DEVICE_ATTR because the attribute should be named
  1533. * stp/online but dev_attr_online already exists in this file ..
  1534. */
  1535. static struct device_attribute dev_attr_stp_online = {
  1536. .attr = { .name = "online", .mode = 0600 },
  1537. .show = stp_online_show,
  1538. .store = stp_online_store,
  1539. };
  1540. static struct device_attribute *stp_attributes[] = {
  1541. &dev_attr_ctn_id,
  1542. &dev_attr_ctn_type,
  1543. &dev_attr_dst_offset,
  1544. &dev_attr_leap_seconds,
  1545. &dev_attr_stp_online,
  1546. &dev_attr_stratum,
  1547. &dev_attr_time_offset,
  1548. &dev_attr_time_zone_offset,
  1549. &dev_attr_timing_mode,
  1550. &dev_attr_timing_state,
  1551. NULL
  1552. };
  1553. static int __init stp_init_sysfs(void)
  1554. {
  1555. struct device_attribute **attr;
  1556. int rc;
  1557. rc = subsys_system_register(&stp_subsys, NULL);
  1558. if (rc)
  1559. goto out;
  1560. for (attr = stp_attributes; *attr; attr++) {
  1561. rc = device_create_file(stp_subsys.dev_root, *attr);
  1562. if (rc)
  1563. goto out_unreg;
  1564. }
  1565. return 0;
  1566. out_unreg:
  1567. for (; attr >= stp_attributes; attr--)
  1568. device_remove_file(stp_subsys.dev_root, *attr);
  1569. bus_unregister(&stp_subsys);
  1570. out:
  1571. return rc;
  1572. }
  1573. device_initcall(stp_init_sysfs);