traps.c 30 KB

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  1. /*
  2. * linux/arch/m68k/kernel/traps.c
  3. *
  4. * Copyright (C) 1993, 1994 by Hamish Macdonald
  5. *
  6. * 68040 fixes by Michael Rausch
  7. * 68040 fixes by Martin Apel
  8. * 68040 fixes and writeback by Richard Zidlicky
  9. * 68060 fixes by Roman Hodek
  10. * 68060 fixes by Jesper Skov
  11. *
  12. * This file is subject to the terms and conditions of the GNU General Public
  13. * License. See the file COPYING in the main directory of this archive
  14. * for more details.
  15. */
  16. /*
  17. * Sets up all exception vectors
  18. */
  19. #include <linux/sched.h>
  20. #include <linux/signal.h>
  21. #include <linux/kernel.h>
  22. #include <linux/mm.h>
  23. #include <linux/module.h>
  24. #include <linux/user.h>
  25. #include <linux/string.h>
  26. #include <linux/linkage.h>
  27. #include <linux/init.h>
  28. #include <linux/ptrace.h>
  29. #include <linux/kallsyms.h>
  30. #include <asm/setup.h>
  31. #include <asm/fpu.h>
  32. #include <asm/system.h>
  33. #include <asm/uaccess.h>
  34. #include <asm/traps.h>
  35. #include <asm/pgalloc.h>
  36. #include <asm/machdep.h>
  37. #include <asm/siginfo.h>
  38. static const char *vec_names[] = {
  39. [VEC_RESETSP] = "RESET SP",
  40. [VEC_RESETPC] = "RESET PC",
  41. [VEC_BUSERR] = "BUS ERROR",
  42. [VEC_ADDRERR] = "ADDRESS ERROR",
  43. [VEC_ILLEGAL] = "ILLEGAL INSTRUCTION",
  44. [VEC_ZERODIV] = "ZERO DIVIDE",
  45. [VEC_CHK] = "CHK",
  46. [VEC_TRAP] = "TRAPcc",
  47. [VEC_PRIV] = "PRIVILEGE VIOLATION",
  48. [VEC_TRACE] = "TRACE",
  49. [VEC_LINE10] = "LINE 1010",
  50. [VEC_LINE11] = "LINE 1111",
  51. [VEC_RESV12] = "UNASSIGNED RESERVED 12",
  52. [VEC_COPROC] = "COPROCESSOR PROTOCOL VIOLATION",
  53. [VEC_FORMAT] = "FORMAT ERROR",
  54. [VEC_UNINT] = "UNINITIALIZED INTERRUPT",
  55. [VEC_RESV16] = "UNASSIGNED RESERVED 16",
  56. [VEC_RESV17] = "UNASSIGNED RESERVED 17",
  57. [VEC_RESV18] = "UNASSIGNED RESERVED 18",
  58. [VEC_RESV19] = "UNASSIGNED RESERVED 19",
  59. [VEC_RESV20] = "UNASSIGNED RESERVED 20",
  60. [VEC_RESV21] = "UNASSIGNED RESERVED 21",
  61. [VEC_RESV22] = "UNASSIGNED RESERVED 22",
  62. [VEC_RESV23] = "UNASSIGNED RESERVED 23",
  63. [VEC_SPUR] = "SPURIOUS INTERRUPT",
  64. [VEC_INT1] = "LEVEL 1 INT",
  65. [VEC_INT2] = "LEVEL 2 INT",
  66. [VEC_INT3] = "LEVEL 3 INT",
  67. [VEC_INT4] = "LEVEL 4 INT",
  68. [VEC_INT5] = "LEVEL 5 INT",
  69. [VEC_INT6] = "LEVEL 6 INT",
  70. [VEC_INT7] = "LEVEL 7 INT",
  71. [VEC_SYS] = "SYSCALL",
  72. [VEC_TRAP1] = "TRAP #1",
  73. [VEC_TRAP2] = "TRAP #2",
  74. [VEC_TRAP3] = "TRAP #3",
  75. [VEC_TRAP4] = "TRAP #4",
  76. [VEC_TRAP5] = "TRAP #5",
  77. [VEC_TRAP6] = "TRAP #6",
  78. [VEC_TRAP7] = "TRAP #7",
  79. [VEC_TRAP8] = "TRAP #8",
  80. [VEC_TRAP9] = "TRAP #9",
  81. [VEC_TRAP10] = "TRAP #10",
  82. [VEC_TRAP11] = "TRAP #11",
  83. [VEC_TRAP12] = "TRAP #12",
  84. [VEC_TRAP13] = "TRAP #13",
  85. [VEC_TRAP14] = "TRAP #14",
  86. [VEC_TRAP15] = "TRAP #15",
  87. [VEC_FPBRUC] = "FPCP BSUN",
  88. [VEC_FPIR] = "FPCP INEXACT",
  89. [VEC_FPDIVZ] = "FPCP DIV BY 0",
  90. [VEC_FPUNDER] = "FPCP UNDERFLOW",
  91. [VEC_FPOE] = "FPCP OPERAND ERROR",
  92. [VEC_FPOVER] = "FPCP OVERFLOW",
  93. [VEC_FPNAN] = "FPCP SNAN",
  94. [VEC_FPUNSUP] = "FPCP UNSUPPORTED OPERATION",
  95. [VEC_MMUCFG] = "MMU CONFIGURATION ERROR",
  96. [VEC_MMUILL] = "MMU ILLEGAL OPERATION ERROR",
  97. [VEC_MMUACC] = "MMU ACCESS LEVEL VIOLATION ERROR",
  98. [VEC_RESV59] = "UNASSIGNED RESERVED 59",
  99. [VEC_UNIMPEA] = "UNASSIGNED RESERVED 60",
  100. [VEC_UNIMPII] = "UNASSIGNED RESERVED 61",
  101. [VEC_RESV62] = "UNASSIGNED RESERVED 62",
  102. [VEC_RESV63] = "UNASSIGNED RESERVED 63",
  103. };
  104. static const char *space_names[] = {
  105. [0] = "Space 0",
  106. [USER_DATA] = "User Data",
  107. [USER_PROGRAM] = "User Program",
  108. #ifndef CONFIG_SUN3
  109. [3] = "Space 3",
  110. #else
  111. [FC_CONTROL] = "Control",
  112. #endif
  113. [4] = "Space 4",
  114. [SUPER_DATA] = "Super Data",
  115. [SUPER_PROGRAM] = "Super Program",
  116. [CPU_SPACE] = "CPU"
  117. };
  118. void die_if_kernel(char *,struct pt_regs *,int);
  119. asmlinkage int do_page_fault(struct pt_regs *regs, unsigned long address,
  120. unsigned long error_code);
  121. int send_fault_sig(struct pt_regs *regs);
  122. asmlinkage void trap_c(struct frame *fp);
  123. #if defined (CONFIG_M68060)
  124. static inline void access_error060 (struct frame *fp)
  125. {
  126. unsigned long fslw = fp->un.fmt4.pc; /* is really FSLW for access error */
  127. #ifdef DEBUG
  128. printk("fslw=%#lx, fa=%#lx\n", fslw, fp->un.fmt4.effaddr);
  129. #endif
  130. if (fslw & MMU060_BPE) {
  131. /* branch prediction error -> clear branch cache */
  132. __asm__ __volatile__ ("movec %/cacr,%/d0\n\t"
  133. "orl #0x00400000,%/d0\n\t"
  134. "movec %/d0,%/cacr"
  135. : : : "d0" );
  136. /* return if there's no other error */
  137. if (!(fslw & MMU060_ERR_BITS) && !(fslw & MMU060_SEE))
  138. return;
  139. }
  140. if (fslw & (MMU060_DESC_ERR | MMU060_WP | MMU060_SP)) {
  141. unsigned long errorcode;
  142. unsigned long addr = fp->un.fmt4.effaddr;
  143. if (fslw & MMU060_MA)
  144. addr = (addr + PAGE_SIZE - 1) & PAGE_MASK;
  145. errorcode = 1;
  146. if (fslw & MMU060_DESC_ERR) {
  147. __flush_tlb040_one(addr);
  148. errorcode = 0;
  149. }
  150. if (fslw & MMU060_W)
  151. errorcode |= 2;
  152. #ifdef DEBUG
  153. printk("errorcode = %d\n", errorcode );
  154. #endif
  155. do_page_fault(&fp->ptregs, addr, errorcode);
  156. } else if (fslw & (MMU060_SEE)){
  157. /* Software Emulation Error.
  158. * fault during mem_read/mem_write in ifpsp060/os.S
  159. */
  160. send_fault_sig(&fp->ptregs);
  161. } else if (!(fslw & (MMU060_RE|MMU060_WE)) ||
  162. send_fault_sig(&fp->ptregs) > 0) {
  163. printk("pc=%#lx, fa=%#lx\n", fp->ptregs.pc, fp->un.fmt4.effaddr);
  164. printk( "68060 access error, fslw=%lx\n", fslw );
  165. trap_c( fp );
  166. }
  167. }
  168. #endif /* CONFIG_M68060 */
  169. #if defined (CONFIG_M68040)
  170. static inline unsigned long probe040(int iswrite, unsigned long addr, int wbs)
  171. {
  172. unsigned long mmusr;
  173. mm_segment_t old_fs = get_fs();
  174. set_fs(MAKE_MM_SEG(wbs));
  175. if (iswrite)
  176. asm volatile (".chip 68040; ptestw (%0); .chip 68k" : : "a" (addr));
  177. else
  178. asm volatile (".chip 68040; ptestr (%0); .chip 68k" : : "a" (addr));
  179. asm volatile (".chip 68040; movec %%mmusr,%0; .chip 68k" : "=r" (mmusr));
  180. set_fs(old_fs);
  181. return mmusr;
  182. }
  183. static inline int do_040writeback1(unsigned short wbs, unsigned long wba,
  184. unsigned long wbd)
  185. {
  186. int res = 0;
  187. mm_segment_t old_fs = get_fs();
  188. /* set_fs can not be moved, otherwise put_user() may oops */
  189. set_fs(MAKE_MM_SEG(wbs));
  190. switch (wbs & WBSIZ_040) {
  191. case BA_SIZE_BYTE:
  192. res = put_user(wbd & 0xff, (char __user *)wba);
  193. break;
  194. case BA_SIZE_WORD:
  195. res = put_user(wbd & 0xffff, (short __user *)wba);
  196. break;
  197. case BA_SIZE_LONG:
  198. res = put_user(wbd, (int __user *)wba);
  199. break;
  200. }
  201. /* set_fs can not be moved, otherwise put_user() may oops */
  202. set_fs(old_fs);
  203. #ifdef DEBUG
  204. printk("do_040writeback1, res=%d\n",res);
  205. #endif
  206. return res;
  207. }
  208. /* after an exception in a writeback the stack frame corresponding
  209. * to that exception is discarded, set a few bits in the old frame
  210. * to simulate what it should look like
  211. */
  212. static inline void fix_xframe040(struct frame *fp, unsigned long wba, unsigned short wbs)
  213. {
  214. fp->un.fmt7.faddr = wba;
  215. fp->un.fmt7.ssw = wbs & 0xff;
  216. if (wba != current->thread.faddr)
  217. fp->un.fmt7.ssw |= MA_040;
  218. }
  219. static inline void do_040writebacks(struct frame *fp)
  220. {
  221. int res = 0;
  222. #if 0
  223. if (fp->un.fmt7.wb1s & WBV_040)
  224. printk("access_error040: cannot handle 1st writeback. oops.\n");
  225. #endif
  226. if ((fp->un.fmt7.wb2s & WBV_040) &&
  227. !(fp->un.fmt7.wb2s & WBTT_040)) {
  228. res = do_040writeback1(fp->un.fmt7.wb2s, fp->un.fmt7.wb2a,
  229. fp->un.fmt7.wb2d);
  230. if (res)
  231. fix_xframe040(fp, fp->un.fmt7.wb2a, fp->un.fmt7.wb2s);
  232. else
  233. fp->un.fmt7.wb2s = 0;
  234. }
  235. /* do the 2nd wb only if the first one was successful (except for a kernel wb) */
  236. if (fp->un.fmt7.wb3s & WBV_040 && (!res || fp->un.fmt7.wb3s & 4)) {
  237. res = do_040writeback1(fp->un.fmt7.wb3s, fp->un.fmt7.wb3a,
  238. fp->un.fmt7.wb3d);
  239. if (res)
  240. {
  241. fix_xframe040(fp, fp->un.fmt7.wb3a, fp->un.fmt7.wb3s);
  242. fp->un.fmt7.wb2s = fp->un.fmt7.wb3s;
  243. fp->un.fmt7.wb3s &= (~WBV_040);
  244. fp->un.fmt7.wb2a = fp->un.fmt7.wb3a;
  245. fp->un.fmt7.wb2d = fp->un.fmt7.wb3d;
  246. }
  247. else
  248. fp->un.fmt7.wb3s = 0;
  249. }
  250. if (res)
  251. send_fault_sig(&fp->ptregs);
  252. }
  253. /*
  254. * called from sigreturn(), must ensure userspace code didn't
  255. * manipulate exception frame to circumvent protection, then complete
  256. * pending writebacks
  257. * we just clear TM2 to turn it into a userspace access
  258. */
  259. asmlinkage void berr_040cleanup(struct frame *fp)
  260. {
  261. fp->un.fmt7.wb2s &= ~4;
  262. fp->un.fmt7.wb3s &= ~4;
  263. do_040writebacks(fp);
  264. }
  265. static inline void access_error040(struct frame *fp)
  266. {
  267. unsigned short ssw = fp->un.fmt7.ssw;
  268. unsigned long mmusr;
  269. #ifdef DEBUG
  270. printk("ssw=%#x, fa=%#lx\n", ssw, fp->un.fmt7.faddr);
  271. printk("wb1s=%#x, wb2s=%#x, wb3s=%#x\n", fp->un.fmt7.wb1s,
  272. fp->un.fmt7.wb2s, fp->un.fmt7.wb3s);
  273. printk ("wb2a=%lx, wb3a=%lx, wb2d=%lx, wb3d=%lx\n",
  274. fp->un.fmt7.wb2a, fp->un.fmt7.wb3a,
  275. fp->un.fmt7.wb2d, fp->un.fmt7.wb3d);
  276. #endif
  277. if (ssw & ATC_040) {
  278. unsigned long addr = fp->un.fmt7.faddr;
  279. unsigned long errorcode;
  280. /*
  281. * The MMU status has to be determined AFTER the address
  282. * has been corrected if there was a misaligned access (MA).
  283. */
  284. if (ssw & MA_040)
  285. addr = (addr + 7) & -8;
  286. /* MMU error, get the MMUSR info for this access */
  287. mmusr = probe040(!(ssw & RW_040), addr, ssw);
  288. #ifdef DEBUG
  289. printk("mmusr = %lx\n", mmusr);
  290. #endif
  291. errorcode = 1;
  292. if (!(mmusr & MMU_R_040)) {
  293. /* clear the invalid atc entry */
  294. __flush_tlb040_one(addr);
  295. errorcode = 0;
  296. }
  297. /* despite what documentation seems to say, RMW
  298. * accesses have always both the LK and RW bits set */
  299. if (!(ssw & RW_040) || (ssw & LK_040))
  300. errorcode |= 2;
  301. if (do_page_fault(&fp->ptregs, addr, errorcode)) {
  302. #ifdef DEBUG
  303. printk("do_page_fault() !=0\n");
  304. #endif
  305. if (user_mode(&fp->ptregs)){
  306. /* delay writebacks after signal delivery */
  307. #ifdef DEBUG
  308. printk(".. was usermode - return\n");
  309. #endif
  310. return;
  311. }
  312. /* disable writeback into user space from kernel
  313. * (if do_page_fault didn't fix the mapping,
  314. * the writeback won't do good)
  315. */
  316. disable_wb:
  317. #ifdef DEBUG
  318. printk(".. disabling wb2\n");
  319. #endif
  320. if (fp->un.fmt7.wb2a == fp->un.fmt7.faddr)
  321. fp->un.fmt7.wb2s &= ~WBV_040;
  322. if (fp->un.fmt7.wb3a == fp->un.fmt7.faddr)
  323. fp->un.fmt7.wb3s &= ~WBV_040;
  324. }
  325. } else {
  326. /* In case of a bus error we either kill the process or expect
  327. * the kernel to catch the fault, which then is also responsible
  328. * for cleaning up the mess.
  329. */
  330. current->thread.signo = SIGBUS;
  331. current->thread.faddr = fp->un.fmt7.faddr;
  332. if (send_fault_sig(&fp->ptregs) >= 0)
  333. printk("68040 bus error (ssw=%x, faddr=%lx)\n", ssw,
  334. fp->un.fmt7.faddr);
  335. goto disable_wb;
  336. }
  337. do_040writebacks(fp);
  338. }
  339. #endif /* CONFIG_M68040 */
  340. #if defined(CONFIG_SUN3)
  341. #include <asm/sun3mmu.h>
  342. extern int mmu_emu_handle_fault (unsigned long, int, int);
  343. /* sun3 version of bus_error030 */
  344. static inline void bus_error030 (struct frame *fp)
  345. {
  346. unsigned char buserr_type = sun3_get_buserr ();
  347. unsigned long addr, errorcode;
  348. unsigned short ssw = fp->un.fmtb.ssw;
  349. extern unsigned long _sun3_map_test_start, _sun3_map_test_end;
  350. #ifdef DEBUG
  351. if (ssw & (FC | FB))
  352. printk ("Instruction fault at %#010lx\n",
  353. ssw & FC ?
  354. fp->ptregs.format == 0xa ? fp->ptregs.pc + 2 : fp->un.fmtb.baddr - 2
  355. :
  356. fp->ptregs.format == 0xa ? fp->ptregs.pc + 4 : fp->un.fmtb.baddr);
  357. if (ssw & DF)
  358. printk ("Data %s fault at %#010lx in %s (pc=%#lx)\n",
  359. ssw & RW ? "read" : "write",
  360. fp->un.fmtb.daddr,
  361. space_names[ssw & DFC], fp->ptregs.pc);
  362. #endif
  363. /*
  364. * Check if this page should be demand-mapped. This needs to go before
  365. * the testing for a bad kernel-space access (demand-mapping applies
  366. * to kernel accesses too).
  367. */
  368. if ((ssw & DF)
  369. && (buserr_type & (SUN3_BUSERR_PROTERR | SUN3_BUSERR_INVALID))) {
  370. if (mmu_emu_handle_fault (fp->un.fmtb.daddr, ssw & RW, 0))
  371. return;
  372. }
  373. /* Check for kernel-space pagefault (BAD). */
  374. if (fp->ptregs.sr & PS_S) {
  375. /* kernel fault must be a data fault to user space */
  376. if (! ((ssw & DF) && ((ssw & DFC) == USER_DATA))) {
  377. // try checking the kernel mappings before surrender
  378. if (mmu_emu_handle_fault (fp->un.fmtb.daddr, ssw & RW, 1))
  379. return;
  380. /* instruction fault or kernel data fault! */
  381. if (ssw & (FC | FB))
  382. printk ("Instruction fault at %#010lx\n",
  383. fp->ptregs.pc);
  384. if (ssw & DF) {
  385. /* was this fault incurred testing bus mappings? */
  386. if((fp->ptregs.pc >= (unsigned long)&_sun3_map_test_start) &&
  387. (fp->ptregs.pc <= (unsigned long)&_sun3_map_test_end)) {
  388. send_fault_sig(&fp->ptregs);
  389. return;
  390. }
  391. printk ("Data %s fault at %#010lx in %s (pc=%#lx)\n",
  392. ssw & RW ? "read" : "write",
  393. fp->un.fmtb.daddr,
  394. space_names[ssw & DFC], fp->ptregs.pc);
  395. }
  396. printk ("BAD KERNEL BUSERR\n");
  397. die_if_kernel("Oops", &fp->ptregs,0);
  398. force_sig(SIGKILL, current);
  399. return;
  400. }
  401. } else {
  402. /* user fault */
  403. if (!(ssw & (FC | FB)) && !(ssw & DF))
  404. /* not an instruction fault or data fault! BAD */
  405. panic ("USER BUSERR w/o instruction or data fault");
  406. }
  407. /* First handle the data fault, if any. */
  408. if (ssw & DF) {
  409. addr = fp->un.fmtb.daddr;
  410. // errorcode bit 0: 0 -> no page 1 -> protection fault
  411. // errorcode bit 1: 0 -> read fault 1 -> write fault
  412. // (buserr_type & SUN3_BUSERR_PROTERR) -> protection fault
  413. // (buserr_type & SUN3_BUSERR_INVALID) -> invalid page fault
  414. if (buserr_type & SUN3_BUSERR_PROTERR)
  415. errorcode = 0x01;
  416. else if (buserr_type & SUN3_BUSERR_INVALID)
  417. errorcode = 0x00;
  418. else {
  419. #ifdef DEBUG
  420. printk ("*** unexpected busfault type=%#04x\n", buserr_type);
  421. printk ("invalid %s access at %#lx from pc %#lx\n",
  422. !(ssw & RW) ? "write" : "read", addr,
  423. fp->ptregs.pc);
  424. #endif
  425. die_if_kernel ("Oops", &fp->ptregs, buserr_type);
  426. force_sig (SIGBUS, current);
  427. return;
  428. }
  429. //todo: wtf is RM bit? --m
  430. if (!(ssw & RW) || ssw & RM)
  431. errorcode |= 0x02;
  432. /* Handle page fault. */
  433. do_page_fault (&fp->ptregs, addr, errorcode);
  434. /* Retry the data fault now. */
  435. return;
  436. }
  437. /* Now handle the instruction fault. */
  438. /* Get the fault address. */
  439. if (fp->ptregs.format == 0xA)
  440. addr = fp->ptregs.pc + 4;
  441. else
  442. addr = fp->un.fmtb.baddr;
  443. if (ssw & FC)
  444. addr -= 2;
  445. if (buserr_type & SUN3_BUSERR_INVALID) {
  446. if (!mmu_emu_handle_fault (fp->un.fmtb.daddr, 1, 0))
  447. do_page_fault (&fp->ptregs, addr, 0);
  448. } else {
  449. #ifdef DEBUG
  450. printk ("protection fault on insn access (segv).\n");
  451. #endif
  452. force_sig (SIGSEGV, current);
  453. }
  454. }
  455. #else
  456. #if defined(CPU_M68020_OR_M68030)
  457. static inline void bus_error030 (struct frame *fp)
  458. {
  459. volatile unsigned short temp;
  460. unsigned short mmusr;
  461. unsigned long addr, errorcode;
  462. unsigned short ssw = fp->un.fmtb.ssw;
  463. #ifdef DEBUG
  464. unsigned long desc;
  465. printk ("pid = %x ", current->pid);
  466. printk ("SSW=%#06x ", ssw);
  467. if (ssw & (FC | FB))
  468. printk ("Instruction fault at %#010lx\n",
  469. ssw & FC ?
  470. fp->ptregs.format == 0xa ? fp->ptregs.pc + 2 : fp->un.fmtb.baddr - 2
  471. :
  472. fp->ptregs.format == 0xa ? fp->ptregs.pc + 4 : fp->un.fmtb.baddr);
  473. if (ssw & DF)
  474. printk ("Data %s fault at %#010lx in %s (pc=%#lx)\n",
  475. ssw & RW ? "read" : "write",
  476. fp->un.fmtb.daddr,
  477. space_names[ssw & DFC], fp->ptregs.pc);
  478. #endif
  479. /* ++andreas: If a data fault and an instruction fault happen
  480. at the same time map in both pages. */
  481. /* First handle the data fault, if any. */
  482. if (ssw & DF) {
  483. addr = fp->un.fmtb.daddr;
  484. #ifdef DEBUG
  485. asm volatile ("ptestr %3,%2@,#7,%0\n\t"
  486. "pmove %%psr,%1@"
  487. : "=a&" (desc)
  488. : "a" (&temp), "a" (addr), "d" (ssw));
  489. #else
  490. asm volatile ("ptestr %2,%1@,#7\n\t"
  491. "pmove %%psr,%0@"
  492. : : "a" (&temp), "a" (addr), "d" (ssw));
  493. #endif
  494. mmusr = temp;
  495. #ifdef DEBUG
  496. printk("mmusr is %#x for addr %#lx in task %p\n",
  497. mmusr, addr, current);
  498. printk("descriptor address is %#lx, contents %#lx\n",
  499. __va(desc), *(unsigned long *)__va(desc));
  500. #endif
  501. errorcode = (mmusr & MMU_I) ? 0 : 1;
  502. if (!(ssw & RW) || (ssw & RM))
  503. errorcode |= 2;
  504. if (mmusr & (MMU_I | MMU_WP)) {
  505. if (ssw & 4) {
  506. printk("Data %s fault at %#010lx in %s (pc=%#lx)\n",
  507. ssw & RW ? "read" : "write",
  508. fp->un.fmtb.daddr,
  509. space_names[ssw & DFC], fp->ptregs.pc);
  510. goto buserr;
  511. }
  512. /* Don't try to do anything further if an exception was
  513. handled. */
  514. if (do_page_fault (&fp->ptregs, addr, errorcode) < 0)
  515. return;
  516. } else if (!(mmusr & MMU_I)) {
  517. /* probably a 020 cas fault */
  518. if (!(ssw & RM) && send_fault_sig(&fp->ptregs) > 0)
  519. printk("unexpected bus error (%#x,%#x)\n", ssw, mmusr);
  520. } else if (mmusr & (MMU_B|MMU_L|MMU_S)) {
  521. printk("invalid %s access at %#lx from pc %#lx\n",
  522. !(ssw & RW) ? "write" : "read", addr,
  523. fp->ptregs.pc);
  524. die_if_kernel("Oops",&fp->ptregs,mmusr);
  525. force_sig(SIGSEGV, current);
  526. return;
  527. } else {
  528. #if 0
  529. static volatile long tlong;
  530. #endif
  531. printk("weird %s access at %#lx from pc %#lx (ssw is %#x)\n",
  532. !(ssw & RW) ? "write" : "read", addr,
  533. fp->ptregs.pc, ssw);
  534. asm volatile ("ptestr #1,%1@,#0\n\t"
  535. "pmove %%psr,%0@"
  536. : /* no outputs */
  537. : "a" (&temp), "a" (addr));
  538. mmusr = temp;
  539. printk ("level 0 mmusr is %#x\n", mmusr);
  540. #if 0
  541. asm volatile ("pmove %%tt0,%0@"
  542. : /* no outputs */
  543. : "a" (&tlong));
  544. printk("tt0 is %#lx, ", tlong);
  545. asm volatile ("pmove %%tt1,%0@"
  546. : /* no outputs */
  547. : "a" (&tlong));
  548. printk("tt1 is %#lx\n", tlong);
  549. #endif
  550. #ifdef DEBUG
  551. printk("Unknown SIGSEGV - 1\n");
  552. #endif
  553. die_if_kernel("Oops",&fp->ptregs,mmusr);
  554. force_sig(SIGSEGV, current);
  555. return;
  556. }
  557. /* setup an ATC entry for the access about to be retried */
  558. if (!(ssw & RW) || (ssw & RM))
  559. asm volatile ("ploadw %1,%0@" : /* no outputs */
  560. : "a" (addr), "d" (ssw));
  561. else
  562. asm volatile ("ploadr %1,%0@" : /* no outputs */
  563. : "a" (addr), "d" (ssw));
  564. }
  565. /* Now handle the instruction fault. */
  566. if (!(ssw & (FC|FB)))
  567. return;
  568. if (fp->ptregs.sr & PS_S) {
  569. printk("Instruction fault at %#010lx\n",
  570. fp->ptregs.pc);
  571. buserr:
  572. printk ("BAD KERNEL BUSERR\n");
  573. die_if_kernel("Oops",&fp->ptregs,0);
  574. force_sig(SIGKILL, current);
  575. return;
  576. }
  577. /* get the fault address */
  578. if (fp->ptregs.format == 10)
  579. addr = fp->ptregs.pc + 4;
  580. else
  581. addr = fp->un.fmtb.baddr;
  582. if (ssw & FC)
  583. addr -= 2;
  584. if ((ssw & DF) && ((addr ^ fp->un.fmtb.daddr) & PAGE_MASK) == 0)
  585. /* Insn fault on same page as data fault. But we
  586. should still create the ATC entry. */
  587. goto create_atc_entry;
  588. #ifdef DEBUG
  589. asm volatile ("ptestr #1,%2@,#7,%0\n\t"
  590. "pmove %%psr,%1@"
  591. : "=a&" (desc)
  592. : "a" (&temp), "a" (addr));
  593. #else
  594. asm volatile ("ptestr #1,%1@,#7\n\t"
  595. "pmove %%psr,%0@"
  596. : : "a" (&temp), "a" (addr));
  597. #endif
  598. mmusr = temp;
  599. #ifdef DEBUG
  600. printk ("mmusr is %#x for addr %#lx in task %p\n",
  601. mmusr, addr, current);
  602. printk ("descriptor address is %#lx, contents %#lx\n",
  603. __va(desc), *(unsigned long *)__va(desc));
  604. #endif
  605. if (mmusr & MMU_I)
  606. do_page_fault (&fp->ptregs, addr, 0);
  607. else if (mmusr & (MMU_B|MMU_L|MMU_S)) {
  608. printk ("invalid insn access at %#lx from pc %#lx\n",
  609. addr, fp->ptregs.pc);
  610. #ifdef DEBUG
  611. printk("Unknown SIGSEGV - 2\n");
  612. #endif
  613. die_if_kernel("Oops",&fp->ptregs,mmusr);
  614. force_sig(SIGSEGV, current);
  615. return;
  616. }
  617. create_atc_entry:
  618. /* setup an ATC entry for the access about to be retried */
  619. asm volatile ("ploadr #2,%0@" : /* no outputs */
  620. : "a" (addr));
  621. }
  622. #endif /* CPU_M68020_OR_M68030 */
  623. #endif /* !CONFIG_SUN3 */
  624. #if defined(CONFIG_COLDFIRE) && defined(CONFIG_MMU)
  625. #include <asm/mcfmmu.h>
  626. /*
  627. * The following table converts the FS encoding of a ColdFire
  628. * exception stack frame into the error_code value needed by
  629. * do_fault.
  630. */
  631. static const unsigned char fs_err_code[] = {
  632. 0, /* 0000 */
  633. 0, /* 0001 */
  634. 0, /* 0010 */
  635. 0, /* 0011 */
  636. 1, /* 0100 */
  637. 0, /* 0101 */
  638. 0, /* 0110 */
  639. 0, /* 0111 */
  640. 2, /* 1000 */
  641. 3, /* 1001 */
  642. 2, /* 1010 */
  643. 0, /* 1011 */
  644. 1, /* 1100 */
  645. 1, /* 1101 */
  646. 0, /* 1110 */
  647. 0 /* 1111 */
  648. };
  649. static inline void access_errorcf(unsigned int fs, struct frame *fp)
  650. {
  651. unsigned long mmusr, addr;
  652. unsigned int err_code;
  653. int need_page_fault;
  654. mmusr = mmu_read(MMUSR);
  655. addr = mmu_read(MMUAR);
  656. /*
  657. * error_code:
  658. * bit 0 == 0 means no page found, 1 means protection fault
  659. * bit 1 == 0 means read, 1 means write
  660. */
  661. switch (fs) {
  662. case 5: /* 0101 TLB opword X miss */
  663. need_page_fault = cf_tlb_miss(&fp->ptregs, 0, 0, 0);
  664. addr = fp->ptregs.pc;
  665. break;
  666. case 6: /* 0110 TLB extension word X miss */
  667. need_page_fault = cf_tlb_miss(&fp->ptregs, 0, 0, 1);
  668. addr = fp->ptregs.pc + sizeof(long);
  669. break;
  670. case 10: /* 1010 TLB W miss */
  671. need_page_fault = cf_tlb_miss(&fp->ptregs, 1, 1, 0);
  672. break;
  673. case 14: /* 1110 TLB R miss */
  674. need_page_fault = cf_tlb_miss(&fp->ptregs, 0, 1, 0);
  675. break;
  676. default:
  677. /* 0000 Normal */
  678. /* 0001 Reserved */
  679. /* 0010 Interrupt during debug service routine */
  680. /* 0011 Reserved */
  681. /* 0100 X Protection */
  682. /* 0111 IFP in emulator mode */
  683. /* 1000 W Protection*/
  684. /* 1001 Write error*/
  685. /* 1011 Reserved*/
  686. /* 1100 R Protection*/
  687. /* 1101 R Protection*/
  688. /* 1111 OEP in emulator mode*/
  689. need_page_fault = 1;
  690. break;
  691. }
  692. if (need_page_fault) {
  693. err_code = fs_err_code[fs];
  694. if ((fs == 13) && (mmusr & MMUSR_WF)) /* rd-mod-wr access */
  695. err_code |= 2; /* bit1 - write, bit0 - protection */
  696. do_page_fault(&fp->ptregs, addr, err_code);
  697. }
  698. }
  699. #endif /* CONFIG_COLDFIRE CONFIG_MMU */
  700. asmlinkage void buserr_c(struct frame *fp)
  701. {
  702. /* Only set esp0 if coming from user mode */
  703. if (user_mode(&fp->ptregs))
  704. current->thread.esp0 = (unsigned long) fp;
  705. #ifdef DEBUG
  706. printk ("*** Bus Error *** Format is %x\n", fp->ptregs.format);
  707. #endif
  708. #if defined(CONFIG_COLDFIRE) && defined(CONFIG_MMU)
  709. if (CPU_IS_COLDFIRE) {
  710. unsigned int fs;
  711. fs = (fp->ptregs.vector & 0x3) |
  712. ((fp->ptregs.vector & 0xc00) >> 8);
  713. switch (fs) {
  714. case 0x5:
  715. case 0x6:
  716. case 0x7:
  717. case 0x9:
  718. case 0xa:
  719. case 0xd:
  720. case 0xe:
  721. case 0xf:
  722. access_errorcf(fs, fp);
  723. return;
  724. default:
  725. break;
  726. }
  727. }
  728. #endif /* CONFIG_COLDFIRE && CONFIG_MMU */
  729. switch (fp->ptregs.format) {
  730. #if defined (CONFIG_M68060)
  731. case 4: /* 68060 access error */
  732. access_error060 (fp);
  733. break;
  734. #endif
  735. #if defined (CONFIG_M68040)
  736. case 0x7: /* 68040 access error */
  737. access_error040 (fp);
  738. break;
  739. #endif
  740. #if defined (CPU_M68020_OR_M68030)
  741. case 0xa:
  742. case 0xb:
  743. bus_error030 (fp);
  744. break;
  745. #endif
  746. default:
  747. die_if_kernel("bad frame format",&fp->ptregs,0);
  748. #ifdef DEBUG
  749. printk("Unknown SIGSEGV - 4\n");
  750. #endif
  751. force_sig(SIGSEGV, current);
  752. }
  753. }
  754. static int kstack_depth_to_print = 48;
  755. void show_trace(unsigned long *stack)
  756. {
  757. unsigned long *endstack;
  758. unsigned long addr;
  759. int i;
  760. printk("Call Trace:");
  761. addr = (unsigned long)stack + THREAD_SIZE - 1;
  762. endstack = (unsigned long *)(addr & -THREAD_SIZE);
  763. i = 0;
  764. while (stack + 1 <= endstack) {
  765. addr = *stack++;
  766. /*
  767. * If the address is either in the text segment of the
  768. * kernel, or in the region which contains vmalloc'ed
  769. * memory, it *may* be the address of a calling
  770. * routine; if so, print it so that someone tracing
  771. * down the cause of the crash will be able to figure
  772. * out the call path that was taken.
  773. */
  774. if (__kernel_text_address(addr)) {
  775. #ifndef CONFIG_KALLSYMS
  776. if (i % 5 == 0)
  777. printk("\n ");
  778. #endif
  779. printk(" [<%08lx>] %pS\n", addr, (void *)addr);
  780. i++;
  781. }
  782. }
  783. printk("\n");
  784. }
  785. void show_registers(struct pt_regs *regs)
  786. {
  787. struct frame *fp = (struct frame *)regs;
  788. mm_segment_t old_fs = get_fs();
  789. u16 c, *cp;
  790. unsigned long addr;
  791. int i;
  792. print_modules();
  793. printk("PC: [<%08lx>] %pS\n", regs->pc, (void *)regs->pc);
  794. printk("SR: %04x SP: %p a2: %08lx\n", regs->sr, regs, regs->a2);
  795. printk("d0: %08lx d1: %08lx d2: %08lx d3: %08lx\n",
  796. regs->d0, regs->d1, regs->d2, regs->d3);
  797. printk("d4: %08lx d5: %08lx a0: %08lx a1: %08lx\n",
  798. regs->d4, regs->d5, regs->a0, regs->a1);
  799. printk("Process %s (pid: %d, task=%p)\n",
  800. current->comm, task_pid_nr(current), current);
  801. addr = (unsigned long)&fp->un;
  802. printk("Frame format=%X ", regs->format);
  803. switch (regs->format) {
  804. case 0x2:
  805. printk("instr addr=%08lx\n", fp->un.fmt2.iaddr);
  806. addr += sizeof(fp->un.fmt2);
  807. break;
  808. case 0x3:
  809. printk("eff addr=%08lx\n", fp->un.fmt3.effaddr);
  810. addr += sizeof(fp->un.fmt3);
  811. break;
  812. case 0x4:
  813. printk((CPU_IS_060 ? "fault addr=%08lx fslw=%08lx\n"
  814. : "eff addr=%08lx pc=%08lx\n"),
  815. fp->un.fmt4.effaddr, fp->un.fmt4.pc);
  816. addr += sizeof(fp->un.fmt4);
  817. break;
  818. case 0x7:
  819. printk("eff addr=%08lx ssw=%04x faddr=%08lx\n",
  820. fp->un.fmt7.effaddr, fp->un.fmt7.ssw, fp->un.fmt7.faddr);
  821. printk("wb 1 stat/addr/data: %04x %08lx %08lx\n",
  822. fp->un.fmt7.wb1s, fp->un.fmt7.wb1a, fp->un.fmt7.wb1dpd0);
  823. printk("wb 2 stat/addr/data: %04x %08lx %08lx\n",
  824. fp->un.fmt7.wb2s, fp->un.fmt7.wb2a, fp->un.fmt7.wb2d);
  825. printk("wb 3 stat/addr/data: %04x %08lx %08lx\n",
  826. fp->un.fmt7.wb3s, fp->un.fmt7.wb3a, fp->un.fmt7.wb3d);
  827. printk("push data: %08lx %08lx %08lx %08lx\n",
  828. fp->un.fmt7.wb1dpd0, fp->un.fmt7.pd1, fp->un.fmt7.pd2,
  829. fp->un.fmt7.pd3);
  830. addr += sizeof(fp->un.fmt7);
  831. break;
  832. case 0x9:
  833. printk("instr addr=%08lx\n", fp->un.fmt9.iaddr);
  834. addr += sizeof(fp->un.fmt9);
  835. break;
  836. case 0xa:
  837. printk("ssw=%04x isc=%04x isb=%04x daddr=%08lx dobuf=%08lx\n",
  838. fp->un.fmta.ssw, fp->un.fmta.isc, fp->un.fmta.isb,
  839. fp->un.fmta.daddr, fp->un.fmta.dobuf);
  840. addr += sizeof(fp->un.fmta);
  841. break;
  842. case 0xb:
  843. printk("ssw=%04x isc=%04x isb=%04x daddr=%08lx dobuf=%08lx\n",
  844. fp->un.fmtb.ssw, fp->un.fmtb.isc, fp->un.fmtb.isb,
  845. fp->un.fmtb.daddr, fp->un.fmtb.dobuf);
  846. printk("baddr=%08lx dibuf=%08lx ver=%x\n",
  847. fp->un.fmtb.baddr, fp->un.fmtb.dibuf, fp->un.fmtb.ver);
  848. addr += sizeof(fp->un.fmtb);
  849. break;
  850. default:
  851. printk("\n");
  852. }
  853. show_stack(NULL, (unsigned long *)addr);
  854. printk("Code:");
  855. set_fs(KERNEL_DS);
  856. cp = (u16 *)regs->pc;
  857. for (i = -8; i < 16; i++) {
  858. if (get_user(c, cp + i) && i >= 0) {
  859. printk(" Bad PC value.");
  860. break;
  861. }
  862. printk(i ? " %04x" : " <%04x>", c);
  863. }
  864. set_fs(old_fs);
  865. printk ("\n");
  866. }
  867. void show_stack(struct task_struct *task, unsigned long *stack)
  868. {
  869. unsigned long *p;
  870. unsigned long *endstack;
  871. int i;
  872. if (!stack) {
  873. if (task)
  874. stack = (unsigned long *)task->thread.esp0;
  875. else
  876. stack = (unsigned long *)&stack;
  877. }
  878. endstack = (unsigned long *)(((unsigned long)stack + THREAD_SIZE - 1) & -THREAD_SIZE);
  879. printk("Stack from %08lx:", (unsigned long)stack);
  880. p = stack;
  881. for (i = 0; i < kstack_depth_to_print; i++) {
  882. if (p + 1 > endstack)
  883. break;
  884. if (i % 8 == 0)
  885. printk("\n ");
  886. printk(" %08lx", *p++);
  887. }
  888. printk("\n");
  889. show_trace(stack);
  890. }
  891. /*
  892. * The architecture-independent backtrace generator
  893. */
  894. void dump_stack(void)
  895. {
  896. unsigned long stack;
  897. show_trace(&stack);
  898. }
  899. EXPORT_SYMBOL(dump_stack);
  900. /*
  901. * The vector number returned in the frame pointer may also contain
  902. * the "fs" (Fault Status) bits on ColdFire. These are in the bottom
  903. * 2 bits, and upper 2 bits. So we need to mask out the real vector
  904. * number before using it in comparisons. You don't need to do this on
  905. * real 68k parts, but it won't hurt either.
  906. */
  907. void bad_super_trap (struct frame *fp)
  908. {
  909. int vector = (fp->ptregs.vector >> 2) & 0xff;
  910. console_verbose();
  911. if (vector < ARRAY_SIZE(vec_names))
  912. printk ("*** %s *** FORMAT=%X\n",
  913. vec_names[vector],
  914. fp->ptregs.format);
  915. else
  916. printk ("*** Exception %d *** FORMAT=%X\n",
  917. vector, fp->ptregs.format);
  918. if (vector == VEC_ADDRERR && CPU_IS_020_OR_030) {
  919. unsigned short ssw = fp->un.fmtb.ssw;
  920. printk ("SSW=%#06x ", ssw);
  921. if (ssw & RC)
  922. printk ("Pipe stage C instruction fault at %#010lx\n",
  923. (fp->ptregs.format) == 0xA ?
  924. fp->ptregs.pc + 2 : fp->un.fmtb.baddr - 2);
  925. if (ssw & RB)
  926. printk ("Pipe stage B instruction fault at %#010lx\n",
  927. (fp->ptregs.format) == 0xA ?
  928. fp->ptregs.pc + 4 : fp->un.fmtb.baddr);
  929. if (ssw & DF)
  930. printk ("Data %s fault at %#010lx in %s (pc=%#lx)\n",
  931. ssw & RW ? "read" : "write",
  932. fp->un.fmtb.daddr, space_names[ssw & DFC],
  933. fp->ptregs.pc);
  934. }
  935. printk ("Current process id is %d\n", task_pid_nr(current));
  936. die_if_kernel("BAD KERNEL TRAP", &fp->ptregs, 0);
  937. }
  938. asmlinkage void trap_c(struct frame *fp)
  939. {
  940. int sig;
  941. int vector = (fp->ptregs.vector >> 2) & 0xff;
  942. siginfo_t info;
  943. if (fp->ptregs.sr & PS_S) {
  944. if (vector == VEC_TRACE) {
  945. /* traced a trapping instruction on a 68020/30,
  946. * real exception will be executed afterwards.
  947. */
  948. } else if (!handle_kernel_fault(&fp->ptregs))
  949. bad_super_trap(fp);
  950. return;
  951. }
  952. /* send the appropriate signal to the user program */
  953. switch (vector) {
  954. case VEC_ADDRERR:
  955. info.si_code = BUS_ADRALN;
  956. sig = SIGBUS;
  957. break;
  958. case VEC_ILLEGAL:
  959. case VEC_LINE10:
  960. case VEC_LINE11:
  961. info.si_code = ILL_ILLOPC;
  962. sig = SIGILL;
  963. break;
  964. case VEC_PRIV:
  965. info.si_code = ILL_PRVOPC;
  966. sig = SIGILL;
  967. break;
  968. case VEC_COPROC:
  969. info.si_code = ILL_COPROC;
  970. sig = SIGILL;
  971. break;
  972. case VEC_TRAP1:
  973. case VEC_TRAP2:
  974. case VEC_TRAP3:
  975. case VEC_TRAP4:
  976. case VEC_TRAP5:
  977. case VEC_TRAP6:
  978. case VEC_TRAP7:
  979. case VEC_TRAP8:
  980. case VEC_TRAP9:
  981. case VEC_TRAP10:
  982. case VEC_TRAP11:
  983. case VEC_TRAP12:
  984. case VEC_TRAP13:
  985. case VEC_TRAP14:
  986. info.si_code = ILL_ILLTRP;
  987. sig = SIGILL;
  988. break;
  989. case VEC_FPBRUC:
  990. case VEC_FPOE:
  991. case VEC_FPNAN:
  992. info.si_code = FPE_FLTINV;
  993. sig = SIGFPE;
  994. break;
  995. case VEC_FPIR:
  996. info.si_code = FPE_FLTRES;
  997. sig = SIGFPE;
  998. break;
  999. case VEC_FPDIVZ:
  1000. info.si_code = FPE_FLTDIV;
  1001. sig = SIGFPE;
  1002. break;
  1003. case VEC_FPUNDER:
  1004. info.si_code = FPE_FLTUND;
  1005. sig = SIGFPE;
  1006. break;
  1007. case VEC_FPOVER:
  1008. info.si_code = FPE_FLTOVF;
  1009. sig = SIGFPE;
  1010. break;
  1011. case VEC_ZERODIV:
  1012. info.si_code = FPE_INTDIV;
  1013. sig = SIGFPE;
  1014. break;
  1015. case VEC_CHK:
  1016. case VEC_TRAP:
  1017. info.si_code = FPE_INTOVF;
  1018. sig = SIGFPE;
  1019. break;
  1020. case VEC_TRACE: /* ptrace single step */
  1021. info.si_code = TRAP_TRACE;
  1022. sig = SIGTRAP;
  1023. break;
  1024. case VEC_TRAP15: /* breakpoint */
  1025. info.si_code = TRAP_BRKPT;
  1026. sig = SIGTRAP;
  1027. break;
  1028. default:
  1029. info.si_code = ILL_ILLOPC;
  1030. sig = SIGILL;
  1031. break;
  1032. }
  1033. info.si_signo = sig;
  1034. info.si_errno = 0;
  1035. switch (fp->ptregs.format) {
  1036. default:
  1037. info.si_addr = (void *) fp->ptregs.pc;
  1038. break;
  1039. case 2:
  1040. info.si_addr = (void *) fp->un.fmt2.iaddr;
  1041. break;
  1042. case 7:
  1043. info.si_addr = (void *) fp->un.fmt7.effaddr;
  1044. break;
  1045. case 9:
  1046. info.si_addr = (void *) fp->un.fmt9.iaddr;
  1047. break;
  1048. case 10:
  1049. info.si_addr = (void *) fp->un.fmta.daddr;
  1050. break;
  1051. case 11:
  1052. info.si_addr = (void *) fp->un.fmtb.daddr;
  1053. break;
  1054. }
  1055. force_sig_info (sig, &info, current);
  1056. }
  1057. void die_if_kernel (char *str, struct pt_regs *fp, int nr)
  1058. {
  1059. if (!(fp->sr & PS_S))
  1060. return;
  1061. console_verbose();
  1062. printk("%s: %08x\n",str,nr);
  1063. show_registers(fp);
  1064. add_taint(TAINT_DIE);
  1065. do_exit(SIGSEGV);
  1066. }
  1067. asmlinkage void set_esp0(unsigned long ssp)
  1068. {
  1069. current->thread.esp0 = ssp;
  1070. }
  1071. /*
  1072. * This function is called if an error occur while accessing
  1073. * user-space from the fpsp040 code.
  1074. */
  1075. asmlinkage void fpsp040_die(void)
  1076. {
  1077. do_exit(SIGSEGV);
  1078. }
  1079. #ifdef CONFIG_M68KFPU_EMU
  1080. asmlinkage void fpemu_signal(int signal, int code, void *addr)
  1081. {
  1082. siginfo_t info;
  1083. info.si_signo = signal;
  1084. info.si_errno = 0;
  1085. info.si_code = code;
  1086. info.si_addr = addr;
  1087. force_sig_info(signal, &info, current);
  1088. }
  1089. #endif