ezkit.c 38 KB

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  1. /*
  2. * Copyright 2004-2009 Analog Devices Inc.
  3. * 2005 National ICT Australia (NICTA)
  4. * Aidan Williams <aidan@nicta.com.au>
  5. *
  6. * Licensed under the GPL-2 or later.
  7. */
  8. #include <linux/device.h>
  9. #include <linux/platform_device.h>
  10. #include <linux/mtd/mtd.h>
  11. #include <linux/mtd/partitions.h>
  12. #include <linux/mtd/physmap.h>
  13. #include <linux/spi/spi.h>
  14. #include <linux/spi/flash.h>
  15. #include <linux/irq.h>
  16. #include <linux/i2c.h>
  17. #include <linux/interrupt.h>
  18. #include <linux/usb/musb.h>
  19. #include <asm/bfin5xx_spi.h>
  20. #include <asm/dma.h>
  21. #include <asm/gpio.h>
  22. #include <asm/nand.h>
  23. #include <asm/dpmc.h>
  24. #include <asm/bfin_sport.h>
  25. #include <asm/portmux.h>
  26. #include <asm/bfin_sdh.h>
  27. #include <mach/bf54x_keys.h>
  28. #include <linux/input.h>
  29. #include <linux/spi/ad7877.h>
  30. /*
  31. * Name the Board for the /proc/cpuinfo
  32. */
  33. const char bfin_board_name[] = "ADI BF548-EZKIT";
  34. /*
  35. * Driver needs to know address, irq and flag pin.
  36. */
  37. #if defined(CONFIG_USB_ISP1760_HCD) || defined(CONFIG_USB_ISP1760_HCD_MODULE)
  38. #include <linux/usb/isp1760.h>
  39. static struct resource bfin_isp1760_resources[] = {
  40. [0] = {
  41. .start = 0x2C0C0000,
  42. .end = 0x2C0C0000 + 0xfffff,
  43. .flags = IORESOURCE_MEM,
  44. },
  45. [1] = {
  46. .start = IRQ_PG7,
  47. .end = IRQ_PG7,
  48. .flags = IORESOURCE_IRQ,
  49. },
  50. };
  51. static struct isp1760_platform_data isp1760_priv = {
  52. .is_isp1761 = 0,
  53. .bus_width_16 = 1,
  54. .port1_otg = 0,
  55. .analog_oc = 0,
  56. .dack_polarity_high = 0,
  57. .dreq_polarity_high = 0,
  58. };
  59. static struct platform_device bfin_isp1760_device = {
  60. .name = "isp1760",
  61. .id = 0,
  62. .dev = {
  63. .platform_data = &isp1760_priv,
  64. },
  65. .num_resources = ARRAY_SIZE(bfin_isp1760_resources),
  66. .resource = bfin_isp1760_resources,
  67. };
  68. #endif
  69. #if defined(CONFIG_FB_BF54X_LQ043) || defined(CONFIG_FB_BF54X_LQ043_MODULE)
  70. #include <mach/bf54x-lq043.h>
  71. static struct bfin_bf54xfb_mach_info bf54x_lq043_data = {
  72. .width = 95,
  73. .height = 54,
  74. .xres = {480, 480, 480},
  75. .yres = {272, 272, 272},
  76. .bpp = {24, 24, 24},
  77. .disp = GPIO_PE3,
  78. };
  79. static struct resource bf54x_lq043_resources[] = {
  80. {
  81. .start = IRQ_EPPI0_ERR,
  82. .end = IRQ_EPPI0_ERR,
  83. .flags = IORESOURCE_IRQ,
  84. },
  85. };
  86. static struct platform_device bf54x_lq043_device = {
  87. .name = "bf54x-lq043",
  88. .id = -1,
  89. .num_resources = ARRAY_SIZE(bf54x_lq043_resources),
  90. .resource = bf54x_lq043_resources,
  91. .dev = {
  92. .platform_data = &bf54x_lq043_data,
  93. },
  94. };
  95. #endif
  96. #if defined(CONFIG_KEYBOARD_BFIN) || defined(CONFIG_KEYBOARD_BFIN_MODULE)
  97. static const unsigned int bf548_keymap[] = {
  98. KEYVAL(0, 0, KEY_ENTER),
  99. KEYVAL(0, 1, KEY_HELP),
  100. KEYVAL(0, 2, KEY_0),
  101. KEYVAL(0, 3, KEY_BACKSPACE),
  102. KEYVAL(1, 0, KEY_TAB),
  103. KEYVAL(1, 1, KEY_9),
  104. KEYVAL(1, 2, KEY_8),
  105. KEYVAL(1, 3, KEY_7),
  106. KEYVAL(2, 0, KEY_DOWN),
  107. KEYVAL(2, 1, KEY_6),
  108. KEYVAL(2, 2, KEY_5),
  109. KEYVAL(2, 3, KEY_4),
  110. KEYVAL(3, 0, KEY_UP),
  111. KEYVAL(3, 1, KEY_3),
  112. KEYVAL(3, 2, KEY_2),
  113. KEYVAL(3, 3, KEY_1),
  114. };
  115. static struct bfin_kpad_platform_data bf54x_kpad_data = {
  116. .rows = 4,
  117. .cols = 4,
  118. .keymap = bf548_keymap,
  119. .keymapsize = ARRAY_SIZE(bf548_keymap),
  120. .repeat = 0,
  121. .debounce_time = 5000, /* ns (5ms) */
  122. .coldrive_time = 1000, /* ns (1ms) */
  123. .keyup_test_interval = 50, /* ms (50ms) */
  124. };
  125. static struct resource bf54x_kpad_resources[] = {
  126. {
  127. .start = IRQ_KEY,
  128. .end = IRQ_KEY,
  129. .flags = IORESOURCE_IRQ,
  130. },
  131. };
  132. static struct platform_device bf54x_kpad_device = {
  133. .name = "bf54x-keys",
  134. .id = -1,
  135. .num_resources = ARRAY_SIZE(bf54x_kpad_resources),
  136. .resource = bf54x_kpad_resources,
  137. .dev = {
  138. .platform_data = &bf54x_kpad_data,
  139. },
  140. };
  141. #endif
  142. #if defined(CONFIG_INPUT_BFIN_ROTARY) || defined(CONFIG_INPUT_BFIN_ROTARY_MODULE)
  143. #include <asm/bfin_rotary.h>
  144. static struct bfin_rotary_platform_data bfin_rotary_data = {
  145. /*.rotary_up_key = KEY_UP,*/
  146. /*.rotary_down_key = KEY_DOWN,*/
  147. .rotary_rel_code = REL_WHEEL,
  148. .rotary_button_key = KEY_ENTER,
  149. .debounce = 10, /* 0..17 */
  150. .mode = ROT_QUAD_ENC | ROT_DEBE,
  151. };
  152. static struct resource bfin_rotary_resources[] = {
  153. {
  154. .start = IRQ_CNT,
  155. .end = IRQ_CNT,
  156. .flags = IORESOURCE_IRQ,
  157. },
  158. };
  159. static struct platform_device bfin_rotary_device = {
  160. .name = "bfin-rotary",
  161. .id = -1,
  162. .num_resources = ARRAY_SIZE(bfin_rotary_resources),
  163. .resource = bfin_rotary_resources,
  164. .dev = {
  165. .platform_data = &bfin_rotary_data,
  166. },
  167. };
  168. #endif
  169. #if defined(CONFIG_INPUT_ADXL34X) || defined(CONFIG_INPUT_ADXL34X_MODULE)
  170. #include <linux/input/adxl34x.h>
  171. static const struct adxl34x_platform_data adxl34x_info = {
  172. .x_axis_offset = 0,
  173. .y_axis_offset = 0,
  174. .z_axis_offset = 0,
  175. .tap_threshold = 0x31,
  176. .tap_duration = 0x10,
  177. .tap_latency = 0x60,
  178. .tap_window = 0xF0,
  179. .tap_axis_control = ADXL_TAP_X_EN | ADXL_TAP_Y_EN | ADXL_TAP_Z_EN,
  180. .act_axis_control = 0xFF,
  181. .activity_threshold = 5,
  182. .inactivity_threshold = 3,
  183. .inactivity_time = 4,
  184. .free_fall_threshold = 0x7,
  185. .free_fall_time = 0x20,
  186. .data_rate = 0x8,
  187. .data_range = ADXL_FULL_RES,
  188. .ev_type = EV_ABS,
  189. .ev_code_x = ABS_X, /* EV_REL */
  190. .ev_code_y = ABS_Y, /* EV_REL */
  191. .ev_code_z = ABS_Z, /* EV_REL */
  192. .ev_code_tap = {BTN_TOUCH, BTN_TOUCH, BTN_TOUCH}, /* EV_KEY x,y,z */
  193. /* .ev_code_ff = KEY_F,*/ /* EV_KEY */
  194. /* .ev_code_act_inactivity = KEY_A,*/ /* EV_KEY */
  195. .power_mode = ADXL_AUTO_SLEEP | ADXL_LINK,
  196. .fifo_mode = ADXL_FIFO_STREAM,
  197. .orientation_enable = ADXL_EN_ORIENTATION_3D,
  198. .deadzone_angle = ADXL_DEADZONE_ANGLE_10p8,
  199. .divisor_length = ADXL_LP_FILTER_DIVISOR_16,
  200. /* EV_KEY {+Z, +Y, +X, -X, -Y, -Z} */
  201. .ev_codes_orient_3d = {BTN_Z, BTN_Y, BTN_X, BTN_A, BTN_B, BTN_C},
  202. };
  203. #endif
  204. #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
  205. static struct platform_device rtc_device = {
  206. .name = "rtc-bfin",
  207. .id = -1,
  208. };
  209. #endif
  210. #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
  211. #ifdef CONFIG_SERIAL_BFIN_UART0
  212. static struct resource bfin_uart0_resources[] = {
  213. {
  214. .start = UART0_DLL,
  215. .end = UART0_RBR+2,
  216. .flags = IORESOURCE_MEM,
  217. },
  218. {
  219. .start = IRQ_UART0_TX,
  220. .end = IRQ_UART0_TX,
  221. .flags = IORESOURCE_IRQ,
  222. },
  223. {
  224. .start = IRQ_UART0_RX,
  225. .end = IRQ_UART0_RX,
  226. .flags = IORESOURCE_IRQ,
  227. },
  228. {
  229. .start = IRQ_UART0_ERROR,
  230. .end = IRQ_UART0_ERROR,
  231. .flags = IORESOURCE_IRQ,
  232. },
  233. {
  234. .start = CH_UART0_TX,
  235. .end = CH_UART0_TX,
  236. .flags = IORESOURCE_DMA,
  237. },
  238. {
  239. .start = CH_UART0_RX,
  240. .end = CH_UART0_RX,
  241. .flags = IORESOURCE_DMA,
  242. },
  243. };
  244. static unsigned short bfin_uart0_peripherals[] = {
  245. P_UART0_TX, P_UART0_RX, 0
  246. };
  247. static struct platform_device bfin_uart0_device = {
  248. .name = "bfin-uart",
  249. .id = 0,
  250. .num_resources = ARRAY_SIZE(bfin_uart0_resources),
  251. .resource = bfin_uart0_resources,
  252. .dev = {
  253. .platform_data = &bfin_uart0_peripherals, /* Passed to driver */
  254. },
  255. };
  256. #endif
  257. #ifdef CONFIG_SERIAL_BFIN_UART1
  258. static struct resource bfin_uart1_resources[] = {
  259. {
  260. .start = UART1_DLL,
  261. .end = UART1_RBR+2,
  262. .flags = IORESOURCE_MEM,
  263. },
  264. {
  265. .start = IRQ_UART1_TX,
  266. .end = IRQ_UART1_TX,
  267. .flags = IORESOURCE_IRQ,
  268. },
  269. {
  270. .start = IRQ_UART1_RX,
  271. .end = IRQ_UART1_RX,
  272. .flags = IORESOURCE_IRQ,
  273. },
  274. {
  275. .start = IRQ_UART1_ERROR,
  276. .end = IRQ_UART1_ERROR,
  277. .flags = IORESOURCE_IRQ,
  278. },
  279. {
  280. .start = CH_UART1_TX,
  281. .end = CH_UART1_TX,
  282. .flags = IORESOURCE_DMA,
  283. },
  284. {
  285. .start = CH_UART1_RX,
  286. .end = CH_UART1_RX,
  287. .flags = IORESOURCE_DMA,
  288. },
  289. #ifdef CONFIG_BFIN_UART1_CTSRTS
  290. { /* CTS pin -- 0 means not supported */
  291. .start = GPIO_PE10,
  292. .end = GPIO_PE10,
  293. .flags = IORESOURCE_IO,
  294. },
  295. { /* RTS pin -- 0 means not supported */
  296. .start = GPIO_PE9,
  297. .end = GPIO_PE9,
  298. .flags = IORESOURCE_IO,
  299. },
  300. #endif
  301. };
  302. static unsigned short bfin_uart1_peripherals[] = {
  303. P_UART1_TX, P_UART1_RX,
  304. #ifdef CONFIG_BFIN_UART1_CTSRTS
  305. P_UART1_RTS, P_UART1_CTS,
  306. #endif
  307. 0
  308. };
  309. static struct platform_device bfin_uart1_device = {
  310. .name = "bfin-uart",
  311. .id = 1,
  312. .num_resources = ARRAY_SIZE(bfin_uart1_resources),
  313. .resource = bfin_uart1_resources,
  314. .dev = {
  315. .platform_data = &bfin_uart1_peripherals, /* Passed to driver */
  316. },
  317. };
  318. #endif
  319. #ifdef CONFIG_SERIAL_BFIN_UART2
  320. static struct resource bfin_uart2_resources[] = {
  321. {
  322. .start = UART2_DLL,
  323. .end = UART2_RBR+2,
  324. .flags = IORESOURCE_MEM,
  325. },
  326. {
  327. .start = IRQ_UART2_TX,
  328. .end = IRQ_UART2_TX,
  329. .flags = IORESOURCE_IRQ,
  330. },
  331. {
  332. .start = IRQ_UART2_RX,
  333. .end = IRQ_UART2_RX,
  334. .flags = IORESOURCE_IRQ,
  335. },
  336. {
  337. .start = IRQ_UART2_ERROR,
  338. .end = IRQ_UART2_ERROR,
  339. .flags = IORESOURCE_IRQ,
  340. },
  341. {
  342. .start = CH_UART2_TX,
  343. .end = CH_UART2_TX,
  344. .flags = IORESOURCE_DMA,
  345. },
  346. {
  347. .start = CH_UART2_RX,
  348. .end = CH_UART2_RX,
  349. .flags = IORESOURCE_DMA,
  350. },
  351. };
  352. static unsigned short bfin_uart2_peripherals[] = {
  353. P_UART2_TX, P_UART2_RX, 0
  354. };
  355. static struct platform_device bfin_uart2_device = {
  356. .name = "bfin-uart",
  357. .id = 2,
  358. .num_resources = ARRAY_SIZE(bfin_uart2_resources),
  359. .resource = bfin_uart2_resources,
  360. .dev = {
  361. .platform_data = &bfin_uart2_peripherals, /* Passed to driver */
  362. },
  363. };
  364. #endif
  365. #ifdef CONFIG_SERIAL_BFIN_UART3
  366. static struct resource bfin_uart3_resources[] = {
  367. {
  368. .start = UART3_DLL,
  369. .end = UART3_RBR+2,
  370. .flags = IORESOURCE_MEM,
  371. },
  372. {
  373. .start = IRQ_UART3_TX,
  374. .end = IRQ_UART3_TX,
  375. .flags = IORESOURCE_IRQ,
  376. },
  377. {
  378. .start = IRQ_UART3_RX,
  379. .end = IRQ_UART3_RX,
  380. .flags = IORESOURCE_IRQ,
  381. },
  382. {
  383. .start = IRQ_UART3_ERROR,
  384. .end = IRQ_UART3_ERROR,
  385. .flags = IORESOURCE_IRQ,
  386. },
  387. {
  388. .start = CH_UART3_TX,
  389. .end = CH_UART3_TX,
  390. .flags = IORESOURCE_DMA,
  391. },
  392. {
  393. .start = CH_UART3_RX,
  394. .end = CH_UART3_RX,
  395. .flags = IORESOURCE_DMA,
  396. },
  397. #ifdef CONFIG_BFIN_UART3_CTSRTS
  398. { /* CTS pin -- 0 means not supported */
  399. .start = GPIO_PB3,
  400. .end = GPIO_PB3,
  401. .flags = IORESOURCE_IO,
  402. },
  403. { /* RTS pin -- 0 means not supported */
  404. .start = GPIO_PB2,
  405. .end = GPIO_PB2,
  406. .flags = IORESOURCE_IO,
  407. },
  408. #endif
  409. };
  410. static unsigned short bfin_uart3_peripherals[] = {
  411. P_UART3_TX, P_UART3_RX,
  412. #ifdef CONFIG_BFIN_UART3_CTSRTS
  413. P_UART3_RTS, P_UART3_CTS,
  414. #endif
  415. 0
  416. };
  417. static struct platform_device bfin_uart3_device = {
  418. .name = "bfin-uart",
  419. .id = 3,
  420. .num_resources = ARRAY_SIZE(bfin_uart3_resources),
  421. .resource = bfin_uart3_resources,
  422. .dev = {
  423. .platform_data = &bfin_uart3_peripherals, /* Passed to driver */
  424. },
  425. };
  426. #endif
  427. #endif
  428. #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
  429. #ifdef CONFIG_BFIN_SIR0
  430. static struct resource bfin_sir0_resources[] = {
  431. {
  432. .start = 0xFFC00400,
  433. .end = 0xFFC004FF,
  434. .flags = IORESOURCE_MEM,
  435. },
  436. {
  437. .start = IRQ_UART0_RX,
  438. .end = IRQ_UART0_RX+1,
  439. .flags = IORESOURCE_IRQ,
  440. },
  441. {
  442. .start = CH_UART0_RX,
  443. .end = CH_UART0_RX+1,
  444. .flags = IORESOURCE_DMA,
  445. },
  446. };
  447. static struct platform_device bfin_sir0_device = {
  448. .name = "bfin_sir",
  449. .id = 0,
  450. .num_resources = ARRAY_SIZE(bfin_sir0_resources),
  451. .resource = bfin_sir0_resources,
  452. };
  453. #endif
  454. #ifdef CONFIG_BFIN_SIR1
  455. static struct resource bfin_sir1_resources[] = {
  456. {
  457. .start = 0xFFC02000,
  458. .end = 0xFFC020FF,
  459. .flags = IORESOURCE_MEM,
  460. },
  461. {
  462. .start = IRQ_UART1_RX,
  463. .end = IRQ_UART1_RX+1,
  464. .flags = IORESOURCE_IRQ,
  465. },
  466. {
  467. .start = CH_UART1_RX,
  468. .end = CH_UART1_RX+1,
  469. .flags = IORESOURCE_DMA,
  470. },
  471. };
  472. static struct platform_device bfin_sir1_device = {
  473. .name = "bfin_sir",
  474. .id = 1,
  475. .num_resources = ARRAY_SIZE(bfin_sir1_resources),
  476. .resource = bfin_sir1_resources,
  477. };
  478. #endif
  479. #ifdef CONFIG_BFIN_SIR2
  480. static struct resource bfin_sir2_resources[] = {
  481. {
  482. .start = 0xFFC02100,
  483. .end = 0xFFC021FF,
  484. .flags = IORESOURCE_MEM,
  485. },
  486. {
  487. .start = IRQ_UART2_RX,
  488. .end = IRQ_UART2_RX+1,
  489. .flags = IORESOURCE_IRQ,
  490. },
  491. {
  492. .start = CH_UART2_RX,
  493. .end = CH_UART2_RX+1,
  494. .flags = IORESOURCE_DMA,
  495. },
  496. };
  497. static struct platform_device bfin_sir2_device = {
  498. .name = "bfin_sir",
  499. .id = 2,
  500. .num_resources = ARRAY_SIZE(bfin_sir2_resources),
  501. .resource = bfin_sir2_resources,
  502. };
  503. #endif
  504. #ifdef CONFIG_BFIN_SIR3
  505. static struct resource bfin_sir3_resources[] = {
  506. {
  507. .start = 0xFFC03100,
  508. .end = 0xFFC031FF,
  509. .flags = IORESOURCE_MEM,
  510. },
  511. {
  512. .start = IRQ_UART3_RX,
  513. .end = IRQ_UART3_RX+1,
  514. .flags = IORESOURCE_IRQ,
  515. },
  516. {
  517. .start = CH_UART3_RX,
  518. .end = CH_UART3_RX+1,
  519. .flags = IORESOURCE_DMA,
  520. },
  521. };
  522. static struct platform_device bfin_sir3_device = {
  523. .name = "bfin_sir",
  524. .id = 3,
  525. .num_resources = ARRAY_SIZE(bfin_sir3_resources),
  526. .resource = bfin_sir3_resources,
  527. };
  528. #endif
  529. #endif
  530. #if defined(CONFIG_SMSC911X) || defined(CONFIG_SMSC911X_MODULE)
  531. #include <linux/smsc911x.h>
  532. static struct resource smsc911x_resources[] = {
  533. {
  534. .name = "smsc911x-memory",
  535. .start = 0x24000000,
  536. .end = 0x24000000 + 0xFF,
  537. .flags = IORESOURCE_MEM,
  538. },
  539. {
  540. .start = IRQ_PE8,
  541. .end = IRQ_PE8,
  542. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
  543. },
  544. };
  545. static struct smsc911x_platform_config smsc911x_config = {
  546. .flags = SMSC911X_USE_32BIT,
  547. .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
  548. .irq_type = SMSC911X_IRQ_TYPE_OPEN_DRAIN,
  549. .phy_interface = PHY_INTERFACE_MODE_MII,
  550. };
  551. static struct platform_device smsc911x_device = {
  552. .name = "smsc911x",
  553. .id = 0,
  554. .num_resources = ARRAY_SIZE(smsc911x_resources),
  555. .resource = smsc911x_resources,
  556. .dev = {
  557. .platform_data = &smsc911x_config,
  558. },
  559. };
  560. #endif
  561. #if defined(CONFIG_USB_MUSB_HDRC) || defined(CONFIG_USB_MUSB_HDRC_MODULE)
  562. static struct resource musb_resources[] = {
  563. [0] = {
  564. .start = 0xFFC03C00,
  565. .end = 0xFFC040FF,
  566. .flags = IORESOURCE_MEM,
  567. },
  568. [1] = { /* general IRQ */
  569. .start = IRQ_USB_INT0,
  570. .end = IRQ_USB_INT0,
  571. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  572. .name = "mc"
  573. },
  574. [2] = { /* DMA IRQ */
  575. .start = IRQ_USB_DMA,
  576. .end = IRQ_USB_DMA,
  577. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  578. .name = "dma"
  579. },
  580. };
  581. static struct musb_hdrc_config musb_config = {
  582. .multipoint = 0,
  583. .dyn_fifo = 0,
  584. .soft_con = 1,
  585. .dma = 1,
  586. .num_eps = 8,
  587. .dma_channels = 8,
  588. .gpio_vrsel = GPIO_PE7,
  589. /* Some custom boards need to be active low, just set it to "0"
  590. * if it is the case.
  591. */
  592. .gpio_vrsel_active = 1,
  593. .clkin = 24, /* musb CLKIN in MHZ */
  594. };
  595. static struct musb_hdrc_platform_data musb_plat = {
  596. #if defined(CONFIG_USB_MUSB_OTG)
  597. .mode = MUSB_OTG,
  598. #elif defined(CONFIG_USB_MUSB_HDRC_HCD)
  599. .mode = MUSB_HOST,
  600. #elif defined(CONFIG_USB_GADGET_MUSB_HDRC)
  601. .mode = MUSB_PERIPHERAL,
  602. #endif
  603. .config = &musb_config,
  604. };
  605. static u64 musb_dmamask = ~(u32)0;
  606. static struct platform_device musb_device = {
  607. .name = "musb-blackfin",
  608. .id = 0,
  609. .dev = {
  610. .dma_mask = &musb_dmamask,
  611. .coherent_dma_mask = 0xffffffff,
  612. .platform_data = &musb_plat,
  613. },
  614. .num_resources = ARRAY_SIZE(musb_resources),
  615. .resource = musb_resources,
  616. };
  617. #endif
  618. #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
  619. #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
  620. static struct resource bfin_sport0_uart_resources[] = {
  621. {
  622. .start = SPORT0_TCR1,
  623. .end = SPORT0_MRCS3+4,
  624. .flags = IORESOURCE_MEM,
  625. },
  626. {
  627. .start = IRQ_SPORT0_RX,
  628. .end = IRQ_SPORT0_RX+1,
  629. .flags = IORESOURCE_IRQ,
  630. },
  631. {
  632. .start = IRQ_SPORT0_ERROR,
  633. .end = IRQ_SPORT0_ERROR,
  634. .flags = IORESOURCE_IRQ,
  635. },
  636. };
  637. static unsigned short bfin_sport0_peripherals[] = {
  638. P_SPORT0_TFS, P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_RFS,
  639. P_SPORT0_DRPRI, P_SPORT0_RSCLK, 0
  640. };
  641. static struct platform_device bfin_sport0_uart_device = {
  642. .name = "bfin-sport-uart",
  643. .id = 0,
  644. .num_resources = ARRAY_SIZE(bfin_sport0_uart_resources),
  645. .resource = bfin_sport0_uart_resources,
  646. .dev = {
  647. .platform_data = &bfin_sport0_peripherals, /* Passed to driver */
  648. },
  649. };
  650. #endif
  651. #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
  652. static struct resource bfin_sport1_uart_resources[] = {
  653. {
  654. .start = SPORT1_TCR1,
  655. .end = SPORT1_MRCS3+4,
  656. .flags = IORESOURCE_MEM,
  657. },
  658. {
  659. .start = IRQ_SPORT1_RX,
  660. .end = IRQ_SPORT1_RX+1,
  661. .flags = IORESOURCE_IRQ,
  662. },
  663. {
  664. .start = IRQ_SPORT1_ERROR,
  665. .end = IRQ_SPORT1_ERROR,
  666. .flags = IORESOURCE_IRQ,
  667. },
  668. };
  669. static unsigned short bfin_sport1_peripherals[] = {
  670. P_SPORT1_TFS, P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_RFS,
  671. P_SPORT1_DRPRI, P_SPORT1_RSCLK, 0
  672. };
  673. static struct platform_device bfin_sport1_uart_device = {
  674. .name = "bfin-sport-uart",
  675. .id = 1,
  676. .num_resources = ARRAY_SIZE(bfin_sport1_uart_resources),
  677. .resource = bfin_sport1_uart_resources,
  678. .dev = {
  679. .platform_data = &bfin_sport1_peripherals, /* Passed to driver */
  680. },
  681. };
  682. #endif
  683. #ifdef CONFIG_SERIAL_BFIN_SPORT2_UART
  684. static struct resource bfin_sport2_uart_resources[] = {
  685. {
  686. .start = SPORT2_TCR1,
  687. .end = SPORT2_MRCS3+4,
  688. .flags = IORESOURCE_MEM,
  689. },
  690. {
  691. .start = IRQ_SPORT2_RX,
  692. .end = IRQ_SPORT2_RX+1,
  693. .flags = IORESOURCE_IRQ,
  694. },
  695. {
  696. .start = IRQ_SPORT2_ERROR,
  697. .end = IRQ_SPORT2_ERROR,
  698. .flags = IORESOURCE_IRQ,
  699. },
  700. };
  701. static unsigned short bfin_sport2_peripherals[] = {
  702. P_SPORT2_TFS, P_SPORT2_DTPRI, P_SPORT2_TSCLK, P_SPORT2_RFS,
  703. P_SPORT2_DRPRI, P_SPORT2_RSCLK, P_SPORT2_DRSEC, P_SPORT2_DTSEC, 0
  704. };
  705. static struct platform_device bfin_sport2_uart_device = {
  706. .name = "bfin-sport-uart",
  707. .id = 2,
  708. .num_resources = ARRAY_SIZE(bfin_sport2_uart_resources),
  709. .resource = bfin_sport2_uart_resources,
  710. .dev = {
  711. .platform_data = &bfin_sport2_peripherals, /* Passed to driver */
  712. },
  713. };
  714. #endif
  715. #ifdef CONFIG_SERIAL_BFIN_SPORT3_UART
  716. static struct resource bfin_sport3_uart_resources[] = {
  717. {
  718. .start = SPORT3_TCR1,
  719. .end = SPORT3_MRCS3+4,
  720. .flags = IORESOURCE_MEM,
  721. },
  722. {
  723. .start = IRQ_SPORT3_RX,
  724. .end = IRQ_SPORT3_RX+1,
  725. .flags = IORESOURCE_IRQ,
  726. },
  727. {
  728. .start = IRQ_SPORT3_ERROR,
  729. .end = IRQ_SPORT3_ERROR,
  730. .flags = IORESOURCE_IRQ,
  731. },
  732. };
  733. static unsigned short bfin_sport3_peripherals[] = {
  734. P_SPORT3_TFS, P_SPORT3_DTPRI, P_SPORT3_TSCLK, P_SPORT3_RFS,
  735. P_SPORT3_DRPRI, P_SPORT3_RSCLK, P_SPORT3_DRSEC, P_SPORT3_DTSEC, 0
  736. };
  737. static struct platform_device bfin_sport3_uart_device = {
  738. .name = "bfin-sport-uart",
  739. .id = 3,
  740. .num_resources = ARRAY_SIZE(bfin_sport3_uart_resources),
  741. .resource = bfin_sport3_uart_resources,
  742. .dev = {
  743. .platform_data = &bfin_sport3_peripherals, /* Passed to driver */
  744. },
  745. };
  746. #endif
  747. #endif
  748. #if defined(CONFIG_CAN_BFIN) || defined(CONFIG_CAN_BFIN_MODULE)
  749. static unsigned short bfin_can0_peripherals[] = {
  750. P_CAN0_RX, P_CAN0_TX, 0
  751. };
  752. static struct resource bfin_can0_resources[] = {
  753. {
  754. .start = 0xFFC02A00,
  755. .end = 0xFFC02FFF,
  756. .flags = IORESOURCE_MEM,
  757. },
  758. {
  759. .start = IRQ_CAN0_RX,
  760. .end = IRQ_CAN0_RX,
  761. .flags = IORESOURCE_IRQ,
  762. },
  763. {
  764. .start = IRQ_CAN0_TX,
  765. .end = IRQ_CAN0_TX,
  766. .flags = IORESOURCE_IRQ,
  767. },
  768. {
  769. .start = IRQ_CAN0_ERROR,
  770. .end = IRQ_CAN0_ERROR,
  771. .flags = IORESOURCE_IRQ,
  772. },
  773. };
  774. static struct platform_device bfin_can0_device = {
  775. .name = "bfin_can",
  776. .id = 0,
  777. .num_resources = ARRAY_SIZE(bfin_can0_resources),
  778. .resource = bfin_can0_resources,
  779. .dev = {
  780. .platform_data = &bfin_can0_peripherals, /* Passed to driver */
  781. },
  782. };
  783. static unsigned short bfin_can1_peripherals[] = {
  784. P_CAN1_RX, P_CAN1_TX, 0
  785. };
  786. static struct resource bfin_can1_resources[] = {
  787. {
  788. .start = 0xFFC03200,
  789. .end = 0xFFC037FF,
  790. .flags = IORESOURCE_MEM,
  791. },
  792. {
  793. .start = IRQ_CAN1_RX,
  794. .end = IRQ_CAN1_RX,
  795. .flags = IORESOURCE_IRQ,
  796. },
  797. {
  798. .start = IRQ_CAN1_TX,
  799. .end = IRQ_CAN1_TX,
  800. .flags = IORESOURCE_IRQ,
  801. },
  802. {
  803. .start = IRQ_CAN1_ERROR,
  804. .end = IRQ_CAN1_ERROR,
  805. .flags = IORESOURCE_IRQ,
  806. },
  807. };
  808. static struct platform_device bfin_can1_device = {
  809. .name = "bfin_can",
  810. .id = 1,
  811. .num_resources = ARRAY_SIZE(bfin_can1_resources),
  812. .resource = bfin_can1_resources,
  813. .dev = {
  814. .platform_data = &bfin_can1_peripherals, /* Passed to driver */
  815. },
  816. };
  817. #endif
  818. #if defined(CONFIG_PATA_BF54X) || defined(CONFIG_PATA_BF54X_MODULE)
  819. static struct resource bfin_atapi_resources[] = {
  820. {
  821. .start = 0xFFC03800,
  822. .end = 0xFFC0386F,
  823. .flags = IORESOURCE_MEM,
  824. },
  825. {
  826. .start = IRQ_ATAPI_ERR,
  827. .end = IRQ_ATAPI_ERR,
  828. .flags = IORESOURCE_IRQ,
  829. },
  830. };
  831. static struct platform_device bfin_atapi_device = {
  832. .name = "pata-bf54x",
  833. .id = -1,
  834. .num_resources = ARRAY_SIZE(bfin_atapi_resources),
  835. .resource = bfin_atapi_resources,
  836. };
  837. #endif
  838. #if defined(CONFIG_MTD_NAND_BF5XX) || defined(CONFIG_MTD_NAND_BF5XX_MODULE)
  839. static struct mtd_partition partition_info[] = {
  840. {
  841. .name = "bootloader(nand)",
  842. .offset = 0,
  843. .size = 0x80000,
  844. }, {
  845. .name = "linux kernel(nand)",
  846. .offset = MTDPART_OFS_APPEND,
  847. .size = 4 * 1024 * 1024,
  848. },
  849. {
  850. .name = "file system(nand)",
  851. .offset = MTDPART_OFS_APPEND,
  852. .size = MTDPART_SIZ_FULL,
  853. },
  854. };
  855. static struct bf5xx_nand_platform bf5xx_nand_platform = {
  856. .data_width = NFC_NWIDTH_8,
  857. .partitions = partition_info,
  858. .nr_partitions = ARRAY_SIZE(partition_info),
  859. .rd_dly = 3,
  860. .wr_dly = 3,
  861. };
  862. static struct resource bf5xx_nand_resources[] = {
  863. {
  864. .start = 0xFFC03B00,
  865. .end = 0xFFC03B4F,
  866. .flags = IORESOURCE_MEM,
  867. },
  868. {
  869. .start = CH_NFC,
  870. .end = CH_NFC,
  871. .flags = IORESOURCE_IRQ,
  872. },
  873. };
  874. static struct platform_device bf5xx_nand_device = {
  875. .name = "bf5xx-nand",
  876. .id = 0,
  877. .num_resources = ARRAY_SIZE(bf5xx_nand_resources),
  878. .resource = bf5xx_nand_resources,
  879. .dev = {
  880. .platform_data = &bf5xx_nand_platform,
  881. },
  882. };
  883. #endif
  884. #if defined(CONFIG_SDH_BFIN) || defined(CONFIG_SDH_BFIN_MODULE)
  885. static struct bfin_sd_host bfin_sdh_data = {
  886. .dma_chan = CH_SDH,
  887. .irq_int0 = IRQ_SDH_MASK0,
  888. .pin_req = {P_SD_D0, P_SD_D1, P_SD_D2, P_SD_D3, P_SD_CLK, P_SD_CMD, 0},
  889. };
  890. static struct platform_device bf54x_sdh_device = {
  891. .name = "bfin-sdh",
  892. .id = 0,
  893. .dev = {
  894. .platform_data = &bfin_sdh_data,
  895. },
  896. };
  897. #endif
  898. #if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
  899. static struct mtd_partition ezkit_partitions[] = {
  900. {
  901. .name = "bootloader(nor)",
  902. .size = 0x80000,
  903. .offset = 0,
  904. }, {
  905. .name = "linux kernel(nor)",
  906. .size = 0x400000,
  907. .offset = MTDPART_OFS_APPEND,
  908. }, {
  909. .name = "file system(nor)",
  910. .size = 0x1000000 - 0x80000 - 0x400000 - 0x8000 * 4,
  911. .offset = MTDPART_OFS_APPEND,
  912. }, {
  913. .name = "config(nor)",
  914. .size = 0x8000 * 3,
  915. .offset = MTDPART_OFS_APPEND,
  916. }, {
  917. .name = "u-boot env(nor)",
  918. .size = 0x8000,
  919. .offset = MTDPART_OFS_APPEND,
  920. }
  921. };
  922. static struct physmap_flash_data ezkit_flash_data = {
  923. .width = 2,
  924. .parts = ezkit_partitions,
  925. .nr_parts = ARRAY_SIZE(ezkit_partitions),
  926. };
  927. static struct resource ezkit_flash_resource = {
  928. .start = 0x20000000,
  929. .end = 0x21ffffff,
  930. .flags = IORESOURCE_MEM,
  931. };
  932. static struct platform_device ezkit_flash_device = {
  933. .name = "physmap-flash",
  934. .id = 0,
  935. .dev = {
  936. .platform_data = &ezkit_flash_data,
  937. },
  938. .num_resources = 1,
  939. .resource = &ezkit_flash_resource,
  940. };
  941. #endif
  942. #if defined(CONFIG_MTD_M25P80) \
  943. || defined(CONFIG_MTD_M25P80_MODULE)
  944. /* SPI flash chip (m25p16) */
  945. static struct mtd_partition bfin_spi_flash_partitions[] = {
  946. {
  947. .name = "bootloader(spi)",
  948. .size = 0x00080000,
  949. .offset = 0,
  950. .mask_flags = MTD_CAP_ROM
  951. }, {
  952. .name = "linux kernel(spi)",
  953. .size = MTDPART_SIZ_FULL,
  954. .offset = MTDPART_OFS_APPEND,
  955. }
  956. };
  957. static struct flash_platform_data bfin_spi_flash_data = {
  958. .name = "m25p80",
  959. .parts = bfin_spi_flash_partitions,
  960. .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
  961. .type = "m25p16",
  962. };
  963. static struct bfin5xx_spi_chip spi_flash_chip_info = {
  964. .enable_dma = 0, /* use dma transfer with this chip*/
  965. };
  966. #endif
  967. #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
  968. static const struct ad7877_platform_data bfin_ad7877_ts_info = {
  969. .model = 7877,
  970. .vref_delay_usecs = 50, /* internal, no capacitor */
  971. .x_plate_ohms = 419,
  972. .y_plate_ohms = 486,
  973. .pressure_max = 1000,
  974. .pressure_min = 0,
  975. .stopacq_polarity = 1,
  976. .first_conversion_delay = 3,
  977. .acquisition_time = 1,
  978. .averaging = 1,
  979. .pen_down_acc_interval = 1,
  980. };
  981. #endif
  982. static struct spi_board_info bfin_spi_board_info[] __initdata = {
  983. #if defined(CONFIG_MTD_M25P80) \
  984. || defined(CONFIG_MTD_M25P80_MODULE)
  985. {
  986. /* the modalias must be the same as spi device driver name */
  987. .modalias = "m25p80", /* Name of spi_driver for this device */
  988. .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
  989. .bus_num = 0, /* Framework bus number */
  990. .chip_select = 1, /* SPI_SSEL1*/
  991. .platform_data = &bfin_spi_flash_data,
  992. .controller_data = &spi_flash_chip_info,
  993. .mode = SPI_MODE_3,
  994. },
  995. #endif
  996. #if defined(CONFIG_SND_BF5XX_SOC_AD183X) \
  997. || defined(CONFIG_SND_BF5XX_SOC_AD183X_MODULE)
  998. {
  999. .modalias = "ad183x",
  1000. .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
  1001. .bus_num = 1,
  1002. .chip_select = 4,
  1003. },
  1004. #endif
  1005. #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
  1006. {
  1007. .modalias = "ad7877",
  1008. .platform_data = &bfin_ad7877_ts_info,
  1009. .irq = IRQ_PB4, /* old boards (<=Rev 1.3) use IRQ_PJ11 */
  1010. .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */
  1011. .bus_num = 0,
  1012. .chip_select = 2,
  1013. },
  1014. #endif
  1015. #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
  1016. {
  1017. .modalias = "spidev",
  1018. .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
  1019. .bus_num = 0,
  1020. .chip_select = 1,
  1021. },
  1022. #endif
  1023. #if defined(CONFIG_INPUT_ADXL34X_SPI) || defined(CONFIG_INPUT_ADXL34X_SPI_MODULE)
  1024. {
  1025. .modalias = "adxl34x",
  1026. .platform_data = &adxl34x_info,
  1027. .irq = IRQ_PC5,
  1028. .max_speed_hz = 5000000, /* max spi clock (SCK) speed in HZ */
  1029. .bus_num = 1,
  1030. .chip_select = 2,
  1031. .mode = SPI_MODE_3,
  1032. },
  1033. #endif
  1034. };
  1035. #if defined(CONFIG_SPI_BFIN5XX) || defined(CONFIG_SPI_BFIN5XX_MODULE)
  1036. /* SPI (0) */
  1037. static struct resource bfin_spi0_resource[] = {
  1038. [0] = {
  1039. .start = SPI0_REGBASE,
  1040. .end = SPI0_REGBASE + 0xFF,
  1041. .flags = IORESOURCE_MEM,
  1042. },
  1043. [1] = {
  1044. .start = CH_SPI0,
  1045. .end = CH_SPI0,
  1046. .flags = IORESOURCE_DMA,
  1047. },
  1048. [2] = {
  1049. .start = IRQ_SPI0,
  1050. .end = IRQ_SPI0,
  1051. .flags = IORESOURCE_IRQ,
  1052. }
  1053. };
  1054. /* SPI (1) */
  1055. static struct resource bfin_spi1_resource[] = {
  1056. [0] = {
  1057. .start = SPI1_REGBASE,
  1058. .end = SPI1_REGBASE + 0xFF,
  1059. .flags = IORESOURCE_MEM,
  1060. },
  1061. [1] = {
  1062. .start = CH_SPI1,
  1063. .end = CH_SPI1,
  1064. .flags = IORESOURCE_DMA,
  1065. },
  1066. [2] = {
  1067. .start = IRQ_SPI1,
  1068. .end = IRQ_SPI1,
  1069. .flags = IORESOURCE_IRQ,
  1070. }
  1071. };
  1072. /* SPI controller data */
  1073. static struct bfin5xx_spi_master bf54x_spi_master_info0 = {
  1074. .num_chipselect = 4,
  1075. .enable_dma = 1, /* master has the ability to do dma transfer */
  1076. .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
  1077. };
  1078. static struct platform_device bf54x_spi_master0 = {
  1079. .name = "bfin-spi",
  1080. .id = 0, /* Bus number */
  1081. .num_resources = ARRAY_SIZE(bfin_spi0_resource),
  1082. .resource = bfin_spi0_resource,
  1083. .dev = {
  1084. .platform_data = &bf54x_spi_master_info0, /* Passed to driver */
  1085. },
  1086. };
  1087. static struct bfin5xx_spi_master bf54x_spi_master_info1 = {
  1088. .num_chipselect = 4,
  1089. .enable_dma = 1, /* master has the ability to do dma transfer */
  1090. .pin_req = {P_SPI1_SCK, P_SPI1_MISO, P_SPI1_MOSI, 0},
  1091. };
  1092. static struct platform_device bf54x_spi_master1 = {
  1093. .name = "bfin-spi",
  1094. .id = 1, /* Bus number */
  1095. .num_resources = ARRAY_SIZE(bfin_spi1_resource),
  1096. .resource = bfin_spi1_resource,
  1097. .dev = {
  1098. .platform_data = &bf54x_spi_master_info1, /* Passed to driver */
  1099. },
  1100. };
  1101. #endif /* spi master and devices */
  1102. #if defined(CONFIG_VIDEO_BLACKFIN_CAPTURE) \
  1103. || defined(CONFIG_VIDEO_BLACKFIN_CAPTURE_MODULE)
  1104. #include <linux/videodev2.h>
  1105. #include <media/blackfin/bfin_capture.h>
  1106. #include <media/blackfin/ppi.h>
  1107. static const unsigned short ppi_req[] = {
  1108. P_PPI1_D0, P_PPI1_D1, P_PPI1_D2, P_PPI1_D3,
  1109. P_PPI1_D4, P_PPI1_D5, P_PPI1_D6, P_PPI1_D7,
  1110. P_PPI1_CLK, P_PPI1_FS1, P_PPI1_FS2,
  1111. 0,
  1112. };
  1113. static const struct ppi_info ppi_info = {
  1114. .type = PPI_TYPE_EPPI,
  1115. .dma_ch = CH_EPPI1,
  1116. .irq_err = IRQ_EPPI1_ERROR,
  1117. .base = (void __iomem *)EPPI1_STATUS,
  1118. .pin_req = ppi_req,
  1119. };
  1120. #if defined(CONFIG_VIDEO_VS6624) \
  1121. || defined(CONFIG_VIDEO_VS6624_MODULE)
  1122. static struct v4l2_input vs6624_inputs[] = {
  1123. {
  1124. .index = 0,
  1125. .name = "Camera",
  1126. .type = V4L2_INPUT_TYPE_CAMERA,
  1127. .std = V4L2_STD_UNKNOWN,
  1128. },
  1129. };
  1130. static struct bcap_route vs6624_routes[] = {
  1131. {
  1132. .input = 0,
  1133. .output = 0,
  1134. },
  1135. };
  1136. static const unsigned vs6624_ce_pin = GPIO_PG6;
  1137. static struct bfin_capture_config bfin_capture_data = {
  1138. .card_name = "BF548",
  1139. .inputs = vs6624_inputs,
  1140. .num_inputs = ARRAY_SIZE(vs6624_inputs),
  1141. .routes = vs6624_routes,
  1142. .i2c_adapter_id = 0,
  1143. .board_info = {
  1144. .type = "vs6624",
  1145. .addr = 0x10,
  1146. .platform_data = (void *)&vs6624_ce_pin,
  1147. },
  1148. .ppi_info = &ppi_info,
  1149. .ppi_control = (POLC | PACKEN | DLEN_8 | XFR_TYPE | 0x20),
  1150. };
  1151. #endif
  1152. static struct platform_device bfin_capture_device = {
  1153. .name = "bfin_capture",
  1154. .dev = {
  1155. .platform_data = &bfin_capture_data,
  1156. },
  1157. };
  1158. #endif
  1159. #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
  1160. static struct resource bfin_twi0_resource[] = {
  1161. [0] = {
  1162. .start = TWI0_REGBASE,
  1163. .end = TWI0_REGBASE + 0xFF,
  1164. .flags = IORESOURCE_MEM,
  1165. },
  1166. [1] = {
  1167. .start = IRQ_TWI0,
  1168. .end = IRQ_TWI0,
  1169. .flags = IORESOURCE_IRQ,
  1170. },
  1171. };
  1172. static struct platform_device i2c_bfin_twi0_device = {
  1173. .name = "i2c-bfin-twi",
  1174. .id = 0,
  1175. .num_resources = ARRAY_SIZE(bfin_twi0_resource),
  1176. .resource = bfin_twi0_resource,
  1177. };
  1178. #if !defined(CONFIG_BF542) /* The BF542 only has 1 TWI */
  1179. static struct resource bfin_twi1_resource[] = {
  1180. [0] = {
  1181. .start = TWI1_REGBASE,
  1182. .end = TWI1_REGBASE + 0xFF,
  1183. .flags = IORESOURCE_MEM,
  1184. },
  1185. [1] = {
  1186. .start = IRQ_TWI1,
  1187. .end = IRQ_TWI1,
  1188. .flags = IORESOURCE_IRQ,
  1189. },
  1190. };
  1191. static struct platform_device i2c_bfin_twi1_device = {
  1192. .name = "i2c-bfin-twi",
  1193. .id = 1,
  1194. .num_resources = ARRAY_SIZE(bfin_twi1_resource),
  1195. .resource = bfin_twi1_resource,
  1196. };
  1197. #endif
  1198. #endif
  1199. static struct i2c_board_info __initdata bfin_i2c_board_info0[] = {
  1200. };
  1201. #if !defined(CONFIG_BF542) /* The BF542 only has 1 TWI */
  1202. static struct i2c_board_info __initdata bfin_i2c_board_info1[] = {
  1203. #if defined(CONFIG_BFIN_TWI_LCD) || defined(CONFIG_BFIN_TWI_LCD_MODULE)
  1204. {
  1205. I2C_BOARD_INFO("pcf8574_lcd", 0x22),
  1206. },
  1207. #endif
  1208. #if defined(CONFIG_INPUT_PCF8574) || defined(CONFIG_INPUT_PCF8574_MODULE)
  1209. {
  1210. I2C_BOARD_INFO("pcf8574_keypad", 0x27),
  1211. .irq = 212,
  1212. },
  1213. #endif
  1214. #if defined(CONFIG_INPUT_ADXL34X_I2C) || defined(CONFIG_INPUT_ADXL34X_I2C_MODULE)
  1215. {
  1216. I2C_BOARD_INFO("adxl34x", 0x53),
  1217. .irq = IRQ_PC5,
  1218. .platform_data = (void *)&adxl34x_info,
  1219. },
  1220. #endif
  1221. #if defined(CONFIG_BFIN_TWI_LCD) || defined(CONFIG_BFIN_TWI_LCD_MODULE)
  1222. {
  1223. I2C_BOARD_INFO("ad5252", 0x2f),
  1224. },
  1225. #endif
  1226. };
  1227. #endif
  1228. #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
  1229. #include <linux/gpio_keys.h>
  1230. static struct gpio_keys_button bfin_gpio_keys_table[] = {
  1231. {BTN_0, GPIO_PB8, 1, "gpio-keys: BTN0"},
  1232. {BTN_1, GPIO_PB9, 1, "gpio-keys: BTN1"},
  1233. {BTN_2, GPIO_PB10, 1, "gpio-keys: BTN2"},
  1234. {BTN_3, GPIO_PB11, 1, "gpio-keys: BTN3"},
  1235. };
  1236. static struct gpio_keys_platform_data bfin_gpio_keys_data = {
  1237. .buttons = bfin_gpio_keys_table,
  1238. .nbuttons = ARRAY_SIZE(bfin_gpio_keys_table),
  1239. };
  1240. static struct platform_device bfin_device_gpiokeys = {
  1241. .name = "gpio-keys",
  1242. .dev = {
  1243. .platform_data = &bfin_gpio_keys_data,
  1244. },
  1245. };
  1246. #endif
  1247. static const unsigned int cclk_vlev_datasheet[] =
  1248. {
  1249. /*
  1250. * Internal VLEV BF54XSBBC1533
  1251. ****temporarily using these values until data sheet is updated
  1252. */
  1253. VRPAIR(VLEV_085, 150000000),
  1254. VRPAIR(VLEV_090, 250000000),
  1255. VRPAIR(VLEV_110, 276000000),
  1256. VRPAIR(VLEV_115, 301000000),
  1257. VRPAIR(VLEV_120, 525000000),
  1258. VRPAIR(VLEV_125, 550000000),
  1259. VRPAIR(VLEV_130, 600000000),
  1260. };
  1261. static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
  1262. .tuple_tab = cclk_vlev_datasheet,
  1263. .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
  1264. .vr_settling_time = 25 /* us */,
  1265. };
  1266. static struct platform_device bfin_dpmc = {
  1267. .name = "bfin dpmc",
  1268. .dev = {
  1269. .platform_data = &bfin_dmpc_vreg_data,
  1270. },
  1271. };
  1272. #if defined(CONFIG_SND_BF5XX_I2S) || defined(CONFIG_SND_BF5XX_I2S_MODULE) || \
  1273. defined(CONFIG_SND_BF5XX_TDM) || defined(CONFIG_SND_BF5XX_TDM_MODULE) || \
  1274. defined(CONFIG_SND_BF5XX_AC97) || defined(CONFIG_SND_BF5XX_AC97_MODULE)
  1275. #define SPORT_REQ(x) \
  1276. [x] = {P_SPORT##x##_TFS, P_SPORT##x##_DTPRI, P_SPORT##x##_TSCLK, \
  1277. P_SPORT##x##_RFS, P_SPORT##x##_DRPRI, P_SPORT##x##_RSCLK, 0}
  1278. static const u16 bfin_snd_pin[][7] = {
  1279. SPORT_REQ(0),
  1280. SPORT_REQ(1),
  1281. };
  1282. static struct bfin_snd_platform_data bfin_snd_data[] = {
  1283. {
  1284. .pin_req = &bfin_snd_pin[0][0],
  1285. },
  1286. {
  1287. .pin_req = &bfin_snd_pin[1][0],
  1288. },
  1289. };
  1290. #define BFIN_SND_RES(x) \
  1291. [x] = { \
  1292. { \
  1293. .start = SPORT##x##_TCR1, \
  1294. .end = SPORT##x##_TCR1, \
  1295. .flags = IORESOURCE_MEM \
  1296. }, \
  1297. { \
  1298. .start = CH_SPORT##x##_RX, \
  1299. .end = CH_SPORT##x##_RX, \
  1300. .flags = IORESOURCE_DMA, \
  1301. }, \
  1302. { \
  1303. .start = CH_SPORT##x##_TX, \
  1304. .end = CH_SPORT##x##_TX, \
  1305. .flags = IORESOURCE_DMA, \
  1306. }, \
  1307. { \
  1308. .start = IRQ_SPORT##x##_ERROR, \
  1309. .end = IRQ_SPORT##x##_ERROR, \
  1310. .flags = IORESOURCE_IRQ, \
  1311. } \
  1312. }
  1313. static struct resource bfin_snd_resources[][4] = {
  1314. BFIN_SND_RES(0),
  1315. BFIN_SND_RES(1),
  1316. };
  1317. static struct platform_device bfin_pcm = {
  1318. .name = "bfin-pcm-audio",
  1319. .id = -1,
  1320. };
  1321. #endif
  1322. #if defined(CONFIG_SND_BF5XX_SOC_AD73311) || defined(CONFIG_SND_BF5XX_SOC_AD73311_MODULE)
  1323. static struct platform_device bfin_ad73311_codec_device = {
  1324. .name = "ad73311",
  1325. .id = -1,
  1326. };
  1327. #endif
  1328. #if defined(CONFIG_SND_BF5XX_SOC_AD1980) || defined(CONFIG_SND_BF5XX_SOC_AD1980_MODULE)
  1329. static struct platform_device bfin_ad1980_codec_device = {
  1330. .name = "ad1980",
  1331. .id = -1,
  1332. };
  1333. #endif
  1334. #if defined(CONFIG_SND_BF5XX_SOC_I2S) || defined(CONFIG_SND_BF5XX_SOC_I2S_MODULE)
  1335. static struct platform_device bfin_i2s = {
  1336. .name = "bfin-i2s",
  1337. .id = CONFIG_SND_BF5XX_SPORT_NUM,
  1338. .num_resources = ARRAY_SIZE(bfin_snd_resources[CONFIG_SND_BF5XX_SPORT_NUM]),
  1339. .resource = bfin_snd_resources[CONFIG_SND_BF5XX_SPORT_NUM],
  1340. .dev = {
  1341. .platform_data = &bfin_snd_data[CONFIG_SND_BF5XX_SPORT_NUM],
  1342. },
  1343. };
  1344. #endif
  1345. #if defined(CONFIG_SND_BF5XX_SOC_TDM) || defined(CONFIG_SND_BF5XX_SOC_TDM_MODULE)
  1346. static struct platform_device bfin_tdm = {
  1347. .name = "bfin-tdm",
  1348. .id = CONFIG_SND_BF5XX_SPORT_NUM,
  1349. .num_resources = ARRAY_SIZE(bfin_snd_resources[CONFIG_SND_BF5XX_SPORT_NUM]),
  1350. .resource = bfin_snd_resources[CONFIG_SND_BF5XX_SPORT_NUM],
  1351. .dev = {
  1352. .platform_data = &bfin_snd_data[CONFIG_SND_BF5XX_SPORT_NUM],
  1353. },
  1354. };
  1355. #endif
  1356. #if defined(CONFIG_SND_BF5XX_SOC_AC97) || defined(CONFIG_SND_BF5XX_SOC_AC97_MODULE)
  1357. static struct platform_device bfin_ac97 = {
  1358. .name = "bfin-ac97",
  1359. .id = CONFIG_SND_BF5XX_SPORT_NUM,
  1360. .num_resources = ARRAY_SIZE(bfin_snd_resources[CONFIG_SND_BF5XX_SPORT_NUM]),
  1361. .resource = bfin_snd_resources[CONFIG_SND_BF5XX_SPORT_NUM],
  1362. .dev = {
  1363. .platform_data = &bfin_snd_data[CONFIG_SND_BF5XX_SPORT_NUM],
  1364. },
  1365. };
  1366. #endif
  1367. static struct platform_device *ezkit_devices[] __initdata = {
  1368. &bfin_dpmc,
  1369. #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
  1370. &rtc_device,
  1371. #endif
  1372. #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
  1373. #ifdef CONFIG_SERIAL_BFIN_UART0
  1374. &bfin_uart0_device,
  1375. #endif
  1376. #ifdef CONFIG_SERIAL_BFIN_UART1
  1377. &bfin_uart1_device,
  1378. #endif
  1379. #ifdef CONFIG_SERIAL_BFIN_UART2
  1380. &bfin_uart2_device,
  1381. #endif
  1382. #ifdef CONFIG_SERIAL_BFIN_UART3
  1383. &bfin_uart3_device,
  1384. #endif
  1385. #endif
  1386. #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
  1387. #ifdef CONFIG_BFIN_SIR0
  1388. &bfin_sir0_device,
  1389. #endif
  1390. #ifdef CONFIG_BFIN_SIR1
  1391. &bfin_sir1_device,
  1392. #endif
  1393. #ifdef CONFIG_BFIN_SIR2
  1394. &bfin_sir2_device,
  1395. #endif
  1396. #ifdef CONFIG_BFIN_SIR3
  1397. &bfin_sir3_device,
  1398. #endif
  1399. #endif
  1400. #if defined(CONFIG_FB_BF54X_LQ043) || defined(CONFIG_FB_BF54X_LQ043_MODULE)
  1401. &bf54x_lq043_device,
  1402. #endif
  1403. #if defined(CONFIG_SMSC911X) || defined(CONFIG_SMSC911X_MODULE)
  1404. &smsc911x_device,
  1405. #endif
  1406. #if defined(CONFIG_USB_MUSB_HDRC) || defined(CONFIG_USB_MUSB_HDRC_MODULE)
  1407. &musb_device,
  1408. #endif
  1409. #if defined(CONFIG_USB_ISP1760_HCD) || defined(CONFIG_USB_ISP1760_HCD_MODULE)
  1410. &bfin_isp1760_device,
  1411. #endif
  1412. #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
  1413. #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
  1414. &bfin_sport0_uart_device,
  1415. #endif
  1416. #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
  1417. &bfin_sport1_uart_device,
  1418. #endif
  1419. #ifdef CONFIG_SERIAL_BFIN_SPORT2_UART
  1420. &bfin_sport2_uart_device,
  1421. #endif
  1422. #ifdef CONFIG_SERIAL_BFIN_SPORT3_UART
  1423. &bfin_sport3_uart_device,
  1424. #endif
  1425. #endif
  1426. #if defined(CONFIG_CAN_BFIN) || defined(CONFIG_CAN_BFIN_MODULE)
  1427. &bfin_can0_device,
  1428. &bfin_can1_device,
  1429. #endif
  1430. #if defined(CONFIG_PATA_BF54X) || defined(CONFIG_PATA_BF54X_MODULE)
  1431. &bfin_atapi_device,
  1432. #endif
  1433. #if defined(CONFIG_MTD_NAND_BF5XX) || defined(CONFIG_MTD_NAND_BF5XX_MODULE)
  1434. &bf5xx_nand_device,
  1435. #endif
  1436. #if defined(CONFIG_SDH_BFIN) || defined(CONFIG_SDH_BFIN_MODULE)
  1437. &bf54x_sdh_device,
  1438. #endif
  1439. #if defined(CONFIG_SPI_BFIN5XX) || defined(CONFIG_SPI_BFIN5XX_MODULE)
  1440. &bf54x_spi_master0,
  1441. &bf54x_spi_master1,
  1442. #endif
  1443. #if defined(CONFIG_VIDEO_BLACKFIN_CAPTURE) \
  1444. || defined(CONFIG_VIDEO_BLACKFIN_CAPTURE_MODULE)
  1445. &bfin_capture_device,
  1446. #endif
  1447. #if defined(CONFIG_KEYBOARD_BFIN) || defined(CONFIG_KEYBOARD_BFIN_MODULE)
  1448. &bf54x_kpad_device,
  1449. #endif
  1450. #if defined(CONFIG_INPUT_BFIN_ROTARY) || defined(CONFIG_INPUT_BFIN_ROTARY_MODULE)
  1451. &bfin_rotary_device,
  1452. #endif
  1453. #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
  1454. &i2c_bfin_twi0_device,
  1455. #if !defined(CONFIG_BF542)
  1456. &i2c_bfin_twi1_device,
  1457. #endif
  1458. #endif
  1459. #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
  1460. &bfin_device_gpiokeys,
  1461. #endif
  1462. #if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
  1463. &ezkit_flash_device,
  1464. #endif
  1465. #if defined(CONFIG_SND_BF5XX_I2S) || defined(CONFIG_SND_BF5XX_I2S_MODULE) || \
  1466. defined(CONFIG_SND_BF5XX_TDM) || defined(CONFIG_SND_BF5XX_TDM_MODULE) || \
  1467. defined(CONFIG_SND_BF5XX_AC97) || defined(CONFIG_SND_BF5XX_AC97_MODULE)
  1468. &bfin_pcm,
  1469. #endif
  1470. #if defined(CONFIG_SND_BF5XX_SOC_AD1980) || defined(CONFIG_SND_BF5XX_SOC_AD1980_MODULE)
  1471. &bfin_ad1980_codec_device,
  1472. #endif
  1473. #if defined(CONFIG_SND_BF5XX_I2S) || defined(CONFIG_SND_BF5XX_I2S_MODULE)
  1474. &bfin_i2s,
  1475. #endif
  1476. #if defined(CONFIG_SND_BF5XX_TDM) || defined(CONFIG_SND_BF5XX_TDM_MODULE)
  1477. &bfin_tdm,
  1478. #endif
  1479. #if defined(CONFIG_SND_BF5XX_AC97) || defined(CONFIG_SND_BF5XX_AC97_MODULE)
  1480. &bfin_ac97,
  1481. #endif
  1482. };
  1483. static int __init ezkit_init(void)
  1484. {
  1485. printk(KERN_INFO "%s(): registering device resources\n", __func__);
  1486. i2c_register_board_info(0, bfin_i2c_board_info0,
  1487. ARRAY_SIZE(bfin_i2c_board_info0));
  1488. #if !defined(CONFIG_BF542) /* The BF542 only has 1 TWI */
  1489. i2c_register_board_info(1, bfin_i2c_board_info1,
  1490. ARRAY_SIZE(bfin_i2c_board_info1));
  1491. #endif
  1492. platform_add_devices(ezkit_devices, ARRAY_SIZE(ezkit_devices));
  1493. spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
  1494. return 0;
  1495. }
  1496. arch_initcall(ezkit_init);
  1497. static struct platform_device *ezkit_early_devices[] __initdata = {
  1498. #if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
  1499. #ifdef CONFIG_SERIAL_BFIN_UART0
  1500. &bfin_uart0_device,
  1501. #endif
  1502. #ifdef CONFIG_SERIAL_BFIN_UART1
  1503. &bfin_uart1_device,
  1504. #endif
  1505. #ifdef CONFIG_SERIAL_BFIN_UART2
  1506. &bfin_uart2_device,
  1507. #endif
  1508. #ifdef CONFIG_SERIAL_BFIN_UART3
  1509. &bfin_uart3_device,
  1510. #endif
  1511. #endif
  1512. #if defined(CONFIG_SERIAL_BFIN_SPORT_CONSOLE)
  1513. #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
  1514. &bfin_sport0_uart_device,
  1515. #endif
  1516. #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
  1517. &bfin_sport1_uart_device,
  1518. #endif
  1519. #ifdef CONFIG_SERIAL_BFIN_SPORT2_UART
  1520. &bfin_sport2_uart_device,
  1521. #endif
  1522. #ifdef CONFIG_SERIAL_BFIN_SPORT3_UART
  1523. &bfin_sport3_uart_device,
  1524. #endif
  1525. #endif
  1526. };
  1527. void __init native_machine_early_platform_add_devices(void)
  1528. {
  1529. printk(KERN_INFO "register early platform devices\n");
  1530. early_platform_add_devices(ezkit_early_devices,
  1531. ARRAY_SIZE(ezkit_early_devices));
  1532. }