cm_bf537e.c 18 KB

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  1. /*
  2. * Copyright 2004-2009 Analog Devices Inc.
  3. * 2008-2009 Bluetechnix
  4. * 2005 National ICT Australia (NICTA)
  5. * Aidan Williams <aidan@nicta.com.au>
  6. *
  7. * Licensed under the GPL-2 or later.
  8. */
  9. #include <linux/device.h>
  10. #include <linux/export.h>
  11. #include <linux/etherdevice.h>
  12. #include <linux/platform_device.h>
  13. #include <linux/mtd/mtd.h>
  14. #include <linux/mtd/partitions.h>
  15. #include <linux/mtd/physmap.h>
  16. #include <linux/spi/spi.h>
  17. #include <linux/spi/flash.h>
  18. #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
  19. #include <linux/usb/isp1362.h>
  20. #endif
  21. #include <linux/ata_platform.h>
  22. #include <linux/irq.h>
  23. #include <asm/dma.h>
  24. #include <asm/bfin5xx_spi.h>
  25. #include <asm/portmux.h>
  26. #include <asm/dpmc.h>
  27. /*
  28. * Name the Board for the /proc/cpuinfo
  29. */
  30. const char bfin_board_name[] = "Bluetechnix CM BF537E";
  31. #if defined(CONFIG_SPI_BFIN5XX) || defined(CONFIG_SPI_BFIN5XX_MODULE)
  32. /* all SPI peripherals info goes here */
  33. #if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE)
  34. static struct mtd_partition bfin_spi_flash_partitions[] = {
  35. {
  36. .name = "bootloader(spi)",
  37. .size = 0x00020000,
  38. .offset = 0,
  39. .mask_flags = MTD_CAP_ROM
  40. }, {
  41. .name = "linux kernel(spi)",
  42. .size = 0xe0000,
  43. .offset = 0x20000
  44. }, {
  45. .name = "file system(spi)",
  46. .size = 0x700000,
  47. .offset = 0x00100000,
  48. }
  49. };
  50. static struct flash_platform_data bfin_spi_flash_data = {
  51. .name = "m25p80",
  52. .parts = bfin_spi_flash_partitions,
  53. .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
  54. .type = "m25p64",
  55. };
  56. /* SPI flash chip (m25p64) */
  57. static struct bfin5xx_spi_chip spi_flash_chip_info = {
  58. .enable_dma = 0, /* use dma transfer with this chip*/
  59. };
  60. #endif
  61. #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
  62. static struct bfin5xx_spi_chip mmc_spi_chip_info = {
  63. .enable_dma = 0,
  64. };
  65. #endif
  66. static struct spi_board_info bfin_spi_board_info[] __initdata = {
  67. #if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE)
  68. {
  69. /* the modalias must be the same as spi device driver name */
  70. .modalias = "m25p80", /* Name of spi_driver for this device */
  71. .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
  72. .bus_num = 0, /* Framework bus number */
  73. .chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
  74. .platform_data = &bfin_spi_flash_data,
  75. .controller_data = &spi_flash_chip_info,
  76. .mode = SPI_MODE_3,
  77. },
  78. #endif
  79. #if defined(CONFIG_SND_BF5XX_SOC_AD183X) || defined(CONFIG_SND_BF5XX_SOC_AD183X_MODULE)
  80. {
  81. .modalias = "ad183x",
  82. .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
  83. .bus_num = 0,
  84. .chip_select = 4,
  85. },
  86. #endif
  87. #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
  88. {
  89. .modalias = "mmc_spi",
  90. .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */
  91. .bus_num = 0,
  92. .chip_select = 1,
  93. .controller_data = &mmc_spi_chip_info,
  94. .mode = SPI_MODE_3,
  95. },
  96. #endif
  97. };
  98. /* SPI (0) */
  99. static struct resource bfin_spi0_resource[] = {
  100. [0] = {
  101. .start = SPI0_REGBASE,
  102. .end = SPI0_REGBASE + 0xFF,
  103. .flags = IORESOURCE_MEM,
  104. },
  105. [1] = {
  106. .start = CH_SPI,
  107. .end = CH_SPI,
  108. .flags = IORESOURCE_DMA,
  109. },
  110. [2] = {
  111. .start = IRQ_SPI,
  112. .end = IRQ_SPI,
  113. .flags = IORESOURCE_IRQ,
  114. },
  115. };
  116. /* SPI controller data */
  117. static struct bfin5xx_spi_master bfin_spi0_info = {
  118. .num_chipselect = 8,
  119. .enable_dma = 1, /* master has the ability to do dma transfer */
  120. .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
  121. };
  122. static struct platform_device bfin_spi0_device = {
  123. .name = "bfin-spi",
  124. .id = 0, /* Bus number */
  125. .num_resources = ARRAY_SIZE(bfin_spi0_resource),
  126. .resource = bfin_spi0_resource,
  127. .dev = {
  128. .platform_data = &bfin_spi0_info, /* Passed to driver */
  129. },
  130. };
  131. #endif /* spi master and devices */
  132. #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
  133. static struct platform_device rtc_device = {
  134. .name = "rtc-bfin",
  135. .id = -1,
  136. };
  137. #endif
  138. #if defined(CONFIG_FB_HITACHI_TX09) || defined(CONFIG_FB_HITACHI_TX09_MODULE)
  139. static struct platform_device hitachi_fb_device = {
  140. .name = "hitachi-tx09",
  141. };
  142. #endif
  143. #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
  144. #include <linux/smc91x.h>
  145. static struct smc91x_platdata smc91x_info = {
  146. .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT,
  147. .leda = RPC_LED_100_10,
  148. .ledb = RPC_LED_TX_RX,
  149. };
  150. static struct resource smc91x_resources[] = {
  151. {
  152. .start = 0x20200300,
  153. .end = 0x20200300 + 16,
  154. .flags = IORESOURCE_MEM,
  155. }, {
  156. .start = IRQ_PF14,
  157. .end = IRQ_PF14,
  158. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  159. },
  160. };
  161. static struct platform_device smc91x_device = {
  162. .name = "smc91x",
  163. .id = 0,
  164. .num_resources = ARRAY_SIZE(smc91x_resources),
  165. .resource = smc91x_resources,
  166. .dev = {
  167. .platform_data = &smc91x_info,
  168. },
  169. };
  170. #endif
  171. #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
  172. static struct resource isp1362_hcd_resources[] = {
  173. {
  174. .start = 0x20308000,
  175. .end = 0x20308000,
  176. .flags = IORESOURCE_MEM,
  177. }, {
  178. .start = 0x20308004,
  179. .end = 0x20308004,
  180. .flags = IORESOURCE_MEM,
  181. }, {
  182. .start = IRQ_PG15,
  183. .end = IRQ_PG15,
  184. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWEDGE,
  185. },
  186. };
  187. static struct isp1362_platform_data isp1362_priv = {
  188. .sel15Kres = 1,
  189. .clknotstop = 0,
  190. .oc_enable = 0,
  191. .int_act_high = 0,
  192. .int_edge_triggered = 0,
  193. .remote_wakeup_connected = 0,
  194. .no_power_switching = 1,
  195. .power_switching_mode = 0,
  196. };
  197. static struct platform_device isp1362_hcd_device = {
  198. .name = "isp1362-hcd",
  199. .id = 0,
  200. .dev = {
  201. .platform_data = &isp1362_priv,
  202. },
  203. .num_resources = ARRAY_SIZE(isp1362_hcd_resources),
  204. .resource = isp1362_hcd_resources,
  205. };
  206. #endif
  207. #if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
  208. static struct resource net2272_bfin_resources[] = {
  209. {
  210. .start = 0x20300000,
  211. .end = 0x20300000 + 0x100,
  212. .flags = IORESOURCE_MEM,
  213. }, {
  214. .start = IRQ_PG13,
  215. .end = IRQ_PG13,
  216. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  217. },
  218. };
  219. static struct platform_device net2272_bfin_device = {
  220. .name = "net2272",
  221. .id = -1,
  222. .num_resources = ARRAY_SIZE(net2272_bfin_resources),
  223. .resource = net2272_bfin_resources,
  224. };
  225. #endif
  226. #if defined(CONFIG_MTD_GPIO_ADDR) || defined(CONFIG_MTD_GPIO_ADDR_MODULE)
  227. static struct mtd_partition cm_partitions[] = {
  228. {
  229. .name = "bootloader(nor)",
  230. .size = 0x40000,
  231. .offset = 0,
  232. }, {
  233. .name = "linux kernel(nor)",
  234. .size = 0x100000,
  235. .offset = MTDPART_OFS_APPEND,
  236. }, {
  237. .name = "file system(nor)",
  238. .size = MTDPART_SIZ_FULL,
  239. .offset = MTDPART_OFS_APPEND,
  240. }
  241. };
  242. static struct physmap_flash_data cm_flash_data = {
  243. .width = 2,
  244. .parts = cm_partitions,
  245. .nr_parts = ARRAY_SIZE(cm_partitions),
  246. };
  247. static unsigned cm_flash_gpios[] = { GPIO_PF4 };
  248. static struct resource cm_flash_resource[] = {
  249. {
  250. .name = "cfi_probe",
  251. .start = 0x20000000,
  252. .end = 0x201fffff,
  253. .flags = IORESOURCE_MEM,
  254. }, {
  255. .start = (unsigned long)cm_flash_gpios,
  256. .end = ARRAY_SIZE(cm_flash_gpios),
  257. .flags = IORESOURCE_IRQ,
  258. }
  259. };
  260. static struct platform_device cm_flash_device = {
  261. .name = "gpio-addr-flash",
  262. .id = 0,
  263. .dev = {
  264. .platform_data = &cm_flash_data,
  265. },
  266. .num_resources = ARRAY_SIZE(cm_flash_resource),
  267. .resource = cm_flash_resource,
  268. };
  269. #endif
  270. #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
  271. #ifdef CONFIG_SERIAL_BFIN_UART0
  272. static struct resource bfin_uart0_resources[] = {
  273. {
  274. .start = UART0_THR,
  275. .end = UART0_GCTL+2,
  276. .flags = IORESOURCE_MEM,
  277. },
  278. {
  279. .start = IRQ_UART0_TX,
  280. .end = IRQ_UART0_TX,
  281. .flags = IORESOURCE_IRQ,
  282. },
  283. {
  284. .start = IRQ_UART0_RX,
  285. .end = IRQ_UART0_RX,
  286. .flags = IORESOURCE_IRQ,
  287. },
  288. {
  289. .start = IRQ_UART0_ERROR,
  290. .end = IRQ_UART0_ERROR,
  291. .flags = IORESOURCE_IRQ,
  292. },
  293. {
  294. .start = CH_UART0_TX,
  295. .end = CH_UART0_TX,
  296. .flags = IORESOURCE_DMA,
  297. },
  298. {
  299. .start = CH_UART0_RX,
  300. .end = CH_UART0_RX,
  301. .flags = IORESOURCE_DMA,
  302. },
  303. #ifdef CONFIG_BFIN_UART0_CTSRTS
  304. {
  305. /*
  306. * Refer to arch/blackfin/mach-xxx/include/mach/gpio.h for the GPIO map.
  307. */
  308. .start = -1,
  309. .end = -1,
  310. .flags = IORESOURCE_IO,
  311. },
  312. {
  313. /*
  314. * Refer to arch/blackfin/mach-xxx/include/mach/gpio.h for the GPIO map.
  315. */
  316. .start = -1,
  317. .end = -1,
  318. .flags = IORESOURCE_IO,
  319. },
  320. #endif
  321. };
  322. static unsigned short bfin_uart0_peripherals[] = {
  323. P_UART0_TX, P_UART0_RX, 0
  324. };
  325. static struct platform_device bfin_uart0_device = {
  326. .name = "bfin-uart",
  327. .id = 0,
  328. .num_resources = ARRAY_SIZE(bfin_uart0_resources),
  329. .resource = bfin_uart0_resources,
  330. .dev = {
  331. .platform_data = &bfin_uart0_peripherals, /* Passed to driver */
  332. },
  333. };
  334. #endif
  335. #ifdef CONFIG_SERIAL_BFIN_UART1
  336. static struct resource bfin_uart1_resources[] = {
  337. {
  338. .start = UART1_THR,
  339. .end = UART1_GCTL+2,
  340. .flags = IORESOURCE_MEM,
  341. },
  342. {
  343. .start = IRQ_UART1_TX,
  344. .end = IRQ_UART1_TX,
  345. .flags = IORESOURCE_IRQ,
  346. },
  347. {
  348. .start = IRQ_UART1_RX,
  349. .end = IRQ_UART1_RX,
  350. .flags = IORESOURCE_IRQ,
  351. },
  352. {
  353. .start = IRQ_UART1_ERROR,
  354. .end = IRQ_UART1_ERROR,
  355. .flags = IORESOURCE_IRQ,
  356. },
  357. {
  358. .start = CH_UART1_TX,
  359. .end = CH_UART1_TX,
  360. .flags = IORESOURCE_DMA,
  361. },
  362. {
  363. .start = CH_UART1_RX,
  364. .end = CH_UART1_RX,
  365. .flags = IORESOURCE_DMA,
  366. },
  367. #ifdef CONFIG_BFIN_UART1_CTSRTS
  368. {
  369. /*
  370. * Refer to arch/blackfin/mach-xxx/include/mach/gpio.h for the GPIO map.
  371. */
  372. .start = -1,
  373. .end = -1,
  374. .flags = IORESOURCE_IO,
  375. },
  376. {
  377. /*
  378. * Refer to arch/blackfin/mach-xxx/include/mach/gpio.h for the GPIO map.
  379. */
  380. .start = -1,
  381. .end = -1,
  382. .flags = IORESOURCE_IO,
  383. },
  384. #endif
  385. };
  386. static unsigned short bfin_uart1_peripherals[] = {
  387. P_UART1_TX, P_UART1_RX, 0
  388. };
  389. static struct platform_device bfin_uart1_device = {
  390. .name = "bfin-uart",
  391. .id = 1,
  392. .num_resources = ARRAY_SIZE(bfin_uart1_resources),
  393. .resource = bfin_uart1_resources,
  394. .dev = {
  395. .platform_data = &bfin_uart1_peripherals, /* Passed to driver */
  396. },
  397. };
  398. #endif
  399. #endif
  400. #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
  401. #ifdef CONFIG_BFIN_SIR0
  402. static struct resource bfin_sir0_resources[] = {
  403. {
  404. .start = 0xFFC00400,
  405. .end = 0xFFC004FF,
  406. .flags = IORESOURCE_MEM,
  407. },
  408. {
  409. .start = IRQ_UART0_RX,
  410. .end = IRQ_UART0_RX+1,
  411. .flags = IORESOURCE_IRQ,
  412. },
  413. {
  414. .start = CH_UART0_RX,
  415. .end = CH_UART0_RX+1,
  416. .flags = IORESOURCE_DMA,
  417. },
  418. };
  419. static struct platform_device bfin_sir0_device = {
  420. .name = "bfin_sir",
  421. .id = 0,
  422. .num_resources = ARRAY_SIZE(bfin_sir0_resources),
  423. .resource = bfin_sir0_resources,
  424. };
  425. #endif
  426. #ifdef CONFIG_BFIN_SIR1
  427. static struct resource bfin_sir1_resources[] = {
  428. {
  429. .start = 0xFFC02000,
  430. .end = 0xFFC020FF,
  431. .flags = IORESOURCE_MEM,
  432. },
  433. {
  434. .start = IRQ_UART1_RX,
  435. .end = IRQ_UART1_RX+1,
  436. .flags = IORESOURCE_IRQ,
  437. },
  438. {
  439. .start = CH_UART1_RX,
  440. .end = CH_UART1_RX+1,
  441. .flags = IORESOURCE_DMA,
  442. },
  443. };
  444. static struct platform_device bfin_sir1_device = {
  445. .name = "bfin_sir",
  446. .id = 1,
  447. .num_resources = ARRAY_SIZE(bfin_sir1_resources),
  448. .resource = bfin_sir1_resources,
  449. };
  450. #endif
  451. #endif
  452. #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
  453. static struct resource bfin_twi0_resource[] = {
  454. [0] = {
  455. .start = TWI0_REGBASE,
  456. .end = TWI0_REGBASE,
  457. .flags = IORESOURCE_MEM,
  458. },
  459. [1] = {
  460. .start = IRQ_TWI,
  461. .end = IRQ_TWI,
  462. .flags = IORESOURCE_IRQ,
  463. },
  464. };
  465. static struct platform_device i2c_bfin_twi_device = {
  466. .name = "i2c-bfin-twi",
  467. .id = 0,
  468. .num_resources = ARRAY_SIZE(bfin_twi0_resource),
  469. .resource = bfin_twi0_resource,
  470. };
  471. #endif
  472. #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
  473. #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
  474. static struct resource bfin_sport0_uart_resources[] = {
  475. {
  476. .start = SPORT0_TCR1,
  477. .end = SPORT0_MRCS3+4,
  478. .flags = IORESOURCE_MEM,
  479. },
  480. {
  481. .start = IRQ_SPORT0_RX,
  482. .end = IRQ_SPORT0_RX+1,
  483. .flags = IORESOURCE_IRQ,
  484. },
  485. {
  486. .start = IRQ_SPORT0_ERROR,
  487. .end = IRQ_SPORT0_ERROR,
  488. .flags = IORESOURCE_IRQ,
  489. },
  490. };
  491. static unsigned short bfin_sport0_peripherals[] = {
  492. P_SPORT0_TFS, P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_RFS,
  493. P_SPORT0_DRPRI, P_SPORT0_RSCLK, 0
  494. };
  495. static struct platform_device bfin_sport0_uart_device = {
  496. .name = "bfin-sport-uart",
  497. .id = 0,
  498. .num_resources = ARRAY_SIZE(bfin_sport0_uart_resources),
  499. .resource = bfin_sport0_uart_resources,
  500. .dev = {
  501. .platform_data = &bfin_sport0_peripherals, /* Passed to driver */
  502. },
  503. };
  504. #endif
  505. #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
  506. static struct resource bfin_sport1_uart_resources[] = {
  507. {
  508. .start = SPORT1_TCR1,
  509. .end = SPORT1_MRCS3+4,
  510. .flags = IORESOURCE_MEM,
  511. },
  512. {
  513. .start = IRQ_SPORT1_RX,
  514. .end = IRQ_SPORT1_RX+1,
  515. .flags = IORESOURCE_IRQ,
  516. },
  517. {
  518. .start = IRQ_SPORT1_ERROR,
  519. .end = IRQ_SPORT1_ERROR,
  520. .flags = IORESOURCE_IRQ,
  521. },
  522. };
  523. static unsigned short bfin_sport1_peripherals[] = {
  524. P_SPORT1_TFS, P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_RFS,
  525. P_SPORT1_DRPRI, P_SPORT1_RSCLK, 0
  526. };
  527. static struct platform_device bfin_sport1_uart_device = {
  528. .name = "bfin-sport-uart",
  529. .id = 1,
  530. .num_resources = ARRAY_SIZE(bfin_sport1_uart_resources),
  531. .resource = bfin_sport1_uart_resources,
  532. .dev = {
  533. .platform_data = &bfin_sport1_peripherals, /* Passed to driver */
  534. },
  535. };
  536. #endif
  537. #endif
  538. #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
  539. #include <linux/bfin_mac.h>
  540. static const unsigned short bfin_mac_peripherals[] = P_MII0;
  541. static struct bfin_phydev_platform_data bfin_phydev_data[] = {
  542. {
  543. .addr = 1,
  544. .irq = IRQ_MAC_PHYINT,
  545. },
  546. };
  547. static struct bfin_mii_bus_platform_data bfin_mii_bus_data = {
  548. .phydev_number = 1,
  549. .phydev_data = bfin_phydev_data,
  550. .phy_mode = PHY_INTERFACE_MODE_MII,
  551. .mac_peripherals = bfin_mac_peripherals,
  552. };
  553. static struct platform_device bfin_mii_bus = {
  554. .name = "bfin_mii_bus",
  555. .dev = {
  556. .platform_data = &bfin_mii_bus_data,
  557. }
  558. };
  559. static struct platform_device bfin_mac_device = {
  560. .name = "bfin_mac",
  561. .dev = {
  562. .platform_data = &bfin_mii_bus,
  563. }
  564. };
  565. #endif
  566. #if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
  567. #define PATA_INT IRQ_PF14
  568. static struct pata_platform_info bfin_pata_platform_data = {
  569. .ioport_shift = 2,
  570. .irq_type = IRQF_TRIGGER_HIGH,
  571. };
  572. static struct resource bfin_pata_resources[] = {
  573. {
  574. .start = 0x2030C000,
  575. .end = 0x2030C01F,
  576. .flags = IORESOURCE_MEM,
  577. },
  578. {
  579. .start = 0x2030D018,
  580. .end = 0x2030D01B,
  581. .flags = IORESOURCE_MEM,
  582. },
  583. {
  584. .start = PATA_INT,
  585. .end = PATA_INT,
  586. .flags = IORESOURCE_IRQ,
  587. },
  588. };
  589. static struct platform_device bfin_pata_device = {
  590. .name = "pata_platform",
  591. .id = -1,
  592. .num_resources = ARRAY_SIZE(bfin_pata_resources),
  593. .resource = bfin_pata_resources,
  594. .dev = {
  595. .platform_data = &bfin_pata_platform_data,
  596. }
  597. };
  598. #endif
  599. static const unsigned int cclk_vlev_datasheet[] =
  600. {
  601. VRPAIR(VLEV_085, 250000000),
  602. VRPAIR(VLEV_090, 376000000),
  603. VRPAIR(VLEV_095, 426000000),
  604. VRPAIR(VLEV_100, 426000000),
  605. VRPAIR(VLEV_105, 476000000),
  606. VRPAIR(VLEV_110, 476000000),
  607. VRPAIR(VLEV_115, 476000000),
  608. VRPAIR(VLEV_120, 500000000),
  609. VRPAIR(VLEV_125, 533000000),
  610. VRPAIR(VLEV_130, 600000000),
  611. };
  612. static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
  613. .tuple_tab = cclk_vlev_datasheet,
  614. .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
  615. .vr_settling_time = 25 /* us */,
  616. };
  617. static struct platform_device bfin_dpmc = {
  618. .name = "bfin dpmc",
  619. .dev = {
  620. .platform_data = &bfin_dmpc_vreg_data,
  621. },
  622. };
  623. static struct platform_device *cm_bf537e_devices[] __initdata = {
  624. &bfin_dpmc,
  625. #if defined(CONFIG_FB_HITACHI_TX09) || defined(CONFIG_FB_HITACHI_TX09_MODULE)
  626. &hitachi_fb_device,
  627. #endif
  628. #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
  629. &rtc_device,
  630. #endif
  631. #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
  632. #ifdef CONFIG_SERIAL_BFIN_UART0
  633. &bfin_uart0_device,
  634. #endif
  635. #ifdef CONFIG_SERIAL_BFIN_UART1
  636. &bfin_uart1_device,
  637. #endif
  638. #endif
  639. #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
  640. #ifdef CONFIG_BFIN_SIR0
  641. &bfin_sir0_device,
  642. #endif
  643. #ifdef CONFIG_BFIN_SIR1
  644. &bfin_sir1_device,
  645. #endif
  646. #endif
  647. #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
  648. &i2c_bfin_twi_device,
  649. #endif
  650. #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
  651. #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
  652. &bfin_sport0_uart_device,
  653. #endif
  654. #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
  655. &bfin_sport1_uart_device,
  656. #endif
  657. #endif
  658. #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
  659. &isp1362_hcd_device,
  660. #endif
  661. #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
  662. &smc91x_device,
  663. #endif
  664. #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
  665. &bfin_mii_bus,
  666. &bfin_mac_device,
  667. #endif
  668. #if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
  669. &net2272_bfin_device,
  670. #endif
  671. #if defined(CONFIG_SPI_BFIN5XX) || defined(CONFIG_SPI_BFIN5XX_MODULE)
  672. &bfin_spi0_device,
  673. #endif
  674. #if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
  675. &bfin_pata_device,
  676. #endif
  677. #if defined(CONFIG_MTD_GPIO_ADDR) || defined(CONFIG_MTD_GPIO_ADDR_MODULE)
  678. &cm_flash_device,
  679. #endif
  680. };
  681. static int __init net2272_init(void)
  682. {
  683. #if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
  684. int ret;
  685. ret = gpio_request(GPIO_PG14, "net2272");
  686. if (ret)
  687. return ret;
  688. /* Reset USB Chip, PG14 */
  689. gpio_direction_output(GPIO_PG14, 0);
  690. mdelay(2);
  691. gpio_set_value(GPIO_PG14, 1);
  692. #endif
  693. return 0;
  694. }
  695. static int __init cm_bf537e_init(void)
  696. {
  697. printk(KERN_INFO "%s(): registering device resources\n", __func__);
  698. platform_add_devices(cm_bf537e_devices, ARRAY_SIZE(cm_bf537e_devices));
  699. #if defined(CONFIG_SPI_BFIN5XX) || defined(CONFIG_SPI_BFIN5XX_MODULE)
  700. spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
  701. #endif
  702. #if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
  703. irq_set_status_flags(PATA_INT, IRQ_NOAUTOEN);
  704. #endif
  705. if (net2272_init())
  706. pr_warning("unable to configure net2272; it probably won't work\n");
  707. return 0;
  708. }
  709. arch_initcall(cm_bf537e_init);
  710. static struct platform_device *cm_bf537e_early_devices[] __initdata = {
  711. #if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
  712. #ifdef CONFIG_SERIAL_BFIN_UART0
  713. &bfin_uart0_device,
  714. #endif
  715. #ifdef CONFIG_SERIAL_BFIN_UART1
  716. &bfin_uart1_device,
  717. #endif
  718. #endif
  719. #if defined(CONFIG_SERIAL_BFIN_SPORT_CONSOLE)
  720. #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
  721. &bfin_sport0_uart_device,
  722. #endif
  723. #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
  724. &bfin_sport1_uart_device,
  725. #endif
  726. #endif
  727. };
  728. void __init native_machine_early_platform_add_devices(void)
  729. {
  730. printk(KERN_INFO "register early platform devices\n");
  731. early_platform_add_devices(cm_bf537e_early_devices,
  732. ARRAY_SIZE(cm_bf537e_early_devices));
  733. }
  734. void bfin_get_ether_addr(char *addr)
  735. {
  736. random_ether_addr(addr);
  737. printk(KERN_WARNING "%s:%s: Setting Ethernet MAC to a random one\n", __FILE__, __func__);
  738. }
  739. EXPORT_SYMBOL(bfin_get_ether_addr);