devs.c 38 KB

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  1. /* linux/arch/arm/plat-samsung/devs.c
  2. *
  3. * Copyright (c) 2011 Samsung Electronics Co., Ltd.
  4. * http://www.samsung.com
  5. *
  6. * Base SAMSUNG platform device definitions
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License version 2 as
  10. * published by the Free Software Foundation.
  11. */
  12. #include <linux/kernel.h>
  13. #include <linux/types.h>
  14. #include <linux/interrupt.h>
  15. #include <linux/list.h>
  16. #include <linux/timer.h>
  17. #include <linux/init.h>
  18. #include <linux/serial_core.h>
  19. #include <linux/platform_device.h>
  20. #include <linux/io.h>
  21. #include <linux/slab.h>
  22. #include <linux/string.h>
  23. #include <linux/dma-mapping.h>
  24. #include <linux/fb.h>
  25. #include <linux/gfp.h>
  26. #include <linux/mtd/mtd.h>
  27. #include <linux/mtd/onenand.h>
  28. #include <linux/mtd/partitions.h>
  29. #include <linux/mmc/host.h>
  30. #include <linux/ioport.h>
  31. #include <linux/platform_data/s3c-hsudc.h>
  32. #include <asm/irq.h>
  33. #include <asm/pmu.h>
  34. #include <asm/mach/arch.h>
  35. #include <asm/mach/map.h>
  36. #include <asm/mach/irq.h>
  37. #include <mach/hardware.h>
  38. #include <mach/dma.h>
  39. #include <mach/irqs.h>
  40. #include <mach/map.h>
  41. #include <plat/cpu.h>
  42. #include <plat/devs.h>
  43. #include <plat/adc.h>
  44. #include <plat/ata.h>
  45. #include <plat/ehci.h>
  46. #include <plat/fb.h>
  47. #include <plat/fb-s3c2410.h>
  48. #include <plat/hwmon.h>
  49. #include <plat/iic.h>
  50. #include <plat/keypad.h>
  51. #include <plat/mci.h>
  52. #include <plat/nand.h>
  53. #include <plat/sdhci.h>
  54. #include <plat/ts.h>
  55. #include <plat/udc.h>
  56. #include <plat/usb-control.h>
  57. #include <plat/usb-phy.h>
  58. #include <plat/regs-iic.h>
  59. #include <plat/regs-serial.h>
  60. #include <plat/regs-spi.h>
  61. #include <plat/s3c64xx-spi.h>
  62. static u64 samsung_device_dma_mask = DMA_BIT_MASK(32);
  63. /* AC97 */
  64. #ifdef CONFIG_CPU_S3C2440
  65. static struct resource s3c_ac97_resource[] = {
  66. [0] = DEFINE_RES_MEM(S3C2440_PA_AC97, S3C2440_SZ_AC97),
  67. [1] = DEFINE_RES_IRQ(IRQ_S3C244X_AC97),
  68. [2] = DEFINE_RES_DMA_NAMED(DMACH_PCM_OUT, "PCM out"),
  69. [3] = DEFINE_RES_DMA_NAMED(DMACH_PCM_IN, "PCM in"),
  70. [4] = DEFINE_RES_DMA_NAMED(DMACH_MIC_IN, "Mic in"),
  71. };
  72. struct platform_device s3c_device_ac97 = {
  73. .name = "samsung-ac97",
  74. .id = -1,
  75. .num_resources = ARRAY_SIZE(s3c_ac97_resource),
  76. .resource = s3c_ac97_resource,
  77. .dev = {
  78. .dma_mask = &samsung_device_dma_mask,
  79. .coherent_dma_mask = DMA_BIT_MASK(32),
  80. }
  81. };
  82. #endif /* CONFIG_CPU_S3C2440 */
  83. /* ADC */
  84. #ifdef CONFIG_PLAT_S3C24XX
  85. static struct resource s3c_adc_resource[] = {
  86. [0] = DEFINE_RES_MEM(S3C24XX_PA_ADC, S3C24XX_SZ_ADC),
  87. [1] = DEFINE_RES_IRQ(IRQ_TC),
  88. [2] = DEFINE_RES_IRQ(IRQ_ADC),
  89. };
  90. struct platform_device s3c_device_adc = {
  91. .name = "s3c24xx-adc",
  92. .id = -1,
  93. .num_resources = ARRAY_SIZE(s3c_adc_resource),
  94. .resource = s3c_adc_resource,
  95. };
  96. #endif /* CONFIG_PLAT_S3C24XX */
  97. #if defined(CONFIG_SAMSUNG_DEV_ADC)
  98. static struct resource s3c_adc_resource[] = {
  99. [0] = DEFINE_RES_MEM(SAMSUNG_PA_ADC, SZ_256),
  100. [1] = DEFINE_RES_IRQ(IRQ_TC),
  101. [2] = DEFINE_RES_IRQ(IRQ_ADC),
  102. };
  103. struct platform_device s3c_device_adc = {
  104. .name = "samsung-adc",
  105. .id = -1,
  106. .num_resources = ARRAY_SIZE(s3c_adc_resource),
  107. .resource = s3c_adc_resource,
  108. };
  109. #endif /* CONFIG_SAMSUNG_DEV_ADC */
  110. /* Camif Controller */
  111. #ifdef CONFIG_CPU_S3C2440
  112. static struct resource s3c_camif_resource[] = {
  113. [0] = DEFINE_RES_MEM(S3C2440_PA_CAMIF, S3C2440_SZ_CAMIF),
  114. [1] = DEFINE_RES_IRQ(IRQ_CAM),
  115. };
  116. struct platform_device s3c_device_camif = {
  117. .name = "s3c2440-camif",
  118. .id = -1,
  119. .num_resources = ARRAY_SIZE(s3c_camif_resource),
  120. .resource = s3c_camif_resource,
  121. .dev = {
  122. .dma_mask = &samsung_device_dma_mask,
  123. .coherent_dma_mask = DMA_BIT_MASK(32),
  124. }
  125. };
  126. #endif /* CONFIG_CPU_S3C2440 */
  127. /* ASOC DMA */
  128. struct platform_device samsung_asoc_dma = {
  129. .name = "samsung-audio",
  130. .id = -1,
  131. .dev = {
  132. .dma_mask = &samsung_device_dma_mask,
  133. .coherent_dma_mask = DMA_BIT_MASK(32),
  134. }
  135. };
  136. struct platform_device samsung_asoc_idma = {
  137. .name = "samsung-idma",
  138. .id = -1,
  139. .dev = {
  140. .dma_mask = &samsung_device_dma_mask,
  141. .coherent_dma_mask = DMA_BIT_MASK(32),
  142. }
  143. };
  144. /* FB */
  145. #ifdef CONFIG_S3C_DEV_FB
  146. static struct resource s3c_fb_resource[] = {
  147. [0] = DEFINE_RES_MEM(S3C_PA_FB, SZ_16K),
  148. [1] = DEFINE_RES_IRQ(IRQ_LCD_VSYNC),
  149. [2] = DEFINE_RES_IRQ(IRQ_LCD_FIFO),
  150. [3] = DEFINE_RES_IRQ(IRQ_LCD_SYSTEM),
  151. };
  152. struct platform_device s3c_device_fb = {
  153. .name = "s3c-fb",
  154. .id = -1,
  155. .num_resources = ARRAY_SIZE(s3c_fb_resource),
  156. .resource = s3c_fb_resource,
  157. .dev = {
  158. .dma_mask = &samsung_device_dma_mask,
  159. .coherent_dma_mask = DMA_BIT_MASK(32),
  160. },
  161. };
  162. void __init s3c_fb_set_platdata(struct s3c_fb_platdata *pd)
  163. {
  164. s3c_set_platdata(pd, sizeof(struct s3c_fb_platdata),
  165. &s3c_device_fb);
  166. }
  167. #endif /* CONFIG_S3C_DEV_FB */
  168. /* FIMC */
  169. #ifdef CONFIG_S5P_DEV_FIMC0
  170. static struct resource s5p_fimc0_resource[] = {
  171. [0] = DEFINE_RES_MEM(S5P_PA_FIMC0, SZ_4K),
  172. [1] = DEFINE_RES_IRQ(IRQ_FIMC0),
  173. };
  174. struct platform_device s5p_device_fimc0 = {
  175. .name = "s5p-fimc",
  176. .id = 0,
  177. .num_resources = ARRAY_SIZE(s5p_fimc0_resource),
  178. .resource = s5p_fimc0_resource,
  179. .dev = {
  180. .dma_mask = &samsung_device_dma_mask,
  181. .coherent_dma_mask = DMA_BIT_MASK(32),
  182. },
  183. };
  184. struct platform_device s5p_device_fimc_md = {
  185. .name = "s5p-fimc-md",
  186. .id = -1,
  187. };
  188. #endif /* CONFIG_S5P_DEV_FIMC0 */
  189. #ifdef CONFIG_S5P_DEV_FIMC1
  190. static struct resource s5p_fimc1_resource[] = {
  191. [0] = DEFINE_RES_MEM(S5P_PA_FIMC1, SZ_4K),
  192. [1] = DEFINE_RES_IRQ(IRQ_FIMC1),
  193. };
  194. struct platform_device s5p_device_fimc1 = {
  195. .name = "s5p-fimc",
  196. .id = 1,
  197. .num_resources = ARRAY_SIZE(s5p_fimc1_resource),
  198. .resource = s5p_fimc1_resource,
  199. .dev = {
  200. .dma_mask = &samsung_device_dma_mask,
  201. .coherent_dma_mask = DMA_BIT_MASK(32),
  202. },
  203. };
  204. #endif /* CONFIG_S5P_DEV_FIMC1 */
  205. #ifdef CONFIG_S5P_DEV_FIMC2
  206. static struct resource s5p_fimc2_resource[] = {
  207. [0] = DEFINE_RES_MEM(S5P_PA_FIMC2, SZ_4K),
  208. [1] = DEFINE_RES_IRQ(IRQ_FIMC2),
  209. };
  210. struct platform_device s5p_device_fimc2 = {
  211. .name = "s5p-fimc",
  212. .id = 2,
  213. .num_resources = ARRAY_SIZE(s5p_fimc2_resource),
  214. .resource = s5p_fimc2_resource,
  215. .dev = {
  216. .dma_mask = &samsung_device_dma_mask,
  217. .coherent_dma_mask = DMA_BIT_MASK(32),
  218. },
  219. };
  220. #endif /* CONFIG_S5P_DEV_FIMC2 */
  221. #ifdef CONFIG_S5P_DEV_FIMC3
  222. static struct resource s5p_fimc3_resource[] = {
  223. [0] = DEFINE_RES_MEM(S5P_PA_FIMC3, SZ_4K),
  224. [1] = DEFINE_RES_IRQ(IRQ_FIMC3),
  225. };
  226. struct platform_device s5p_device_fimc3 = {
  227. .name = "s5p-fimc",
  228. .id = 3,
  229. .num_resources = ARRAY_SIZE(s5p_fimc3_resource),
  230. .resource = s5p_fimc3_resource,
  231. .dev = {
  232. .dma_mask = &samsung_device_dma_mask,
  233. .coherent_dma_mask = DMA_BIT_MASK(32),
  234. },
  235. };
  236. #endif /* CONFIG_S5P_DEV_FIMC3 */
  237. /* FIMD0 */
  238. #ifdef CONFIG_S5P_DEV_FIMD0
  239. static struct resource s5p_fimd0_resource[] = {
  240. [0] = DEFINE_RES_MEM(S5P_PA_FIMD0, SZ_32K),
  241. [1] = DEFINE_RES_IRQ(IRQ_FIMD0_VSYNC),
  242. [2] = DEFINE_RES_IRQ(IRQ_FIMD0_FIFO),
  243. [3] = DEFINE_RES_IRQ(IRQ_FIMD0_SYSTEM),
  244. };
  245. struct platform_device s5p_device_fimd0 = {
  246. .name = "s5p-fb",
  247. .id = 0,
  248. .num_resources = ARRAY_SIZE(s5p_fimd0_resource),
  249. .resource = s5p_fimd0_resource,
  250. .dev = {
  251. .dma_mask = &samsung_device_dma_mask,
  252. .coherent_dma_mask = DMA_BIT_MASK(32),
  253. },
  254. };
  255. void __init s5p_fimd0_set_platdata(struct s3c_fb_platdata *pd)
  256. {
  257. s3c_set_platdata(pd, sizeof(struct s3c_fb_platdata),
  258. &s5p_device_fimd0);
  259. }
  260. #endif /* CONFIG_S5P_DEV_FIMD0 */
  261. /* HWMON */
  262. #ifdef CONFIG_S3C_DEV_HWMON
  263. struct platform_device s3c_device_hwmon = {
  264. .name = "s3c-hwmon",
  265. .id = -1,
  266. .dev.parent = &s3c_device_adc.dev,
  267. };
  268. void __init s3c_hwmon_set_platdata(struct s3c_hwmon_pdata *pd)
  269. {
  270. s3c_set_platdata(pd, sizeof(struct s3c_hwmon_pdata),
  271. &s3c_device_hwmon);
  272. }
  273. #endif /* CONFIG_S3C_DEV_HWMON */
  274. /* HSMMC */
  275. #ifdef CONFIG_S3C_DEV_HSMMC
  276. static struct resource s3c_hsmmc_resource[] = {
  277. [0] = DEFINE_RES_MEM(S3C_PA_HSMMC0, SZ_4K),
  278. [1] = DEFINE_RES_IRQ(IRQ_HSMMC0),
  279. };
  280. struct s3c_sdhci_platdata s3c_hsmmc0_def_platdata = {
  281. .max_width = 4,
  282. .host_caps = (MMC_CAP_4_BIT_DATA |
  283. MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED),
  284. .clk_type = S3C_SDHCI_CLK_DIV_INTERNAL,
  285. };
  286. struct platform_device s3c_device_hsmmc0 = {
  287. .name = "s3c-sdhci",
  288. .id = 0,
  289. .num_resources = ARRAY_SIZE(s3c_hsmmc_resource),
  290. .resource = s3c_hsmmc_resource,
  291. .dev = {
  292. .dma_mask = &samsung_device_dma_mask,
  293. .coherent_dma_mask = DMA_BIT_MASK(32),
  294. .platform_data = &s3c_hsmmc0_def_platdata,
  295. },
  296. };
  297. void s3c_sdhci0_set_platdata(struct s3c_sdhci_platdata *pd)
  298. {
  299. s3c_sdhci_set_platdata(pd, &s3c_hsmmc0_def_platdata);
  300. }
  301. #endif /* CONFIG_S3C_DEV_HSMMC */
  302. #ifdef CONFIG_S3C_DEV_HSMMC1
  303. static struct resource s3c_hsmmc1_resource[] = {
  304. [0] = DEFINE_RES_MEM(S3C_PA_HSMMC1, SZ_4K),
  305. [1] = DEFINE_RES_IRQ(IRQ_HSMMC1),
  306. };
  307. struct s3c_sdhci_platdata s3c_hsmmc1_def_platdata = {
  308. .max_width = 4,
  309. .host_caps = (MMC_CAP_4_BIT_DATA |
  310. MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED),
  311. .clk_type = S3C_SDHCI_CLK_DIV_INTERNAL,
  312. };
  313. struct platform_device s3c_device_hsmmc1 = {
  314. .name = "s3c-sdhci",
  315. .id = 1,
  316. .num_resources = ARRAY_SIZE(s3c_hsmmc1_resource),
  317. .resource = s3c_hsmmc1_resource,
  318. .dev = {
  319. .dma_mask = &samsung_device_dma_mask,
  320. .coherent_dma_mask = DMA_BIT_MASK(32),
  321. .platform_data = &s3c_hsmmc1_def_platdata,
  322. },
  323. };
  324. void s3c_sdhci1_set_platdata(struct s3c_sdhci_platdata *pd)
  325. {
  326. s3c_sdhci_set_platdata(pd, &s3c_hsmmc1_def_platdata);
  327. }
  328. #endif /* CONFIG_S3C_DEV_HSMMC1 */
  329. /* HSMMC2 */
  330. #ifdef CONFIG_S3C_DEV_HSMMC2
  331. static struct resource s3c_hsmmc2_resource[] = {
  332. [0] = DEFINE_RES_MEM(S3C_PA_HSMMC2, SZ_4K),
  333. [1] = DEFINE_RES_IRQ(IRQ_HSMMC2),
  334. };
  335. struct s3c_sdhci_platdata s3c_hsmmc2_def_platdata = {
  336. .max_width = 4,
  337. .host_caps = (MMC_CAP_4_BIT_DATA |
  338. MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED),
  339. .clk_type = S3C_SDHCI_CLK_DIV_INTERNAL,
  340. };
  341. struct platform_device s3c_device_hsmmc2 = {
  342. .name = "s3c-sdhci",
  343. .id = 2,
  344. .num_resources = ARRAY_SIZE(s3c_hsmmc2_resource),
  345. .resource = s3c_hsmmc2_resource,
  346. .dev = {
  347. .dma_mask = &samsung_device_dma_mask,
  348. .coherent_dma_mask = DMA_BIT_MASK(32),
  349. .platform_data = &s3c_hsmmc2_def_platdata,
  350. },
  351. };
  352. void s3c_sdhci2_set_platdata(struct s3c_sdhci_platdata *pd)
  353. {
  354. s3c_sdhci_set_platdata(pd, &s3c_hsmmc2_def_platdata);
  355. }
  356. #endif /* CONFIG_S3C_DEV_HSMMC2 */
  357. #ifdef CONFIG_S3C_DEV_HSMMC3
  358. static struct resource s3c_hsmmc3_resource[] = {
  359. [0] = DEFINE_RES_MEM(S3C_PA_HSMMC3, SZ_4K),
  360. [1] = DEFINE_RES_IRQ(IRQ_HSMMC3),
  361. };
  362. struct s3c_sdhci_platdata s3c_hsmmc3_def_platdata = {
  363. .max_width = 4,
  364. .host_caps = (MMC_CAP_4_BIT_DATA |
  365. MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED),
  366. .clk_type = S3C_SDHCI_CLK_DIV_INTERNAL,
  367. };
  368. struct platform_device s3c_device_hsmmc3 = {
  369. .name = "s3c-sdhci",
  370. .id = 3,
  371. .num_resources = ARRAY_SIZE(s3c_hsmmc3_resource),
  372. .resource = s3c_hsmmc3_resource,
  373. .dev = {
  374. .dma_mask = &samsung_device_dma_mask,
  375. .coherent_dma_mask = DMA_BIT_MASK(32),
  376. .platform_data = &s3c_hsmmc3_def_platdata,
  377. },
  378. };
  379. void s3c_sdhci3_set_platdata(struct s3c_sdhci_platdata *pd)
  380. {
  381. s3c_sdhci_set_platdata(pd, &s3c_hsmmc3_def_platdata);
  382. }
  383. #endif /* CONFIG_S3C_DEV_HSMMC3 */
  384. /* I2C */
  385. static struct resource s3c_i2c0_resource[] = {
  386. [0] = DEFINE_RES_MEM(S3C_PA_IIC, SZ_4K),
  387. [1] = DEFINE_RES_IRQ(IRQ_IIC),
  388. };
  389. struct platform_device s3c_device_i2c0 = {
  390. .name = "s3c2410-i2c",
  391. #ifdef CONFIG_S3C_DEV_I2C1
  392. .id = 0,
  393. #else
  394. .id = -1,
  395. #endif
  396. .num_resources = ARRAY_SIZE(s3c_i2c0_resource),
  397. .resource = s3c_i2c0_resource,
  398. };
  399. struct s3c2410_platform_i2c default_i2c_data __initdata = {
  400. .flags = 0,
  401. .slave_addr = 0x10,
  402. .frequency = 100*1000,
  403. .sda_delay = 100,
  404. };
  405. void __init s3c_i2c0_set_platdata(struct s3c2410_platform_i2c *pd)
  406. {
  407. struct s3c2410_platform_i2c *npd;
  408. if (!pd)
  409. pd = &default_i2c_data;
  410. npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
  411. &s3c_device_i2c0);
  412. if (!npd->cfg_gpio)
  413. npd->cfg_gpio = s3c_i2c0_cfg_gpio;
  414. }
  415. #ifdef CONFIG_S3C_DEV_I2C1
  416. static struct resource s3c_i2c1_resource[] = {
  417. [0] = DEFINE_RES_MEM(S3C_PA_IIC1, SZ_4K),
  418. [1] = DEFINE_RES_IRQ(IRQ_IIC1),
  419. };
  420. struct platform_device s3c_device_i2c1 = {
  421. .name = "s3c2410-i2c",
  422. .id = 1,
  423. .num_resources = ARRAY_SIZE(s3c_i2c1_resource),
  424. .resource = s3c_i2c1_resource,
  425. };
  426. void __init s3c_i2c1_set_platdata(struct s3c2410_platform_i2c *pd)
  427. {
  428. struct s3c2410_platform_i2c *npd;
  429. if (!pd) {
  430. pd = &default_i2c_data;
  431. pd->bus_num = 1;
  432. }
  433. npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
  434. &s3c_device_i2c1);
  435. if (!npd->cfg_gpio)
  436. npd->cfg_gpio = s3c_i2c1_cfg_gpio;
  437. }
  438. #endif /* CONFIG_S3C_DEV_I2C1 */
  439. #ifdef CONFIG_S3C_DEV_I2C2
  440. static struct resource s3c_i2c2_resource[] = {
  441. [0] = DEFINE_RES_MEM(S3C_PA_IIC2, SZ_4K),
  442. [1] = DEFINE_RES_IRQ(IRQ_IIC2),
  443. };
  444. struct platform_device s3c_device_i2c2 = {
  445. .name = "s3c2410-i2c",
  446. .id = 2,
  447. .num_resources = ARRAY_SIZE(s3c_i2c2_resource),
  448. .resource = s3c_i2c2_resource,
  449. };
  450. void __init s3c_i2c2_set_platdata(struct s3c2410_platform_i2c *pd)
  451. {
  452. struct s3c2410_platform_i2c *npd;
  453. if (!pd) {
  454. pd = &default_i2c_data;
  455. pd->bus_num = 2;
  456. }
  457. npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
  458. &s3c_device_i2c2);
  459. if (!npd->cfg_gpio)
  460. npd->cfg_gpio = s3c_i2c2_cfg_gpio;
  461. }
  462. #endif /* CONFIG_S3C_DEV_I2C2 */
  463. #ifdef CONFIG_S3C_DEV_I2C3
  464. static struct resource s3c_i2c3_resource[] = {
  465. [0] = DEFINE_RES_MEM(S3C_PA_IIC3, SZ_4K),
  466. [1] = DEFINE_RES_IRQ(IRQ_IIC3),
  467. };
  468. struct platform_device s3c_device_i2c3 = {
  469. .name = "s3c2440-i2c",
  470. .id = 3,
  471. .num_resources = ARRAY_SIZE(s3c_i2c3_resource),
  472. .resource = s3c_i2c3_resource,
  473. };
  474. void __init s3c_i2c3_set_platdata(struct s3c2410_platform_i2c *pd)
  475. {
  476. struct s3c2410_platform_i2c *npd;
  477. if (!pd) {
  478. pd = &default_i2c_data;
  479. pd->bus_num = 3;
  480. }
  481. npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
  482. &s3c_device_i2c3);
  483. if (!npd->cfg_gpio)
  484. npd->cfg_gpio = s3c_i2c3_cfg_gpio;
  485. }
  486. #endif /*CONFIG_S3C_DEV_I2C3 */
  487. #ifdef CONFIG_S3C_DEV_I2C4
  488. static struct resource s3c_i2c4_resource[] = {
  489. [0] = DEFINE_RES_MEM(S3C_PA_IIC4, SZ_4K),
  490. [1] = DEFINE_RES_IRQ(IRQ_IIC4),
  491. };
  492. struct platform_device s3c_device_i2c4 = {
  493. .name = "s3c2440-i2c",
  494. .id = 4,
  495. .num_resources = ARRAY_SIZE(s3c_i2c4_resource),
  496. .resource = s3c_i2c4_resource,
  497. };
  498. void __init s3c_i2c4_set_platdata(struct s3c2410_platform_i2c *pd)
  499. {
  500. struct s3c2410_platform_i2c *npd;
  501. if (!pd) {
  502. pd = &default_i2c_data;
  503. pd->bus_num = 4;
  504. }
  505. npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
  506. &s3c_device_i2c4);
  507. if (!npd->cfg_gpio)
  508. npd->cfg_gpio = s3c_i2c4_cfg_gpio;
  509. }
  510. #endif /*CONFIG_S3C_DEV_I2C4 */
  511. #ifdef CONFIG_S3C_DEV_I2C5
  512. static struct resource s3c_i2c5_resource[] = {
  513. [0] = DEFINE_RES_MEM(S3C_PA_IIC5, SZ_4K),
  514. [1] = DEFINE_RES_IRQ(IRQ_IIC5),
  515. };
  516. struct platform_device s3c_device_i2c5 = {
  517. .name = "s3c2440-i2c",
  518. .id = 5,
  519. .num_resources = ARRAY_SIZE(s3c_i2c5_resource),
  520. .resource = s3c_i2c5_resource,
  521. };
  522. void __init s3c_i2c5_set_platdata(struct s3c2410_platform_i2c *pd)
  523. {
  524. struct s3c2410_platform_i2c *npd;
  525. if (!pd) {
  526. pd = &default_i2c_data;
  527. pd->bus_num = 5;
  528. }
  529. npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
  530. &s3c_device_i2c5);
  531. if (!npd->cfg_gpio)
  532. npd->cfg_gpio = s3c_i2c5_cfg_gpio;
  533. }
  534. #endif /*CONFIG_S3C_DEV_I2C5 */
  535. #ifdef CONFIG_S3C_DEV_I2C6
  536. static struct resource s3c_i2c6_resource[] = {
  537. [0] = DEFINE_RES_MEM(S3C_PA_IIC6, SZ_4K),
  538. [1] = DEFINE_RES_IRQ(IRQ_IIC6),
  539. };
  540. struct platform_device s3c_device_i2c6 = {
  541. .name = "s3c2440-i2c",
  542. .id = 6,
  543. .num_resources = ARRAY_SIZE(s3c_i2c6_resource),
  544. .resource = s3c_i2c6_resource,
  545. };
  546. void __init s3c_i2c6_set_platdata(struct s3c2410_platform_i2c *pd)
  547. {
  548. struct s3c2410_platform_i2c *npd;
  549. if (!pd) {
  550. pd = &default_i2c_data;
  551. pd->bus_num = 6;
  552. }
  553. npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
  554. &s3c_device_i2c6);
  555. if (!npd->cfg_gpio)
  556. npd->cfg_gpio = s3c_i2c6_cfg_gpio;
  557. }
  558. #endif /* CONFIG_S3C_DEV_I2C6 */
  559. #ifdef CONFIG_S3C_DEV_I2C7
  560. static struct resource s3c_i2c7_resource[] = {
  561. [0] = DEFINE_RES_MEM(S3C_PA_IIC7, SZ_4K),
  562. [1] = DEFINE_RES_IRQ(IRQ_IIC7),
  563. };
  564. struct platform_device s3c_device_i2c7 = {
  565. .name = "s3c2440-i2c",
  566. .id = 7,
  567. .num_resources = ARRAY_SIZE(s3c_i2c7_resource),
  568. .resource = s3c_i2c7_resource,
  569. };
  570. void __init s3c_i2c7_set_platdata(struct s3c2410_platform_i2c *pd)
  571. {
  572. struct s3c2410_platform_i2c *npd;
  573. if (!pd) {
  574. pd = &default_i2c_data;
  575. pd->bus_num = 7;
  576. }
  577. npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
  578. &s3c_device_i2c7);
  579. if (!npd->cfg_gpio)
  580. npd->cfg_gpio = s3c_i2c7_cfg_gpio;
  581. }
  582. #endif /* CONFIG_S3C_DEV_I2C7 */
  583. /* I2C HDMIPHY */
  584. #ifdef CONFIG_S5P_DEV_I2C_HDMIPHY
  585. static struct resource s5p_i2c_resource[] = {
  586. [0] = DEFINE_RES_MEM(S5P_PA_IIC_HDMIPHY, SZ_4K),
  587. [1] = DEFINE_RES_IRQ(IRQ_IIC_HDMIPHY),
  588. };
  589. struct platform_device s5p_device_i2c_hdmiphy = {
  590. .name = "s3c2440-hdmiphy-i2c",
  591. .id = -1,
  592. .num_resources = ARRAY_SIZE(s5p_i2c_resource),
  593. .resource = s5p_i2c_resource,
  594. };
  595. void __init s5p_i2c_hdmiphy_set_platdata(struct s3c2410_platform_i2c *pd)
  596. {
  597. struct s3c2410_platform_i2c *npd;
  598. if (!pd) {
  599. pd = &default_i2c_data;
  600. if (soc_is_exynos4210())
  601. pd->bus_num = 8;
  602. else if (soc_is_s5pv210())
  603. pd->bus_num = 3;
  604. else
  605. pd->bus_num = 0;
  606. }
  607. npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
  608. &s5p_device_i2c_hdmiphy);
  609. }
  610. #endif /* CONFIG_S5P_DEV_I2C_HDMIPHY */
  611. /* I2S */
  612. #ifdef CONFIG_PLAT_S3C24XX
  613. static struct resource s3c_iis_resource[] = {
  614. [0] = DEFINE_RES_MEM(S3C24XX_PA_IIS, S3C24XX_SZ_IIS),
  615. };
  616. struct platform_device s3c_device_iis = {
  617. .name = "s3c24xx-iis",
  618. .id = -1,
  619. .num_resources = ARRAY_SIZE(s3c_iis_resource),
  620. .resource = s3c_iis_resource,
  621. .dev = {
  622. .dma_mask = &samsung_device_dma_mask,
  623. .coherent_dma_mask = DMA_BIT_MASK(32),
  624. }
  625. };
  626. #endif /* CONFIG_PLAT_S3C24XX */
  627. #ifdef CONFIG_CPU_S3C2440
  628. struct platform_device s3c2412_device_iis = {
  629. .name = "s3c2412-iis",
  630. .id = -1,
  631. .dev = {
  632. .dma_mask = &samsung_device_dma_mask,
  633. .coherent_dma_mask = DMA_BIT_MASK(32),
  634. }
  635. };
  636. #endif /* CONFIG_CPU_S3C2440 */
  637. /* IDE CFCON */
  638. #ifdef CONFIG_SAMSUNG_DEV_IDE
  639. static struct resource s3c_cfcon_resource[] = {
  640. [0] = DEFINE_RES_MEM(SAMSUNG_PA_CFCON, SZ_16K),
  641. [1] = DEFINE_RES_IRQ(IRQ_CFCON),
  642. };
  643. struct platform_device s3c_device_cfcon = {
  644. .id = 0,
  645. .num_resources = ARRAY_SIZE(s3c_cfcon_resource),
  646. .resource = s3c_cfcon_resource,
  647. };
  648. void s3c_ide_set_platdata(struct s3c_ide_platdata *pdata)
  649. {
  650. s3c_set_platdata(pdata, sizeof(struct s3c_ide_platdata),
  651. &s3c_device_cfcon);
  652. }
  653. #endif /* CONFIG_SAMSUNG_DEV_IDE */
  654. /* KEYPAD */
  655. #ifdef CONFIG_SAMSUNG_DEV_KEYPAD
  656. static struct resource samsung_keypad_resources[] = {
  657. [0] = DEFINE_RES_MEM(SAMSUNG_PA_KEYPAD, SZ_32),
  658. [1] = DEFINE_RES_IRQ(IRQ_KEYPAD),
  659. };
  660. struct platform_device samsung_device_keypad = {
  661. .name = "samsung-keypad",
  662. .id = -1,
  663. .num_resources = ARRAY_SIZE(samsung_keypad_resources),
  664. .resource = samsung_keypad_resources,
  665. };
  666. void __init samsung_keypad_set_platdata(struct samsung_keypad_platdata *pd)
  667. {
  668. struct samsung_keypad_platdata *npd;
  669. npd = s3c_set_platdata(pd, sizeof(struct samsung_keypad_platdata),
  670. &samsung_device_keypad);
  671. if (!npd->cfg_gpio)
  672. npd->cfg_gpio = samsung_keypad_cfg_gpio;
  673. }
  674. #endif /* CONFIG_SAMSUNG_DEV_KEYPAD */
  675. /* LCD Controller */
  676. #ifdef CONFIG_PLAT_S3C24XX
  677. static struct resource s3c_lcd_resource[] = {
  678. [0] = DEFINE_RES_MEM(S3C24XX_PA_LCD, S3C24XX_SZ_LCD),
  679. [1] = DEFINE_RES_IRQ(IRQ_LCD),
  680. };
  681. struct platform_device s3c_device_lcd = {
  682. .name = "s3c2410-lcd",
  683. .id = -1,
  684. .num_resources = ARRAY_SIZE(s3c_lcd_resource),
  685. .resource = s3c_lcd_resource,
  686. .dev = {
  687. .dma_mask = &samsung_device_dma_mask,
  688. .coherent_dma_mask = DMA_BIT_MASK(32),
  689. }
  690. };
  691. void __init s3c24xx_fb_set_platdata(struct s3c2410fb_mach_info *pd)
  692. {
  693. struct s3c2410fb_mach_info *npd;
  694. npd = s3c_set_platdata(pd, sizeof(*npd), &s3c_device_lcd);
  695. if (npd) {
  696. npd->displays = kmemdup(pd->displays,
  697. sizeof(struct s3c2410fb_display) * npd->num_displays,
  698. GFP_KERNEL);
  699. if (!npd->displays)
  700. printk(KERN_ERR "no memory for LCD display data\n");
  701. } else {
  702. printk(KERN_ERR "no memory for LCD platform data\n");
  703. }
  704. }
  705. #endif /* CONFIG_PLAT_S3C24XX */
  706. /* MFC */
  707. #ifdef CONFIG_S5P_DEV_MFC
  708. static struct resource s5p_mfc_resource[] = {
  709. [0] = DEFINE_RES_MEM(S5P_PA_MFC, SZ_64K),
  710. [1] = DEFINE_RES_IRQ(IRQ_MFC),
  711. };
  712. struct platform_device s5p_device_mfc = {
  713. .name = "s5p-mfc",
  714. .id = -1,
  715. .num_resources = ARRAY_SIZE(s5p_mfc_resource),
  716. .resource = s5p_mfc_resource,
  717. };
  718. /*
  719. * MFC hardware has 2 memory interfaces which are modelled as two separate
  720. * platform devices to let dma-mapping distinguish between them.
  721. *
  722. * MFC parent device (s5p_device_mfc) must be registered before memory
  723. * interface specific devices (s5p_device_mfc_l and s5p_device_mfc_r).
  724. */
  725. struct platform_device s5p_device_mfc_l = {
  726. .name = "s5p-mfc-l",
  727. .id = -1,
  728. .dev = {
  729. .parent = &s5p_device_mfc.dev,
  730. .dma_mask = &samsung_device_dma_mask,
  731. .coherent_dma_mask = DMA_BIT_MASK(32),
  732. },
  733. };
  734. struct platform_device s5p_device_mfc_r = {
  735. .name = "s5p-mfc-r",
  736. .id = -1,
  737. .dev = {
  738. .parent = &s5p_device_mfc.dev,
  739. .dma_mask = &samsung_device_dma_mask,
  740. .coherent_dma_mask = DMA_BIT_MASK(32),
  741. },
  742. };
  743. #endif /* CONFIG_S5P_DEV_MFC */
  744. /* MIPI CSIS */
  745. #ifdef CONFIG_S5P_DEV_CSIS0
  746. static struct resource s5p_mipi_csis0_resource[] = {
  747. [0] = DEFINE_RES_MEM(S5P_PA_MIPI_CSIS0, SZ_4K),
  748. [1] = DEFINE_RES_IRQ(IRQ_MIPI_CSIS0),
  749. };
  750. struct platform_device s5p_device_mipi_csis0 = {
  751. .name = "s5p-mipi-csis",
  752. .id = 0,
  753. .num_resources = ARRAY_SIZE(s5p_mipi_csis0_resource),
  754. .resource = s5p_mipi_csis0_resource,
  755. };
  756. #endif /* CONFIG_S5P_DEV_CSIS0 */
  757. #ifdef CONFIG_S5P_DEV_CSIS1
  758. static struct resource s5p_mipi_csis1_resource[] = {
  759. [0] = DEFINE_RES_MEM(S5P_PA_MIPI_CSIS1, SZ_4K),
  760. [1] = DEFINE_RES_IRQ(IRQ_MIPI_CSIS1),
  761. };
  762. struct platform_device s5p_device_mipi_csis1 = {
  763. .name = "s5p-mipi-csis",
  764. .id = 1,
  765. .num_resources = ARRAY_SIZE(s5p_mipi_csis1_resource),
  766. .resource = s5p_mipi_csis1_resource,
  767. };
  768. #endif
  769. /* NAND */
  770. #ifdef CONFIG_S3C_DEV_NAND
  771. static struct resource s3c_nand_resource[] = {
  772. [0] = DEFINE_RES_MEM(S3C_PA_NAND, SZ_1M),
  773. };
  774. struct platform_device s3c_device_nand = {
  775. .name = "s3c2410-nand",
  776. .id = -1,
  777. .num_resources = ARRAY_SIZE(s3c_nand_resource),
  778. .resource = s3c_nand_resource,
  779. };
  780. /*
  781. * s3c_nand_copy_set() - copy nand set data
  782. * @set: The new structure, directly copied from the old.
  783. *
  784. * Copy all the fields from the NAND set field from what is probably __initdata
  785. * to new kernel memory. The code returns 0 if the copy happened correctly or
  786. * an error code for the calling function to display.
  787. *
  788. * Note, we currently do not try and look to see if we've already copied the
  789. * data in a previous set.
  790. */
  791. static int __init s3c_nand_copy_set(struct s3c2410_nand_set *set)
  792. {
  793. void *ptr;
  794. int size;
  795. size = sizeof(struct mtd_partition) * set->nr_partitions;
  796. if (size) {
  797. ptr = kmemdup(set->partitions, size, GFP_KERNEL);
  798. set->partitions = ptr;
  799. if (!ptr)
  800. return -ENOMEM;
  801. }
  802. if (set->nr_map && set->nr_chips) {
  803. size = sizeof(int) * set->nr_chips;
  804. ptr = kmemdup(set->nr_map, size, GFP_KERNEL);
  805. set->nr_map = ptr;
  806. if (!ptr)
  807. return -ENOMEM;
  808. }
  809. if (set->ecc_layout) {
  810. ptr = kmemdup(set->ecc_layout,
  811. sizeof(struct nand_ecclayout), GFP_KERNEL);
  812. set->ecc_layout = ptr;
  813. if (!ptr)
  814. return -ENOMEM;
  815. }
  816. return 0;
  817. }
  818. void __init s3c_nand_set_platdata(struct s3c2410_platform_nand *nand)
  819. {
  820. struct s3c2410_platform_nand *npd;
  821. int size;
  822. int ret;
  823. /* note, if we get a failure in allocation, we simply drop out of the
  824. * function. If there is so little memory available at initialisation
  825. * time then there is little chance the system is going to run.
  826. */
  827. npd = s3c_set_platdata(nand, sizeof(struct s3c2410_platform_nand),
  828. &s3c_device_nand);
  829. if (!npd)
  830. return;
  831. /* now see if we need to copy any of the nand set data */
  832. size = sizeof(struct s3c2410_nand_set) * npd->nr_sets;
  833. if (size) {
  834. struct s3c2410_nand_set *from = npd->sets;
  835. struct s3c2410_nand_set *to;
  836. int i;
  837. to = kmemdup(from, size, GFP_KERNEL);
  838. npd->sets = to; /* set, even if we failed */
  839. if (!to) {
  840. printk(KERN_ERR "%s: no memory for sets\n", __func__);
  841. return;
  842. }
  843. for (i = 0; i < npd->nr_sets; i++) {
  844. ret = s3c_nand_copy_set(to);
  845. if (ret) {
  846. printk(KERN_ERR "%s: failed to copy set %d\n",
  847. __func__, i);
  848. return;
  849. }
  850. to++;
  851. }
  852. }
  853. }
  854. #endif /* CONFIG_S3C_DEV_NAND */
  855. /* ONENAND */
  856. #ifdef CONFIG_S3C_DEV_ONENAND
  857. static struct resource s3c_onenand_resources[] = {
  858. [0] = DEFINE_RES_MEM(S3C_PA_ONENAND, SZ_1K),
  859. [1] = DEFINE_RES_MEM(S3C_PA_ONENAND_BUF, S3C_SZ_ONENAND_BUF),
  860. [2] = DEFINE_RES_IRQ(IRQ_ONENAND),
  861. };
  862. struct platform_device s3c_device_onenand = {
  863. .name = "samsung-onenand",
  864. .id = 0,
  865. .num_resources = ARRAY_SIZE(s3c_onenand_resources),
  866. .resource = s3c_onenand_resources,
  867. };
  868. #endif /* CONFIG_S3C_DEV_ONENAND */
  869. #ifdef CONFIG_S3C64XX_DEV_ONENAND1
  870. static struct resource s3c64xx_onenand1_resources[] = {
  871. [0] = DEFINE_RES_MEM(S3C64XX_PA_ONENAND1, SZ_1K),
  872. [1] = DEFINE_RES_MEM(S3C64XX_PA_ONENAND1_BUF, S3C64XX_SZ_ONENAND1_BUF),
  873. [2] = DEFINE_RES_IRQ(IRQ_ONENAND1),
  874. };
  875. struct platform_device s3c64xx_device_onenand1 = {
  876. .name = "samsung-onenand",
  877. .id = 1,
  878. .num_resources = ARRAY_SIZE(s3c64xx_onenand1_resources),
  879. .resource = s3c64xx_onenand1_resources,
  880. };
  881. void s3c64xx_onenand1_set_platdata(struct onenand_platform_data *pdata)
  882. {
  883. s3c_set_platdata(pdata, sizeof(struct onenand_platform_data),
  884. &s3c64xx_device_onenand1);
  885. }
  886. #endif /* CONFIG_S3C64XX_DEV_ONENAND1 */
  887. #ifdef CONFIG_S5P_DEV_ONENAND
  888. static struct resource s5p_onenand_resources[] = {
  889. [0] = DEFINE_RES_MEM(S5P_PA_ONENAND, SZ_128K),
  890. [1] = DEFINE_RES_MEM(S5P_PA_ONENAND_DMA, SZ_8K),
  891. [2] = DEFINE_RES_IRQ(IRQ_ONENAND_AUDI),
  892. };
  893. struct platform_device s5p_device_onenand = {
  894. .name = "s5pc110-onenand",
  895. .id = -1,
  896. .num_resources = ARRAY_SIZE(s5p_onenand_resources),
  897. .resource = s5p_onenand_resources,
  898. };
  899. #endif /* CONFIG_S5P_DEV_ONENAND */
  900. /* PMU */
  901. #ifdef CONFIG_PLAT_S5P
  902. static struct resource s5p_pmu_resource[] = {
  903. DEFINE_RES_IRQ(IRQ_PMU)
  904. };
  905. struct platform_device s5p_device_pmu = {
  906. .name = "arm-pmu",
  907. .id = ARM_PMU_DEVICE_CPU,
  908. .num_resources = ARRAY_SIZE(s5p_pmu_resource),
  909. .resource = s5p_pmu_resource,
  910. };
  911. static int __init s5p_pmu_init(void)
  912. {
  913. platform_device_register(&s5p_device_pmu);
  914. return 0;
  915. }
  916. arch_initcall(s5p_pmu_init);
  917. #endif /* CONFIG_PLAT_S5P */
  918. /* PWM Timer */
  919. #ifdef CONFIG_SAMSUNG_DEV_PWM
  920. #define TIMER_RESOURCE_SIZE (1)
  921. #define TIMER_RESOURCE(_tmr, _irq) \
  922. (struct resource [TIMER_RESOURCE_SIZE]) { \
  923. [0] = { \
  924. .start = _irq, \
  925. .end = _irq, \
  926. .flags = IORESOURCE_IRQ \
  927. } \
  928. }
  929. #define DEFINE_S3C_TIMER(_tmr_no, _irq) \
  930. .name = "s3c24xx-pwm", \
  931. .id = _tmr_no, \
  932. .num_resources = TIMER_RESOURCE_SIZE, \
  933. .resource = TIMER_RESOURCE(_tmr_no, _irq), \
  934. /*
  935. * since we already have an static mapping for the timer,
  936. * we do not bother setting any IO resource for the base.
  937. */
  938. struct platform_device s3c_device_timer[] = {
  939. [0] = { DEFINE_S3C_TIMER(0, IRQ_TIMER0) },
  940. [1] = { DEFINE_S3C_TIMER(1, IRQ_TIMER1) },
  941. [2] = { DEFINE_S3C_TIMER(2, IRQ_TIMER2) },
  942. [3] = { DEFINE_S3C_TIMER(3, IRQ_TIMER3) },
  943. [4] = { DEFINE_S3C_TIMER(4, IRQ_TIMER4) },
  944. };
  945. #endif /* CONFIG_SAMSUNG_DEV_PWM */
  946. /* RTC */
  947. #ifdef CONFIG_PLAT_S3C24XX
  948. static struct resource s3c_rtc_resource[] = {
  949. [0] = DEFINE_RES_MEM(S3C24XX_PA_RTC, SZ_256),
  950. [1] = DEFINE_RES_IRQ(IRQ_RTC),
  951. [2] = DEFINE_RES_IRQ(IRQ_TICK),
  952. };
  953. struct platform_device s3c_device_rtc = {
  954. .name = "s3c2410-rtc",
  955. .id = -1,
  956. .num_resources = ARRAY_SIZE(s3c_rtc_resource),
  957. .resource = s3c_rtc_resource,
  958. };
  959. #endif /* CONFIG_PLAT_S3C24XX */
  960. #ifdef CONFIG_S3C_DEV_RTC
  961. static struct resource s3c_rtc_resource[] = {
  962. [0] = DEFINE_RES_MEM(S3C_PA_RTC, SZ_256),
  963. [1] = DEFINE_RES_IRQ(IRQ_RTC_ALARM),
  964. [2] = DEFINE_RES_IRQ(IRQ_RTC_TIC),
  965. };
  966. struct platform_device s3c_device_rtc = {
  967. .name = "s3c64xx-rtc",
  968. .id = -1,
  969. .num_resources = ARRAY_SIZE(s3c_rtc_resource),
  970. .resource = s3c_rtc_resource,
  971. };
  972. #endif /* CONFIG_S3C_DEV_RTC */
  973. /* SDI */
  974. #ifdef CONFIG_PLAT_S3C24XX
  975. static struct resource s3c_sdi_resource[] = {
  976. [0] = DEFINE_RES_MEM(S3C24XX_PA_SDI, S3C24XX_SZ_SDI),
  977. [1] = DEFINE_RES_IRQ(IRQ_SDI),
  978. };
  979. struct platform_device s3c_device_sdi = {
  980. .name = "s3c2410-sdi",
  981. .id = -1,
  982. .num_resources = ARRAY_SIZE(s3c_sdi_resource),
  983. .resource = s3c_sdi_resource,
  984. };
  985. void __init s3c24xx_mci_set_platdata(struct s3c24xx_mci_pdata *pdata)
  986. {
  987. s3c_set_platdata(pdata, sizeof(struct s3c24xx_mci_pdata),
  988. &s3c_device_sdi);
  989. }
  990. #endif /* CONFIG_PLAT_S3C24XX */
  991. /* SPI */
  992. #ifdef CONFIG_PLAT_S3C24XX
  993. static struct resource s3c_spi0_resource[] = {
  994. [0] = DEFINE_RES_MEM(S3C24XX_PA_SPI, SZ_32),
  995. [1] = DEFINE_RES_IRQ(IRQ_SPI0),
  996. };
  997. struct platform_device s3c_device_spi0 = {
  998. .name = "s3c2410-spi",
  999. .id = 0,
  1000. .num_resources = ARRAY_SIZE(s3c_spi0_resource),
  1001. .resource = s3c_spi0_resource,
  1002. .dev = {
  1003. .dma_mask = &samsung_device_dma_mask,
  1004. .coherent_dma_mask = DMA_BIT_MASK(32),
  1005. }
  1006. };
  1007. static struct resource s3c_spi1_resource[] = {
  1008. [0] = DEFINE_RES_MEM(S3C24XX_PA_SPI1, SZ_32),
  1009. [1] = DEFINE_RES_IRQ(IRQ_SPI1),
  1010. };
  1011. struct platform_device s3c_device_spi1 = {
  1012. .name = "s3c2410-spi",
  1013. .id = 1,
  1014. .num_resources = ARRAY_SIZE(s3c_spi1_resource),
  1015. .resource = s3c_spi1_resource,
  1016. .dev = {
  1017. .dma_mask = &samsung_device_dma_mask,
  1018. .coherent_dma_mask = DMA_BIT_MASK(32),
  1019. }
  1020. };
  1021. #endif /* CONFIG_PLAT_S3C24XX */
  1022. /* Touchscreen */
  1023. #ifdef CONFIG_PLAT_S3C24XX
  1024. static struct resource s3c_ts_resource[] = {
  1025. [0] = DEFINE_RES_MEM(S3C24XX_PA_ADC, S3C24XX_SZ_ADC),
  1026. [1] = DEFINE_RES_IRQ(IRQ_TC),
  1027. };
  1028. struct platform_device s3c_device_ts = {
  1029. .name = "s3c2410-ts",
  1030. .id = -1,
  1031. .dev.parent = &s3c_device_adc.dev,
  1032. .num_resources = ARRAY_SIZE(s3c_ts_resource),
  1033. .resource = s3c_ts_resource,
  1034. };
  1035. void __init s3c24xx_ts_set_platdata(struct s3c2410_ts_mach_info *hard_s3c2410ts_info)
  1036. {
  1037. s3c_set_platdata(hard_s3c2410ts_info,
  1038. sizeof(struct s3c2410_ts_mach_info), &s3c_device_ts);
  1039. }
  1040. #endif /* CONFIG_PLAT_S3C24XX */
  1041. #ifdef CONFIG_SAMSUNG_DEV_TS
  1042. static struct resource s3c_ts_resource[] = {
  1043. [0] = DEFINE_RES_MEM(SAMSUNG_PA_ADC, SZ_256),
  1044. [1] = DEFINE_RES_IRQ(IRQ_TC),
  1045. };
  1046. static struct s3c2410_ts_mach_info default_ts_data __initdata = {
  1047. .delay = 10000,
  1048. .presc = 49,
  1049. .oversampling_shift = 2,
  1050. };
  1051. struct platform_device s3c_device_ts = {
  1052. .name = "s3c64xx-ts",
  1053. .id = -1,
  1054. .num_resources = ARRAY_SIZE(s3c_ts_resource),
  1055. .resource = s3c_ts_resource,
  1056. };
  1057. void __init s3c24xx_ts_set_platdata(struct s3c2410_ts_mach_info *pd)
  1058. {
  1059. if (!pd)
  1060. pd = &default_ts_data;
  1061. s3c_set_platdata(pd, sizeof(struct s3c2410_ts_mach_info),
  1062. &s3c_device_ts);
  1063. }
  1064. #endif /* CONFIG_SAMSUNG_DEV_TS */
  1065. /* TV */
  1066. #ifdef CONFIG_S5P_DEV_TV
  1067. static struct resource s5p_hdmi_resources[] = {
  1068. [0] = DEFINE_RES_MEM(S5P_PA_HDMI, SZ_1M),
  1069. [1] = DEFINE_RES_IRQ(IRQ_HDMI),
  1070. };
  1071. struct platform_device s5p_device_hdmi = {
  1072. .name = "s5p-hdmi",
  1073. .id = -1,
  1074. .num_resources = ARRAY_SIZE(s5p_hdmi_resources),
  1075. .resource = s5p_hdmi_resources,
  1076. };
  1077. static struct resource s5p_sdo_resources[] = {
  1078. [0] = DEFINE_RES_MEM(S5P_PA_SDO, SZ_64K),
  1079. [1] = DEFINE_RES_IRQ(IRQ_SDO),
  1080. };
  1081. struct platform_device s5p_device_sdo = {
  1082. .name = "s5p-sdo",
  1083. .id = -1,
  1084. .num_resources = ARRAY_SIZE(s5p_sdo_resources),
  1085. .resource = s5p_sdo_resources,
  1086. };
  1087. static struct resource s5p_mixer_resources[] = {
  1088. [0] = DEFINE_RES_MEM_NAMED(S5P_PA_MIXER, SZ_64K, "mxr"),
  1089. [1] = DEFINE_RES_MEM_NAMED(S5P_PA_VP, SZ_64K, "vp"),
  1090. [2] = DEFINE_RES_IRQ_NAMED(IRQ_MIXER, "irq"),
  1091. };
  1092. struct platform_device s5p_device_mixer = {
  1093. .name = "s5p-mixer",
  1094. .id = -1,
  1095. .num_resources = ARRAY_SIZE(s5p_mixer_resources),
  1096. .resource = s5p_mixer_resources,
  1097. .dev = {
  1098. .dma_mask = &samsung_device_dma_mask,
  1099. .coherent_dma_mask = DMA_BIT_MASK(32),
  1100. }
  1101. };
  1102. #endif /* CONFIG_S5P_DEV_TV */
  1103. /* USB */
  1104. #ifdef CONFIG_S3C_DEV_USB_HOST
  1105. static struct resource s3c_usb_resource[] = {
  1106. [0] = DEFINE_RES_MEM(S3C_PA_USBHOST, SZ_256),
  1107. [1] = DEFINE_RES_IRQ(IRQ_USBH),
  1108. };
  1109. struct platform_device s3c_device_ohci = {
  1110. .name = "s3c2410-ohci",
  1111. .id = -1,
  1112. .num_resources = ARRAY_SIZE(s3c_usb_resource),
  1113. .resource = s3c_usb_resource,
  1114. .dev = {
  1115. .dma_mask = &samsung_device_dma_mask,
  1116. .coherent_dma_mask = DMA_BIT_MASK(32),
  1117. }
  1118. };
  1119. /*
  1120. * s3c_ohci_set_platdata - initialise OHCI device platform data
  1121. * @info: The platform data.
  1122. *
  1123. * This call copies the @info passed in and sets the device .platform_data
  1124. * field to that copy. The @info is copied so that the original can be marked
  1125. * __initdata.
  1126. */
  1127. void __init s3c_ohci_set_platdata(struct s3c2410_hcd_info *info)
  1128. {
  1129. s3c_set_platdata(info, sizeof(struct s3c2410_hcd_info),
  1130. &s3c_device_ohci);
  1131. }
  1132. #endif /* CONFIG_S3C_DEV_USB_HOST */
  1133. /* USB Device (Gadget) */
  1134. #ifdef CONFIG_PLAT_S3C24XX
  1135. static struct resource s3c_usbgadget_resource[] = {
  1136. [0] = DEFINE_RES_MEM(S3C24XX_PA_USBDEV, S3C24XX_SZ_USBDEV),
  1137. [1] = DEFINE_RES_IRQ(IRQ_USBD),
  1138. };
  1139. struct platform_device s3c_device_usbgadget = {
  1140. .name = "s3c2410-usbgadget",
  1141. .id = -1,
  1142. .num_resources = ARRAY_SIZE(s3c_usbgadget_resource),
  1143. .resource = s3c_usbgadget_resource,
  1144. };
  1145. void __init s3c24xx_udc_set_platdata(struct s3c2410_udc_mach_info *pd)
  1146. {
  1147. s3c_set_platdata(pd, sizeof(*pd), &s3c_device_usbgadget);
  1148. }
  1149. #endif /* CONFIG_PLAT_S3C24XX */
  1150. /* USB EHCI Host Controller */
  1151. #ifdef CONFIG_S5P_DEV_USB_EHCI
  1152. static struct resource s5p_ehci_resource[] = {
  1153. [0] = DEFINE_RES_MEM(S5P_PA_EHCI, SZ_256),
  1154. [1] = DEFINE_RES_IRQ(IRQ_USB_HOST),
  1155. };
  1156. struct platform_device s5p_device_ehci = {
  1157. .name = "s5p-ehci",
  1158. .id = -1,
  1159. .num_resources = ARRAY_SIZE(s5p_ehci_resource),
  1160. .resource = s5p_ehci_resource,
  1161. .dev = {
  1162. .dma_mask = &samsung_device_dma_mask,
  1163. .coherent_dma_mask = DMA_BIT_MASK(32),
  1164. }
  1165. };
  1166. void __init s5p_ehci_set_platdata(struct s5p_ehci_platdata *pd)
  1167. {
  1168. struct s5p_ehci_platdata *npd;
  1169. npd = s3c_set_platdata(pd, sizeof(struct s5p_ehci_platdata),
  1170. &s5p_device_ehci);
  1171. if (!npd->phy_init)
  1172. npd->phy_init = s5p_usb_phy_init;
  1173. if (!npd->phy_exit)
  1174. npd->phy_exit = s5p_usb_phy_exit;
  1175. }
  1176. #endif /* CONFIG_S5P_DEV_USB_EHCI */
  1177. /* USB HSOTG */
  1178. #ifdef CONFIG_S3C_DEV_USB_HSOTG
  1179. static struct resource s3c_usb_hsotg_resources[] = {
  1180. [0] = DEFINE_RES_MEM(S3C_PA_USB_HSOTG, SZ_16K),
  1181. [1] = DEFINE_RES_IRQ(IRQ_OTG),
  1182. };
  1183. struct platform_device s3c_device_usb_hsotg = {
  1184. .name = "s3c-hsotg",
  1185. .id = -1,
  1186. .num_resources = ARRAY_SIZE(s3c_usb_hsotg_resources),
  1187. .resource = s3c_usb_hsotg_resources,
  1188. .dev = {
  1189. .dma_mask = &samsung_device_dma_mask,
  1190. .coherent_dma_mask = DMA_BIT_MASK(32),
  1191. },
  1192. };
  1193. #endif /* CONFIG_S3C_DEV_USB_HSOTG */
  1194. /* USB High Spped 2.0 Device (Gadget) */
  1195. #ifdef CONFIG_PLAT_S3C24XX
  1196. static struct resource s3c_hsudc_resource[] = {
  1197. [0] = DEFINE_RES_MEM(S3C2416_PA_HSUDC, S3C2416_SZ_HSUDC),
  1198. [1] = DEFINE_RES_IRQ(IRQ_USBD),
  1199. };
  1200. struct platform_device s3c_device_usb_hsudc = {
  1201. .name = "s3c-hsudc",
  1202. .id = -1,
  1203. .num_resources = ARRAY_SIZE(s3c_hsudc_resource),
  1204. .resource = s3c_hsudc_resource,
  1205. .dev = {
  1206. .dma_mask = &samsung_device_dma_mask,
  1207. .coherent_dma_mask = DMA_BIT_MASK(32),
  1208. },
  1209. };
  1210. void __init s3c24xx_hsudc_set_platdata(struct s3c24xx_hsudc_platdata *pd)
  1211. {
  1212. s3c_set_platdata(pd, sizeof(*pd), &s3c_device_usb_hsudc);
  1213. }
  1214. #endif /* CONFIG_PLAT_S3C24XX */
  1215. /* WDT */
  1216. #ifdef CONFIG_S3C_DEV_WDT
  1217. static struct resource s3c_wdt_resource[] = {
  1218. [0] = DEFINE_RES_MEM(S3C_PA_WDT, SZ_1K),
  1219. [1] = DEFINE_RES_IRQ(IRQ_WDT),
  1220. };
  1221. struct platform_device s3c_device_wdt = {
  1222. .name = "s3c2410-wdt",
  1223. .id = -1,
  1224. .num_resources = ARRAY_SIZE(s3c_wdt_resource),
  1225. .resource = s3c_wdt_resource,
  1226. };
  1227. #endif /* CONFIG_S3C_DEV_WDT */
  1228. #ifdef CONFIG_S3C64XX_DEV_SPI0
  1229. static struct resource s3c64xx_spi0_resource[] = {
  1230. [0] = DEFINE_RES_MEM(S3C_PA_SPI0, SZ_256),
  1231. [1] = DEFINE_RES_DMA(DMACH_SPI0_TX),
  1232. [2] = DEFINE_RES_DMA(DMACH_SPI0_RX),
  1233. [3] = DEFINE_RES_IRQ(IRQ_SPI0),
  1234. };
  1235. struct platform_device s3c64xx_device_spi0 = {
  1236. .name = "s3c64xx-spi",
  1237. .id = 0,
  1238. .num_resources = ARRAY_SIZE(s3c64xx_spi0_resource),
  1239. .resource = s3c64xx_spi0_resource,
  1240. .dev = {
  1241. .dma_mask = &samsung_device_dma_mask,
  1242. .coherent_dma_mask = DMA_BIT_MASK(32),
  1243. },
  1244. };
  1245. void __init s3c64xx_spi0_set_platdata(struct s3c64xx_spi_info *pd,
  1246. int src_clk_nr, int num_cs)
  1247. {
  1248. if (!pd) {
  1249. pr_err("%s:Need to pass platform data\n", __func__);
  1250. return;
  1251. }
  1252. /* Reject invalid configuration */
  1253. if (!num_cs || src_clk_nr < 0) {
  1254. pr_err("%s: Invalid SPI configuration\n", __func__);
  1255. return;
  1256. }
  1257. pd->num_cs = num_cs;
  1258. pd->src_clk_nr = src_clk_nr;
  1259. if (!pd->cfg_gpio)
  1260. pd->cfg_gpio = s3c64xx_spi0_cfg_gpio;
  1261. s3c_set_platdata(pd, sizeof(*pd), &s3c64xx_device_spi0);
  1262. }
  1263. #endif /* CONFIG_S3C64XX_DEV_SPI0 */
  1264. #ifdef CONFIG_S3C64XX_DEV_SPI1
  1265. static struct resource s3c64xx_spi1_resource[] = {
  1266. [0] = DEFINE_RES_MEM(S3C_PA_SPI1, SZ_256),
  1267. [1] = DEFINE_RES_DMA(DMACH_SPI1_TX),
  1268. [2] = DEFINE_RES_DMA(DMACH_SPI1_RX),
  1269. [3] = DEFINE_RES_IRQ(IRQ_SPI1),
  1270. };
  1271. struct platform_device s3c64xx_device_spi1 = {
  1272. .name = "s3c64xx-spi",
  1273. .id = 1,
  1274. .num_resources = ARRAY_SIZE(s3c64xx_spi1_resource),
  1275. .resource = s3c64xx_spi1_resource,
  1276. .dev = {
  1277. .dma_mask = &samsung_device_dma_mask,
  1278. .coherent_dma_mask = DMA_BIT_MASK(32),
  1279. },
  1280. };
  1281. void __init s3c64xx_spi1_set_platdata(struct s3c64xx_spi_info *pd,
  1282. int src_clk_nr, int num_cs)
  1283. {
  1284. if (!pd) {
  1285. pr_err("%s:Need to pass platform data\n", __func__);
  1286. return;
  1287. }
  1288. /* Reject invalid configuration */
  1289. if (!num_cs || src_clk_nr < 0) {
  1290. pr_err("%s: Invalid SPI configuration\n", __func__);
  1291. return;
  1292. }
  1293. pd->num_cs = num_cs;
  1294. pd->src_clk_nr = src_clk_nr;
  1295. if (!pd->cfg_gpio)
  1296. pd->cfg_gpio = s3c64xx_spi1_cfg_gpio;
  1297. s3c_set_platdata(pd, sizeof(*pd), &s3c64xx_device_spi1);
  1298. }
  1299. #endif /* CONFIG_S3C64XX_DEV_SPI1 */
  1300. #ifdef CONFIG_S3C64XX_DEV_SPI2
  1301. static struct resource s3c64xx_spi2_resource[] = {
  1302. [0] = DEFINE_RES_MEM(S3C_PA_SPI2, SZ_256),
  1303. [1] = DEFINE_RES_DMA(DMACH_SPI2_TX),
  1304. [2] = DEFINE_RES_DMA(DMACH_SPI2_RX),
  1305. [3] = DEFINE_RES_IRQ(IRQ_SPI2),
  1306. };
  1307. struct platform_device s3c64xx_device_spi2 = {
  1308. .name = "s3c64xx-spi",
  1309. .id = 2,
  1310. .num_resources = ARRAY_SIZE(s3c64xx_spi2_resource),
  1311. .resource = s3c64xx_spi2_resource,
  1312. .dev = {
  1313. .dma_mask = &samsung_device_dma_mask,
  1314. .coherent_dma_mask = DMA_BIT_MASK(32),
  1315. },
  1316. };
  1317. void __init s3c64xx_spi2_set_platdata(struct s3c64xx_spi_info *pd,
  1318. int src_clk_nr, int num_cs)
  1319. {
  1320. if (!pd) {
  1321. pr_err("%s:Need to pass platform data\n", __func__);
  1322. return;
  1323. }
  1324. /* Reject invalid configuration */
  1325. if (!num_cs || src_clk_nr < 0) {
  1326. pr_err("%s: Invalid SPI configuration\n", __func__);
  1327. return;
  1328. }
  1329. pd->num_cs = num_cs;
  1330. pd->src_clk_nr = src_clk_nr;
  1331. if (!pd->cfg_gpio)
  1332. pd->cfg_gpio = s3c64xx_spi2_cfg_gpio;
  1333. s3c_set_platdata(pd, sizeof(*pd), &s3c64xx_device_spi2);
  1334. }
  1335. #endif /* CONFIG_S3C64XX_DEV_SPI2 */