assabet.c 11 KB

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  1. /*
  2. * linux/arch/arm/mach-sa1100/assabet.c
  3. *
  4. * Author: Nicolas Pitre
  5. *
  6. * This file contains all Assabet-specific tweaks.
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License version 2 as
  10. * published by the Free Software Foundation.
  11. */
  12. #include <linux/init.h>
  13. #include <linux/kernel.h>
  14. #include <linux/module.h>
  15. #include <linux/errno.h>
  16. #include <linux/ioport.h>
  17. #include <linux/serial_core.h>
  18. #include <linux/mtd/mtd.h>
  19. #include <linux/mtd/partitions.h>
  20. #include <linux/delay.h>
  21. #include <linux/mm.h>
  22. #include <mach/hardware.h>
  23. #include <asm/mach-types.h>
  24. #include <asm/irq.h>
  25. #include <asm/setup.h>
  26. #include <asm/page.h>
  27. #include <asm/pgtable-hwdef.h>
  28. #include <asm/pgtable.h>
  29. #include <asm/tlbflush.h>
  30. #include <asm/mach/arch.h>
  31. #include <asm/mach/flash.h>
  32. #include <asm/mach/irda.h>
  33. #include <asm/mach/map.h>
  34. #include <asm/mach/serial_sa1100.h>
  35. #include <mach/assabet.h>
  36. #include <mach/mcp.h>
  37. #include "generic.h"
  38. #define ASSABET_BCR_DB1110 \
  39. (ASSABET_BCR_SPK_OFF | ASSABET_BCR_QMUTE | \
  40. ASSABET_BCR_LED_GREEN | ASSABET_BCR_LED_RED | \
  41. ASSABET_BCR_RS232EN | ASSABET_BCR_LCD_12RGB | \
  42. ASSABET_BCR_IRDA_MD0)
  43. #define ASSABET_BCR_DB1111 \
  44. (ASSABET_BCR_SPK_OFF | ASSABET_BCR_QMUTE | \
  45. ASSABET_BCR_LED_GREEN | ASSABET_BCR_LED_RED | \
  46. ASSABET_BCR_RS232EN | ASSABET_BCR_LCD_12RGB | \
  47. ASSABET_BCR_CF_BUS_OFF | ASSABET_BCR_STEREO_LB | \
  48. ASSABET_BCR_IRDA_MD0 | ASSABET_BCR_CF_RST)
  49. unsigned long SCR_value = ASSABET_SCR_INIT;
  50. EXPORT_SYMBOL(SCR_value);
  51. static unsigned long BCR_value = ASSABET_BCR_DB1110;
  52. void ASSABET_BCR_frob(unsigned int mask, unsigned int val)
  53. {
  54. unsigned long flags;
  55. local_irq_save(flags);
  56. BCR_value = (BCR_value & ~mask) | val;
  57. ASSABET_BCR = BCR_value;
  58. local_irq_restore(flags);
  59. }
  60. EXPORT_SYMBOL(ASSABET_BCR_frob);
  61. static void assabet_backlight_power(int on)
  62. {
  63. #ifndef ASSABET_PAL_VIDEO
  64. if (on)
  65. ASSABET_BCR_set(ASSABET_BCR_LIGHT_ON);
  66. else
  67. #endif
  68. ASSABET_BCR_clear(ASSABET_BCR_LIGHT_ON);
  69. }
  70. /*
  71. * Turn on/off the backlight. When turning the backlight on,
  72. * we wait 500us after turning it on so we don't cause the
  73. * supplies to droop when we enable the LCD controller (and
  74. * cause a hard reset.)
  75. */
  76. static void assabet_lcd_power(int on)
  77. {
  78. #ifndef ASSABET_PAL_VIDEO
  79. if (on) {
  80. ASSABET_BCR_set(ASSABET_BCR_LCD_ON);
  81. udelay(500);
  82. } else
  83. #endif
  84. ASSABET_BCR_clear(ASSABET_BCR_LCD_ON);
  85. }
  86. /*
  87. * Assabet flash support code.
  88. */
  89. #ifdef ASSABET_REV_4
  90. /*
  91. * Phase 4 Assabet has two 28F160B3 flash parts in bank 0:
  92. */
  93. static struct mtd_partition assabet_partitions[] = {
  94. {
  95. .name = "bootloader",
  96. .size = 0x00020000,
  97. .offset = 0,
  98. .mask_flags = MTD_WRITEABLE,
  99. }, {
  100. .name = "bootloader params",
  101. .size = 0x00020000,
  102. .offset = MTDPART_OFS_APPEND,
  103. .mask_flags = MTD_WRITEABLE,
  104. }, {
  105. .name = "jffs",
  106. .size = MTDPART_SIZ_FULL,
  107. .offset = MTDPART_OFS_APPEND,
  108. }
  109. };
  110. #else
  111. /*
  112. * Phase 5 Assabet has two 28F128J3A flash parts in bank 0:
  113. */
  114. static struct mtd_partition assabet_partitions[] = {
  115. {
  116. .name = "bootloader",
  117. .size = 0x00040000,
  118. .offset = 0,
  119. .mask_flags = MTD_WRITEABLE,
  120. }, {
  121. .name = "bootloader params",
  122. .size = 0x00040000,
  123. .offset = MTDPART_OFS_APPEND,
  124. .mask_flags = MTD_WRITEABLE,
  125. }, {
  126. .name = "jffs",
  127. .size = MTDPART_SIZ_FULL,
  128. .offset = MTDPART_OFS_APPEND,
  129. }
  130. };
  131. #endif
  132. static struct flash_platform_data assabet_flash_data = {
  133. .map_name = "cfi_probe",
  134. .parts = assabet_partitions,
  135. .nr_parts = ARRAY_SIZE(assabet_partitions),
  136. };
  137. static struct resource assabet_flash_resources[] = {
  138. {
  139. .start = SA1100_CS0_PHYS,
  140. .end = SA1100_CS0_PHYS + SZ_32M - 1,
  141. .flags = IORESOURCE_MEM,
  142. }, {
  143. .start = SA1100_CS1_PHYS,
  144. .end = SA1100_CS1_PHYS + SZ_32M - 1,
  145. .flags = IORESOURCE_MEM,
  146. }
  147. };
  148. /*
  149. * Assabet IrDA support code.
  150. */
  151. static int assabet_irda_set_power(struct device *dev, unsigned int state)
  152. {
  153. static unsigned int bcr_state[4] = {
  154. ASSABET_BCR_IRDA_MD0,
  155. ASSABET_BCR_IRDA_MD1|ASSABET_BCR_IRDA_MD0,
  156. ASSABET_BCR_IRDA_MD1,
  157. 0
  158. };
  159. if (state < 4) {
  160. state = bcr_state[state];
  161. ASSABET_BCR_clear(state ^ (ASSABET_BCR_IRDA_MD1|
  162. ASSABET_BCR_IRDA_MD0));
  163. ASSABET_BCR_set(state);
  164. }
  165. return 0;
  166. }
  167. static void assabet_irda_set_speed(struct device *dev, unsigned int speed)
  168. {
  169. if (speed < 4000000)
  170. ASSABET_BCR_clear(ASSABET_BCR_IRDA_FSEL);
  171. else
  172. ASSABET_BCR_set(ASSABET_BCR_IRDA_FSEL);
  173. }
  174. static struct irda_platform_data assabet_irda_data = {
  175. .set_power = assabet_irda_set_power,
  176. .set_speed = assabet_irda_set_speed,
  177. };
  178. static struct mcp_plat_data assabet_mcp_data = {
  179. .mccr0 = MCCR0_ADM,
  180. .sclk_rate = 11981000,
  181. .codec = "ucb1x00",
  182. };
  183. static void __init assabet_init(void)
  184. {
  185. /*
  186. * Ensure that the power supply is in "high power" mode.
  187. */
  188. GPDR |= GPIO_GPIO16;
  189. GPSR = GPIO_GPIO16;
  190. /*
  191. * Ensure that these pins are set as outputs and are driving
  192. * logic 0. This ensures that we won't inadvertently toggle
  193. * the WS latch in the CPLD, and we don't float causing
  194. * excessive power drain. --rmk
  195. */
  196. GPDR |= GPIO_SSP_TXD | GPIO_SSP_SCLK | GPIO_SSP_SFRM;
  197. GPCR = GPIO_SSP_TXD | GPIO_SSP_SCLK | GPIO_SSP_SFRM;
  198. /*
  199. * Set up registers for sleep mode.
  200. */
  201. PWER = PWER_GPIO0;
  202. PGSR = 0;
  203. PCFR = 0;
  204. PSDR = 0;
  205. PPDR |= PPC_TXD3 | PPC_TXD1;
  206. PPSR |= PPC_TXD3 | PPC_TXD1;
  207. sa1100fb_lcd_power = assabet_lcd_power;
  208. sa1100fb_backlight_power = assabet_backlight_power;
  209. if (machine_has_neponset()) {
  210. /*
  211. * Angel sets this, but other bootloaders may not.
  212. *
  213. * This must precede any driver calls to BCR_set()
  214. * or BCR_clear().
  215. */
  216. ASSABET_BCR = BCR_value = ASSABET_BCR_DB1111;
  217. #ifndef CONFIG_ASSABET_NEPONSET
  218. printk( "Warning: Neponset detected but full support "
  219. "hasn't been configured in the kernel\n" );
  220. #endif
  221. }
  222. sa11x0_register_mtd(&assabet_flash_data, assabet_flash_resources,
  223. ARRAY_SIZE(assabet_flash_resources));
  224. sa11x0_register_irda(&assabet_irda_data);
  225. /*
  226. * Setup the PPC unit correctly.
  227. */
  228. PPDR &= ~PPC_RXD4;
  229. PPDR |= PPC_TXD4 | PPC_SCLK | PPC_SFRM;
  230. PSDR |= PPC_RXD4;
  231. PSDR &= ~(PPC_TXD4 | PPC_SCLK | PPC_SFRM);
  232. PPSR &= ~(PPC_TXD4 | PPC_SCLK | PPC_SFRM);
  233. ASSABET_BCR_set(ASSABET_BCR_CODEC_RST);
  234. sa11x0_register_mcp(&assabet_mcp_data);
  235. }
  236. /*
  237. * On Assabet, we must probe for the Neponset board _before_
  238. * paging_init() has occurred to actually determine the amount
  239. * of RAM available. To do so, we map the appropriate IO section
  240. * in the page table here in order to access GPIO registers.
  241. */
  242. static void __init map_sa1100_gpio_regs( void )
  243. {
  244. unsigned long phys = __PREG(GPLR) & PMD_MASK;
  245. unsigned long virt = io_p2v(phys);
  246. int prot = PMD_TYPE_SECT | PMD_SECT_AP_WRITE | PMD_DOMAIN(DOMAIN_IO);
  247. pmd_t *pmd;
  248. pmd = pmd_offset(pud_offset(pgd_offset_k(virt), virt), virt);
  249. *pmd = __pmd(phys | prot);
  250. flush_pmd_entry(pmd);
  251. }
  252. /*
  253. * Read System Configuration "Register"
  254. * (taken from "Intel StrongARM SA-1110 Microprocessor Development Board
  255. * User's Guide", section 4.4.1)
  256. *
  257. * This same scan is performed in arch/arm/boot/compressed/head-sa1100.S
  258. * to set up the serial port for decompression status messages. We
  259. * repeat it here because the kernel may not be loaded as a zImage, and
  260. * also because it's a hassle to communicate the SCR value to the kernel
  261. * from the decompressor.
  262. *
  263. * Note that IRQs are guaranteed to be disabled.
  264. */
  265. static void __init get_assabet_scr(void)
  266. {
  267. unsigned long scr, i;
  268. GPDR |= 0x3fc; /* Configure GPIO 9:2 as outputs */
  269. GPSR = 0x3fc; /* Write 0xFF to GPIO 9:2 */
  270. GPDR &= ~(0x3fc); /* Configure GPIO 9:2 as inputs */
  271. for(i = 100; i--; ) /* Read GPIO 9:2 */
  272. scr = GPLR;
  273. GPDR |= 0x3fc; /* restore correct pin direction */
  274. scr &= 0x3fc; /* save as system configuration byte. */
  275. SCR_value = scr;
  276. }
  277. static void __init
  278. fixup_assabet(struct tag *tags, char **cmdline, struct meminfo *mi)
  279. {
  280. /* This must be done before any call to machine_has_neponset() */
  281. map_sa1100_gpio_regs();
  282. get_assabet_scr();
  283. if (machine_has_neponset())
  284. printk("Neponset expansion board detected\n");
  285. }
  286. static void assabet_uart_pm(struct uart_port *port, u_int state, u_int oldstate)
  287. {
  288. if (port->mapbase == _Ser1UTCR0) {
  289. if (state)
  290. ASSABET_BCR_clear(ASSABET_BCR_RS232EN |
  291. ASSABET_BCR_COM_RTS |
  292. ASSABET_BCR_COM_DTR);
  293. else
  294. ASSABET_BCR_set(ASSABET_BCR_RS232EN |
  295. ASSABET_BCR_COM_RTS |
  296. ASSABET_BCR_COM_DTR);
  297. }
  298. }
  299. /*
  300. * Assabet uses COM_RTS and COM_DTR for both UART1 (com port)
  301. * and UART3 (radio module). We only handle them for UART1 here.
  302. */
  303. static void assabet_set_mctrl(struct uart_port *port, u_int mctrl)
  304. {
  305. if (port->mapbase == _Ser1UTCR0) {
  306. u_int set = 0, clear = 0;
  307. if (mctrl & TIOCM_RTS)
  308. clear |= ASSABET_BCR_COM_RTS;
  309. else
  310. set |= ASSABET_BCR_COM_RTS;
  311. if (mctrl & TIOCM_DTR)
  312. clear |= ASSABET_BCR_COM_DTR;
  313. else
  314. set |= ASSABET_BCR_COM_DTR;
  315. ASSABET_BCR_clear(clear);
  316. ASSABET_BCR_set(set);
  317. }
  318. }
  319. static u_int assabet_get_mctrl(struct uart_port *port)
  320. {
  321. u_int ret = 0;
  322. u_int bsr = ASSABET_BSR;
  323. /* need 2 reads to read current value */
  324. bsr = ASSABET_BSR;
  325. if (port->mapbase == _Ser1UTCR0) {
  326. if (bsr & ASSABET_BSR_COM_DCD)
  327. ret |= TIOCM_CD;
  328. if (bsr & ASSABET_BSR_COM_CTS)
  329. ret |= TIOCM_CTS;
  330. if (bsr & ASSABET_BSR_COM_DSR)
  331. ret |= TIOCM_DSR;
  332. } else if (port->mapbase == _Ser3UTCR0) {
  333. if (bsr & ASSABET_BSR_RAD_DCD)
  334. ret |= TIOCM_CD;
  335. if (bsr & ASSABET_BSR_RAD_CTS)
  336. ret |= TIOCM_CTS;
  337. if (bsr & ASSABET_BSR_RAD_DSR)
  338. ret |= TIOCM_DSR;
  339. if (bsr & ASSABET_BSR_RAD_RI)
  340. ret |= TIOCM_RI;
  341. } else {
  342. ret = TIOCM_CD | TIOCM_CTS | TIOCM_DSR;
  343. }
  344. return ret;
  345. }
  346. static struct sa1100_port_fns assabet_port_fns __initdata = {
  347. .set_mctrl = assabet_set_mctrl,
  348. .get_mctrl = assabet_get_mctrl,
  349. .pm = assabet_uart_pm,
  350. };
  351. static struct map_desc assabet_io_desc[] __initdata = {
  352. { /* Board Control Register */
  353. .virtual = 0xf1000000,
  354. .pfn = __phys_to_pfn(0x12000000),
  355. .length = 0x00100000,
  356. .type = MT_DEVICE
  357. }, { /* MQ200 */
  358. .virtual = 0xf2800000,
  359. .pfn = __phys_to_pfn(0x4b800000),
  360. .length = 0x00800000,
  361. .type = MT_DEVICE
  362. }
  363. };
  364. static void __init assabet_map_io(void)
  365. {
  366. sa1100_map_io();
  367. iotable_init(assabet_io_desc, ARRAY_SIZE(assabet_io_desc));
  368. /*
  369. * Set SUS bit in SDCR0 so serial port 1 functions.
  370. * Its called GPCLKR0 in my SA1110 manual.
  371. */
  372. Ser1SDCR0 |= SDCR0_SUS;
  373. if (machine_has_neponset()) {
  374. #ifdef CONFIG_ASSABET_NEPONSET
  375. extern void neponset_map_io(void);
  376. /*
  377. * We map Neponset registers even if it isn't present since
  378. * many drivers will try to probe their stuff (and fail).
  379. * This is still more friendly than a kernel paging request
  380. * crash.
  381. */
  382. neponset_map_io();
  383. #endif
  384. } else {
  385. sa1100_register_uart_fns(&assabet_port_fns);
  386. }
  387. /*
  388. * When Neponset is attached, the first UART should be
  389. * UART3. That's what Angel is doing and many documents
  390. * are stating this.
  391. *
  392. * We do the Neponset mapping even if Neponset support
  393. * isn't compiled in so the user will still get something on
  394. * the expected physical serial port.
  395. *
  396. * We no longer do this; not all boot loaders support it,
  397. * and UART3 appears to be somewhat unreliable with blob.
  398. */
  399. sa1100_register_uart(0, 1);
  400. sa1100_register_uart(2, 3);
  401. }
  402. MACHINE_START(ASSABET, "Intel-Assabet")
  403. .atag_offset = 0x100,
  404. .fixup = fixup_assabet,
  405. .map_io = assabet_map_io,
  406. .init_irq = sa1100_init_irq,
  407. .timer = &sa1100_timer,
  408. .init_machine = assabet_init,
  409. #ifdef CONFIG_SA1111
  410. .dma_zone_size = SZ_1M,
  411. #endif
  412. .restart = sa11x0_restart,
  413. MACHINE_END