pm.c 4.1 KB

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  1. /* linux/arch/arm/mach-s5pv210/pm.c
  2. *
  3. * Copyright (c) 2010 Samsung Electronics Co., Ltd.
  4. * http://www.samsung.com
  5. *
  6. * S5PV210 - Power Management support
  7. *
  8. * Based on arch/arm/mach-s3c2410/pm.c
  9. * Copyright (c) 2006 Simtec Electronics
  10. * Ben Dooks <ben@simtec.co.uk>
  11. *
  12. * This program is free software; you can redistribute it and/or modify
  13. * it under the terms of the GNU General Public License version 2 as
  14. * published by the Free Software Foundation.
  15. */
  16. #include <linux/init.h>
  17. #include <linux/suspend.h>
  18. #include <linux/syscore_ops.h>
  19. #include <linux/io.h>
  20. #include <plat/cpu.h>
  21. #include <plat/pm.h>
  22. #include <plat/regs-timer.h>
  23. #include <mach/regs-irq.h>
  24. #include <mach/regs-clock.h>
  25. static struct sleep_save s5pv210_core_save[] = {
  26. /* Clock source */
  27. SAVE_ITEM(S5P_CLK_SRC0),
  28. SAVE_ITEM(S5P_CLK_SRC1),
  29. SAVE_ITEM(S5P_CLK_SRC2),
  30. SAVE_ITEM(S5P_CLK_SRC3),
  31. SAVE_ITEM(S5P_CLK_SRC4),
  32. SAVE_ITEM(S5P_CLK_SRC5),
  33. SAVE_ITEM(S5P_CLK_SRC6),
  34. /* Clock source Mask */
  35. SAVE_ITEM(S5P_CLK_SRC_MASK0),
  36. SAVE_ITEM(S5P_CLK_SRC_MASK1),
  37. /* Clock Divider */
  38. SAVE_ITEM(S5P_CLK_DIV0),
  39. SAVE_ITEM(S5P_CLK_DIV1),
  40. SAVE_ITEM(S5P_CLK_DIV2),
  41. SAVE_ITEM(S5P_CLK_DIV3),
  42. SAVE_ITEM(S5P_CLK_DIV4),
  43. SAVE_ITEM(S5P_CLK_DIV5),
  44. SAVE_ITEM(S5P_CLK_DIV6),
  45. SAVE_ITEM(S5P_CLK_DIV7),
  46. /* Clock Main Gate */
  47. SAVE_ITEM(S5P_CLKGATE_MAIN0),
  48. SAVE_ITEM(S5P_CLKGATE_MAIN1),
  49. SAVE_ITEM(S5P_CLKGATE_MAIN2),
  50. /* Clock source Peri Gate */
  51. SAVE_ITEM(S5P_CLKGATE_PERI0),
  52. SAVE_ITEM(S5P_CLKGATE_PERI1),
  53. /* Clock source SCLK Gate */
  54. SAVE_ITEM(S5P_CLKGATE_SCLK0),
  55. SAVE_ITEM(S5P_CLKGATE_SCLK1),
  56. /* Clock IP Clock gate */
  57. SAVE_ITEM(S5P_CLKGATE_IP0),
  58. SAVE_ITEM(S5P_CLKGATE_IP1),
  59. SAVE_ITEM(S5P_CLKGATE_IP2),
  60. SAVE_ITEM(S5P_CLKGATE_IP3),
  61. SAVE_ITEM(S5P_CLKGATE_IP4),
  62. /* Clock Blcok and Bus gate */
  63. SAVE_ITEM(S5P_CLKGATE_BLOCK),
  64. SAVE_ITEM(S5P_CLKGATE_BUS0),
  65. /* Clock ETC */
  66. SAVE_ITEM(S5P_CLK_OUT),
  67. SAVE_ITEM(S5P_MDNIE_SEL),
  68. /* PWM Register */
  69. SAVE_ITEM(S3C2410_TCFG0),
  70. SAVE_ITEM(S3C2410_TCFG1),
  71. SAVE_ITEM(S3C64XX_TINT_CSTAT),
  72. SAVE_ITEM(S3C2410_TCON),
  73. SAVE_ITEM(S3C2410_TCNTB(0)),
  74. SAVE_ITEM(S3C2410_TCMPB(0)),
  75. SAVE_ITEM(S3C2410_TCNTO(0)),
  76. };
  77. static int s5pv210_cpu_suspend(unsigned long arg)
  78. {
  79. unsigned long tmp;
  80. /* issue the standby signal into the pm unit. Note, we
  81. * issue a write-buffer drain just in case */
  82. tmp = 0;
  83. asm("b 1f\n\t"
  84. ".align 5\n\t"
  85. "1:\n\t"
  86. "mcr p15, 0, %0, c7, c10, 5\n\t"
  87. "mcr p15, 0, %0, c7, c10, 4\n\t"
  88. "wfi" : : "r" (tmp));
  89. /* we should never get past here */
  90. panic("sleep resumed to originator?");
  91. }
  92. static void s5pv210_pm_prepare(void)
  93. {
  94. unsigned int tmp;
  95. /* ensure at least INFORM0 has the resume address */
  96. __raw_writel(virt_to_phys(s3c_cpu_resume), S5P_INFORM0);
  97. tmp = __raw_readl(S5P_SLEEP_CFG);
  98. tmp &= ~(S5P_SLEEP_CFG_OSC_EN | S5P_SLEEP_CFG_USBOSC_EN);
  99. __raw_writel(tmp, S5P_SLEEP_CFG);
  100. /* WFI for SLEEP mode configuration by SYSCON */
  101. tmp = __raw_readl(S5P_PWR_CFG);
  102. tmp &= S5P_CFG_WFI_CLEAN;
  103. tmp |= S5P_CFG_WFI_SLEEP;
  104. __raw_writel(tmp, S5P_PWR_CFG);
  105. /* SYSCON interrupt handling disable */
  106. tmp = __raw_readl(S5P_OTHERS);
  107. tmp |= S5P_OTHER_SYSC_INTOFF;
  108. __raw_writel(tmp, S5P_OTHERS);
  109. s3c_pm_do_save(s5pv210_core_save, ARRAY_SIZE(s5pv210_core_save));
  110. }
  111. static int s5pv210_pm_add(struct device *dev)
  112. {
  113. pm_cpu_prep = s5pv210_pm_prepare;
  114. pm_cpu_sleep = s5pv210_cpu_suspend;
  115. return 0;
  116. }
  117. static struct subsys_interface s5pv210_pm_interface = {
  118. .name = "s5pv210_pm",
  119. .subsys = &s5pv210_subsys,
  120. .add_dev = s5pv210_pm_add,
  121. };
  122. static __init int s5pv210_pm_drvinit(void)
  123. {
  124. return subsys_interface_register(&s5pv210_pm_interface);
  125. }
  126. arch_initcall(s5pv210_pm_drvinit);
  127. static void s5pv210_pm_resume(void)
  128. {
  129. u32 tmp;
  130. tmp = __raw_readl(S5P_OTHERS);
  131. tmp |= (S5P_OTHERS_RET_IO | S5P_OTHERS_RET_CF |\
  132. S5P_OTHERS_RET_MMC | S5P_OTHERS_RET_UART);
  133. __raw_writel(tmp , S5P_OTHERS);
  134. s3c_pm_do_restore_core(s5pv210_core_save, ARRAY_SIZE(s5pv210_core_save));
  135. }
  136. static struct syscore_ops s5pv210_pm_syscore_ops = {
  137. .resume = s5pv210_pm_resume,
  138. };
  139. static __init int s5pv210_pm_syscore_init(void)
  140. {
  141. register_syscore_ops(&s5pv210_pm_syscore_ops);
  142. return 0;
  143. }
  144. arch_initcall(s5pv210_pm_syscore_init);