common.c 8.0 KB

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  1. /*
  2. * arch/arm/mach-dove/common.c
  3. *
  4. * Core functions for Marvell Dove 88AP510 System On Chip
  5. *
  6. * This file is licensed under the terms of the GNU General Public
  7. * License version 2. This program is licensed "as is" without any
  8. * warranty of any kind, whether express or implied.
  9. */
  10. #include <linux/kernel.h>
  11. #include <linux/delay.h>
  12. #include <linux/init.h>
  13. #include <linux/platform_device.h>
  14. #include <linux/pci.h>
  15. #include <linux/clk.h>
  16. #include <linux/ata_platform.h>
  17. #include <linux/gpio.h>
  18. #include <asm/page.h>
  19. #include <asm/setup.h>
  20. #include <asm/timex.h>
  21. #include <asm/hardware/cache-tauros2.h>
  22. #include <asm/mach/map.h>
  23. #include <asm/mach/time.h>
  24. #include <asm/mach/pci.h>
  25. #include <mach/dove.h>
  26. #include <mach/bridge-regs.h>
  27. #include <asm/mach/arch.h>
  28. #include <linux/irq.h>
  29. #include <plat/time.h>
  30. #include <plat/common.h>
  31. #include <plat/addr-map.h>
  32. #include "common.h"
  33. static int get_tclk(void);
  34. /*****************************************************************************
  35. * I/O Address Mapping
  36. ****************************************************************************/
  37. static struct map_desc dove_io_desc[] __initdata = {
  38. {
  39. .virtual = DOVE_SB_REGS_VIRT_BASE,
  40. .pfn = __phys_to_pfn(DOVE_SB_REGS_PHYS_BASE),
  41. .length = DOVE_SB_REGS_SIZE,
  42. .type = MT_DEVICE,
  43. }, {
  44. .virtual = DOVE_NB_REGS_VIRT_BASE,
  45. .pfn = __phys_to_pfn(DOVE_NB_REGS_PHYS_BASE),
  46. .length = DOVE_NB_REGS_SIZE,
  47. .type = MT_DEVICE,
  48. }, {
  49. .virtual = DOVE_PCIE0_IO_VIRT_BASE,
  50. .pfn = __phys_to_pfn(DOVE_PCIE0_IO_PHYS_BASE),
  51. .length = DOVE_PCIE0_IO_SIZE,
  52. .type = MT_DEVICE,
  53. }, {
  54. .virtual = DOVE_PCIE1_IO_VIRT_BASE,
  55. .pfn = __phys_to_pfn(DOVE_PCIE1_IO_PHYS_BASE),
  56. .length = DOVE_PCIE1_IO_SIZE,
  57. .type = MT_DEVICE,
  58. },
  59. };
  60. void __init dove_map_io(void)
  61. {
  62. iotable_init(dove_io_desc, ARRAY_SIZE(dove_io_desc));
  63. }
  64. /*****************************************************************************
  65. * EHCI0
  66. ****************************************************************************/
  67. void __init dove_ehci0_init(void)
  68. {
  69. orion_ehci_init(DOVE_USB0_PHYS_BASE, IRQ_DOVE_USB0);
  70. }
  71. /*****************************************************************************
  72. * EHCI1
  73. ****************************************************************************/
  74. void __init dove_ehci1_init(void)
  75. {
  76. orion_ehci_1_init(DOVE_USB1_PHYS_BASE, IRQ_DOVE_USB1);
  77. }
  78. /*****************************************************************************
  79. * GE00
  80. ****************************************************************************/
  81. void __init dove_ge00_init(struct mv643xx_eth_platform_data *eth_data)
  82. {
  83. orion_ge00_init(eth_data,
  84. DOVE_GE00_PHYS_BASE, IRQ_DOVE_GE00_SUM,
  85. 0, get_tclk());
  86. }
  87. /*****************************************************************************
  88. * SoC RTC
  89. ****************************************************************************/
  90. void __init dove_rtc_init(void)
  91. {
  92. orion_rtc_init(DOVE_RTC_PHYS_BASE, IRQ_DOVE_RTC);
  93. }
  94. /*****************************************************************************
  95. * SATA
  96. ****************************************************************************/
  97. void __init dove_sata_init(struct mv_sata_platform_data *sata_data)
  98. {
  99. orion_sata_init(sata_data, DOVE_SATA_PHYS_BASE, IRQ_DOVE_SATA);
  100. }
  101. /*****************************************************************************
  102. * UART0
  103. ****************************************************************************/
  104. void __init dove_uart0_init(void)
  105. {
  106. orion_uart0_init(DOVE_UART0_VIRT_BASE, DOVE_UART0_PHYS_BASE,
  107. IRQ_DOVE_UART_0, get_tclk());
  108. }
  109. /*****************************************************************************
  110. * UART1
  111. ****************************************************************************/
  112. void __init dove_uart1_init(void)
  113. {
  114. orion_uart1_init(DOVE_UART1_VIRT_BASE, DOVE_UART1_PHYS_BASE,
  115. IRQ_DOVE_UART_1, get_tclk());
  116. }
  117. /*****************************************************************************
  118. * UART2
  119. ****************************************************************************/
  120. void __init dove_uart2_init(void)
  121. {
  122. orion_uart2_init(DOVE_UART2_VIRT_BASE, DOVE_UART2_PHYS_BASE,
  123. IRQ_DOVE_UART_2, get_tclk());
  124. }
  125. /*****************************************************************************
  126. * UART3
  127. ****************************************************************************/
  128. void __init dove_uart3_init(void)
  129. {
  130. orion_uart3_init(DOVE_UART3_VIRT_BASE, DOVE_UART3_PHYS_BASE,
  131. IRQ_DOVE_UART_3, get_tclk());
  132. }
  133. /*****************************************************************************
  134. * SPI
  135. ****************************************************************************/
  136. void __init dove_spi0_init(void)
  137. {
  138. orion_spi_init(DOVE_SPI0_PHYS_BASE, get_tclk());
  139. }
  140. void __init dove_spi1_init(void)
  141. {
  142. orion_spi_1_init(DOVE_SPI1_PHYS_BASE, get_tclk());
  143. }
  144. /*****************************************************************************
  145. * I2C
  146. ****************************************************************************/
  147. void __init dove_i2c_init(void)
  148. {
  149. orion_i2c_init(DOVE_I2C_PHYS_BASE, IRQ_DOVE_I2C, 10);
  150. }
  151. /*****************************************************************************
  152. * Time handling
  153. ****************************************************************************/
  154. void __init dove_init_early(void)
  155. {
  156. orion_time_set_base(TIMER_VIRT_BASE);
  157. }
  158. static int get_tclk(void)
  159. {
  160. /* use DOVE_RESET_SAMPLE_HI/LO to detect tclk */
  161. return 166666667;
  162. }
  163. static void dove_timer_init(void)
  164. {
  165. orion_time_init(BRIDGE_VIRT_BASE, BRIDGE_INT_TIMER1_CLR,
  166. IRQ_DOVE_BRIDGE, get_tclk());
  167. }
  168. struct sys_timer dove_timer = {
  169. .init = dove_timer_init,
  170. };
  171. /*****************************************************************************
  172. * XOR 0
  173. ****************************************************************************/
  174. void __init dove_xor0_init(void)
  175. {
  176. orion_xor0_init(DOVE_XOR0_PHYS_BASE, DOVE_XOR0_HIGH_PHYS_BASE,
  177. IRQ_DOVE_XOR_00, IRQ_DOVE_XOR_01);
  178. }
  179. /*****************************************************************************
  180. * XOR 1
  181. ****************************************************************************/
  182. void __init dove_xor1_init(void)
  183. {
  184. orion_xor1_init(DOVE_XOR1_PHYS_BASE, DOVE_XOR1_HIGH_PHYS_BASE,
  185. IRQ_DOVE_XOR_10, IRQ_DOVE_XOR_11);
  186. }
  187. /*****************************************************************************
  188. * SDIO
  189. ****************************************************************************/
  190. static u64 sdio_dmamask = DMA_BIT_MASK(32);
  191. static struct resource dove_sdio0_resources[] = {
  192. {
  193. .start = DOVE_SDIO0_PHYS_BASE,
  194. .end = DOVE_SDIO0_PHYS_BASE + 0xff,
  195. .flags = IORESOURCE_MEM,
  196. }, {
  197. .start = IRQ_DOVE_SDIO0,
  198. .end = IRQ_DOVE_SDIO0,
  199. .flags = IORESOURCE_IRQ,
  200. },
  201. };
  202. static struct platform_device dove_sdio0 = {
  203. .name = "sdhci-dove",
  204. .id = 0,
  205. .dev = {
  206. .dma_mask = &sdio_dmamask,
  207. .coherent_dma_mask = DMA_BIT_MASK(32),
  208. },
  209. .resource = dove_sdio0_resources,
  210. .num_resources = ARRAY_SIZE(dove_sdio0_resources),
  211. };
  212. void __init dove_sdio0_init(void)
  213. {
  214. platform_device_register(&dove_sdio0);
  215. }
  216. static struct resource dove_sdio1_resources[] = {
  217. {
  218. .start = DOVE_SDIO1_PHYS_BASE,
  219. .end = DOVE_SDIO1_PHYS_BASE + 0xff,
  220. .flags = IORESOURCE_MEM,
  221. }, {
  222. .start = IRQ_DOVE_SDIO1,
  223. .end = IRQ_DOVE_SDIO1,
  224. .flags = IORESOURCE_IRQ,
  225. },
  226. };
  227. static struct platform_device dove_sdio1 = {
  228. .name = "sdhci-dove",
  229. .id = 1,
  230. .dev = {
  231. .dma_mask = &sdio_dmamask,
  232. .coherent_dma_mask = DMA_BIT_MASK(32),
  233. },
  234. .resource = dove_sdio1_resources,
  235. .num_resources = ARRAY_SIZE(dove_sdio1_resources),
  236. };
  237. void __init dove_sdio1_init(void)
  238. {
  239. platform_device_register(&dove_sdio1);
  240. }
  241. void __init dove_init(void)
  242. {
  243. int tclk;
  244. tclk = get_tclk();
  245. printk(KERN_INFO "Dove 88AP510 SoC, ");
  246. printk(KERN_INFO "TCLK = %dMHz\n", (tclk + 499999) / 1000000);
  247. #ifdef CONFIG_CACHE_TAUROS2
  248. tauros2_init();
  249. #endif
  250. dove_setup_cpu_mbus();
  251. /* internal devices that every board has */
  252. dove_rtc_init();
  253. dove_xor0_init();
  254. dove_xor1_init();
  255. }
  256. void dove_restart(char mode, const char *cmd)
  257. {
  258. /*
  259. * Enable soft reset to assert RSTOUTn.
  260. */
  261. writel(SOFT_RESET_OUT_EN, RSTOUTn_MASK);
  262. /*
  263. * Assert soft reset.
  264. */
  265. writel(SOFT_RESET, SYSTEM_SOFT_RESET);
  266. while (1)
  267. ;
  268. }