omap_hwmod.c 88 KB

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  1. /*
  2. * omap_hwmod implementation for OMAP2/3/4
  3. *
  4. * Copyright (C) 2009-2011 Nokia Corporation
  5. * Copyright (C) 2011-2012 Texas Instruments, Inc.
  6. *
  7. * Paul Walmsley, Benoît Cousson, Kevin Hilman
  8. *
  9. * Created in collaboration with (alphabetical order): Thara Gopinath,
  10. * Tony Lindgren, Rajendra Nayak, Vikram Pandita, Sakari Poussa, Anand
  11. * Sawant, Santosh Shilimkar, Richard Woodruff
  12. *
  13. * This program is free software; you can redistribute it and/or modify
  14. * it under the terms of the GNU General Public License version 2 as
  15. * published by the Free Software Foundation.
  16. *
  17. * Introduction
  18. * ------------
  19. * One way to view an OMAP SoC is as a collection of largely unrelated
  20. * IP blocks connected by interconnects. The IP blocks include
  21. * devices such as ARM processors, audio serial interfaces, UARTs,
  22. * etc. Some of these devices, like the DSP, are created by TI;
  23. * others, like the SGX, largely originate from external vendors. In
  24. * TI's documentation, on-chip devices are referred to as "OMAP
  25. * modules." Some of these IP blocks are identical across several
  26. * OMAP versions. Others are revised frequently.
  27. *
  28. * These OMAP modules are tied together by various interconnects.
  29. * Most of the address and data flow between modules is via OCP-based
  30. * interconnects such as the L3 and L4 buses; but there are other
  31. * interconnects that distribute the hardware clock tree, handle idle
  32. * and reset signaling, supply power, and connect the modules to
  33. * various pads or balls on the OMAP package.
  34. *
  35. * OMAP hwmod provides a consistent way to describe the on-chip
  36. * hardware blocks and their integration into the rest of the chip.
  37. * This description can be automatically generated from the TI
  38. * hardware database. OMAP hwmod provides a standard, consistent API
  39. * to reset, enable, idle, and disable these hardware blocks. And
  40. * hwmod provides a way for other core code, such as the Linux device
  41. * code or the OMAP power management and address space mapping code,
  42. * to query the hardware database.
  43. *
  44. * Using hwmod
  45. * -----------
  46. * Drivers won't call hwmod functions directly. That is done by the
  47. * omap_device code, and in rare occasions, by custom integration code
  48. * in arch/arm/ *omap*. The omap_device code includes functions to
  49. * build a struct platform_device using omap_hwmod data, and that is
  50. * currently how hwmod data is communicated to drivers and to the
  51. * Linux driver model. Most drivers will call omap_hwmod functions only
  52. * indirectly, via pm_runtime*() functions.
  53. *
  54. * From a layering perspective, here is where the OMAP hwmod code
  55. * fits into the kernel software stack:
  56. *
  57. * +-------------------------------+
  58. * | Device driver code |
  59. * | (e.g., drivers/) |
  60. * +-------------------------------+
  61. * | Linux driver model |
  62. * | (platform_device / |
  63. * | platform_driver data/code) |
  64. * +-------------------------------+
  65. * | OMAP core-driver integration |
  66. * |(arch/arm/mach-omap2/devices.c)|
  67. * +-------------------------------+
  68. * | omap_device code |
  69. * | (../plat-omap/omap_device.c) |
  70. * +-------------------------------+
  71. * ----> | omap_hwmod code/data | <-----
  72. * | (../mach-omap2/omap_hwmod*) |
  73. * +-------------------------------+
  74. * | OMAP clock/PRCM/register fns |
  75. * | (__raw_{read,write}l, clk*) |
  76. * +-------------------------------+
  77. *
  78. * Device drivers should not contain any OMAP-specific code or data in
  79. * them. They should only contain code to operate the IP block that
  80. * the driver is responsible for. This is because these IP blocks can
  81. * also appear in other SoCs, either from TI (such as DaVinci) or from
  82. * other manufacturers; and drivers should be reusable across other
  83. * platforms.
  84. *
  85. * The OMAP hwmod code also will attempt to reset and idle all on-chip
  86. * devices upon boot. The goal here is for the kernel to be
  87. * completely self-reliant and independent from bootloaders. This is
  88. * to ensure a repeatable configuration, both to ensure consistent
  89. * runtime behavior, and to make it easier for others to reproduce
  90. * bugs.
  91. *
  92. * OMAP module activity states
  93. * ---------------------------
  94. * The hwmod code considers modules to be in one of several activity
  95. * states. IP blocks start out in an UNKNOWN state, then once they
  96. * are registered via the hwmod code, proceed to the REGISTERED state.
  97. * Once their clock names are resolved to clock pointers, the module
  98. * enters the CLKS_INITED state; and finally, once the module has been
  99. * reset and the integration registers programmed, the INITIALIZED state
  100. * is entered. The hwmod code will then place the module into either
  101. * the IDLE state to save power, or in the case of a critical system
  102. * module, the ENABLED state.
  103. *
  104. * OMAP core integration code can then call omap_hwmod*() functions
  105. * directly to move the module between the IDLE, ENABLED, and DISABLED
  106. * states, as needed. This is done during both the PM idle loop, and
  107. * in the OMAP core integration code's implementation of the PM runtime
  108. * functions.
  109. *
  110. * References
  111. * ----------
  112. * This is a partial list.
  113. * - OMAP2420 Multimedia Processor Silicon Revision 2.1.1, 2.2 (SWPU064)
  114. * - OMAP2430 Multimedia Device POP Silicon Revision 2.1 (SWPU090)
  115. * - OMAP34xx Multimedia Device Silicon Revision 3.1 (SWPU108)
  116. * - OMAP4430 Multimedia Device Silicon Revision 1.0 (SWPU140)
  117. * - Open Core Protocol Specification 2.2
  118. *
  119. * To do:
  120. * - handle IO mapping
  121. * - bus throughput & module latency measurement code
  122. *
  123. * XXX add tests at the beginning of each function to ensure the hwmod is
  124. * in the appropriate state
  125. * XXX error return values should be checked to ensure that they are
  126. * appropriate
  127. */
  128. #undef DEBUG
  129. #include <linux/kernel.h>
  130. #include <linux/errno.h>
  131. #include <linux/io.h>
  132. #include <linux/clk.h>
  133. #include <linux/delay.h>
  134. #include <linux/err.h>
  135. #include <linux/list.h>
  136. #include <linux/mutex.h>
  137. #include <linux/spinlock.h>
  138. #include <linux/slab.h>
  139. #include "common.h"
  140. #include <plat/cpu.h>
  141. #include "clockdomain.h"
  142. #include "powerdomain.h"
  143. #include <plat/clock.h>
  144. #include <plat/omap_hwmod.h>
  145. #include <plat/prcm.h>
  146. #include "cm2xxx_3xxx.h"
  147. #include "cminst44xx.h"
  148. #include "prm2xxx_3xxx.h"
  149. #include "prm44xx.h"
  150. #include "prminst44xx.h"
  151. #include "mux.h"
  152. /* Maximum microseconds to wait for OMAP module to softreset */
  153. #define MAX_MODULE_SOFTRESET_WAIT 10000
  154. /* Name of the OMAP hwmod for the MPU */
  155. #define MPU_INITIATOR_NAME "mpu"
  156. /* omap_hwmod_list contains all registered struct omap_hwmods */
  157. static LIST_HEAD(omap_hwmod_list);
  158. /* mpu_oh: used to add/remove MPU initiator from sleepdep list */
  159. static struct omap_hwmod *mpu_oh;
  160. /* Private functions */
  161. /**
  162. * _update_sysc_cache - return the module OCP_SYSCONFIG register, keep copy
  163. * @oh: struct omap_hwmod *
  164. *
  165. * Load the current value of the hwmod OCP_SYSCONFIG register into the
  166. * struct omap_hwmod for later use. Returns -EINVAL if the hwmod has no
  167. * OCP_SYSCONFIG register or 0 upon success.
  168. */
  169. static int _update_sysc_cache(struct omap_hwmod *oh)
  170. {
  171. if (!oh->class->sysc) {
  172. WARN(1, "omap_hwmod: %s: cannot read OCP_SYSCONFIG: not defined on hwmod's class\n", oh->name);
  173. return -EINVAL;
  174. }
  175. /* XXX ensure module interface clock is up */
  176. oh->_sysc_cache = omap_hwmod_read(oh, oh->class->sysc->sysc_offs);
  177. if (!(oh->class->sysc->sysc_flags & SYSC_NO_CACHE))
  178. oh->_int_flags |= _HWMOD_SYSCONFIG_LOADED;
  179. return 0;
  180. }
  181. /**
  182. * _write_sysconfig - write a value to the module's OCP_SYSCONFIG register
  183. * @v: OCP_SYSCONFIG value to write
  184. * @oh: struct omap_hwmod *
  185. *
  186. * Write @v into the module class' OCP_SYSCONFIG register, if it has
  187. * one. No return value.
  188. */
  189. static void _write_sysconfig(u32 v, struct omap_hwmod *oh)
  190. {
  191. if (!oh->class->sysc) {
  192. WARN(1, "omap_hwmod: %s: cannot write OCP_SYSCONFIG: not defined on hwmod's class\n", oh->name);
  193. return;
  194. }
  195. /* XXX ensure module interface clock is up */
  196. /* Module might have lost context, always update cache and register */
  197. oh->_sysc_cache = v;
  198. omap_hwmod_write(v, oh, oh->class->sysc->sysc_offs);
  199. }
  200. /**
  201. * _set_master_standbymode: set the OCP_SYSCONFIG MIDLEMODE field in @v
  202. * @oh: struct omap_hwmod *
  203. * @standbymode: MIDLEMODE field bits
  204. * @v: pointer to register contents to modify
  205. *
  206. * Update the master standby mode bits in @v to be @standbymode for
  207. * the @oh hwmod. Does not write to the hardware. Returns -EINVAL
  208. * upon error or 0 upon success.
  209. */
  210. static int _set_master_standbymode(struct omap_hwmod *oh, u8 standbymode,
  211. u32 *v)
  212. {
  213. u32 mstandby_mask;
  214. u8 mstandby_shift;
  215. if (!oh->class->sysc ||
  216. !(oh->class->sysc->sysc_flags & SYSC_HAS_MIDLEMODE))
  217. return -EINVAL;
  218. if (!oh->class->sysc->sysc_fields) {
  219. WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
  220. return -EINVAL;
  221. }
  222. mstandby_shift = oh->class->sysc->sysc_fields->midle_shift;
  223. mstandby_mask = (0x3 << mstandby_shift);
  224. *v &= ~mstandby_mask;
  225. *v |= __ffs(standbymode) << mstandby_shift;
  226. return 0;
  227. }
  228. /**
  229. * _set_slave_idlemode: set the OCP_SYSCONFIG SIDLEMODE field in @v
  230. * @oh: struct omap_hwmod *
  231. * @idlemode: SIDLEMODE field bits
  232. * @v: pointer to register contents to modify
  233. *
  234. * Update the slave idle mode bits in @v to be @idlemode for the @oh
  235. * hwmod. Does not write to the hardware. Returns -EINVAL upon error
  236. * or 0 upon success.
  237. */
  238. static int _set_slave_idlemode(struct omap_hwmod *oh, u8 idlemode, u32 *v)
  239. {
  240. u32 sidle_mask;
  241. u8 sidle_shift;
  242. if (!oh->class->sysc ||
  243. !(oh->class->sysc->sysc_flags & SYSC_HAS_SIDLEMODE))
  244. return -EINVAL;
  245. if (!oh->class->sysc->sysc_fields) {
  246. WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
  247. return -EINVAL;
  248. }
  249. sidle_shift = oh->class->sysc->sysc_fields->sidle_shift;
  250. sidle_mask = (0x3 << sidle_shift);
  251. *v &= ~sidle_mask;
  252. *v |= __ffs(idlemode) << sidle_shift;
  253. return 0;
  254. }
  255. /**
  256. * _set_clockactivity: set OCP_SYSCONFIG.CLOCKACTIVITY bits in @v
  257. * @oh: struct omap_hwmod *
  258. * @clockact: CLOCKACTIVITY field bits
  259. * @v: pointer to register contents to modify
  260. *
  261. * Update the clockactivity mode bits in @v to be @clockact for the
  262. * @oh hwmod. Used for additional powersaving on some modules. Does
  263. * not write to the hardware. Returns -EINVAL upon error or 0 upon
  264. * success.
  265. */
  266. static int _set_clockactivity(struct omap_hwmod *oh, u8 clockact, u32 *v)
  267. {
  268. u32 clkact_mask;
  269. u8 clkact_shift;
  270. if (!oh->class->sysc ||
  271. !(oh->class->sysc->sysc_flags & SYSC_HAS_CLOCKACTIVITY))
  272. return -EINVAL;
  273. if (!oh->class->sysc->sysc_fields) {
  274. WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
  275. return -EINVAL;
  276. }
  277. clkact_shift = oh->class->sysc->sysc_fields->clkact_shift;
  278. clkact_mask = (0x3 << clkact_shift);
  279. *v &= ~clkact_mask;
  280. *v |= clockact << clkact_shift;
  281. return 0;
  282. }
  283. /**
  284. * _set_softreset: set OCP_SYSCONFIG.CLOCKACTIVITY bits in @v
  285. * @oh: struct omap_hwmod *
  286. * @v: pointer to register contents to modify
  287. *
  288. * Set the SOFTRESET bit in @v for hwmod @oh. Returns -EINVAL upon
  289. * error or 0 upon success.
  290. */
  291. static int _set_softreset(struct omap_hwmod *oh, u32 *v)
  292. {
  293. u32 softrst_mask;
  294. if (!oh->class->sysc ||
  295. !(oh->class->sysc->sysc_flags & SYSC_HAS_SOFTRESET))
  296. return -EINVAL;
  297. if (!oh->class->sysc->sysc_fields) {
  298. WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
  299. return -EINVAL;
  300. }
  301. softrst_mask = (0x1 << oh->class->sysc->sysc_fields->srst_shift);
  302. *v |= softrst_mask;
  303. return 0;
  304. }
  305. /**
  306. * _set_module_autoidle: set the OCP_SYSCONFIG AUTOIDLE field in @v
  307. * @oh: struct omap_hwmod *
  308. * @autoidle: desired AUTOIDLE bitfield value (0 or 1)
  309. * @v: pointer to register contents to modify
  310. *
  311. * Update the module autoidle bit in @v to be @autoidle for the @oh
  312. * hwmod. The autoidle bit controls whether the module can gate
  313. * internal clocks automatically when it isn't doing anything; the
  314. * exact function of this bit varies on a per-module basis. This
  315. * function does not write to the hardware. Returns -EINVAL upon
  316. * error or 0 upon success.
  317. */
  318. static int _set_module_autoidle(struct omap_hwmod *oh, u8 autoidle,
  319. u32 *v)
  320. {
  321. u32 autoidle_mask;
  322. u8 autoidle_shift;
  323. if (!oh->class->sysc ||
  324. !(oh->class->sysc->sysc_flags & SYSC_HAS_AUTOIDLE))
  325. return -EINVAL;
  326. if (!oh->class->sysc->sysc_fields) {
  327. WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
  328. return -EINVAL;
  329. }
  330. autoidle_shift = oh->class->sysc->sysc_fields->autoidle_shift;
  331. autoidle_mask = (0x1 << autoidle_shift);
  332. *v &= ~autoidle_mask;
  333. *v |= autoidle << autoidle_shift;
  334. return 0;
  335. }
  336. /**
  337. * _set_idle_ioring_wakeup - enable/disable IO pad wakeup on hwmod idle for mux
  338. * @oh: struct omap_hwmod *
  339. * @set_wake: bool value indicating to set (true) or clear (false) wakeup enable
  340. *
  341. * Set or clear the I/O pad wakeup flag in the mux entries for the
  342. * hwmod @oh. This function changes the @oh->mux->pads_dynamic array
  343. * in memory. If the hwmod is currently idled, and the new idle
  344. * values don't match the previous ones, this function will also
  345. * update the SCM PADCTRL registers. Otherwise, if the hwmod is not
  346. * currently idled, this function won't touch the hardware: the new
  347. * mux settings are written to the SCM PADCTRL registers when the
  348. * hwmod is idled. No return value.
  349. */
  350. static void _set_idle_ioring_wakeup(struct omap_hwmod *oh, bool set_wake)
  351. {
  352. struct omap_device_pad *pad;
  353. bool change = false;
  354. u16 prev_idle;
  355. int j;
  356. if (!oh->mux || !oh->mux->enabled)
  357. return;
  358. for (j = 0; j < oh->mux->nr_pads_dynamic; j++) {
  359. pad = oh->mux->pads_dynamic[j];
  360. if (!(pad->flags & OMAP_DEVICE_PAD_WAKEUP))
  361. continue;
  362. prev_idle = pad->idle;
  363. if (set_wake)
  364. pad->idle |= OMAP_WAKEUP_EN;
  365. else
  366. pad->idle &= ~OMAP_WAKEUP_EN;
  367. if (prev_idle != pad->idle)
  368. change = true;
  369. }
  370. if (change && oh->_state == _HWMOD_STATE_IDLE)
  371. omap_hwmod_mux(oh->mux, _HWMOD_STATE_IDLE);
  372. }
  373. /**
  374. * _enable_wakeup: set OCP_SYSCONFIG.ENAWAKEUP bit in the hardware
  375. * @oh: struct omap_hwmod *
  376. *
  377. * Allow the hardware module @oh to send wakeups. Returns -EINVAL
  378. * upon error or 0 upon success.
  379. */
  380. static int _enable_wakeup(struct omap_hwmod *oh, u32 *v)
  381. {
  382. if (!oh->class->sysc ||
  383. !((oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP) ||
  384. (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP) ||
  385. (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)))
  386. return -EINVAL;
  387. if (!oh->class->sysc->sysc_fields) {
  388. WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
  389. return -EINVAL;
  390. }
  391. if (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)
  392. *v |= 0x1 << oh->class->sysc->sysc_fields->enwkup_shift;
  393. if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP)
  394. _set_slave_idlemode(oh, HWMOD_IDLEMODE_SMART_WKUP, v);
  395. if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
  396. _set_master_standbymode(oh, HWMOD_IDLEMODE_SMART_WKUP, v);
  397. /* XXX test pwrdm_get_wken for this hwmod's subsystem */
  398. oh->_int_flags |= _HWMOD_WAKEUP_ENABLED;
  399. return 0;
  400. }
  401. /**
  402. * _disable_wakeup: clear OCP_SYSCONFIG.ENAWAKEUP bit in the hardware
  403. * @oh: struct omap_hwmod *
  404. *
  405. * Prevent the hardware module @oh to send wakeups. Returns -EINVAL
  406. * upon error or 0 upon success.
  407. */
  408. static int _disable_wakeup(struct omap_hwmod *oh, u32 *v)
  409. {
  410. if (!oh->class->sysc ||
  411. !((oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP) ||
  412. (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP) ||
  413. (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)))
  414. return -EINVAL;
  415. if (!oh->class->sysc->sysc_fields) {
  416. WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
  417. return -EINVAL;
  418. }
  419. if (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)
  420. *v &= ~(0x1 << oh->class->sysc->sysc_fields->enwkup_shift);
  421. if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP)
  422. _set_slave_idlemode(oh, HWMOD_IDLEMODE_SMART, v);
  423. if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
  424. _set_master_standbymode(oh, HWMOD_IDLEMODE_SMART_WKUP, v);
  425. /* XXX test pwrdm_get_wken for this hwmod's subsystem */
  426. oh->_int_flags &= ~_HWMOD_WAKEUP_ENABLED;
  427. return 0;
  428. }
  429. /**
  430. * _add_initiator_dep: prevent @oh from smart-idling while @init_oh is active
  431. * @oh: struct omap_hwmod *
  432. *
  433. * Prevent the hardware module @oh from entering idle while the
  434. * hardare module initiator @init_oh is active. Useful when a module
  435. * will be accessed by a particular initiator (e.g., if a module will
  436. * be accessed by the IVA, there should be a sleepdep between the IVA
  437. * initiator and the module). Only applies to modules in smart-idle
  438. * mode. If the clockdomain is marked as not needing autodeps, return
  439. * 0 without doing anything. Otherwise, returns -EINVAL upon error or
  440. * passes along clkdm_add_sleepdep() value upon success.
  441. */
  442. static int _add_initiator_dep(struct omap_hwmod *oh, struct omap_hwmod *init_oh)
  443. {
  444. if (!oh->_clk)
  445. return -EINVAL;
  446. if (oh->_clk->clkdm && oh->_clk->clkdm->flags & CLKDM_NO_AUTODEPS)
  447. return 0;
  448. return clkdm_add_sleepdep(oh->_clk->clkdm, init_oh->_clk->clkdm);
  449. }
  450. /**
  451. * _del_initiator_dep: allow @oh to smart-idle even if @init_oh is active
  452. * @oh: struct omap_hwmod *
  453. *
  454. * Allow the hardware module @oh to enter idle while the hardare
  455. * module initiator @init_oh is active. Useful when a module will not
  456. * be accessed by a particular initiator (e.g., if a module will not
  457. * be accessed by the IVA, there should be no sleepdep between the IVA
  458. * initiator and the module). Only applies to modules in smart-idle
  459. * mode. If the clockdomain is marked as not needing autodeps, return
  460. * 0 without doing anything. Returns -EINVAL upon error or passes
  461. * along clkdm_del_sleepdep() value upon success.
  462. */
  463. static int _del_initiator_dep(struct omap_hwmod *oh, struct omap_hwmod *init_oh)
  464. {
  465. if (!oh->_clk)
  466. return -EINVAL;
  467. if (oh->_clk->clkdm && oh->_clk->clkdm->flags & CLKDM_NO_AUTODEPS)
  468. return 0;
  469. return clkdm_del_sleepdep(oh->_clk->clkdm, init_oh->_clk->clkdm);
  470. }
  471. /**
  472. * _init_main_clk - get a struct clk * for the the hwmod's main functional clk
  473. * @oh: struct omap_hwmod *
  474. *
  475. * Called from _init_clocks(). Populates the @oh _clk (main
  476. * functional clock pointer) if a main_clk is present. Returns 0 on
  477. * success or -EINVAL on error.
  478. */
  479. static int _init_main_clk(struct omap_hwmod *oh)
  480. {
  481. int ret = 0;
  482. if (!oh->main_clk)
  483. return 0;
  484. oh->_clk = omap_clk_get_by_name(oh->main_clk);
  485. if (!oh->_clk) {
  486. pr_warning("omap_hwmod: %s: cannot clk_get main_clk %s\n",
  487. oh->name, oh->main_clk);
  488. return -EINVAL;
  489. }
  490. if (!oh->_clk->clkdm)
  491. pr_warning("omap_hwmod: %s: missing clockdomain for %s.\n",
  492. oh->main_clk, oh->_clk->name);
  493. return ret;
  494. }
  495. /**
  496. * _init_interface_clks - get a struct clk * for the the hwmod's interface clks
  497. * @oh: struct omap_hwmod *
  498. *
  499. * Called from _init_clocks(). Populates the @oh OCP slave interface
  500. * clock pointers. Returns 0 on success or -EINVAL on error.
  501. */
  502. static int _init_interface_clks(struct omap_hwmod *oh)
  503. {
  504. struct clk *c;
  505. int i;
  506. int ret = 0;
  507. if (oh->slaves_cnt == 0)
  508. return 0;
  509. for (i = 0; i < oh->slaves_cnt; i++) {
  510. struct omap_hwmod_ocp_if *os = oh->slaves[i];
  511. if (!os->clk)
  512. continue;
  513. c = omap_clk_get_by_name(os->clk);
  514. if (!c) {
  515. pr_warning("omap_hwmod: %s: cannot clk_get interface_clk %s\n",
  516. oh->name, os->clk);
  517. ret = -EINVAL;
  518. }
  519. os->_clk = c;
  520. }
  521. return ret;
  522. }
  523. /**
  524. * _init_opt_clk - get a struct clk * for the the hwmod's optional clocks
  525. * @oh: struct omap_hwmod *
  526. *
  527. * Called from _init_clocks(). Populates the @oh omap_hwmod_opt_clk
  528. * clock pointers. Returns 0 on success or -EINVAL on error.
  529. */
  530. static int _init_opt_clks(struct omap_hwmod *oh)
  531. {
  532. struct omap_hwmod_opt_clk *oc;
  533. struct clk *c;
  534. int i;
  535. int ret = 0;
  536. for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++) {
  537. c = omap_clk_get_by_name(oc->clk);
  538. if (!c) {
  539. pr_warning("omap_hwmod: %s: cannot clk_get opt_clk %s\n",
  540. oh->name, oc->clk);
  541. ret = -EINVAL;
  542. }
  543. oc->_clk = c;
  544. }
  545. return ret;
  546. }
  547. /**
  548. * _enable_clocks - enable hwmod main clock and interface clocks
  549. * @oh: struct omap_hwmod *
  550. *
  551. * Enables all clocks necessary for register reads and writes to succeed
  552. * on the hwmod @oh. Returns 0.
  553. */
  554. static int _enable_clocks(struct omap_hwmod *oh)
  555. {
  556. int i;
  557. pr_debug("omap_hwmod: %s: enabling clocks\n", oh->name);
  558. if (oh->_clk)
  559. clk_enable(oh->_clk);
  560. if (oh->slaves_cnt > 0) {
  561. for (i = 0; i < oh->slaves_cnt; i++) {
  562. struct omap_hwmod_ocp_if *os = oh->slaves[i];
  563. struct clk *c = os->_clk;
  564. if (c && (os->flags & OCPIF_SWSUP_IDLE))
  565. clk_enable(c);
  566. }
  567. }
  568. /* The opt clocks are controlled by the device driver. */
  569. return 0;
  570. }
  571. /**
  572. * _disable_clocks - disable hwmod main clock and interface clocks
  573. * @oh: struct omap_hwmod *
  574. *
  575. * Disables the hwmod @oh main functional and interface clocks. Returns 0.
  576. */
  577. static int _disable_clocks(struct omap_hwmod *oh)
  578. {
  579. int i;
  580. pr_debug("omap_hwmod: %s: disabling clocks\n", oh->name);
  581. if (oh->_clk)
  582. clk_disable(oh->_clk);
  583. if (oh->slaves_cnt > 0) {
  584. for (i = 0; i < oh->slaves_cnt; i++) {
  585. struct omap_hwmod_ocp_if *os = oh->slaves[i];
  586. struct clk *c = os->_clk;
  587. if (c && (os->flags & OCPIF_SWSUP_IDLE))
  588. clk_disable(c);
  589. }
  590. }
  591. /* The opt clocks are controlled by the device driver. */
  592. return 0;
  593. }
  594. static void _enable_optional_clocks(struct omap_hwmod *oh)
  595. {
  596. struct omap_hwmod_opt_clk *oc;
  597. int i;
  598. pr_debug("omap_hwmod: %s: enabling optional clocks\n", oh->name);
  599. for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++)
  600. if (oc->_clk) {
  601. pr_debug("omap_hwmod: enable %s:%s\n", oc->role,
  602. oc->_clk->name);
  603. clk_enable(oc->_clk);
  604. }
  605. }
  606. static void _disable_optional_clocks(struct omap_hwmod *oh)
  607. {
  608. struct omap_hwmod_opt_clk *oc;
  609. int i;
  610. pr_debug("omap_hwmod: %s: disabling optional clocks\n", oh->name);
  611. for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++)
  612. if (oc->_clk) {
  613. pr_debug("omap_hwmod: disable %s:%s\n", oc->role,
  614. oc->_clk->name);
  615. clk_disable(oc->_clk);
  616. }
  617. }
  618. /**
  619. * _enable_module - enable CLKCTRL modulemode on OMAP4
  620. * @oh: struct omap_hwmod *
  621. *
  622. * Enables the PRCM module mode related to the hwmod @oh.
  623. * No return value.
  624. */
  625. static void _enable_module(struct omap_hwmod *oh)
  626. {
  627. /* The module mode does not exist prior OMAP4 */
  628. if (cpu_is_omap24xx() || cpu_is_omap34xx())
  629. return;
  630. if (!oh->clkdm || !oh->prcm.omap4.modulemode)
  631. return;
  632. pr_debug("omap_hwmod: %s: _enable_module: %d\n",
  633. oh->name, oh->prcm.omap4.modulemode);
  634. omap4_cminst_module_enable(oh->prcm.omap4.modulemode,
  635. oh->clkdm->prcm_partition,
  636. oh->clkdm->cm_inst,
  637. oh->clkdm->clkdm_offs,
  638. oh->prcm.omap4.clkctrl_offs);
  639. }
  640. /**
  641. * _omap4_wait_target_disable - wait for a module to be disabled on OMAP4
  642. * @oh: struct omap_hwmod *
  643. *
  644. * Wait for a module @oh to enter slave idle. Returns 0 if the module
  645. * does not have an IDLEST bit or if the module successfully enters
  646. * slave idle; otherwise, pass along the return value of the
  647. * appropriate *_cm*_wait_module_idle() function.
  648. */
  649. static int _omap4_wait_target_disable(struct omap_hwmod *oh)
  650. {
  651. if (!cpu_is_omap44xx())
  652. return 0;
  653. if (!oh)
  654. return -EINVAL;
  655. if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
  656. return 0;
  657. if (oh->flags & HWMOD_NO_IDLEST)
  658. return 0;
  659. return omap4_cminst_wait_module_idle(oh->clkdm->prcm_partition,
  660. oh->clkdm->cm_inst,
  661. oh->clkdm->clkdm_offs,
  662. oh->prcm.omap4.clkctrl_offs);
  663. }
  664. /**
  665. * _count_mpu_irqs - count the number of MPU IRQ lines associated with @oh
  666. * @oh: struct omap_hwmod *oh
  667. *
  668. * Count and return the number of MPU IRQs associated with the hwmod
  669. * @oh. Used to allocate struct resource data. Returns 0 if @oh is
  670. * NULL.
  671. */
  672. static int _count_mpu_irqs(struct omap_hwmod *oh)
  673. {
  674. struct omap_hwmod_irq_info *ohii;
  675. int i = 0;
  676. if (!oh || !oh->mpu_irqs)
  677. return 0;
  678. do {
  679. ohii = &oh->mpu_irqs[i++];
  680. } while (ohii->irq != -1);
  681. return i-1;
  682. }
  683. /**
  684. * _count_sdma_reqs - count the number of SDMA request lines associated with @oh
  685. * @oh: struct omap_hwmod *oh
  686. *
  687. * Count and return the number of SDMA request lines associated with
  688. * the hwmod @oh. Used to allocate struct resource data. Returns 0
  689. * if @oh is NULL.
  690. */
  691. static int _count_sdma_reqs(struct omap_hwmod *oh)
  692. {
  693. struct omap_hwmod_dma_info *ohdi;
  694. int i = 0;
  695. if (!oh || !oh->sdma_reqs)
  696. return 0;
  697. do {
  698. ohdi = &oh->sdma_reqs[i++];
  699. } while (ohdi->dma_req != -1);
  700. return i-1;
  701. }
  702. /**
  703. * _count_ocp_if_addr_spaces - count the number of address space entries for @oh
  704. * @oh: struct omap_hwmod *oh
  705. *
  706. * Count and return the number of address space ranges associated with
  707. * the hwmod @oh. Used to allocate struct resource data. Returns 0
  708. * if @oh is NULL.
  709. */
  710. static int _count_ocp_if_addr_spaces(struct omap_hwmod_ocp_if *os)
  711. {
  712. struct omap_hwmod_addr_space *mem;
  713. int i = 0;
  714. if (!os || !os->addr)
  715. return 0;
  716. do {
  717. mem = &os->addr[i++];
  718. } while (mem->pa_start != mem->pa_end);
  719. return i-1;
  720. }
  721. /**
  722. * _get_mpu_irq_by_name - fetch MPU interrupt line number by name
  723. * @oh: struct omap_hwmod * to operate on
  724. * @name: pointer to the name of the MPU interrupt number to fetch (optional)
  725. * @irq: pointer to an unsigned int to store the MPU IRQ number to
  726. *
  727. * Retrieve a MPU hardware IRQ line number named by @name associated
  728. * with the IP block pointed to by @oh. The IRQ number will be filled
  729. * into the address pointed to by @dma. When @name is non-null, the
  730. * IRQ line number associated with the named entry will be returned.
  731. * If @name is null, the first matching entry will be returned. Data
  732. * order is not meaningful in hwmod data, so callers are strongly
  733. * encouraged to use a non-null @name whenever possible to avoid
  734. * unpredictable effects if hwmod data is later added that causes data
  735. * ordering to change. Returns 0 upon success or a negative error
  736. * code upon error.
  737. */
  738. static int _get_mpu_irq_by_name(struct omap_hwmod *oh, const char *name,
  739. unsigned int *irq)
  740. {
  741. int i;
  742. bool found = false;
  743. if (!oh->mpu_irqs)
  744. return -ENOENT;
  745. i = 0;
  746. while (oh->mpu_irqs[i].irq != -1) {
  747. if (name == oh->mpu_irqs[i].name ||
  748. !strcmp(name, oh->mpu_irqs[i].name)) {
  749. found = true;
  750. break;
  751. }
  752. i++;
  753. }
  754. if (!found)
  755. return -ENOENT;
  756. *irq = oh->mpu_irqs[i].irq;
  757. return 0;
  758. }
  759. /**
  760. * _get_sdma_req_by_name - fetch SDMA request line ID by name
  761. * @oh: struct omap_hwmod * to operate on
  762. * @name: pointer to the name of the SDMA request line to fetch (optional)
  763. * @dma: pointer to an unsigned int to store the request line ID to
  764. *
  765. * Retrieve an SDMA request line ID named by @name on the IP block
  766. * pointed to by @oh. The ID will be filled into the address pointed
  767. * to by @dma. When @name is non-null, the request line ID associated
  768. * with the named entry will be returned. If @name is null, the first
  769. * matching entry will be returned. Data order is not meaningful in
  770. * hwmod data, so callers are strongly encouraged to use a non-null
  771. * @name whenever possible to avoid unpredictable effects if hwmod
  772. * data is later added that causes data ordering to change. Returns 0
  773. * upon success or a negative error code upon error.
  774. */
  775. static int _get_sdma_req_by_name(struct omap_hwmod *oh, const char *name,
  776. unsigned int *dma)
  777. {
  778. int i;
  779. bool found = false;
  780. if (!oh->sdma_reqs)
  781. return -ENOENT;
  782. i = 0;
  783. while (oh->sdma_reqs[i].dma_req != -1) {
  784. if (name == oh->sdma_reqs[i].name ||
  785. !strcmp(name, oh->sdma_reqs[i].name)) {
  786. found = true;
  787. break;
  788. }
  789. i++;
  790. }
  791. if (!found)
  792. return -ENOENT;
  793. *dma = oh->sdma_reqs[i].dma_req;
  794. return 0;
  795. }
  796. /**
  797. * _get_addr_space_by_name - fetch address space start & end by name
  798. * @oh: struct omap_hwmod * to operate on
  799. * @name: pointer to the name of the address space to fetch (optional)
  800. * @pa_start: pointer to a u32 to store the starting address to
  801. * @pa_end: pointer to a u32 to store the ending address to
  802. *
  803. * Retrieve address space start and end addresses for the IP block
  804. * pointed to by @oh. The data will be filled into the addresses
  805. * pointed to by @pa_start and @pa_end. When @name is non-null, the
  806. * address space data associated with the named entry will be
  807. * returned. If @name is null, the first matching entry will be
  808. * returned. Data order is not meaningful in hwmod data, so callers
  809. * are strongly encouraged to use a non-null @name whenever possible
  810. * to avoid unpredictable effects if hwmod data is later added that
  811. * causes data ordering to change. Returns 0 upon success or a
  812. * negative error code upon error.
  813. */
  814. static int _get_addr_space_by_name(struct omap_hwmod *oh, const char *name,
  815. u32 *pa_start, u32 *pa_end)
  816. {
  817. int i, j;
  818. struct omap_hwmod_ocp_if *os;
  819. bool found = false;
  820. for (i = 0; i < oh->slaves_cnt; i++) {
  821. os = oh->slaves[i];
  822. if (!os->addr)
  823. return -ENOENT;
  824. j = 0;
  825. while (os->addr[j].pa_start != os->addr[j].pa_end) {
  826. if (name == os->addr[j].name ||
  827. !strcmp(name, os->addr[j].name)) {
  828. found = true;
  829. break;
  830. }
  831. j++;
  832. }
  833. if (found)
  834. break;
  835. }
  836. if (!found)
  837. return -ENOENT;
  838. *pa_start = os->addr[j].pa_start;
  839. *pa_end = os->addr[j].pa_end;
  840. return 0;
  841. }
  842. /**
  843. * _find_mpu_port_index - find hwmod OCP slave port ID intended for MPU use
  844. * @oh: struct omap_hwmod *
  845. *
  846. * Returns the array index of the OCP slave port that the MPU
  847. * addresses the device on, or -EINVAL upon error or not found.
  848. */
  849. static int __init _find_mpu_port_index(struct omap_hwmod *oh)
  850. {
  851. int i;
  852. int found = 0;
  853. if (!oh || oh->slaves_cnt == 0)
  854. return -EINVAL;
  855. for (i = 0; i < oh->slaves_cnt; i++) {
  856. struct omap_hwmod_ocp_if *os = oh->slaves[i];
  857. if (os->user & OCP_USER_MPU) {
  858. found = 1;
  859. break;
  860. }
  861. }
  862. if (found)
  863. pr_debug("omap_hwmod: %s: MPU OCP slave port ID %d\n",
  864. oh->name, i);
  865. else
  866. pr_debug("omap_hwmod: %s: no MPU OCP slave port found\n",
  867. oh->name);
  868. return (found) ? i : -EINVAL;
  869. }
  870. /**
  871. * _find_mpu_rt_port - return omap_hwmod_ocp_if accessible by the MPU
  872. * @oh: struct omap_hwmod *
  873. *
  874. * Given a pointer to a struct omap_hwmod record @oh, return a pointer
  875. * to the struct omap_hwmod_ocp_if record that is used by the MPU to
  876. * communicate with the IP block. This interface need not be directly
  877. * connected to the MPU (and almost certainly is not), but is directly
  878. * connected to the IP block represented by @oh. Returns a pointer
  879. * to the struct omap_hwmod_ocp_if * upon success, or returns NULL upon
  880. * error or if there does not appear to be a path from the MPU to this
  881. * IP block.
  882. */
  883. static struct omap_hwmod_ocp_if *_find_mpu_rt_port(struct omap_hwmod *oh)
  884. {
  885. if (!oh || oh->_int_flags & _HWMOD_NO_MPU_PORT || oh->slaves_cnt == 0)
  886. return NULL;
  887. return oh->slaves[oh->_mpu_port_index];
  888. };
  889. /**
  890. * _find_mpu_rt_addr_space - return MPU register target address space for @oh
  891. * @oh: struct omap_hwmod *
  892. *
  893. * Returns a pointer to the struct omap_hwmod_addr_space record representing
  894. * the register target MPU address space; or returns NULL upon error.
  895. */
  896. static struct omap_hwmod_addr_space * __init _find_mpu_rt_addr_space(struct omap_hwmod *oh)
  897. {
  898. struct omap_hwmod_ocp_if *os;
  899. struct omap_hwmod_addr_space *mem;
  900. int found = 0, i = 0;
  901. os = _find_mpu_rt_port(oh);
  902. if (!os->addr)
  903. return NULL;
  904. do {
  905. mem = &os->addr[i++];
  906. if (mem->flags & ADDR_TYPE_RT)
  907. found = 1;
  908. } while (!found && mem->pa_start != mem->pa_end);
  909. return (found) ? mem : NULL;
  910. }
  911. /**
  912. * _enable_sysc - try to bring a module out of idle via OCP_SYSCONFIG
  913. * @oh: struct omap_hwmod *
  914. *
  915. * If module is marked as SWSUP_SIDLE, force the module out of slave
  916. * idle; otherwise, configure it for smart-idle. If module is marked
  917. * as SWSUP_MSUSPEND, force the module out of master standby;
  918. * otherwise, configure it for smart-standby. No return value.
  919. */
  920. static void _enable_sysc(struct omap_hwmod *oh)
  921. {
  922. u8 idlemode, sf;
  923. u32 v;
  924. if (!oh->class->sysc)
  925. return;
  926. v = oh->_sysc_cache;
  927. sf = oh->class->sysc->sysc_flags;
  928. if (sf & SYSC_HAS_SIDLEMODE) {
  929. idlemode = (oh->flags & HWMOD_SWSUP_SIDLE) ?
  930. HWMOD_IDLEMODE_NO : HWMOD_IDLEMODE_SMART;
  931. _set_slave_idlemode(oh, idlemode, &v);
  932. }
  933. if (sf & SYSC_HAS_MIDLEMODE) {
  934. if (oh->flags & HWMOD_SWSUP_MSTANDBY) {
  935. idlemode = HWMOD_IDLEMODE_NO;
  936. } else {
  937. if (sf & SYSC_HAS_ENAWAKEUP)
  938. _enable_wakeup(oh, &v);
  939. if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
  940. idlemode = HWMOD_IDLEMODE_SMART_WKUP;
  941. else
  942. idlemode = HWMOD_IDLEMODE_SMART;
  943. }
  944. _set_master_standbymode(oh, idlemode, &v);
  945. }
  946. /*
  947. * XXX The clock framework should handle this, by
  948. * calling into this code. But this must wait until the
  949. * clock structures are tagged with omap_hwmod entries
  950. */
  951. if ((oh->flags & HWMOD_SET_DEFAULT_CLOCKACT) &&
  952. (sf & SYSC_HAS_CLOCKACTIVITY))
  953. _set_clockactivity(oh, oh->class->sysc->clockact, &v);
  954. /* If slave is in SMARTIDLE, also enable wakeup */
  955. if ((sf & SYSC_HAS_SIDLEMODE) && !(oh->flags & HWMOD_SWSUP_SIDLE))
  956. _enable_wakeup(oh, &v);
  957. _write_sysconfig(v, oh);
  958. /*
  959. * Set the autoidle bit only after setting the smartidle bit
  960. * Setting this will not have any impact on the other modules.
  961. */
  962. if (sf & SYSC_HAS_AUTOIDLE) {
  963. idlemode = (oh->flags & HWMOD_NO_OCP_AUTOIDLE) ?
  964. 0 : 1;
  965. _set_module_autoidle(oh, idlemode, &v);
  966. _write_sysconfig(v, oh);
  967. }
  968. }
  969. /**
  970. * _idle_sysc - try to put a module into idle via OCP_SYSCONFIG
  971. * @oh: struct omap_hwmod *
  972. *
  973. * If module is marked as SWSUP_SIDLE, force the module into slave
  974. * idle; otherwise, configure it for smart-idle. If module is marked
  975. * as SWSUP_MSUSPEND, force the module into master standby; otherwise,
  976. * configure it for smart-standby. No return value.
  977. */
  978. static void _idle_sysc(struct omap_hwmod *oh)
  979. {
  980. u8 idlemode, sf;
  981. u32 v;
  982. if (!oh->class->sysc)
  983. return;
  984. v = oh->_sysc_cache;
  985. sf = oh->class->sysc->sysc_flags;
  986. if (sf & SYSC_HAS_SIDLEMODE) {
  987. idlemode = (oh->flags & HWMOD_SWSUP_SIDLE) ?
  988. HWMOD_IDLEMODE_FORCE : HWMOD_IDLEMODE_SMART;
  989. _set_slave_idlemode(oh, idlemode, &v);
  990. }
  991. if (sf & SYSC_HAS_MIDLEMODE) {
  992. if (oh->flags & HWMOD_SWSUP_MSTANDBY) {
  993. idlemode = HWMOD_IDLEMODE_FORCE;
  994. } else {
  995. if (sf & SYSC_HAS_ENAWAKEUP)
  996. _enable_wakeup(oh, &v);
  997. if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
  998. idlemode = HWMOD_IDLEMODE_SMART_WKUP;
  999. else
  1000. idlemode = HWMOD_IDLEMODE_SMART;
  1001. }
  1002. _set_master_standbymode(oh, idlemode, &v);
  1003. }
  1004. /* If slave is in SMARTIDLE, also enable wakeup */
  1005. if ((sf & SYSC_HAS_SIDLEMODE) && !(oh->flags & HWMOD_SWSUP_SIDLE))
  1006. _enable_wakeup(oh, &v);
  1007. _write_sysconfig(v, oh);
  1008. }
  1009. /**
  1010. * _shutdown_sysc - force a module into idle via OCP_SYSCONFIG
  1011. * @oh: struct omap_hwmod *
  1012. *
  1013. * Force the module into slave idle and master suspend. No return
  1014. * value.
  1015. */
  1016. static void _shutdown_sysc(struct omap_hwmod *oh)
  1017. {
  1018. u32 v;
  1019. u8 sf;
  1020. if (!oh->class->sysc)
  1021. return;
  1022. v = oh->_sysc_cache;
  1023. sf = oh->class->sysc->sysc_flags;
  1024. if (sf & SYSC_HAS_SIDLEMODE)
  1025. _set_slave_idlemode(oh, HWMOD_IDLEMODE_FORCE, &v);
  1026. if (sf & SYSC_HAS_MIDLEMODE)
  1027. _set_master_standbymode(oh, HWMOD_IDLEMODE_FORCE, &v);
  1028. if (sf & SYSC_HAS_AUTOIDLE)
  1029. _set_module_autoidle(oh, 1, &v);
  1030. _write_sysconfig(v, oh);
  1031. }
  1032. /**
  1033. * _lookup - find an omap_hwmod by name
  1034. * @name: find an omap_hwmod by name
  1035. *
  1036. * Return a pointer to an omap_hwmod by name, or NULL if not found.
  1037. */
  1038. static struct omap_hwmod *_lookup(const char *name)
  1039. {
  1040. struct omap_hwmod *oh, *temp_oh;
  1041. oh = NULL;
  1042. list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
  1043. if (!strcmp(name, temp_oh->name)) {
  1044. oh = temp_oh;
  1045. break;
  1046. }
  1047. }
  1048. return oh;
  1049. }
  1050. /**
  1051. * _init_clkdm - look up a clockdomain name, store pointer in omap_hwmod
  1052. * @oh: struct omap_hwmod *
  1053. *
  1054. * Convert a clockdomain name stored in a struct omap_hwmod into a
  1055. * clockdomain pointer, and save it into the struct omap_hwmod.
  1056. * return -EINVAL if clkdm_name does not exist or if the lookup failed.
  1057. */
  1058. static int _init_clkdm(struct omap_hwmod *oh)
  1059. {
  1060. if (cpu_is_omap24xx() || cpu_is_omap34xx())
  1061. return 0;
  1062. if (!oh->clkdm_name) {
  1063. pr_warning("omap_hwmod: %s: no clkdm_name\n", oh->name);
  1064. return -EINVAL;
  1065. }
  1066. oh->clkdm = clkdm_lookup(oh->clkdm_name);
  1067. if (!oh->clkdm) {
  1068. pr_warning("omap_hwmod: %s: could not associate to clkdm %s\n",
  1069. oh->name, oh->clkdm_name);
  1070. return -EINVAL;
  1071. }
  1072. pr_debug("omap_hwmod: %s: associated to clkdm %s\n",
  1073. oh->name, oh->clkdm_name);
  1074. return 0;
  1075. }
  1076. /**
  1077. * _init_clocks - clk_get() all clocks associated with this hwmod. Retrieve as
  1078. * well the clockdomain.
  1079. * @oh: struct omap_hwmod *
  1080. * @data: not used; pass NULL
  1081. *
  1082. * Called by omap_hwmod_setup_*() (after omap2_clk_init()).
  1083. * Resolves all clock names embedded in the hwmod. Returns 0 on
  1084. * success, or a negative error code on failure.
  1085. */
  1086. static int _init_clocks(struct omap_hwmod *oh, void *data)
  1087. {
  1088. int ret = 0;
  1089. if (oh->_state != _HWMOD_STATE_REGISTERED)
  1090. return 0;
  1091. pr_debug("omap_hwmod: %s: looking up clocks\n", oh->name);
  1092. ret |= _init_main_clk(oh);
  1093. ret |= _init_interface_clks(oh);
  1094. ret |= _init_opt_clks(oh);
  1095. ret |= _init_clkdm(oh);
  1096. if (!ret)
  1097. oh->_state = _HWMOD_STATE_CLKS_INITED;
  1098. else
  1099. pr_warning("omap_hwmod: %s: cannot _init_clocks\n", oh->name);
  1100. return ret;
  1101. }
  1102. /**
  1103. * _wait_target_ready - wait for a module to leave slave idle
  1104. * @oh: struct omap_hwmod *
  1105. *
  1106. * Wait for a module @oh to leave slave idle. Returns 0 if the module
  1107. * does not have an IDLEST bit or if the module successfully leaves
  1108. * slave idle; otherwise, pass along the return value of the
  1109. * appropriate *_cm*_wait_module_ready() function.
  1110. */
  1111. static int _wait_target_ready(struct omap_hwmod *oh)
  1112. {
  1113. struct omap_hwmod_ocp_if *os;
  1114. int ret;
  1115. if (!oh)
  1116. return -EINVAL;
  1117. if (oh->flags & HWMOD_NO_IDLEST)
  1118. return 0;
  1119. os = _find_mpu_rt_port(oh);
  1120. if (!os)
  1121. return 0;
  1122. /* XXX check module SIDLEMODE */
  1123. /* XXX check clock enable states */
  1124. if (cpu_is_omap24xx() || cpu_is_omap34xx()) {
  1125. ret = omap2_cm_wait_module_ready(oh->prcm.omap2.module_offs,
  1126. oh->prcm.omap2.idlest_reg_id,
  1127. oh->prcm.omap2.idlest_idle_bit);
  1128. } else if (cpu_is_omap44xx()) {
  1129. if (!oh->clkdm)
  1130. return -EINVAL;
  1131. ret = omap4_cminst_wait_module_ready(oh->clkdm->prcm_partition,
  1132. oh->clkdm->cm_inst,
  1133. oh->clkdm->clkdm_offs,
  1134. oh->prcm.omap4.clkctrl_offs);
  1135. } else {
  1136. BUG();
  1137. };
  1138. return ret;
  1139. }
  1140. /**
  1141. * _lookup_hardreset - fill register bit info for this hwmod/reset line
  1142. * @oh: struct omap_hwmod *
  1143. * @name: name of the reset line in the context of this hwmod
  1144. * @ohri: struct omap_hwmod_rst_info * that this function will fill in
  1145. *
  1146. * Return the bit position of the reset line that match the
  1147. * input name. Return -ENOENT if not found.
  1148. */
  1149. static u8 _lookup_hardreset(struct omap_hwmod *oh, const char *name,
  1150. struct omap_hwmod_rst_info *ohri)
  1151. {
  1152. int i;
  1153. for (i = 0; i < oh->rst_lines_cnt; i++) {
  1154. const char *rst_line = oh->rst_lines[i].name;
  1155. if (!strcmp(rst_line, name)) {
  1156. ohri->rst_shift = oh->rst_lines[i].rst_shift;
  1157. ohri->st_shift = oh->rst_lines[i].st_shift;
  1158. pr_debug("omap_hwmod: %s: %s: %s: rst %d st %d\n",
  1159. oh->name, __func__, rst_line, ohri->rst_shift,
  1160. ohri->st_shift);
  1161. return 0;
  1162. }
  1163. }
  1164. return -ENOENT;
  1165. }
  1166. /**
  1167. * _assert_hardreset - assert the HW reset line of submodules
  1168. * contained in the hwmod module.
  1169. * @oh: struct omap_hwmod *
  1170. * @name: name of the reset line to lookup and assert
  1171. *
  1172. * Some IP like dsp, ipu or iva contain processor that require
  1173. * an HW reset line to be assert / deassert in order to enable fully
  1174. * the IP.
  1175. */
  1176. static int _assert_hardreset(struct omap_hwmod *oh, const char *name)
  1177. {
  1178. struct omap_hwmod_rst_info ohri;
  1179. u8 ret;
  1180. if (!oh)
  1181. return -EINVAL;
  1182. ret = _lookup_hardreset(oh, name, &ohri);
  1183. if (IS_ERR_VALUE(ret))
  1184. return ret;
  1185. if (cpu_is_omap24xx() || cpu_is_omap34xx())
  1186. return omap2_prm_assert_hardreset(oh->prcm.omap2.module_offs,
  1187. ohri.rst_shift);
  1188. else if (cpu_is_omap44xx())
  1189. return omap4_prminst_assert_hardreset(ohri.rst_shift,
  1190. oh->clkdm->pwrdm.ptr->prcm_partition,
  1191. oh->clkdm->pwrdm.ptr->prcm_offs,
  1192. oh->prcm.omap4.rstctrl_offs);
  1193. else
  1194. return -EINVAL;
  1195. }
  1196. /**
  1197. * _deassert_hardreset - deassert the HW reset line of submodules contained
  1198. * in the hwmod module.
  1199. * @oh: struct omap_hwmod *
  1200. * @name: name of the reset line to look up and deassert
  1201. *
  1202. * Some IP like dsp, ipu or iva contain processor that require
  1203. * an HW reset line to be assert / deassert in order to enable fully
  1204. * the IP.
  1205. */
  1206. static int _deassert_hardreset(struct omap_hwmod *oh, const char *name)
  1207. {
  1208. struct omap_hwmod_rst_info ohri;
  1209. int ret;
  1210. if (!oh)
  1211. return -EINVAL;
  1212. ret = _lookup_hardreset(oh, name, &ohri);
  1213. if (IS_ERR_VALUE(ret))
  1214. return ret;
  1215. if (cpu_is_omap24xx() || cpu_is_omap34xx()) {
  1216. ret = omap2_prm_deassert_hardreset(oh->prcm.omap2.module_offs,
  1217. ohri.rst_shift,
  1218. ohri.st_shift);
  1219. } else if (cpu_is_omap44xx()) {
  1220. if (ohri.st_shift)
  1221. pr_err("omap_hwmod: %s: %s: hwmod data error: OMAP4 does not support st_shift\n",
  1222. oh->name, name);
  1223. ret = omap4_prminst_deassert_hardreset(ohri.rst_shift,
  1224. oh->clkdm->pwrdm.ptr->prcm_partition,
  1225. oh->clkdm->pwrdm.ptr->prcm_offs,
  1226. oh->prcm.omap4.rstctrl_offs);
  1227. } else {
  1228. return -EINVAL;
  1229. }
  1230. if (ret == -EBUSY)
  1231. pr_warning("omap_hwmod: %s: failed to hardreset\n", oh->name);
  1232. return ret;
  1233. }
  1234. /**
  1235. * _read_hardreset - read the HW reset line state of submodules
  1236. * contained in the hwmod module
  1237. * @oh: struct omap_hwmod *
  1238. * @name: name of the reset line to look up and read
  1239. *
  1240. * Return the state of the reset line.
  1241. */
  1242. static int _read_hardreset(struct omap_hwmod *oh, const char *name)
  1243. {
  1244. struct omap_hwmod_rst_info ohri;
  1245. u8 ret;
  1246. if (!oh)
  1247. return -EINVAL;
  1248. ret = _lookup_hardreset(oh, name, &ohri);
  1249. if (IS_ERR_VALUE(ret))
  1250. return ret;
  1251. if (cpu_is_omap24xx() || cpu_is_omap34xx()) {
  1252. return omap2_prm_is_hardreset_asserted(oh->prcm.omap2.module_offs,
  1253. ohri.st_shift);
  1254. } else if (cpu_is_omap44xx()) {
  1255. return omap4_prminst_is_hardreset_asserted(ohri.rst_shift,
  1256. oh->clkdm->pwrdm.ptr->prcm_partition,
  1257. oh->clkdm->pwrdm.ptr->prcm_offs,
  1258. oh->prcm.omap4.rstctrl_offs);
  1259. } else {
  1260. return -EINVAL;
  1261. }
  1262. }
  1263. /**
  1264. * _are_any_hardreset_lines_asserted - return true if part of @oh is hard-reset
  1265. * @oh: struct omap_hwmod *
  1266. *
  1267. * If any hardreset line associated with @oh is asserted, then return true.
  1268. * Otherwise, if @oh has no hardreset lines associated with it, or if
  1269. * no hardreset lines associated with @oh are asserted, then return false.
  1270. * This function is used to avoid executing some parts of the IP block
  1271. * enable/disable sequence if a hardreset line is set.
  1272. */
  1273. static bool _are_any_hardreset_lines_asserted(struct omap_hwmod *oh)
  1274. {
  1275. int i;
  1276. if (oh->rst_lines_cnt == 0)
  1277. return false;
  1278. for (i = 0; i < oh->rst_lines_cnt; i++)
  1279. if (_read_hardreset(oh, oh->rst_lines[i].name) > 0)
  1280. return true;
  1281. return false;
  1282. }
  1283. /**
  1284. * _omap4_disable_module - enable CLKCTRL modulemode on OMAP4
  1285. * @oh: struct omap_hwmod *
  1286. *
  1287. * Disable the PRCM module mode related to the hwmod @oh.
  1288. * Return EINVAL if the modulemode is not supported and 0 in case of success.
  1289. */
  1290. static int _omap4_disable_module(struct omap_hwmod *oh)
  1291. {
  1292. int v;
  1293. /* The module mode does not exist prior OMAP4 */
  1294. if (!cpu_is_omap44xx())
  1295. return -EINVAL;
  1296. if (!oh->clkdm || !oh->prcm.omap4.modulemode)
  1297. return -EINVAL;
  1298. pr_debug("omap_hwmod: %s: %s\n", oh->name, __func__);
  1299. omap4_cminst_module_disable(oh->clkdm->prcm_partition,
  1300. oh->clkdm->cm_inst,
  1301. oh->clkdm->clkdm_offs,
  1302. oh->prcm.omap4.clkctrl_offs);
  1303. if (_are_any_hardreset_lines_asserted(oh))
  1304. return 0;
  1305. v = _omap4_wait_target_disable(oh);
  1306. if (v)
  1307. pr_warn("omap_hwmod: %s: _wait_target_disable failed\n",
  1308. oh->name);
  1309. return 0;
  1310. }
  1311. /**
  1312. * _ocp_softreset - reset an omap_hwmod via the OCP_SYSCONFIG bit
  1313. * @oh: struct omap_hwmod *
  1314. *
  1315. * Resets an omap_hwmod @oh via the OCP_SYSCONFIG bit. hwmod must be
  1316. * enabled for this to work. Returns -ENOENT if the hwmod cannot be
  1317. * reset this way, -EINVAL if the hwmod is in the wrong state,
  1318. * -ETIMEDOUT if the module did not reset in time, or 0 upon success.
  1319. *
  1320. * In OMAP3 a specific SYSSTATUS register is used to get the reset status.
  1321. * Starting in OMAP4, some IPs do not have SYSSTATUS registers and instead
  1322. * use the SYSCONFIG softreset bit to provide the status.
  1323. *
  1324. * Note that some IP like McBSP do have reset control but don't have
  1325. * reset status.
  1326. */
  1327. static int _ocp_softreset(struct omap_hwmod *oh)
  1328. {
  1329. u32 v, softrst_mask;
  1330. int c = 0;
  1331. int ret = 0;
  1332. if (!oh->class->sysc ||
  1333. !(oh->class->sysc->sysc_flags & SYSC_HAS_SOFTRESET))
  1334. return -ENOENT;
  1335. /* clocks must be on for this operation */
  1336. if (oh->_state != _HWMOD_STATE_ENABLED) {
  1337. pr_warning("omap_hwmod: %s: reset can only be entered from "
  1338. "enabled state\n", oh->name);
  1339. return -EINVAL;
  1340. }
  1341. /* For some modules, all optionnal clocks need to be enabled as well */
  1342. if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
  1343. _enable_optional_clocks(oh);
  1344. pr_debug("omap_hwmod: %s: resetting via OCP SOFTRESET\n", oh->name);
  1345. v = oh->_sysc_cache;
  1346. ret = _set_softreset(oh, &v);
  1347. if (ret)
  1348. goto dis_opt_clks;
  1349. _write_sysconfig(v, oh);
  1350. if (oh->class->sysc->srst_udelay)
  1351. udelay(oh->class->sysc->srst_udelay);
  1352. if (oh->class->sysc->sysc_flags & SYSS_HAS_RESET_STATUS)
  1353. omap_test_timeout((omap_hwmod_read(oh,
  1354. oh->class->sysc->syss_offs)
  1355. & SYSS_RESETDONE_MASK),
  1356. MAX_MODULE_SOFTRESET_WAIT, c);
  1357. else if (oh->class->sysc->sysc_flags & SYSC_HAS_RESET_STATUS) {
  1358. softrst_mask = (0x1 << oh->class->sysc->sysc_fields->srst_shift);
  1359. omap_test_timeout(!(omap_hwmod_read(oh,
  1360. oh->class->sysc->sysc_offs)
  1361. & softrst_mask),
  1362. MAX_MODULE_SOFTRESET_WAIT, c);
  1363. }
  1364. if (c == MAX_MODULE_SOFTRESET_WAIT)
  1365. pr_warning("omap_hwmod: %s: softreset failed (waited %d usec)\n",
  1366. oh->name, MAX_MODULE_SOFTRESET_WAIT);
  1367. else
  1368. pr_debug("omap_hwmod: %s: softreset in %d usec\n", oh->name, c);
  1369. /*
  1370. * XXX add _HWMOD_STATE_WEDGED for modules that don't come back from
  1371. * _wait_target_ready() or _reset()
  1372. */
  1373. ret = (c == MAX_MODULE_SOFTRESET_WAIT) ? -ETIMEDOUT : 0;
  1374. dis_opt_clks:
  1375. if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
  1376. _disable_optional_clocks(oh);
  1377. return ret;
  1378. }
  1379. /**
  1380. * _reset - reset an omap_hwmod
  1381. * @oh: struct omap_hwmod *
  1382. *
  1383. * Resets an omap_hwmod @oh. If the module has a custom reset
  1384. * function pointer defined, then call it to reset the IP block, and
  1385. * pass along its return value to the caller. Otherwise, if the IP
  1386. * block has an OCP_SYSCONFIG register with a SOFTRESET bitfield
  1387. * associated with it, call a function to reset the IP block via that
  1388. * method, and pass along the return value to the caller. Finally, if
  1389. * the IP block has some hardreset lines associated with it, assert
  1390. * all of those, but do _not_ deassert them. (This is because driver
  1391. * authors have expressed an apparent requirement to control the
  1392. * deassertion of the hardreset lines themselves.)
  1393. *
  1394. * The default software reset mechanism for most OMAP IP blocks is
  1395. * triggered via the OCP_SYSCONFIG.SOFTRESET bit. However, some
  1396. * hwmods cannot be reset via this method. Some are not targets and
  1397. * therefore have no OCP header registers to access. Others (like the
  1398. * IVA) have idiosyncratic reset sequences. So for these relatively
  1399. * rare cases, custom reset code can be supplied in the struct
  1400. * omap_hwmod_class .reset function pointer. Passes along the return
  1401. * value from either _ocp_softreset() or the custom reset function -
  1402. * these must return -EINVAL if the hwmod cannot be reset this way or
  1403. * if the hwmod is in the wrong state, -ETIMEDOUT if the module did
  1404. * not reset in time, or 0 upon success.
  1405. */
  1406. static int _reset(struct omap_hwmod *oh)
  1407. {
  1408. int i, r;
  1409. pr_debug("omap_hwmod: %s: resetting\n", oh->name);
  1410. if (oh->class->reset) {
  1411. r = oh->class->reset(oh);
  1412. } else {
  1413. if (oh->rst_lines_cnt > 0) {
  1414. for (i = 0; i < oh->rst_lines_cnt; i++)
  1415. _assert_hardreset(oh, oh->rst_lines[i].name);
  1416. return 0;
  1417. } else {
  1418. r = _ocp_softreset(oh);
  1419. if (r == -ENOENT)
  1420. r = 0;
  1421. }
  1422. }
  1423. /*
  1424. * OCP_SYSCONFIG bits need to be reprogrammed after a
  1425. * softreset. The _enable() function should be split to avoid
  1426. * the rewrite of the OCP_SYSCONFIG register.
  1427. */
  1428. if (oh->class->sysc) {
  1429. _update_sysc_cache(oh);
  1430. _enable_sysc(oh);
  1431. }
  1432. return r;
  1433. }
  1434. /**
  1435. * _enable - enable an omap_hwmod
  1436. * @oh: struct omap_hwmod *
  1437. *
  1438. * Enables an omap_hwmod @oh such that the MPU can access the hwmod's
  1439. * register target. Returns -EINVAL if the hwmod is in the wrong
  1440. * state or passes along the return value of _wait_target_ready().
  1441. */
  1442. static int _enable(struct omap_hwmod *oh)
  1443. {
  1444. int r;
  1445. int hwsup = 0;
  1446. pr_debug("omap_hwmod: %s: enabling\n", oh->name);
  1447. /*
  1448. * hwmods with HWMOD_INIT_NO_IDLE flag set are left in enabled
  1449. * state at init. Now that someone is really trying to enable
  1450. * them, just ensure that the hwmod mux is set.
  1451. */
  1452. if (oh->_int_flags & _HWMOD_SKIP_ENABLE) {
  1453. /*
  1454. * If the caller has mux data populated, do the mux'ing
  1455. * which wouldn't have been done as part of the _enable()
  1456. * done during setup.
  1457. */
  1458. if (oh->mux)
  1459. omap_hwmod_mux(oh->mux, _HWMOD_STATE_ENABLED);
  1460. oh->_int_flags &= ~_HWMOD_SKIP_ENABLE;
  1461. return 0;
  1462. }
  1463. if (oh->_state != _HWMOD_STATE_INITIALIZED &&
  1464. oh->_state != _HWMOD_STATE_IDLE &&
  1465. oh->_state != _HWMOD_STATE_DISABLED) {
  1466. WARN(1, "omap_hwmod: %s: enabled state can only be entered from initialized, idle, or disabled state\n",
  1467. oh->name);
  1468. return -EINVAL;
  1469. }
  1470. /*
  1471. * If an IP block contains HW reset lines and any of them are
  1472. * asserted, we let integration code associated with that
  1473. * block handle the enable. We've received very little
  1474. * information on what those driver authors need, and until
  1475. * detailed information is provided and the driver code is
  1476. * posted to the public lists, this is probably the best we
  1477. * can do.
  1478. */
  1479. if (_are_any_hardreset_lines_asserted(oh))
  1480. return 0;
  1481. /* Mux pins for device runtime if populated */
  1482. if (oh->mux && (!oh->mux->enabled ||
  1483. ((oh->_state == _HWMOD_STATE_IDLE) &&
  1484. oh->mux->pads_dynamic)))
  1485. omap_hwmod_mux(oh->mux, _HWMOD_STATE_ENABLED);
  1486. _add_initiator_dep(oh, mpu_oh);
  1487. if (oh->clkdm) {
  1488. /*
  1489. * A clockdomain must be in SW_SUP before enabling
  1490. * completely the module. The clockdomain can be set
  1491. * in HW_AUTO only when the module become ready.
  1492. */
  1493. hwsup = clkdm_in_hwsup(oh->clkdm);
  1494. r = clkdm_hwmod_enable(oh->clkdm, oh);
  1495. if (r) {
  1496. WARN(1, "omap_hwmod: %s: could not enable clockdomain %s: %d\n",
  1497. oh->name, oh->clkdm->name, r);
  1498. return r;
  1499. }
  1500. }
  1501. _enable_clocks(oh);
  1502. _enable_module(oh);
  1503. r = _wait_target_ready(oh);
  1504. if (!r) {
  1505. /*
  1506. * Set the clockdomain to HW_AUTO only if the target is ready,
  1507. * assuming that the previous state was HW_AUTO
  1508. */
  1509. if (oh->clkdm && hwsup)
  1510. clkdm_allow_idle(oh->clkdm);
  1511. oh->_state = _HWMOD_STATE_ENABLED;
  1512. /* Access the sysconfig only if the target is ready */
  1513. if (oh->class->sysc) {
  1514. if (!(oh->_int_flags & _HWMOD_SYSCONFIG_LOADED))
  1515. _update_sysc_cache(oh);
  1516. _enable_sysc(oh);
  1517. }
  1518. } else {
  1519. _disable_clocks(oh);
  1520. pr_debug("omap_hwmod: %s: _wait_target_ready: %d\n",
  1521. oh->name, r);
  1522. if (oh->clkdm)
  1523. clkdm_hwmod_disable(oh->clkdm, oh);
  1524. }
  1525. return r;
  1526. }
  1527. /**
  1528. * _idle - idle an omap_hwmod
  1529. * @oh: struct omap_hwmod *
  1530. *
  1531. * Idles an omap_hwmod @oh. This should be called once the hwmod has
  1532. * no further work. Returns -EINVAL if the hwmod is in the wrong
  1533. * state or returns 0.
  1534. */
  1535. static int _idle(struct omap_hwmod *oh)
  1536. {
  1537. pr_debug("omap_hwmod: %s: idling\n", oh->name);
  1538. if (oh->_state != _HWMOD_STATE_ENABLED) {
  1539. WARN(1, "omap_hwmod: %s: idle state can only be entered from enabled state\n",
  1540. oh->name);
  1541. return -EINVAL;
  1542. }
  1543. if (_are_any_hardreset_lines_asserted(oh))
  1544. return 0;
  1545. if (oh->class->sysc)
  1546. _idle_sysc(oh);
  1547. _del_initiator_dep(oh, mpu_oh);
  1548. _omap4_disable_module(oh);
  1549. /*
  1550. * The module must be in idle mode before disabling any parents
  1551. * clocks. Otherwise, the parent clock might be disabled before
  1552. * the module transition is done, and thus will prevent the
  1553. * transition to complete properly.
  1554. */
  1555. _disable_clocks(oh);
  1556. if (oh->clkdm)
  1557. clkdm_hwmod_disable(oh->clkdm, oh);
  1558. /* Mux pins for device idle if populated */
  1559. if (oh->mux && oh->mux->pads_dynamic)
  1560. omap_hwmod_mux(oh->mux, _HWMOD_STATE_IDLE);
  1561. oh->_state = _HWMOD_STATE_IDLE;
  1562. return 0;
  1563. }
  1564. /**
  1565. * omap_hwmod_set_ocp_autoidle - set the hwmod's OCP autoidle bit
  1566. * @oh: struct omap_hwmod *
  1567. * @autoidle: desired AUTOIDLE bitfield value (0 or 1)
  1568. *
  1569. * Sets the IP block's OCP autoidle bit in hardware, and updates our
  1570. * local copy. Intended to be used by drivers that require
  1571. * direct manipulation of the AUTOIDLE bits.
  1572. * Returns -EINVAL if @oh is null or is not in the ENABLED state, or passes
  1573. * along the return value from _set_module_autoidle().
  1574. *
  1575. * Any users of this function should be scrutinized carefully.
  1576. */
  1577. int omap_hwmod_set_ocp_autoidle(struct omap_hwmod *oh, u8 autoidle)
  1578. {
  1579. u32 v;
  1580. int retval = 0;
  1581. unsigned long flags;
  1582. if (!oh || oh->_state != _HWMOD_STATE_ENABLED)
  1583. return -EINVAL;
  1584. spin_lock_irqsave(&oh->_lock, flags);
  1585. v = oh->_sysc_cache;
  1586. retval = _set_module_autoidle(oh, autoidle, &v);
  1587. if (!retval)
  1588. _write_sysconfig(v, oh);
  1589. spin_unlock_irqrestore(&oh->_lock, flags);
  1590. return retval;
  1591. }
  1592. /**
  1593. * _shutdown - shutdown an omap_hwmod
  1594. * @oh: struct omap_hwmod *
  1595. *
  1596. * Shut down an omap_hwmod @oh. This should be called when the driver
  1597. * used for the hwmod is removed or unloaded or if the driver is not
  1598. * used by the system. Returns -EINVAL if the hwmod is in the wrong
  1599. * state or returns 0.
  1600. */
  1601. static int _shutdown(struct omap_hwmod *oh)
  1602. {
  1603. int ret, i;
  1604. u8 prev_state;
  1605. if (oh->_state != _HWMOD_STATE_IDLE &&
  1606. oh->_state != _HWMOD_STATE_ENABLED) {
  1607. WARN(1, "omap_hwmod: %s: disabled state can only be entered from idle, or enabled state\n",
  1608. oh->name);
  1609. return -EINVAL;
  1610. }
  1611. if (_are_any_hardreset_lines_asserted(oh))
  1612. return 0;
  1613. pr_debug("omap_hwmod: %s: disabling\n", oh->name);
  1614. if (oh->class->pre_shutdown) {
  1615. prev_state = oh->_state;
  1616. if (oh->_state == _HWMOD_STATE_IDLE)
  1617. _enable(oh);
  1618. ret = oh->class->pre_shutdown(oh);
  1619. if (ret) {
  1620. if (prev_state == _HWMOD_STATE_IDLE)
  1621. _idle(oh);
  1622. return ret;
  1623. }
  1624. }
  1625. if (oh->class->sysc) {
  1626. if (oh->_state == _HWMOD_STATE_IDLE)
  1627. _enable(oh);
  1628. _shutdown_sysc(oh);
  1629. }
  1630. /* clocks and deps are already disabled in idle */
  1631. if (oh->_state == _HWMOD_STATE_ENABLED) {
  1632. _del_initiator_dep(oh, mpu_oh);
  1633. /* XXX what about the other system initiators here? dma, dsp */
  1634. _omap4_disable_module(oh);
  1635. _disable_clocks(oh);
  1636. if (oh->clkdm)
  1637. clkdm_hwmod_disable(oh->clkdm, oh);
  1638. }
  1639. /* XXX Should this code also force-disable the optional clocks? */
  1640. for (i = 0; i < oh->rst_lines_cnt; i++)
  1641. _assert_hardreset(oh, oh->rst_lines[i].name);
  1642. /* Mux pins to safe mode or use populated off mode values */
  1643. if (oh->mux)
  1644. omap_hwmod_mux(oh->mux, _HWMOD_STATE_DISABLED);
  1645. oh->_state = _HWMOD_STATE_DISABLED;
  1646. return 0;
  1647. }
  1648. /**
  1649. * _init_mpu_rt_base - populate the virtual address for a hwmod
  1650. * @oh: struct omap_hwmod * to locate the virtual address
  1651. *
  1652. * Cache the virtual address used by the MPU to access this IP block's
  1653. * registers. This address is needed early so the OCP registers that
  1654. * are part of the device's address space can be ioremapped properly.
  1655. * No return value.
  1656. */
  1657. static void __init _init_mpu_rt_base(struct omap_hwmod *oh, void *data)
  1658. {
  1659. struct omap_hwmod_addr_space *mem;
  1660. void __iomem *va_start;
  1661. if (!oh)
  1662. return;
  1663. if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
  1664. return;
  1665. mem = _find_mpu_rt_addr_space(oh);
  1666. if (!mem) {
  1667. pr_debug("omap_hwmod: %s: no MPU register target found\n",
  1668. oh->name);
  1669. return;
  1670. }
  1671. va_start = ioremap(mem->pa_start, mem->pa_end - mem->pa_start);
  1672. if (!va_start) {
  1673. pr_err("omap_hwmod: %s: Could not ioremap\n", oh->name);
  1674. return;
  1675. }
  1676. pr_debug("omap_hwmod: %s: MPU register target at va %p\n",
  1677. oh->name, va_start);
  1678. oh->_mpu_rt_va = va_start;
  1679. }
  1680. /**
  1681. * _init - initialize internal data for the hwmod @oh
  1682. * @oh: struct omap_hwmod *
  1683. * @n: (unused)
  1684. *
  1685. * Look up the clocks and the address space used by the MPU to access
  1686. * registers belonging to the hwmod @oh. @oh must already be
  1687. * registered at this point. This is the first of two phases for
  1688. * hwmod initialization. Code called here does not touch any hardware
  1689. * registers, it simply prepares internal data structures. Returns 0
  1690. * upon success or if the hwmod isn't registered, or -EINVAL upon
  1691. * failure.
  1692. */
  1693. static int __init _init(struct omap_hwmod *oh, void *data)
  1694. {
  1695. int r;
  1696. if (oh->_state != _HWMOD_STATE_REGISTERED)
  1697. return 0;
  1698. _init_mpu_rt_base(oh, NULL);
  1699. r = _init_clocks(oh, NULL);
  1700. if (IS_ERR_VALUE(r)) {
  1701. WARN(1, "omap_hwmod: %s: couldn't init clocks\n", oh->name);
  1702. return -EINVAL;
  1703. }
  1704. oh->_state = _HWMOD_STATE_INITIALIZED;
  1705. return 0;
  1706. }
  1707. /**
  1708. * _setup_iclk_autoidle - configure an IP block's interface clocks
  1709. * @oh: struct omap_hwmod *
  1710. *
  1711. * Set up the module's interface clocks. XXX This function is still mostly
  1712. * a stub; implementing this properly requires iclk autoidle usecounting in
  1713. * the clock code. No return value.
  1714. */
  1715. static void __init _setup_iclk_autoidle(struct omap_hwmod *oh)
  1716. {
  1717. int i;
  1718. if (oh->_state != _HWMOD_STATE_INITIALIZED)
  1719. return;
  1720. for (i = 0; i < oh->slaves_cnt; i++) {
  1721. struct omap_hwmod_ocp_if *os = oh->slaves[i];
  1722. struct clk *c = os->_clk;
  1723. if (!c)
  1724. continue;
  1725. if (os->flags & OCPIF_SWSUP_IDLE) {
  1726. /* XXX omap_iclk_deny_idle(c); */
  1727. } else {
  1728. /* XXX omap_iclk_allow_idle(c); */
  1729. clk_enable(c);
  1730. }
  1731. }
  1732. return;
  1733. }
  1734. /**
  1735. * _setup_reset - reset an IP block during the setup process
  1736. * @oh: struct omap_hwmod *
  1737. *
  1738. * Reset the IP block corresponding to the hwmod @oh during the setup
  1739. * process. The IP block is first enabled so it can be successfully
  1740. * reset. Returns 0 upon success or a negative error code upon
  1741. * failure.
  1742. */
  1743. static int __init _setup_reset(struct omap_hwmod *oh)
  1744. {
  1745. int r;
  1746. if (oh->_state != _HWMOD_STATE_INITIALIZED)
  1747. return -EINVAL;
  1748. if (oh->rst_lines_cnt == 0) {
  1749. r = _enable(oh);
  1750. if (r) {
  1751. pr_warning("omap_hwmod: %s: cannot be enabled for reset (%d)\n",
  1752. oh->name, oh->_state);
  1753. return -EINVAL;
  1754. }
  1755. }
  1756. if (!(oh->flags & HWMOD_INIT_NO_RESET))
  1757. r = _reset(oh);
  1758. return r;
  1759. }
  1760. /**
  1761. * _setup_postsetup - transition to the appropriate state after _setup
  1762. * @oh: struct omap_hwmod *
  1763. *
  1764. * Place an IP block represented by @oh into a "post-setup" state --
  1765. * either IDLE, ENABLED, or DISABLED. ("post-setup" simply means that
  1766. * this function is called at the end of _setup().) The postsetup
  1767. * state for an IP block can be changed by calling
  1768. * omap_hwmod_enter_postsetup_state() early in the boot process,
  1769. * before one of the omap_hwmod_setup*() functions are called for the
  1770. * IP block.
  1771. *
  1772. * The IP block stays in this state until a PM runtime-based driver is
  1773. * loaded for that IP block. A post-setup state of IDLE is
  1774. * appropriate for almost all IP blocks with runtime PM-enabled
  1775. * drivers, since those drivers are able to enable the IP block. A
  1776. * post-setup state of ENABLED is appropriate for kernels with PM
  1777. * runtime disabled. The DISABLED state is appropriate for unusual IP
  1778. * blocks such as the MPU WDTIMER on kernels without WDTIMER drivers
  1779. * included, since the WDTIMER starts running on reset and will reset
  1780. * the MPU if left active.
  1781. *
  1782. * This post-setup mechanism is deprecated. Once all of the OMAP
  1783. * drivers have been converted to use PM runtime, and all of the IP
  1784. * block data and interconnect data is available to the hwmod code, it
  1785. * should be possible to replace this mechanism with a "lazy reset"
  1786. * arrangement. In a "lazy reset" setup, each IP block is enabled
  1787. * when the driver first probes, then all remaining IP blocks without
  1788. * drivers are either shut down or enabled after the drivers have
  1789. * loaded. However, this cannot take place until the above
  1790. * preconditions have been met, since otherwise the late reset code
  1791. * has no way of knowing which IP blocks are in use by drivers, and
  1792. * which ones are unused.
  1793. *
  1794. * No return value.
  1795. */
  1796. static void __init _setup_postsetup(struct omap_hwmod *oh)
  1797. {
  1798. u8 postsetup_state;
  1799. if (oh->rst_lines_cnt > 0)
  1800. return;
  1801. postsetup_state = oh->_postsetup_state;
  1802. if (postsetup_state == _HWMOD_STATE_UNKNOWN)
  1803. postsetup_state = _HWMOD_STATE_ENABLED;
  1804. /*
  1805. * XXX HWMOD_INIT_NO_IDLE does not belong in hwmod data -
  1806. * it should be set by the core code as a runtime flag during startup
  1807. */
  1808. if ((oh->flags & HWMOD_INIT_NO_IDLE) &&
  1809. (postsetup_state == _HWMOD_STATE_IDLE)) {
  1810. oh->_int_flags |= _HWMOD_SKIP_ENABLE;
  1811. postsetup_state = _HWMOD_STATE_ENABLED;
  1812. }
  1813. if (postsetup_state == _HWMOD_STATE_IDLE)
  1814. _idle(oh);
  1815. else if (postsetup_state == _HWMOD_STATE_DISABLED)
  1816. _shutdown(oh);
  1817. else if (postsetup_state != _HWMOD_STATE_ENABLED)
  1818. WARN(1, "hwmod: %s: unknown postsetup state %d! defaulting to enabled\n",
  1819. oh->name, postsetup_state);
  1820. return;
  1821. }
  1822. /**
  1823. * _setup - prepare IP block hardware for use
  1824. * @oh: struct omap_hwmod *
  1825. * @n: (unused, pass NULL)
  1826. *
  1827. * Configure the IP block represented by @oh. This may include
  1828. * enabling the IP block, resetting it, and placing it into a
  1829. * post-setup state, depending on the type of IP block and applicable
  1830. * flags. IP blocks are reset to prevent any previous configuration
  1831. * by the bootloader or previous operating system from interfering
  1832. * with power management or other parts of the system. The reset can
  1833. * be avoided; see omap_hwmod_no_setup_reset(). This is the second of
  1834. * two phases for hwmod initialization. Code called here generally
  1835. * affects the IP block hardware, or system integration hardware
  1836. * associated with the IP block. Returns 0.
  1837. */
  1838. static int __init _setup(struct omap_hwmod *oh, void *data)
  1839. {
  1840. if (oh->_state != _HWMOD_STATE_INITIALIZED)
  1841. return 0;
  1842. _setup_iclk_autoidle(oh);
  1843. if (!_setup_reset(oh))
  1844. _setup_postsetup(oh);
  1845. return 0;
  1846. }
  1847. /**
  1848. * _register - register a struct omap_hwmod
  1849. * @oh: struct omap_hwmod *
  1850. *
  1851. * Registers the omap_hwmod @oh. Returns -EEXIST if an omap_hwmod
  1852. * already has been registered by the same name; -EINVAL if the
  1853. * omap_hwmod is in the wrong state, if @oh is NULL, if the
  1854. * omap_hwmod's class field is NULL; if the omap_hwmod is missing a
  1855. * name, or if the omap_hwmod's class is missing a name; or 0 upon
  1856. * success.
  1857. *
  1858. * XXX The data should be copied into bootmem, so the original data
  1859. * should be marked __initdata and freed after init. This would allow
  1860. * unneeded omap_hwmods to be freed on multi-OMAP configurations. Note
  1861. * that the copy process would be relatively complex due to the large number
  1862. * of substructures.
  1863. */
  1864. static int __init _register(struct omap_hwmod *oh)
  1865. {
  1866. int ms_id;
  1867. if (!oh || !oh->name || !oh->class || !oh->class->name ||
  1868. (oh->_state != _HWMOD_STATE_UNKNOWN))
  1869. return -EINVAL;
  1870. pr_debug("omap_hwmod: %s: registering\n", oh->name);
  1871. if (_lookup(oh->name))
  1872. return -EEXIST;
  1873. ms_id = _find_mpu_port_index(oh);
  1874. if (!IS_ERR_VALUE(ms_id))
  1875. oh->_mpu_port_index = ms_id;
  1876. else
  1877. oh->_int_flags |= _HWMOD_NO_MPU_PORT;
  1878. list_add_tail(&oh->node, &omap_hwmod_list);
  1879. spin_lock_init(&oh->_lock);
  1880. oh->_state = _HWMOD_STATE_REGISTERED;
  1881. /*
  1882. * XXX Rather than doing a strcmp(), this should test a flag
  1883. * set in the hwmod data, inserted by the autogenerator code.
  1884. */
  1885. if (!strcmp(oh->name, MPU_INITIATOR_NAME))
  1886. mpu_oh = oh;
  1887. return 0;
  1888. }
  1889. /* Public functions */
  1890. u32 omap_hwmod_read(struct omap_hwmod *oh, u16 reg_offs)
  1891. {
  1892. if (oh->flags & HWMOD_16BIT_REG)
  1893. return __raw_readw(oh->_mpu_rt_va + reg_offs);
  1894. else
  1895. return __raw_readl(oh->_mpu_rt_va + reg_offs);
  1896. }
  1897. void omap_hwmod_write(u32 v, struct omap_hwmod *oh, u16 reg_offs)
  1898. {
  1899. if (oh->flags & HWMOD_16BIT_REG)
  1900. __raw_writew(v, oh->_mpu_rt_va + reg_offs);
  1901. else
  1902. __raw_writel(v, oh->_mpu_rt_va + reg_offs);
  1903. }
  1904. /**
  1905. * omap_hwmod_softreset - reset a module via SYSCONFIG.SOFTRESET bit
  1906. * @oh: struct omap_hwmod *
  1907. *
  1908. * This is a public function exposed to drivers. Some drivers may need to do
  1909. * some settings before and after resetting the device. Those drivers after
  1910. * doing the necessary settings could use this function to start a reset by
  1911. * setting the SYSCONFIG.SOFTRESET bit.
  1912. */
  1913. int omap_hwmod_softreset(struct omap_hwmod *oh)
  1914. {
  1915. u32 v;
  1916. int ret;
  1917. if (!oh || !(oh->_sysc_cache))
  1918. return -EINVAL;
  1919. v = oh->_sysc_cache;
  1920. ret = _set_softreset(oh, &v);
  1921. if (ret)
  1922. goto error;
  1923. _write_sysconfig(v, oh);
  1924. error:
  1925. return ret;
  1926. }
  1927. /**
  1928. * omap_hwmod_set_slave_idlemode - set the hwmod's OCP slave idlemode
  1929. * @oh: struct omap_hwmod *
  1930. * @idlemode: SIDLEMODE field bits (shifted to bit 0)
  1931. *
  1932. * Sets the IP block's OCP slave idlemode in hardware, and updates our
  1933. * local copy. Intended to be used by drivers that have some erratum
  1934. * that requires direct manipulation of the SIDLEMODE bits. Returns
  1935. * -EINVAL if @oh is null, or passes along the return value from
  1936. * _set_slave_idlemode().
  1937. *
  1938. * XXX Does this function have any current users? If not, we should
  1939. * remove it; it is better to let the rest of the hwmod code handle this.
  1940. * Any users of this function should be scrutinized carefully.
  1941. */
  1942. int omap_hwmod_set_slave_idlemode(struct omap_hwmod *oh, u8 idlemode)
  1943. {
  1944. u32 v;
  1945. int retval = 0;
  1946. if (!oh)
  1947. return -EINVAL;
  1948. v = oh->_sysc_cache;
  1949. retval = _set_slave_idlemode(oh, idlemode, &v);
  1950. if (!retval)
  1951. _write_sysconfig(v, oh);
  1952. return retval;
  1953. }
  1954. /**
  1955. * omap_hwmod_lookup - look up a registered omap_hwmod by name
  1956. * @name: name of the omap_hwmod to look up
  1957. *
  1958. * Given a @name of an omap_hwmod, return a pointer to the registered
  1959. * struct omap_hwmod *, or NULL upon error.
  1960. */
  1961. struct omap_hwmod *omap_hwmod_lookup(const char *name)
  1962. {
  1963. struct omap_hwmod *oh;
  1964. if (!name)
  1965. return NULL;
  1966. oh = _lookup(name);
  1967. return oh;
  1968. }
  1969. /**
  1970. * omap_hwmod_for_each - call function for each registered omap_hwmod
  1971. * @fn: pointer to a callback function
  1972. * @data: void * data to pass to callback function
  1973. *
  1974. * Call @fn for each registered omap_hwmod, passing @data to each
  1975. * function. @fn must return 0 for success or any other value for
  1976. * failure. If @fn returns non-zero, the iteration across omap_hwmods
  1977. * will stop and the non-zero return value will be passed to the
  1978. * caller of omap_hwmod_for_each(). @fn is called with
  1979. * omap_hwmod_for_each() held.
  1980. */
  1981. int omap_hwmod_for_each(int (*fn)(struct omap_hwmod *oh, void *data),
  1982. void *data)
  1983. {
  1984. struct omap_hwmod *temp_oh;
  1985. int ret = 0;
  1986. if (!fn)
  1987. return -EINVAL;
  1988. list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
  1989. ret = (*fn)(temp_oh, data);
  1990. if (ret)
  1991. break;
  1992. }
  1993. return ret;
  1994. }
  1995. /**
  1996. * omap_hwmod_register - register an array of hwmods
  1997. * @ohs: pointer to an array of omap_hwmods to register
  1998. *
  1999. * Intended to be called early in boot before the clock framework is
  2000. * initialized. If @ohs is not null, will register all omap_hwmods
  2001. * listed in @ohs that are valid for this chip. Returns 0.
  2002. */
  2003. int __init omap_hwmod_register(struct omap_hwmod **ohs)
  2004. {
  2005. int r, i;
  2006. if (!ohs)
  2007. return 0;
  2008. i = 0;
  2009. do {
  2010. r = _register(ohs[i]);
  2011. WARN(r, "omap_hwmod: %s: _register returned %d\n", ohs[i]->name,
  2012. r);
  2013. } while (ohs[++i]);
  2014. return 0;
  2015. }
  2016. /**
  2017. * _ensure_mpu_hwmod_is_setup - ensure the MPU SS hwmod is init'ed and set up
  2018. * @oh: pointer to the hwmod currently being set up (usually not the MPU)
  2019. *
  2020. * If the hwmod data corresponding to the MPU subsystem IP block
  2021. * hasn't been initialized and set up yet, do so now. This must be
  2022. * done first since sleep dependencies may be added from other hwmods
  2023. * to the MPU. Intended to be called only by omap_hwmod_setup*(). No
  2024. * return value.
  2025. */
  2026. static void __init _ensure_mpu_hwmod_is_setup(struct omap_hwmod *oh)
  2027. {
  2028. if (!mpu_oh || mpu_oh->_state == _HWMOD_STATE_UNKNOWN)
  2029. pr_err("omap_hwmod: %s: MPU initiator hwmod %s not yet registered\n",
  2030. __func__, MPU_INITIATOR_NAME);
  2031. else if (mpu_oh->_state == _HWMOD_STATE_REGISTERED && oh != mpu_oh)
  2032. omap_hwmod_setup_one(MPU_INITIATOR_NAME);
  2033. }
  2034. /**
  2035. * omap_hwmod_setup_one - set up a single hwmod
  2036. * @oh_name: const char * name of the already-registered hwmod to set up
  2037. *
  2038. * Initialize and set up a single hwmod. Intended to be used for a
  2039. * small number of early devices, such as the timer IP blocks used for
  2040. * the scheduler clock. Must be called after omap2_clk_init().
  2041. * Resolves the struct clk names to struct clk pointers for each
  2042. * registered omap_hwmod. Also calls _setup() on each hwmod. Returns
  2043. * -EINVAL upon error or 0 upon success.
  2044. */
  2045. int __init omap_hwmod_setup_one(const char *oh_name)
  2046. {
  2047. struct omap_hwmod *oh;
  2048. pr_debug("omap_hwmod: %s: %s\n", oh_name, __func__);
  2049. oh = _lookup(oh_name);
  2050. if (!oh) {
  2051. WARN(1, "omap_hwmod: %s: hwmod not yet registered\n", oh_name);
  2052. return -EINVAL;
  2053. }
  2054. _ensure_mpu_hwmod_is_setup(oh);
  2055. _init(oh, NULL);
  2056. _setup(oh, NULL);
  2057. return 0;
  2058. }
  2059. /**
  2060. * omap_hwmod_setup_all - set up all registered IP blocks
  2061. *
  2062. * Initialize and set up all IP blocks registered with the hwmod code.
  2063. * Must be called after omap2_clk_init(). Resolves the struct clk
  2064. * names to struct clk pointers for each registered omap_hwmod. Also
  2065. * calls _setup() on each hwmod. Returns 0 upon success.
  2066. */
  2067. static int __init omap_hwmod_setup_all(void)
  2068. {
  2069. _ensure_mpu_hwmod_is_setup(NULL);
  2070. omap_hwmod_for_each(_init, NULL);
  2071. omap_hwmod_for_each(_setup, NULL);
  2072. return 0;
  2073. }
  2074. core_initcall(omap_hwmod_setup_all);
  2075. /**
  2076. * omap_hwmod_enable - enable an omap_hwmod
  2077. * @oh: struct omap_hwmod *
  2078. *
  2079. * Enable an omap_hwmod @oh. Intended to be called by omap_device_enable().
  2080. * Returns -EINVAL on error or passes along the return value from _enable().
  2081. */
  2082. int omap_hwmod_enable(struct omap_hwmod *oh)
  2083. {
  2084. int r;
  2085. unsigned long flags;
  2086. if (!oh)
  2087. return -EINVAL;
  2088. spin_lock_irqsave(&oh->_lock, flags);
  2089. r = _enable(oh);
  2090. spin_unlock_irqrestore(&oh->_lock, flags);
  2091. return r;
  2092. }
  2093. /**
  2094. * omap_hwmod_idle - idle an omap_hwmod
  2095. * @oh: struct omap_hwmod *
  2096. *
  2097. * Idle an omap_hwmod @oh. Intended to be called by omap_device_idle().
  2098. * Returns -EINVAL on error or passes along the return value from _idle().
  2099. */
  2100. int omap_hwmod_idle(struct omap_hwmod *oh)
  2101. {
  2102. unsigned long flags;
  2103. if (!oh)
  2104. return -EINVAL;
  2105. spin_lock_irqsave(&oh->_lock, flags);
  2106. _idle(oh);
  2107. spin_unlock_irqrestore(&oh->_lock, flags);
  2108. return 0;
  2109. }
  2110. /**
  2111. * omap_hwmod_shutdown - shutdown an omap_hwmod
  2112. * @oh: struct omap_hwmod *
  2113. *
  2114. * Shutdown an omap_hwmod @oh. Intended to be called by
  2115. * omap_device_shutdown(). Returns -EINVAL on error or passes along
  2116. * the return value from _shutdown().
  2117. */
  2118. int omap_hwmod_shutdown(struct omap_hwmod *oh)
  2119. {
  2120. unsigned long flags;
  2121. if (!oh)
  2122. return -EINVAL;
  2123. spin_lock_irqsave(&oh->_lock, flags);
  2124. _shutdown(oh);
  2125. spin_unlock_irqrestore(&oh->_lock, flags);
  2126. return 0;
  2127. }
  2128. /**
  2129. * omap_hwmod_enable_clocks - enable main_clk, all interface clocks
  2130. * @oh: struct omap_hwmod *oh
  2131. *
  2132. * Intended to be called by the omap_device code.
  2133. */
  2134. int omap_hwmod_enable_clocks(struct omap_hwmod *oh)
  2135. {
  2136. unsigned long flags;
  2137. spin_lock_irqsave(&oh->_lock, flags);
  2138. _enable_clocks(oh);
  2139. spin_unlock_irqrestore(&oh->_lock, flags);
  2140. return 0;
  2141. }
  2142. /**
  2143. * omap_hwmod_disable_clocks - disable main_clk, all interface clocks
  2144. * @oh: struct omap_hwmod *oh
  2145. *
  2146. * Intended to be called by the omap_device code.
  2147. */
  2148. int omap_hwmod_disable_clocks(struct omap_hwmod *oh)
  2149. {
  2150. unsigned long flags;
  2151. spin_lock_irqsave(&oh->_lock, flags);
  2152. _disable_clocks(oh);
  2153. spin_unlock_irqrestore(&oh->_lock, flags);
  2154. return 0;
  2155. }
  2156. /**
  2157. * omap_hwmod_ocp_barrier - wait for posted writes against the hwmod to complete
  2158. * @oh: struct omap_hwmod *oh
  2159. *
  2160. * Intended to be called by drivers and core code when all posted
  2161. * writes to a device must complete before continuing further
  2162. * execution (for example, after clearing some device IRQSTATUS
  2163. * register bits)
  2164. *
  2165. * XXX what about targets with multiple OCP threads?
  2166. */
  2167. void omap_hwmod_ocp_barrier(struct omap_hwmod *oh)
  2168. {
  2169. BUG_ON(!oh);
  2170. if (!oh->class->sysc || !oh->class->sysc->sysc_flags) {
  2171. WARN(1, "omap_device: %s: OCP barrier impossible due to device configuration\n",
  2172. oh->name);
  2173. return;
  2174. }
  2175. /*
  2176. * Forces posted writes to complete on the OCP thread handling
  2177. * register writes
  2178. */
  2179. omap_hwmod_read(oh, oh->class->sysc->sysc_offs);
  2180. }
  2181. /**
  2182. * omap_hwmod_reset - reset the hwmod
  2183. * @oh: struct omap_hwmod *
  2184. *
  2185. * Under some conditions, a driver may wish to reset the entire device.
  2186. * Called from omap_device code. Returns -EINVAL on error or passes along
  2187. * the return value from _reset().
  2188. */
  2189. int omap_hwmod_reset(struct omap_hwmod *oh)
  2190. {
  2191. int r;
  2192. unsigned long flags;
  2193. if (!oh)
  2194. return -EINVAL;
  2195. spin_lock_irqsave(&oh->_lock, flags);
  2196. r = _reset(oh);
  2197. spin_unlock_irqrestore(&oh->_lock, flags);
  2198. return r;
  2199. }
  2200. /*
  2201. * IP block data retrieval functions
  2202. */
  2203. /**
  2204. * omap_hwmod_count_resources - count number of struct resources needed by hwmod
  2205. * @oh: struct omap_hwmod *
  2206. * @res: pointer to the first element of an array of struct resource to fill
  2207. *
  2208. * Count the number of struct resource array elements necessary to
  2209. * contain omap_hwmod @oh resources. Intended to be called by code
  2210. * that registers omap_devices. Intended to be used to determine the
  2211. * size of a dynamically-allocated struct resource array, before
  2212. * calling omap_hwmod_fill_resources(). Returns the number of struct
  2213. * resource array elements needed.
  2214. *
  2215. * XXX This code is not optimized. It could attempt to merge adjacent
  2216. * resource IDs.
  2217. *
  2218. */
  2219. int omap_hwmod_count_resources(struct omap_hwmod *oh)
  2220. {
  2221. int ret, i;
  2222. ret = _count_mpu_irqs(oh) + _count_sdma_reqs(oh);
  2223. for (i = 0; i < oh->slaves_cnt; i++)
  2224. ret += _count_ocp_if_addr_spaces(oh->slaves[i]);
  2225. return ret;
  2226. }
  2227. /**
  2228. * omap_hwmod_fill_resources - fill struct resource array with hwmod data
  2229. * @oh: struct omap_hwmod *
  2230. * @res: pointer to the first element of an array of struct resource to fill
  2231. *
  2232. * Fill the struct resource array @res with resource data from the
  2233. * omap_hwmod @oh. Intended to be called by code that registers
  2234. * omap_devices. See also omap_hwmod_count_resources(). Returns the
  2235. * number of array elements filled.
  2236. */
  2237. int omap_hwmod_fill_resources(struct omap_hwmod *oh, struct resource *res)
  2238. {
  2239. int i, j, mpu_irqs_cnt, sdma_reqs_cnt;
  2240. int r = 0;
  2241. /* For each IRQ, DMA, memory area, fill in array.*/
  2242. mpu_irqs_cnt = _count_mpu_irqs(oh);
  2243. for (i = 0; i < mpu_irqs_cnt; i++) {
  2244. (res + r)->name = (oh->mpu_irqs + i)->name;
  2245. (res + r)->start = (oh->mpu_irqs + i)->irq;
  2246. (res + r)->end = (oh->mpu_irqs + i)->irq;
  2247. (res + r)->flags = IORESOURCE_IRQ;
  2248. r++;
  2249. }
  2250. sdma_reqs_cnt = _count_sdma_reqs(oh);
  2251. for (i = 0; i < sdma_reqs_cnt; i++) {
  2252. (res + r)->name = (oh->sdma_reqs + i)->name;
  2253. (res + r)->start = (oh->sdma_reqs + i)->dma_req;
  2254. (res + r)->end = (oh->sdma_reqs + i)->dma_req;
  2255. (res + r)->flags = IORESOURCE_DMA;
  2256. r++;
  2257. }
  2258. for (i = 0; i < oh->slaves_cnt; i++) {
  2259. struct omap_hwmod_ocp_if *os;
  2260. int addr_cnt;
  2261. os = oh->slaves[i];
  2262. addr_cnt = _count_ocp_if_addr_spaces(os);
  2263. for (j = 0; j < addr_cnt; j++) {
  2264. (res + r)->name = (os->addr + j)->name;
  2265. (res + r)->start = (os->addr + j)->pa_start;
  2266. (res + r)->end = (os->addr + j)->pa_end;
  2267. (res + r)->flags = IORESOURCE_MEM;
  2268. r++;
  2269. }
  2270. }
  2271. return r;
  2272. }
  2273. /**
  2274. * omap_hwmod_get_resource_byname - fetch IP block integration data by name
  2275. * @oh: struct omap_hwmod * to operate on
  2276. * @type: one of the IORESOURCE_* constants from include/linux/ioport.h
  2277. * @name: pointer to the name of the data to fetch (optional)
  2278. * @rsrc: pointer to a struct resource, allocated by the caller
  2279. *
  2280. * Retrieve MPU IRQ, SDMA request line, or address space start/end
  2281. * data for the IP block pointed to by @oh. The data will be filled
  2282. * into a struct resource record pointed to by @rsrc. The struct
  2283. * resource must be allocated by the caller. When @name is non-null,
  2284. * the data associated with the matching entry in the IRQ/SDMA/address
  2285. * space hwmod data arrays will be returned. If @name is null, the
  2286. * first array entry will be returned. Data order is not meaningful
  2287. * in hwmod data, so callers are strongly encouraged to use a non-null
  2288. * @name whenever possible to avoid unpredictable effects if hwmod
  2289. * data is later added that causes data ordering to change. This
  2290. * function is only intended for use by OMAP core code. Device
  2291. * drivers should not call this function - the appropriate bus-related
  2292. * data accessor functions should be used instead. Returns 0 upon
  2293. * success or a negative error code upon error.
  2294. */
  2295. int omap_hwmod_get_resource_byname(struct omap_hwmod *oh, unsigned int type,
  2296. const char *name, struct resource *rsrc)
  2297. {
  2298. int r;
  2299. unsigned int irq, dma;
  2300. u32 pa_start, pa_end;
  2301. if (!oh || !rsrc)
  2302. return -EINVAL;
  2303. if (type == IORESOURCE_IRQ) {
  2304. r = _get_mpu_irq_by_name(oh, name, &irq);
  2305. if (r)
  2306. return r;
  2307. rsrc->start = irq;
  2308. rsrc->end = irq;
  2309. } else if (type == IORESOURCE_DMA) {
  2310. r = _get_sdma_req_by_name(oh, name, &dma);
  2311. if (r)
  2312. return r;
  2313. rsrc->start = dma;
  2314. rsrc->end = dma;
  2315. } else if (type == IORESOURCE_MEM) {
  2316. r = _get_addr_space_by_name(oh, name, &pa_start, &pa_end);
  2317. if (r)
  2318. return r;
  2319. rsrc->start = pa_start;
  2320. rsrc->end = pa_end;
  2321. } else {
  2322. return -EINVAL;
  2323. }
  2324. rsrc->flags = type;
  2325. rsrc->name = name;
  2326. return 0;
  2327. }
  2328. /**
  2329. * omap_hwmod_get_pwrdm - return pointer to this module's main powerdomain
  2330. * @oh: struct omap_hwmod *
  2331. *
  2332. * Return the powerdomain pointer associated with the OMAP module
  2333. * @oh's main clock. If @oh does not have a main clk, return the
  2334. * powerdomain associated with the interface clock associated with the
  2335. * module's MPU port. (XXX Perhaps this should use the SDMA port
  2336. * instead?) Returns NULL on error, or a struct powerdomain * on
  2337. * success.
  2338. */
  2339. struct powerdomain *omap_hwmod_get_pwrdm(struct omap_hwmod *oh)
  2340. {
  2341. struct clk *c;
  2342. struct omap_hwmod_ocp_if *oi;
  2343. if (!oh)
  2344. return NULL;
  2345. if (oh->_clk) {
  2346. c = oh->_clk;
  2347. } else {
  2348. oi = _find_mpu_rt_port(oh);
  2349. if (!oi)
  2350. return NULL;
  2351. c = oi->_clk;
  2352. }
  2353. if (!c->clkdm)
  2354. return NULL;
  2355. return c->clkdm->pwrdm.ptr;
  2356. }
  2357. /**
  2358. * omap_hwmod_get_mpu_rt_va - return the module's base address (for the MPU)
  2359. * @oh: struct omap_hwmod *
  2360. *
  2361. * Returns the virtual address corresponding to the beginning of the
  2362. * module's register target, in the address range that is intended to
  2363. * be used by the MPU. Returns the virtual address upon success or NULL
  2364. * upon error.
  2365. */
  2366. void __iomem *omap_hwmod_get_mpu_rt_va(struct omap_hwmod *oh)
  2367. {
  2368. if (!oh)
  2369. return NULL;
  2370. if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
  2371. return NULL;
  2372. if (oh->_state == _HWMOD_STATE_UNKNOWN)
  2373. return NULL;
  2374. return oh->_mpu_rt_va;
  2375. }
  2376. /**
  2377. * omap_hwmod_add_initiator_dep - add sleepdep from @init_oh to @oh
  2378. * @oh: struct omap_hwmod *
  2379. * @init_oh: struct omap_hwmod * (initiator)
  2380. *
  2381. * Add a sleep dependency between the initiator @init_oh and @oh.
  2382. * Intended to be called by DSP/Bridge code via platform_data for the
  2383. * DSP case; and by the DMA code in the sDMA case. DMA code, *Bridge
  2384. * code needs to add/del initiator dependencies dynamically
  2385. * before/after accessing a device. Returns the return value from
  2386. * _add_initiator_dep().
  2387. *
  2388. * XXX Keep a usecount in the clockdomain code
  2389. */
  2390. int omap_hwmod_add_initiator_dep(struct omap_hwmod *oh,
  2391. struct omap_hwmod *init_oh)
  2392. {
  2393. return _add_initiator_dep(oh, init_oh);
  2394. }
  2395. /*
  2396. * XXX what about functions for drivers to save/restore ocp_sysconfig
  2397. * for context save/restore operations?
  2398. */
  2399. /**
  2400. * omap_hwmod_del_initiator_dep - remove sleepdep from @init_oh to @oh
  2401. * @oh: struct omap_hwmod *
  2402. * @init_oh: struct omap_hwmod * (initiator)
  2403. *
  2404. * Remove a sleep dependency between the initiator @init_oh and @oh.
  2405. * Intended to be called by DSP/Bridge code via platform_data for the
  2406. * DSP case; and by the DMA code in the sDMA case. DMA code, *Bridge
  2407. * code needs to add/del initiator dependencies dynamically
  2408. * before/after accessing a device. Returns the return value from
  2409. * _del_initiator_dep().
  2410. *
  2411. * XXX Keep a usecount in the clockdomain code
  2412. */
  2413. int omap_hwmod_del_initiator_dep(struct omap_hwmod *oh,
  2414. struct omap_hwmod *init_oh)
  2415. {
  2416. return _del_initiator_dep(oh, init_oh);
  2417. }
  2418. /**
  2419. * omap_hwmod_enable_wakeup - allow device to wake up the system
  2420. * @oh: struct omap_hwmod *
  2421. *
  2422. * Sets the module OCP socket ENAWAKEUP bit to allow the module to
  2423. * send wakeups to the PRCM, and enable I/O ring wakeup events for
  2424. * this IP block if it has dynamic mux entries. Eventually this
  2425. * should set PRCM wakeup registers to cause the PRCM to receive
  2426. * wakeup events from the module. Does not set any wakeup routing
  2427. * registers beyond this point - if the module is to wake up any other
  2428. * module or subsystem, that must be set separately. Called by
  2429. * omap_device code. Returns -EINVAL on error or 0 upon success.
  2430. */
  2431. int omap_hwmod_enable_wakeup(struct omap_hwmod *oh)
  2432. {
  2433. unsigned long flags;
  2434. u32 v;
  2435. spin_lock_irqsave(&oh->_lock, flags);
  2436. if (oh->class->sysc &&
  2437. (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)) {
  2438. v = oh->_sysc_cache;
  2439. _enable_wakeup(oh, &v);
  2440. _write_sysconfig(v, oh);
  2441. }
  2442. _set_idle_ioring_wakeup(oh, true);
  2443. spin_unlock_irqrestore(&oh->_lock, flags);
  2444. return 0;
  2445. }
  2446. /**
  2447. * omap_hwmod_disable_wakeup - prevent device from waking the system
  2448. * @oh: struct omap_hwmod *
  2449. *
  2450. * Clears the module OCP socket ENAWAKEUP bit to prevent the module
  2451. * from sending wakeups to the PRCM, and disable I/O ring wakeup
  2452. * events for this IP block if it has dynamic mux entries. Eventually
  2453. * this should clear PRCM wakeup registers to cause the PRCM to ignore
  2454. * wakeup events from the module. Does not set any wakeup routing
  2455. * registers beyond this point - if the module is to wake up any other
  2456. * module or subsystem, that must be set separately. Called by
  2457. * omap_device code. Returns -EINVAL on error or 0 upon success.
  2458. */
  2459. int omap_hwmod_disable_wakeup(struct omap_hwmod *oh)
  2460. {
  2461. unsigned long flags;
  2462. u32 v;
  2463. spin_lock_irqsave(&oh->_lock, flags);
  2464. if (oh->class->sysc &&
  2465. (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)) {
  2466. v = oh->_sysc_cache;
  2467. _disable_wakeup(oh, &v);
  2468. _write_sysconfig(v, oh);
  2469. }
  2470. _set_idle_ioring_wakeup(oh, false);
  2471. spin_unlock_irqrestore(&oh->_lock, flags);
  2472. return 0;
  2473. }
  2474. /**
  2475. * omap_hwmod_assert_hardreset - assert the HW reset line of submodules
  2476. * contained in the hwmod module.
  2477. * @oh: struct omap_hwmod *
  2478. * @name: name of the reset line to lookup and assert
  2479. *
  2480. * Some IP like dsp, ipu or iva contain processor that require
  2481. * an HW reset line to be assert / deassert in order to enable fully
  2482. * the IP. Returns -EINVAL if @oh is null or if the operation is not
  2483. * yet supported on this OMAP; otherwise, passes along the return value
  2484. * from _assert_hardreset().
  2485. */
  2486. int omap_hwmod_assert_hardreset(struct omap_hwmod *oh, const char *name)
  2487. {
  2488. int ret;
  2489. unsigned long flags;
  2490. if (!oh)
  2491. return -EINVAL;
  2492. spin_lock_irqsave(&oh->_lock, flags);
  2493. ret = _assert_hardreset(oh, name);
  2494. spin_unlock_irqrestore(&oh->_lock, flags);
  2495. return ret;
  2496. }
  2497. /**
  2498. * omap_hwmod_deassert_hardreset - deassert the HW reset line of submodules
  2499. * contained in the hwmod module.
  2500. * @oh: struct omap_hwmod *
  2501. * @name: name of the reset line to look up and deassert
  2502. *
  2503. * Some IP like dsp, ipu or iva contain processor that require
  2504. * an HW reset line to be assert / deassert in order to enable fully
  2505. * the IP. Returns -EINVAL if @oh is null or if the operation is not
  2506. * yet supported on this OMAP; otherwise, passes along the return value
  2507. * from _deassert_hardreset().
  2508. */
  2509. int omap_hwmod_deassert_hardreset(struct omap_hwmod *oh, const char *name)
  2510. {
  2511. int ret;
  2512. unsigned long flags;
  2513. if (!oh)
  2514. return -EINVAL;
  2515. spin_lock_irqsave(&oh->_lock, flags);
  2516. ret = _deassert_hardreset(oh, name);
  2517. spin_unlock_irqrestore(&oh->_lock, flags);
  2518. return ret;
  2519. }
  2520. /**
  2521. * omap_hwmod_read_hardreset - read the HW reset line state of submodules
  2522. * contained in the hwmod module
  2523. * @oh: struct omap_hwmod *
  2524. * @name: name of the reset line to look up and read
  2525. *
  2526. * Return the current state of the hwmod @oh's reset line named @name:
  2527. * returns -EINVAL upon parameter error or if this operation
  2528. * is unsupported on the current OMAP; otherwise, passes along the return
  2529. * value from _read_hardreset().
  2530. */
  2531. int omap_hwmod_read_hardreset(struct omap_hwmod *oh, const char *name)
  2532. {
  2533. int ret;
  2534. unsigned long flags;
  2535. if (!oh)
  2536. return -EINVAL;
  2537. spin_lock_irqsave(&oh->_lock, flags);
  2538. ret = _read_hardreset(oh, name);
  2539. spin_unlock_irqrestore(&oh->_lock, flags);
  2540. return ret;
  2541. }
  2542. /**
  2543. * omap_hwmod_for_each_by_class - call @fn for each hwmod of class @classname
  2544. * @classname: struct omap_hwmod_class name to search for
  2545. * @fn: callback function pointer to call for each hwmod in class @classname
  2546. * @user: arbitrary context data to pass to the callback function
  2547. *
  2548. * For each omap_hwmod of class @classname, call @fn.
  2549. * If the callback function returns something other than
  2550. * zero, the iterator is terminated, and the callback function's return
  2551. * value is passed back to the caller. Returns 0 upon success, -EINVAL
  2552. * if @classname or @fn are NULL, or passes back the error code from @fn.
  2553. */
  2554. int omap_hwmod_for_each_by_class(const char *classname,
  2555. int (*fn)(struct omap_hwmod *oh,
  2556. void *user),
  2557. void *user)
  2558. {
  2559. struct omap_hwmod *temp_oh;
  2560. int ret = 0;
  2561. if (!classname || !fn)
  2562. return -EINVAL;
  2563. pr_debug("omap_hwmod: %s: looking for modules of class %s\n",
  2564. __func__, classname);
  2565. list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
  2566. if (!strcmp(temp_oh->class->name, classname)) {
  2567. pr_debug("omap_hwmod: %s: %s: calling callback fn\n",
  2568. __func__, temp_oh->name);
  2569. ret = (*fn)(temp_oh, user);
  2570. if (ret)
  2571. break;
  2572. }
  2573. }
  2574. if (ret)
  2575. pr_debug("omap_hwmod: %s: iterator terminated early: %d\n",
  2576. __func__, ret);
  2577. return ret;
  2578. }
  2579. /**
  2580. * omap_hwmod_set_postsetup_state - set the post-_setup() state for this hwmod
  2581. * @oh: struct omap_hwmod *
  2582. * @state: state that _setup() should leave the hwmod in
  2583. *
  2584. * Sets the hwmod state that @oh will enter at the end of _setup()
  2585. * (called by omap_hwmod_setup_*()). See also the documentation
  2586. * for _setup_postsetup(), above. Returns 0 upon success or
  2587. * -EINVAL if there is a problem with the arguments or if the hwmod is
  2588. * in the wrong state.
  2589. */
  2590. int omap_hwmod_set_postsetup_state(struct omap_hwmod *oh, u8 state)
  2591. {
  2592. int ret;
  2593. unsigned long flags;
  2594. if (!oh)
  2595. return -EINVAL;
  2596. if (state != _HWMOD_STATE_DISABLED &&
  2597. state != _HWMOD_STATE_ENABLED &&
  2598. state != _HWMOD_STATE_IDLE)
  2599. return -EINVAL;
  2600. spin_lock_irqsave(&oh->_lock, flags);
  2601. if (oh->_state != _HWMOD_STATE_REGISTERED) {
  2602. ret = -EINVAL;
  2603. goto ohsps_unlock;
  2604. }
  2605. oh->_postsetup_state = state;
  2606. ret = 0;
  2607. ohsps_unlock:
  2608. spin_unlock_irqrestore(&oh->_lock, flags);
  2609. return ret;
  2610. }
  2611. /**
  2612. * omap_hwmod_get_context_loss_count - get lost context count
  2613. * @oh: struct omap_hwmod *
  2614. *
  2615. * Query the powerdomain of of @oh to get the context loss
  2616. * count for this device.
  2617. *
  2618. * Returns the context loss count of the powerdomain assocated with @oh
  2619. * upon success, or zero if no powerdomain exists for @oh.
  2620. */
  2621. int omap_hwmod_get_context_loss_count(struct omap_hwmod *oh)
  2622. {
  2623. struct powerdomain *pwrdm;
  2624. int ret = 0;
  2625. pwrdm = omap_hwmod_get_pwrdm(oh);
  2626. if (pwrdm)
  2627. ret = pwrdm_get_context_loss_count(pwrdm);
  2628. return ret;
  2629. }
  2630. /**
  2631. * omap_hwmod_no_setup_reset - prevent a hwmod from being reset upon setup
  2632. * @oh: struct omap_hwmod *
  2633. *
  2634. * Prevent the hwmod @oh from being reset during the setup process.
  2635. * Intended for use by board-*.c files on boards with devices that
  2636. * cannot tolerate being reset. Must be called before the hwmod has
  2637. * been set up. Returns 0 upon success or negative error code upon
  2638. * failure.
  2639. */
  2640. int omap_hwmod_no_setup_reset(struct omap_hwmod *oh)
  2641. {
  2642. if (!oh)
  2643. return -EINVAL;
  2644. if (oh->_state != _HWMOD_STATE_REGISTERED) {
  2645. pr_err("omap_hwmod: %s: cannot prevent setup reset; in wrong state\n",
  2646. oh->name);
  2647. return -EINVAL;
  2648. }
  2649. oh->flags |= HWMOD_INIT_NO_RESET;
  2650. return 0;
  2651. }
  2652. /**
  2653. * omap_hwmod_pad_route_irq - route an I/O pad wakeup to a particular MPU IRQ
  2654. * @oh: struct omap_hwmod * containing hwmod mux entries
  2655. * @pad_idx: array index in oh->mux of the hwmod mux entry to route wakeup
  2656. * @irq_idx: the hwmod mpu_irqs array index of the IRQ to trigger on wakeup
  2657. *
  2658. * When an I/O pad wakeup arrives for the dynamic or wakeup hwmod mux
  2659. * entry number @pad_idx for the hwmod @oh, trigger the interrupt
  2660. * service routine for the hwmod's mpu_irqs array index @irq_idx. If
  2661. * this function is not called for a given pad_idx, then the ISR
  2662. * associated with @oh's first MPU IRQ will be triggered when an I/O
  2663. * pad wakeup occurs on that pad. Note that @pad_idx is the index of
  2664. * the _dynamic or wakeup_ entry: if there are other entries not
  2665. * marked with OMAP_DEVICE_PAD_WAKEUP or OMAP_DEVICE_PAD_REMUX, these
  2666. * entries are NOT COUNTED in the dynamic pad index. This function
  2667. * must be called separately for each pad that requires its interrupt
  2668. * to be re-routed this way. Returns -EINVAL if there is an argument
  2669. * problem or if @oh does not have hwmod mux entries or MPU IRQs;
  2670. * returns -ENOMEM if memory cannot be allocated; or 0 upon success.
  2671. *
  2672. * XXX This function interface is fragile. Rather than using array
  2673. * indexes, which are subject to unpredictable change, it should be
  2674. * using hwmod IRQ names, and some other stable key for the hwmod mux
  2675. * pad records.
  2676. */
  2677. int omap_hwmod_pad_route_irq(struct omap_hwmod *oh, int pad_idx, int irq_idx)
  2678. {
  2679. int nr_irqs;
  2680. might_sleep();
  2681. if (!oh || !oh->mux || !oh->mpu_irqs || pad_idx < 0 ||
  2682. pad_idx >= oh->mux->nr_pads_dynamic)
  2683. return -EINVAL;
  2684. /* Check the number of available mpu_irqs */
  2685. for (nr_irqs = 0; oh->mpu_irqs[nr_irqs].irq >= 0; nr_irqs++)
  2686. ;
  2687. if (irq_idx >= nr_irqs)
  2688. return -EINVAL;
  2689. if (!oh->mux->irqs) {
  2690. /* XXX What frees this? */
  2691. oh->mux->irqs = kzalloc(sizeof(int) * oh->mux->nr_pads_dynamic,
  2692. GFP_KERNEL);
  2693. if (!oh->mux->irqs)
  2694. return -ENOMEM;
  2695. }
  2696. oh->mux->irqs[pad_idx] = irq_idx;
  2697. return 0;
  2698. }