netxen_nic_init.c 40 KB

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  1. /*
  2. * Copyright (C) 2003 - 2006 NetXen, Inc.
  3. * All rights reserved.
  4. *
  5. * This program is free software; you can redistribute it and/or
  6. * modify it under the terms of the GNU General Public License
  7. * as published by the Free Software Foundation; either version 2
  8. * of the License, or (at your option) any later version.
  9. *
  10. * This program is distributed in the hope that it will be useful, but
  11. * WITHOUT ANY WARRANTY; without even the implied warranty of
  12. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  13. * GNU General Public License for more details.
  14. *
  15. * You should have received a copy of the GNU General Public License
  16. * along with this program; if not, write to the Free Software
  17. * Foundation, Inc., 59 Temple Place - Suite 330, Boston,
  18. * MA 02111-1307, USA.
  19. *
  20. * The full GNU General Public License is included in this distribution
  21. * in the file called LICENSE.
  22. *
  23. * Contact Information:
  24. * info@netxen.com
  25. * NetXen,
  26. * 3965 Freedom Circle, Fourth floor,
  27. * Santa Clara, CA 95054
  28. *
  29. *
  30. * Source file for NIC routines to initialize the Phantom Hardware
  31. *
  32. */
  33. #include <linux/netdevice.h>
  34. #include <linux/delay.h>
  35. #include "netxen_nic.h"
  36. #include "netxen_nic_hw.h"
  37. #include "netxen_nic_phan_reg.h"
  38. struct crb_addr_pair {
  39. u32 addr;
  40. u32 data;
  41. };
  42. unsigned long last_schedule_time;
  43. #define NETXEN_MAX_CRB_XFORM 60
  44. static unsigned int crb_addr_xform[NETXEN_MAX_CRB_XFORM];
  45. #define NETXEN_ADDR_ERROR (0xffffffff)
  46. #define crb_addr_transform(name) \
  47. crb_addr_xform[NETXEN_HW_PX_MAP_CRB_##name] = \
  48. NETXEN_HW_CRB_HUB_AGT_ADR_##name << 20
  49. #define NETXEN_NIC_XDMA_RESET 0x8000ff
  50. static inline void
  51. netxen_nic_locked_write_reg(struct netxen_adapter *adapter,
  52. unsigned long off, int *data)
  53. {
  54. void __iomem *addr = pci_base_offset(adapter, off);
  55. writel(*data, addr);
  56. }
  57. static void crb_addr_transform_setup(void)
  58. {
  59. crb_addr_transform(XDMA);
  60. crb_addr_transform(TIMR);
  61. crb_addr_transform(SRE);
  62. crb_addr_transform(SQN3);
  63. crb_addr_transform(SQN2);
  64. crb_addr_transform(SQN1);
  65. crb_addr_transform(SQN0);
  66. crb_addr_transform(SQS3);
  67. crb_addr_transform(SQS2);
  68. crb_addr_transform(SQS1);
  69. crb_addr_transform(SQS0);
  70. crb_addr_transform(RPMX7);
  71. crb_addr_transform(RPMX6);
  72. crb_addr_transform(RPMX5);
  73. crb_addr_transform(RPMX4);
  74. crb_addr_transform(RPMX3);
  75. crb_addr_transform(RPMX2);
  76. crb_addr_transform(RPMX1);
  77. crb_addr_transform(RPMX0);
  78. crb_addr_transform(ROMUSB);
  79. crb_addr_transform(SN);
  80. crb_addr_transform(QMN);
  81. crb_addr_transform(QMS);
  82. crb_addr_transform(PGNI);
  83. crb_addr_transform(PGND);
  84. crb_addr_transform(PGN3);
  85. crb_addr_transform(PGN2);
  86. crb_addr_transform(PGN1);
  87. crb_addr_transform(PGN0);
  88. crb_addr_transform(PGSI);
  89. crb_addr_transform(PGSD);
  90. crb_addr_transform(PGS3);
  91. crb_addr_transform(PGS2);
  92. crb_addr_transform(PGS1);
  93. crb_addr_transform(PGS0);
  94. crb_addr_transform(PS);
  95. crb_addr_transform(PH);
  96. crb_addr_transform(NIU);
  97. crb_addr_transform(I2Q);
  98. crb_addr_transform(EG);
  99. crb_addr_transform(MN);
  100. crb_addr_transform(MS);
  101. crb_addr_transform(CAS2);
  102. crb_addr_transform(CAS1);
  103. crb_addr_transform(CAS0);
  104. crb_addr_transform(CAM);
  105. crb_addr_transform(C2C1);
  106. crb_addr_transform(C2C0);
  107. crb_addr_transform(SMB);
  108. }
  109. int netxen_init_firmware(struct netxen_adapter *adapter)
  110. {
  111. u32 state = 0, loops = 0, err = 0;
  112. /* Window 1 call */
  113. state = readl(NETXEN_CRB_NORMALIZE(adapter, CRB_CMDPEG_STATE));
  114. if (state == PHAN_INITIALIZE_ACK)
  115. return 0;
  116. while (state != PHAN_INITIALIZE_COMPLETE && loops < 2000) {
  117. udelay(100);
  118. /* Window 1 call */
  119. state = readl(NETXEN_CRB_NORMALIZE(adapter, CRB_CMDPEG_STATE));
  120. loops++;
  121. }
  122. if (loops >= 2000) {
  123. printk(KERN_ERR "Cmd Peg initialization not complete:%x.\n",
  124. state);
  125. err = -EIO;
  126. return err;
  127. }
  128. /* Window 1 call */
  129. writel(INTR_SCHEME_PERPORT,
  130. NETXEN_CRB_NORMALIZE(adapter, CRB_NIC_CAPABILITIES_HOST));
  131. writel(MPORT_MULTI_FUNCTION_MODE,
  132. NETXEN_CRB_NORMALIZE(adapter, CRB_MPORT_MODE));
  133. writel(PHAN_INITIALIZE_ACK,
  134. NETXEN_CRB_NORMALIZE(adapter, CRB_CMDPEG_STATE));
  135. return err;
  136. }
  137. #define NETXEN_ADDR_LIMIT 0xffffffffULL
  138. void *netxen_alloc(struct pci_dev *pdev, size_t sz, dma_addr_t * ptr,
  139. struct pci_dev **used_dev)
  140. {
  141. void *addr;
  142. addr = pci_alloc_consistent(pdev, sz, ptr);
  143. if ((unsigned long long)(*ptr) < NETXEN_ADDR_LIMIT) {
  144. *used_dev = pdev;
  145. return addr;
  146. }
  147. pci_free_consistent(pdev, sz, addr, *ptr);
  148. addr = pci_alloc_consistent(NULL, sz, ptr);
  149. *used_dev = NULL;
  150. return addr;
  151. }
  152. void netxen_initialize_adapter_sw(struct netxen_adapter *adapter)
  153. {
  154. int ctxid, ring;
  155. u32 i;
  156. u32 num_rx_bufs = 0;
  157. struct netxen_rcv_desc_ctx *rcv_desc;
  158. DPRINTK(INFO, "initializing some queues: %p\n", adapter);
  159. for (ctxid = 0; ctxid < MAX_RCV_CTX; ++ctxid) {
  160. for (ring = 0; ring < NUM_RCV_DESC_RINGS; ring++) {
  161. struct netxen_rx_buffer *rx_buf;
  162. rcv_desc = &adapter->recv_ctx[ctxid].rcv_desc[ring];
  163. rcv_desc->rcv_free = rcv_desc->max_rx_desc_count;
  164. rcv_desc->begin_alloc = 0;
  165. rx_buf = rcv_desc->rx_buf_arr;
  166. num_rx_bufs = rcv_desc->max_rx_desc_count;
  167. /*
  168. * Now go through all of them, set reference handles
  169. * and put them in the queues.
  170. */
  171. for (i = 0; i < num_rx_bufs; i++) {
  172. rx_buf->ref_handle = i;
  173. rx_buf->state = NETXEN_BUFFER_FREE;
  174. DPRINTK(INFO, "Rx buf:ctx%d i(%d) rx_buf:"
  175. "%p\n", ctxid, i, rx_buf);
  176. rx_buf++;
  177. }
  178. }
  179. }
  180. }
  181. void netxen_initialize_adapter_hw(struct netxen_adapter *adapter)
  182. {
  183. int ports = 0;
  184. struct netxen_board_info *board_info = &(adapter->ahw.boardcfg);
  185. if (netxen_nic_get_board_info(adapter) != 0)
  186. printk("%s: Error getting board config info.\n",
  187. netxen_nic_driver_name);
  188. get_brd_port_by_type(board_info->board_type, &ports);
  189. if (ports == 0)
  190. printk(KERN_ERR "%s: Unknown board type\n",
  191. netxen_nic_driver_name);
  192. adapter->ahw.max_ports = ports;
  193. }
  194. void netxen_initialize_adapter_ops(struct netxen_adapter *adapter)
  195. {
  196. switch (adapter->ahw.board_type) {
  197. case NETXEN_NIC_GBE:
  198. adapter->enable_phy_interrupts =
  199. netxen_niu_gbe_enable_phy_interrupts;
  200. adapter->disable_phy_interrupts =
  201. netxen_niu_gbe_disable_phy_interrupts;
  202. adapter->handle_phy_intr = netxen_nic_gbe_handle_phy_intr;
  203. adapter->macaddr_set = netxen_niu_macaddr_set;
  204. adapter->set_mtu = netxen_nic_set_mtu_gb;
  205. adapter->set_promisc = netxen_niu_set_promiscuous_mode;
  206. adapter->unset_promisc = netxen_niu_set_promiscuous_mode;
  207. adapter->phy_read = netxen_niu_gbe_phy_read;
  208. adapter->phy_write = netxen_niu_gbe_phy_write;
  209. adapter->init_niu = netxen_nic_init_niu_gb;
  210. adapter->stop_port = netxen_niu_disable_gbe_port;
  211. break;
  212. case NETXEN_NIC_XGBE:
  213. adapter->enable_phy_interrupts =
  214. netxen_niu_xgbe_enable_phy_interrupts;
  215. adapter->disable_phy_interrupts =
  216. netxen_niu_xgbe_disable_phy_interrupts;
  217. adapter->handle_phy_intr = netxen_nic_xgbe_handle_phy_intr;
  218. adapter->macaddr_set = netxen_niu_xg_macaddr_set;
  219. adapter->set_mtu = netxen_nic_set_mtu_xgb;
  220. adapter->init_port = netxen_niu_xg_init_port;
  221. adapter->set_promisc = netxen_niu_xg_set_promiscuous_mode;
  222. adapter->unset_promisc = netxen_niu_xg_set_promiscuous_mode;
  223. adapter->stop_port = netxen_niu_disable_xg_port;
  224. break;
  225. default:
  226. break;
  227. }
  228. }
  229. /*
  230. * netxen_decode_crb_addr(0 - utility to translate from internal Phantom CRB
  231. * address to external PCI CRB address.
  232. */
  233. u32 netxen_decode_crb_addr(u32 addr)
  234. {
  235. int i;
  236. u32 base_addr, offset, pci_base;
  237. crb_addr_transform_setup();
  238. pci_base = NETXEN_ADDR_ERROR;
  239. base_addr = addr & 0xfff00000;
  240. offset = addr & 0x000fffff;
  241. for (i = 0; i < NETXEN_MAX_CRB_XFORM; i++) {
  242. if (crb_addr_xform[i] == base_addr) {
  243. pci_base = i << 20;
  244. break;
  245. }
  246. }
  247. if (pci_base == NETXEN_ADDR_ERROR)
  248. return pci_base;
  249. else
  250. return (pci_base + offset);
  251. }
  252. static long rom_max_timeout = 100;
  253. static long rom_lock_timeout = 10000;
  254. static long rom_write_timeout = 700;
  255. static inline int rom_lock(struct netxen_adapter *adapter)
  256. {
  257. int iter;
  258. u32 done = 0;
  259. int timeout = 0;
  260. while (!done) {
  261. /* acquire semaphore2 from PCI HW block */
  262. netxen_nic_read_w0(adapter, NETXEN_PCIE_REG(PCIE_SEM2_LOCK),
  263. &done);
  264. if (done == 1)
  265. break;
  266. if (timeout >= rom_lock_timeout)
  267. return -EIO;
  268. timeout++;
  269. /*
  270. * Yield CPU
  271. */
  272. if (!in_atomic())
  273. schedule();
  274. else {
  275. for (iter = 0; iter < 20; iter++)
  276. cpu_relax(); /*This a nop instr on i386 */
  277. }
  278. }
  279. netxen_nic_reg_write(adapter, NETXEN_ROM_LOCK_ID, ROM_LOCK_DRIVER);
  280. return 0;
  281. }
  282. int netxen_wait_rom_done(struct netxen_adapter *adapter)
  283. {
  284. long timeout = 0;
  285. long done = 0;
  286. while (done == 0) {
  287. done = netxen_nic_reg_read(adapter, NETXEN_ROMUSB_GLB_STATUS);
  288. done &= 2;
  289. timeout++;
  290. if (timeout >= rom_max_timeout) {
  291. printk("Timeout reached waiting for rom done");
  292. return -EIO;
  293. }
  294. }
  295. return 0;
  296. }
  297. static inline int netxen_rom_wren(struct netxen_adapter *adapter)
  298. {
  299. /* Set write enable latch in ROM status register */
  300. netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ABYTE_CNT, 0);
  301. netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_INSTR_OPCODE,
  302. M25P_INSTR_WREN);
  303. if (netxen_wait_rom_done(adapter)) {
  304. return -1;
  305. }
  306. return 0;
  307. }
  308. static inline unsigned int netxen_rdcrbreg(struct netxen_adapter *adapter,
  309. unsigned int addr)
  310. {
  311. unsigned int data = 0xdeaddead;
  312. data = netxen_nic_reg_read(adapter, addr);
  313. return data;
  314. }
  315. static inline int netxen_do_rom_rdsr(struct netxen_adapter *adapter)
  316. {
  317. netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_INSTR_OPCODE,
  318. M25P_INSTR_RDSR);
  319. if (netxen_wait_rom_done(adapter)) {
  320. return -1;
  321. }
  322. return netxen_rdcrbreg(adapter, NETXEN_ROMUSB_ROM_RDATA);
  323. }
  324. static inline void netxen_rom_unlock(struct netxen_adapter *adapter)
  325. {
  326. u32 val;
  327. /* release semaphore2 */
  328. netxen_nic_read_w0(adapter, NETXEN_PCIE_REG(PCIE_SEM2_UNLOCK), &val);
  329. }
  330. int netxen_rom_wip_poll(struct netxen_adapter *adapter)
  331. {
  332. long timeout = 0;
  333. long wip = 1;
  334. int val;
  335. netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ABYTE_CNT, 0);
  336. while (wip != 0) {
  337. val = netxen_do_rom_rdsr(adapter);
  338. wip = val & 1;
  339. timeout++;
  340. if (timeout > rom_max_timeout) {
  341. return -1;
  342. }
  343. }
  344. return 0;
  345. }
  346. static inline int do_rom_fast_write(struct netxen_adapter *adapter, int addr,
  347. int data)
  348. {
  349. if (netxen_rom_wren(adapter)) {
  350. return -1;
  351. }
  352. netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_WDATA, data);
  353. netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ADDRESS, addr);
  354. netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ABYTE_CNT, 3);
  355. netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_INSTR_OPCODE,
  356. M25P_INSTR_PP);
  357. if (netxen_wait_rom_done(adapter)) {
  358. netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ABYTE_CNT, 0);
  359. return -1;
  360. }
  361. return netxen_rom_wip_poll(adapter);
  362. }
  363. static inline int
  364. do_rom_fast_read(struct netxen_adapter *adapter, int addr, int *valp)
  365. {
  366. if (jiffies > (last_schedule_time + (8 * HZ))) {
  367. last_schedule_time = jiffies;
  368. schedule();
  369. }
  370. netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ADDRESS, addr);
  371. netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ABYTE_CNT, 3);
  372. udelay(100); /* prevent bursting on CRB */
  373. netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_DUMMY_BYTE_CNT, 0);
  374. netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_INSTR_OPCODE, 0xb);
  375. if (netxen_wait_rom_done(adapter)) {
  376. printk("Error waiting for rom done\n");
  377. return -EIO;
  378. }
  379. /* reset abyte_cnt and dummy_byte_cnt */
  380. netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ABYTE_CNT, 0);
  381. udelay(100); /* prevent bursting on CRB */
  382. netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_DUMMY_BYTE_CNT, 0);
  383. *valp = netxen_nic_reg_read(adapter, NETXEN_ROMUSB_ROM_RDATA);
  384. return 0;
  385. }
  386. static inline int
  387. do_rom_fast_read_words(struct netxen_adapter *adapter, int addr,
  388. u8 *bytes, size_t size)
  389. {
  390. int addridx;
  391. int ret = 0;
  392. for (addridx = addr; addridx < (addr + size); addridx += 4) {
  393. ret = do_rom_fast_read(adapter, addridx, (int *)bytes);
  394. if (ret != 0)
  395. break;
  396. *(int *)bytes = cpu_to_le32(*(int *)bytes);
  397. bytes += 4;
  398. }
  399. return ret;
  400. }
  401. int
  402. netxen_rom_fast_read_words(struct netxen_adapter *adapter, int addr,
  403. u8 *bytes, size_t size)
  404. {
  405. int ret;
  406. ret = rom_lock(adapter);
  407. if (ret < 0)
  408. return ret;
  409. ret = do_rom_fast_read_words(adapter, addr, bytes, size);
  410. netxen_rom_unlock(adapter);
  411. return ret;
  412. }
  413. int netxen_rom_fast_read(struct netxen_adapter *adapter, int addr, int *valp)
  414. {
  415. int ret;
  416. if (rom_lock(adapter) != 0)
  417. return -EIO;
  418. ret = do_rom_fast_read(adapter, addr, valp);
  419. netxen_rom_unlock(adapter);
  420. return ret;
  421. }
  422. int netxen_rom_fast_write(struct netxen_adapter *adapter, int addr, int data)
  423. {
  424. int ret = 0;
  425. if (rom_lock(adapter) != 0) {
  426. return -1;
  427. }
  428. ret = do_rom_fast_write(adapter, addr, data);
  429. netxen_rom_unlock(adapter);
  430. return ret;
  431. }
  432. static inline int do_rom_fast_write_words(struct netxen_adapter *adapter,
  433. int addr, u8 *bytes, size_t size)
  434. {
  435. int addridx = addr;
  436. int ret = 0;
  437. while (addridx < (addr + size)) {
  438. int last_attempt = 0;
  439. int timeout = 0;
  440. int data;
  441. data = le32_to_cpu((*(u32*)bytes));
  442. ret = do_rom_fast_write(adapter, addridx, data);
  443. if (ret < 0)
  444. return ret;
  445. while(1) {
  446. int data1;
  447. ret = do_rom_fast_read(adapter, addridx, &data1);
  448. if (ret < 0)
  449. return ret;
  450. if (data1 == data)
  451. break;
  452. if (timeout++ >= rom_write_timeout) {
  453. if (last_attempt++ < 4) {
  454. ret = do_rom_fast_write(adapter,
  455. addridx, data);
  456. if (ret < 0)
  457. return ret;
  458. }
  459. else {
  460. printk(KERN_INFO "Data write did not "
  461. "succeed at address 0x%x\n", addridx);
  462. break;
  463. }
  464. }
  465. }
  466. bytes += 4;
  467. addridx += 4;
  468. }
  469. return ret;
  470. }
  471. int netxen_rom_fast_write_words(struct netxen_adapter *adapter, int addr,
  472. u8 *bytes, size_t size)
  473. {
  474. int ret = 0;
  475. ret = rom_lock(adapter);
  476. if (ret < 0)
  477. return ret;
  478. ret = do_rom_fast_write_words(adapter, addr, bytes, size);
  479. netxen_rom_unlock(adapter);
  480. return ret;
  481. }
  482. int netxen_rom_wrsr(struct netxen_adapter *adapter, int data)
  483. {
  484. int ret;
  485. ret = netxen_rom_wren(adapter);
  486. if (ret < 0)
  487. return ret;
  488. netxen_crb_writelit_adapter(adapter, NETXEN_ROMUSB_ROM_WDATA, data);
  489. netxen_crb_writelit_adapter(adapter,
  490. NETXEN_ROMUSB_ROM_INSTR_OPCODE, 0x1);
  491. ret = netxen_wait_rom_done(adapter);
  492. if (ret < 0)
  493. return ret;
  494. return netxen_rom_wip_poll(adapter);
  495. }
  496. int netxen_rom_rdsr(struct netxen_adapter *adapter)
  497. {
  498. int ret;
  499. ret = rom_lock(adapter);
  500. if (ret < 0)
  501. return ret;
  502. ret = netxen_do_rom_rdsr(adapter);
  503. netxen_rom_unlock(adapter);
  504. return ret;
  505. }
  506. int netxen_backup_crbinit(struct netxen_adapter *adapter)
  507. {
  508. int ret = FLASH_SUCCESS;
  509. int val;
  510. char *buffer = kmalloc(NETXEN_FLASH_SECTOR_SIZE, GFP_KERNEL);
  511. if (!buffer)
  512. return -ENOMEM;
  513. /* unlock sector 63 */
  514. val = netxen_rom_rdsr(adapter);
  515. val = val & 0xe3;
  516. ret = netxen_rom_wrsr(adapter, val);
  517. if (ret != FLASH_SUCCESS)
  518. goto out_kfree;
  519. ret = netxen_rom_wip_poll(adapter);
  520. if (ret != FLASH_SUCCESS)
  521. goto out_kfree;
  522. /* copy sector 0 to sector 63 */
  523. ret = netxen_rom_fast_read_words(adapter, NETXEN_CRBINIT_START,
  524. buffer, NETXEN_FLASH_SECTOR_SIZE);
  525. if (ret != FLASH_SUCCESS)
  526. goto out_kfree;
  527. ret = netxen_rom_fast_write_words(adapter, NETXEN_FIXED_START,
  528. buffer, NETXEN_FLASH_SECTOR_SIZE);
  529. if (ret != FLASH_SUCCESS)
  530. goto out_kfree;
  531. /* lock sector 63 */
  532. val = netxen_rom_rdsr(adapter);
  533. if (!(val & 0x8)) {
  534. val |= (0x1 << 2);
  535. /* lock sector 63 */
  536. if (netxen_rom_wrsr(adapter, val) == 0) {
  537. ret = netxen_rom_wip_poll(adapter);
  538. if (ret != FLASH_SUCCESS)
  539. goto out_kfree;
  540. /* lock SR writes */
  541. ret = netxen_rom_wip_poll(adapter);
  542. if (ret != FLASH_SUCCESS)
  543. goto out_kfree;
  544. }
  545. }
  546. out_kfree:
  547. kfree(buffer);
  548. return ret;
  549. }
  550. int netxen_do_rom_se(struct netxen_adapter *adapter, int addr)
  551. {
  552. netxen_rom_wren(adapter);
  553. netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ADDRESS, addr);
  554. netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ABYTE_CNT, 3);
  555. netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_INSTR_OPCODE,
  556. M25P_INSTR_SE);
  557. if (netxen_wait_rom_done(adapter)) {
  558. netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ABYTE_CNT, 0);
  559. return -1;
  560. }
  561. return netxen_rom_wip_poll(adapter);
  562. }
  563. void check_erased_flash(struct netxen_adapter *adapter, int addr)
  564. {
  565. int i;
  566. int val;
  567. int count = 0, erased_errors = 0;
  568. int range;
  569. range = (addr == NETXEN_USER_START) ?
  570. NETXEN_FIXED_START : addr + NETXEN_FLASH_SECTOR_SIZE;
  571. for (i = addr; i < range; i += 4) {
  572. netxen_rom_fast_read(adapter, i, &val);
  573. if (val != 0xffffffff)
  574. erased_errors++;
  575. count++;
  576. }
  577. if (erased_errors)
  578. printk(KERN_INFO "0x%x out of 0x%x words fail to be erased "
  579. "for sector address: %x\n", erased_errors, count, addr);
  580. }
  581. int netxen_rom_se(struct netxen_adapter *adapter, int addr)
  582. {
  583. int ret = 0;
  584. if (rom_lock(adapter) != 0) {
  585. return -1;
  586. }
  587. ret = netxen_do_rom_se(adapter, addr);
  588. netxen_rom_unlock(adapter);
  589. msleep(30);
  590. check_erased_flash(adapter, addr);
  591. return ret;
  592. }
  593. int
  594. netxen_flash_erase_sections(struct netxen_adapter *adapter, int start, int end)
  595. {
  596. int ret = FLASH_SUCCESS;
  597. int i;
  598. for (i = start; i < end; i++) {
  599. ret = netxen_rom_se(adapter, i * NETXEN_FLASH_SECTOR_SIZE);
  600. if (ret)
  601. break;
  602. ret = netxen_rom_wip_poll(adapter);
  603. if (ret < 0)
  604. return ret;
  605. }
  606. return ret;
  607. }
  608. int
  609. netxen_flash_erase_secondary(struct netxen_adapter *adapter)
  610. {
  611. int ret = FLASH_SUCCESS;
  612. int start, end;
  613. start = NETXEN_SECONDARY_START / NETXEN_FLASH_SECTOR_SIZE;
  614. end = NETXEN_USER_START / NETXEN_FLASH_SECTOR_SIZE;
  615. ret = netxen_flash_erase_sections(adapter, start, end);
  616. return ret;
  617. }
  618. int
  619. netxen_flash_erase_primary(struct netxen_adapter *adapter)
  620. {
  621. int ret = FLASH_SUCCESS;
  622. int start, end;
  623. start = NETXEN_PRIMARY_START / NETXEN_FLASH_SECTOR_SIZE;
  624. end = NETXEN_SECONDARY_START / NETXEN_FLASH_SECTOR_SIZE;
  625. ret = netxen_flash_erase_sections(adapter, start, end);
  626. return ret;
  627. }
  628. void netxen_halt_pegs(struct netxen_adapter *adapter)
  629. {
  630. netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_0 + 0x3c, 1);
  631. netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_1 + 0x3c, 1);
  632. netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_2 + 0x3c, 1);
  633. netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_3 + 0x3c, 1);
  634. }
  635. int netxen_flash_unlock(struct netxen_adapter *adapter)
  636. {
  637. int ret = 0;
  638. ret = netxen_rom_wrsr(adapter, 0);
  639. if (ret < 0)
  640. return ret;
  641. ret = netxen_rom_wren(adapter);
  642. if (ret < 0)
  643. return ret;
  644. return ret;
  645. }
  646. #define NETXEN_BOARDTYPE 0x4008
  647. #define NETXEN_BOARDNUM 0x400c
  648. #define NETXEN_CHIPNUM 0x4010
  649. #define NETXEN_ROMBUS_RESET 0xFFFFFFFF
  650. #define NETXEN_ROM_FIRST_BARRIER 0x800000000ULL
  651. #define NETXEN_ROM_FOUND_INIT 0x400
  652. int netxen_pinit_from_rom(struct netxen_adapter *adapter, int verbose)
  653. {
  654. int addr, val, status;
  655. int n, i;
  656. int init_delay = 0;
  657. struct crb_addr_pair *buf;
  658. u32 off;
  659. /* resetall */
  660. status = netxen_nic_get_board_info(adapter);
  661. if (status)
  662. printk("%s: netxen_pinit_from_rom: Error getting board info\n",
  663. netxen_nic_driver_name);
  664. netxen_crb_writelit_adapter(adapter, NETXEN_ROMUSB_GLB_SW_RESET,
  665. NETXEN_ROMBUS_RESET);
  666. if (verbose) {
  667. int val;
  668. if (netxen_rom_fast_read(adapter, NETXEN_BOARDTYPE, &val) == 0)
  669. printk("P2 ROM board type: 0x%08x\n", val);
  670. else
  671. printk("Could not read board type\n");
  672. if (netxen_rom_fast_read(adapter, NETXEN_BOARDNUM, &val) == 0)
  673. printk("P2 ROM board num: 0x%08x\n", val);
  674. else
  675. printk("Could not read board number\n");
  676. if (netxen_rom_fast_read(adapter, NETXEN_CHIPNUM, &val) == 0)
  677. printk("P2 ROM chip num: 0x%08x\n", val);
  678. else
  679. printk("Could not read chip number\n");
  680. }
  681. if (netxen_rom_fast_read(adapter, 0, &n) == 0
  682. && (n & NETXEN_ROM_FIRST_BARRIER)) {
  683. n &= ~NETXEN_ROM_ROUNDUP;
  684. if (n < NETXEN_ROM_FOUND_INIT) {
  685. if (verbose)
  686. printk("%s: %d CRB init values found"
  687. " in ROM.\n", netxen_nic_driver_name, n);
  688. } else {
  689. printk("%s:n=0x%x Error! NetXen card flash not"
  690. " initialized.\n", __FUNCTION__, n);
  691. return -EIO;
  692. }
  693. buf = kcalloc(n, sizeof(struct crb_addr_pair), GFP_KERNEL);
  694. if (buf == NULL) {
  695. printk("%s: netxen_pinit_from_rom: Unable to calloc "
  696. "memory.\n", netxen_nic_driver_name);
  697. return -ENOMEM;
  698. }
  699. for (i = 0; i < n; i++) {
  700. if (netxen_rom_fast_read(adapter, 8 * i + 4, &val) != 0
  701. || netxen_rom_fast_read(adapter, 8 * i + 8,
  702. &addr) != 0)
  703. return -EIO;
  704. buf[i].addr = addr;
  705. buf[i].data = val;
  706. if (verbose)
  707. printk("%s: PCI: 0x%08x == 0x%08x\n",
  708. netxen_nic_driver_name, (unsigned int)
  709. netxen_decode_crb_addr(addr), val);
  710. }
  711. for (i = 0; i < n; i++) {
  712. off = netxen_decode_crb_addr(buf[i].addr);
  713. if (off == NETXEN_ADDR_ERROR) {
  714. printk(KERN_ERR"CRB init value out of range %x\n",
  715. buf[i].addr);
  716. continue;
  717. }
  718. off += NETXEN_PCI_CRBSPACE;
  719. /* skipping cold reboot MAGIC */
  720. if (off == NETXEN_CAM_RAM(0x1fc))
  721. continue;
  722. /* After writing this register, HW needs time for CRB */
  723. /* to quiet down (else crb_window returns 0xffffffff) */
  724. if (off == NETXEN_ROMUSB_GLB_SW_RESET) {
  725. init_delay = 1;
  726. /* hold xdma in reset also */
  727. buf[i].data = NETXEN_NIC_XDMA_RESET;
  728. }
  729. if (ADDR_IN_WINDOW1(off)) {
  730. writel(buf[i].data,
  731. NETXEN_CRB_NORMALIZE(adapter, off));
  732. } else {
  733. netxen_nic_pci_change_crbwindow(adapter, 0);
  734. writel(buf[i].data,
  735. pci_base_offset(adapter, off));
  736. netxen_nic_pci_change_crbwindow(adapter, 1);
  737. }
  738. if (init_delay == 1) {
  739. ssleep(1);
  740. init_delay = 0;
  741. }
  742. msleep(1);
  743. }
  744. kfree(buf);
  745. /* disable_peg_cache_all */
  746. /* unreset_net_cache */
  747. netxen_nic_hw_read_wx(adapter, NETXEN_ROMUSB_GLB_SW_RESET, &val,
  748. 4);
  749. netxen_crb_writelit_adapter(adapter, NETXEN_ROMUSB_GLB_SW_RESET,
  750. (val & 0xffffff0f));
  751. /* p2dn replyCount */
  752. netxen_crb_writelit_adapter(adapter,
  753. NETXEN_CRB_PEG_NET_D + 0xec, 0x1e);
  754. /* disable_peg_cache 0 */
  755. netxen_crb_writelit_adapter(adapter,
  756. NETXEN_CRB_PEG_NET_D + 0x4c, 8);
  757. /* disable_peg_cache 1 */
  758. netxen_crb_writelit_adapter(adapter,
  759. NETXEN_CRB_PEG_NET_I + 0x4c, 8);
  760. /* peg_clr_all */
  761. /* peg_clr 0 */
  762. netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_0 + 0x8,
  763. 0);
  764. netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_0 + 0xc,
  765. 0);
  766. /* peg_clr 1 */
  767. netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_1 + 0x8,
  768. 0);
  769. netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_1 + 0xc,
  770. 0);
  771. /* peg_clr 2 */
  772. netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_2 + 0x8,
  773. 0);
  774. netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_2 + 0xc,
  775. 0);
  776. /* peg_clr 3 */
  777. netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_3 + 0x8,
  778. 0);
  779. netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_3 + 0xc,
  780. 0);
  781. }
  782. return 0;
  783. }
  784. int netxen_initialize_adapter_offload(struct netxen_adapter *adapter)
  785. {
  786. uint64_t addr;
  787. uint32_t hi;
  788. uint32_t lo;
  789. adapter->dummy_dma.addr =
  790. pci_alloc_consistent(adapter->ahw.pdev,
  791. NETXEN_HOST_DUMMY_DMA_SIZE,
  792. &adapter->dummy_dma.phys_addr);
  793. if (adapter->dummy_dma.addr == NULL) {
  794. printk("%s: ERROR: Could not allocate dummy DMA memory\n",
  795. __FUNCTION__);
  796. return -ENOMEM;
  797. }
  798. addr = (uint64_t) adapter->dummy_dma.phys_addr;
  799. hi = (addr >> 32) & 0xffffffff;
  800. lo = addr & 0xffffffff;
  801. writel(hi, NETXEN_CRB_NORMALIZE(adapter, CRB_HOST_DUMMY_BUF_ADDR_HI));
  802. writel(lo, NETXEN_CRB_NORMALIZE(adapter, CRB_HOST_DUMMY_BUF_ADDR_LO));
  803. return 0;
  804. }
  805. void netxen_free_adapter_offload(struct netxen_adapter *adapter)
  806. {
  807. if (adapter->dummy_dma.addr) {
  808. writel(0, NETXEN_CRB_NORMALIZE(adapter,
  809. CRB_HOST_DUMMY_BUF_ADDR_HI));
  810. writel(0, NETXEN_CRB_NORMALIZE(adapter,
  811. CRB_HOST_DUMMY_BUF_ADDR_LO));
  812. pci_free_consistent(adapter->ahw.pdev,
  813. NETXEN_HOST_DUMMY_DMA_SIZE,
  814. adapter->dummy_dma.addr,
  815. adapter->dummy_dma.phys_addr);
  816. adapter->dummy_dma.addr = NULL;
  817. }
  818. }
  819. void netxen_phantom_init(struct netxen_adapter *adapter, int pegtune_val)
  820. {
  821. u32 val = 0;
  822. int loops = 0;
  823. if (!pegtune_val) {
  824. val = readl(NETXEN_CRB_NORMALIZE(adapter, CRB_CMDPEG_STATE));
  825. while (val != PHAN_INITIALIZE_COMPLETE &&
  826. val != PHAN_INITIALIZE_ACK && loops < 200000) {
  827. udelay(100);
  828. schedule();
  829. val =
  830. readl(NETXEN_CRB_NORMALIZE
  831. (adapter, CRB_CMDPEG_STATE));
  832. loops++;
  833. }
  834. if (val != PHAN_INITIALIZE_COMPLETE)
  835. printk("WARNING: Initial boot wait loop failed...\n");
  836. }
  837. }
  838. int netxen_nic_rx_has_work(struct netxen_adapter *adapter)
  839. {
  840. int ctx;
  841. for (ctx = 0; ctx < MAX_RCV_CTX; ++ctx) {
  842. struct netxen_recv_context *recv_ctx =
  843. &(adapter->recv_ctx[ctx]);
  844. u32 consumer;
  845. struct status_desc *desc_head;
  846. struct status_desc *desc;
  847. consumer = recv_ctx->status_rx_consumer;
  848. desc_head = recv_ctx->rcv_status_desc_head;
  849. desc = &desc_head[consumer];
  850. if (netxen_get_sts_owner(desc) & STATUS_OWNER_HOST)
  851. return 1;
  852. }
  853. return 0;
  854. }
  855. static inline int netxen_nic_check_temp(struct netxen_adapter *adapter)
  856. {
  857. struct net_device *netdev = adapter->netdev;
  858. uint32_t temp, temp_state, temp_val;
  859. int rv = 0;
  860. temp = readl(NETXEN_CRB_NORMALIZE(adapter, CRB_TEMP_STATE));
  861. temp_state = nx_get_temp_state(temp);
  862. temp_val = nx_get_temp_val(temp);
  863. if (temp_state == NX_TEMP_PANIC) {
  864. printk(KERN_ALERT
  865. "%s: Device temperature %d degrees C exceeds"
  866. " maximum allowed. Hardware has been shut down.\n",
  867. netxen_nic_driver_name, temp_val);
  868. netif_carrier_off(netdev);
  869. netif_stop_queue(netdev);
  870. rv = 1;
  871. } else if (temp_state == NX_TEMP_WARN) {
  872. if (adapter->temp == NX_TEMP_NORMAL) {
  873. printk(KERN_ALERT
  874. "%s: Device temperature %d degrees C "
  875. "exceeds operating range."
  876. " Immediate action needed.\n",
  877. netxen_nic_driver_name, temp_val);
  878. }
  879. } else {
  880. if (adapter->temp == NX_TEMP_WARN) {
  881. printk(KERN_INFO
  882. "%s: Device temperature is now %d degrees C"
  883. " in normal range.\n", netxen_nic_driver_name,
  884. temp_val);
  885. }
  886. }
  887. adapter->temp = temp_state;
  888. return rv;
  889. }
  890. void netxen_watchdog_task(struct work_struct *work)
  891. {
  892. struct net_device *netdev;
  893. struct netxen_adapter *adapter =
  894. container_of(work, struct netxen_adapter, watchdog_task);
  895. if ((adapter->portnum == 0) && netxen_nic_check_temp(adapter))
  896. return;
  897. if (adapter->handle_phy_intr)
  898. adapter->handle_phy_intr(adapter);
  899. netdev = adapter->netdev;
  900. if ((netif_running(netdev)) && !netif_carrier_ok(netdev) &&
  901. netxen_nic_link_ok(adapter) ) {
  902. printk(KERN_INFO "%s %s (port %d), Link is up\n",
  903. netxen_nic_driver_name, netdev->name, adapter->portnum);
  904. netif_carrier_on(netdev);
  905. netif_wake_queue(netdev);
  906. } else if(!(netif_running(netdev)) && netif_carrier_ok(netdev)) {
  907. printk(KERN_ERR "%s %s Link is Down\n",
  908. netxen_nic_driver_name, netdev->name);
  909. netif_carrier_off(netdev);
  910. netif_stop_queue(netdev);
  911. }
  912. mod_timer(&adapter->watchdog_timer, jiffies + 2 * HZ);
  913. }
  914. /*
  915. * netxen_process_rcv() send the received packet to the protocol stack.
  916. * and if the number of receives exceeds RX_BUFFERS_REFILL, then we
  917. * invoke the routine to send more rx buffers to the Phantom...
  918. */
  919. void
  920. netxen_process_rcv(struct netxen_adapter *adapter, int ctxid,
  921. struct status_desc *desc)
  922. {
  923. struct pci_dev *pdev = adapter->pdev;
  924. struct net_device *netdev = adapter->netdev;
  925. int index = netxen_get_sts_refhandle(desc);
  926. struct netxen_recv_context *recv_ctx = &(adapter->recv_ctx[ctxid]);
  927. struct netxen_rx_buffer *buffer;
  928. struct sk_buff *skb;
  929. u32 length = netxen_get_sts_totallength(desc);
  930. u32 desc_ctx;
  931. struct netxen_rcv_desc_ctx *rcv_desc;
  932. int ret;
  933. desc_ctx = netxen_get_sts_type(desc);
  934. if (unlikely(desc_ctx >= NUM_RCV_DESC_RINGS)) {
  935. printk("%s: %s Bad Rcv descriptor ring\n",
  936. netxen_nic_driver_name, netdev->name);
  937. return;
  938. }
  939. rcv_desc = &recv_ctx->rcv_desc[desc_ctx];
  940. if (unlikely(index > rcv_desc->max_rx_desc_count)) {
  941. DPRINTK(ERR, "Got a buffer index:%x Max is %x\n",
  942. index, rcv_desc->max_rx_desc_count);
  943. return;
  944. }
  945. buffer = &rcv_desc->rx_buf_arr[index];
  946. if (desc_ctx == RCV_DESC_LRO_CTXID) {
  947. buffer->lro_current_frags++;
  948. if (netxen_get_sts_desc_lro_last_frag(desc)) {
  949. buffer->lro_expected_frags =
  950. netxen_get_sts_desc_lro_cnt(desc);
  951. buffer->lro_length = length;
  952. }
  953. if (buffer->lro_current_frags != buffer->lro_expected_frags) {
  954. if (buffer->lro_expected_frags != 0) {
  955. printk("LRO: (refhandle:%x) recv frag."
  956. "wait for last. flags: %x expected:%d"
  957. "have:%d\n", index,
  958. netxen_get_sts_desc_lro_last_frag(desc),
  959. buffer->lro_expected_frags,
  960. buffer->lro_current_frags);
  961. }
  962. return;
  963. }
  964. }
  965. pci_unmap_single(pdev, buffer->dma, rcv_desc->dma_size,
  966. PCI_DMA_FROMDEVICE);
  967. skb = (struct sk_buff *)buffer->skb;
  968. if (likely(netxen_get_sts_status(desc) == STATUS_CKSUM_OK)) {
  969. adapter->stats.csummed++;
  970. skb->ip_summed = CHECKSUM_UNNECESSARY;
  971. }
  972. if (desc_ctx == RCV_DESC_LRO_CTXID) {
  973. /* True length was only available on the last pkt */
  974. skb_put(skb, buffer->lro_length);
  975. } else {
  976. skb_put(skb, length);
  977. }
  978. skb->protocol = eth_type_trans(skb, netdev);
  979. ret = netif_receive_skb(skb);
  980. /*
  981. * RH: Do we need these stats on a regular basis. Can we get it from
  982. * Linux stats.
  983. */
  984. switch (ret) {
  985. case NET_RX_SUCCESS:
  986. adapter->stats.uphappy++;
  987. break;
  988. case NET_RX_CN_LOW:
  989. adapter->stats.uplcong++;
  990. break;
  991. case NET_RX_CN_MOD:
  992. adapter->stats.upmcong++;
  993. break;
  994. case NET_RX_CN_HIGH:
  995. adapter->stats.uphcong++;
  996. break;
  997. case NET_RX_DROP:
  998. adapter->stats.updropped++;
  999. break;
  1000. default:
  1001. adapter->stats.updunno++;
  1002. break;
  1003. }
  1004. netdev->last_rx = jiffies;
  1005. rcv_desc->rcv_free++;
  1006. rcv_desc->rcv_pending--;
  1007. /*
  1008. * We just consumed one buffer so post a buffer.
  1009. */
  1010. buffer->skb = NULL;
  1011. buffer->state = NETXEN_BUFFER_FREE;
  1012. buffer->lro_current_frags = 0;
  1013. buffer->lro_expected_frags = 0;
  1014. adapter->stats.no_rcv++;
  1015. adapter->stats.rxbytes += length;
  1016. }
  1017. /* Process Receive status ring */
  1018. u32 netxen_process_rcv_ring(struct netxen_adapter *adapter, int ctxid, int max)
  1019. {
  1020. struct netxen_recv_context *recv_ctx = &(adapter->recv_ctx[ctxid]);
  1021. struct status_desc *desc_head = recv_ctx->rcv_status_desc_head;
  1022. struct status_desc *desc; /* used to read status desc here */
  1023. u32 consumer = recv_ctx->status_rx_consumer;
  1024. u32 producer = 0;
  1025. int count = 0, ring;
  1026. DPRINTK(INFO, "procesing receive\n");
  1027. /*
  1028. * we assume in this case that there is only one port and that is
  1029. * port #1...changes need to be done in firmware to indicate port
  1030. * number as part of the descriptor. This way we will be able to get
  1031. * the netdev which is associated with that device.
  1032. */
  1033. while (count < max) {
  1034. desc = &desc_head[consumer];
  1035. if (!(netxen_get_sts_owner(desc) & STATUS_OWNER_HOST)) {
  1036. DPRINTK(ERR, "desc %p ownedby %x\n", desc,
  1037. netxen_get_sts_owner(desc));
  1038. break;
  1039. }
  1040. netxen_process_rcv(adapter, ctxid, desc);
  1041. netxen_clear_sts_owner(desc);
  1042. netxen_set_sts_owner(desc, STATUS_OWNER_PHANTOM);
  1043. consumer = (consumer + 1) & (adapter->max_rx_desc_count - 1);
  1044. count++;
  1045. }
  1046. if (count) {
  1047. for (ring = 0; ring < NUM_RCV_DESC_RINGS; ring++) {
  1048. netxen_post_rx_buffers_nodb(adapter, ctxid, ring);
  1049. }
  1050. }
  1051. /* update the consumer index in phantom */
  1052. if (count) {
  1053. recv_ctx->status_rx_consumer = consumer;
  1054. recv_ctx->status_rx_producer = producer;
  1055. /* Window = 1 */
  1056. writel(consumer,
  1057. NETXEN_CRB_NORMALIZE(adapter,
  1058. recv_crb_registers[adapter->portnum].
  1059. crb_rcv_status_consumer));
  1060. }
  1061. return count;
  1062. }
  1063. /* Process Command status ring */
  1064. int netxen_process_cmd_ring(unsigned long data)
  1065. {
  1066. u32 last_consumer;
  1067. u32 consumer;
  1068. struct netxen_adapter *adapter = (struct netxen_adapter *)data;
  1069. int count1 = 0;
  1070. int count2 = 0;
  1071. struct netxen_cmd_buffer *buffer;
  1072. struct pci_dev *pdev;
  1073. struct netxen_skb_frag *frag;
  1074. u32 i;
  1075. struct sk_buff *skb = NULL;
  1076. int done;
  1077. spin_lock(&adapter->tx_lock);
  1078. last_consumer = adapter->last_cmd_consumer;
  1079. DPRINTK(INFO, "procesing xmit complete\n");
  1080. /* we assume in this case that there is only one port and that is
  1081. * port #1...changes need to be done in firmware to indicate port
  1082. * number as part of the descriptor. This way we will be able to get
  1083. * the netdev which is associated with that device.
  1084. */
  1085. consumer = le32_to_cpu(*(adapter->cmd_consumer));
  1086. if (last_consumer == consumer) { /* Ring is empty */
  1087. DPRINTK(INFO, "last_consumer %d == consumer %d\n",
  1088. last_consumer, consumer);
  1089. spin_unlock(&adapter->tx_lock);
  1090. return 1;
  1091. }
  1092. adapter->proc_cmd_buf_counter++;
  1093. /*
  1094. * Not needed - does not seem to be used anywhere.
  1095. * adapter->cmd_consumer = consumer;
  1096. */
  1097. spin_unlock(&adapter->tx_lock);
  1098. while ((last_consumer != consumer) && (count1 < MAX_STATUS_HANDLE)) {
  1099. buffer = &adapter->cmd_buf_arr[last_consumer];
  1100. pdev = adapter->pdev;
  1101. frag = &buffer->frag_array[0];
  1102. skb = buffer->skb;
  1103. if (skb && (cmpxchg(&buffer->skb, skb, 0) == skb)) {
  1104. pci_unmap_single(pdev, frag->dma, frag->length,
  1105. PCI_DMA_TODEVICE);
  1106. for (i = 1; i < buffer->frag_count; i++) {
  1107. DPRINTK(INFO, "getting fragment no %d\n", i);
  1108. frag++; /* Get the next frag */
  1109. pci_unmap_page(pdev, frag->dma, frag->length,
  1110. PCI_DMA_TODEVICE);
  1111. }
  1112. adapter->stats.skbfreed++;
  1113. dev_kfree_skb_any(skb);
  1114. skb = NULL;
  1115. } else if (adapter->proc_cmd_buf_counter == 1) {
  1116. adapter->stats.txnullskb++;
  1117. }
  1118. if (unlikely(netif_queue_stopped(adapter->netdev)
  1119. && netif_carrier_ok(adapter->netdev))
  1120. && ((jiffies - adapter->netdev->trans_start) >
  1121. adapter->netdev->watchdog_timeo)) {
  1122. SCHEDULE_WORK(&adapter->tx_timeout_task);
  1123. }
  1124. last_consumer = get_next_index(last_consumer,
  1125. adapter->max_tx_desc_count);
  1126. count1++;
  1127. }
  1128. count2 = 0;
  1129. spin_lock(&adapter->tx_lock);
  1130. if ((--adapter->proc_cmd_buf_counter) == 0) {
  1131. adapter->last_cmd_consumer = last_consumer;
  1132. while ((adapter->last_cmd_consumer != consumer)
  1133. && (count2 < MAX_STATUS_HANDLE)) {
  1134. buffer =
  1135. &adapter->cmd_buf_arr[adapter->last_cmd_consumer];
  1136. count2++;
  1137. if (buffer->skb)
  1138. break;
  1139. else
  1140. adapter->last_cmd_consumer =
  1141. get_next_index(adapter->last_cmd_consumer,
  1142. adapter->max_tx_desc_count);
  1143. }
  1144. }
  1145. if (count1 || count2) {
  1146. if (netif_queue_stopped(adapter->netdev)
  1147. && (adapter->flags & NETXEN_NETDEV_STATUS)) {
  1148. netif_wake_queue(adapter->netdev);
  1149. adapter->flags &= ~NETXEN_NETDEV_STATUS;
  1150. }
  1151. }
  1152. /*
  1153. * If everything is freed up to consumer then check if the ring is full
  1154. * If the ring is full then check if more needs to be freed and
  1155. * schedule the call back again.
  1156. *
  1157. * This happens when there are 2 CPUs. One could be freeing and the
  1158. * other filling it. If the ring is full when we get out of here and
  1159. * the card has already interrupted the host then the host can miss the
  1160. * interrupt.
  1161. *
  1162. * There is still a possible race condition and the host could miss an
  1163. * interrupt. The card has to take care of this.
  1164. */
  1165. if (adapter->last_cmd_consumer == consumer &&
  1166. (((adapter->cmd_producer + 1) %
  1167. adapter->max_tx_desc_count) == adapter->last_cmd_consumer)) {
  1168. consumer = le32_to_cpu(*(adapter->cmd_consumer));
  1169. }
  1170. done = (adapter->last_cmd_consumer == consumer);
  1171. spin_unlock(&adapter->tx_lock);
  1172. DPRINTK(INFO, "last consumer is %d in %s\n", last_consumer,
  1173. __FUNCTION__);
  1174. return (done);
  1175. }
  1176. /*
  1177. * netxen_post_rx_buffers puts buffer in the Phantom memory
  1178. */
  1179. void netxen_post_rx_buffers(struct netxen_adapter *adapter, u32 ctx, u32 ringid)
  1180. {
  1181. struct pci_dev *pdev = adapter->ahw.pdev;
  1182. struct sk_buff *skb;
  1183. struct netxen_recv_context *recv_ctx = &(adapter->recv_ctx[ctx]);
  1184. struct netxen_rcv_desc_ctx *rcv_desc = NULL;
  1185. uint producer;
  1186. struct rcv_desc *pdesc;
  1187. struct netxen_rx_buffer *buffer;
  1188. int count = 0;
  1189. int index = 0;
  1190. netxen_ctx_msg msg = 0;
  1191. dma_addr_t dma;
  1192. rcv_desc = &recv_ctx->rcv_desc[ringid];
  1193. producer = rcv_desc->producer;
  1194. index = rcv_desc->begin_alloc;
  1195. buffer = &rcv_desc->rx_buf_arr[index];
  1196. /* We can start writing rx descriptors into the phantom memory. */
  1197. while (buffer->state == NETXEN_BUFFER_FREE) {
  1198. skb = dev_alloc_skb(rcv_desc->skb_size);
  1199. if (unlikely(!skb)) {
  1200. /*
  1201. * TODO
  1202. * We need to schedule the posting of buffers to the pegs.
  1203. */
  1204. rcv_desc->begin_alloc = index;
  1205. DPRINTK(ERR, "netxen_post_rx_buffers: "
  1206. " allocated only %d buffers\n", count);
  1207. break;
  1208. }
  1209. count++; /* now there should be no failure */
  1210. pdesc = &rcv_desc->desc_head[producer];
  1211. #if defined(XGB_DEBUG)
  1212. *(unsigned long *)(skb->head) = 0xc0debabe;
  1213. if (skb_is_nonlinear(skb)) {
  1214. printk("Allocated SKB @%p is nonlinear\n");
  1215. }
  1216. #endif
  1217. skb_reserve(skb, 2);
  1218. /* This will be setup when we receive the
  1219. * buffer after it has been filled FSL TBD TBD
  1220. * skb->dev = netdev;
  1221. */
  1222. dma = pci_map_single(pdev, skb->data, rcv_desc->dma_size,
  1223. PCI_DMA_FROMDEVICE);
  1224. pdesc->addr_buffer = cpu_to_le64(dma);
  1225. buffer->skb = skb;
  1226. buffer->state = NETXEN_BUFFER_BUSY;
  1227. buffer->dma = dma;
  1228. /* make a rcv descriptor */
  1229. pdesc->reference_handle = cpu_to_le16(buffer->ref_handle);
  1230. pdesc->buffer_length = cpu_to_le32(rcv_desc->dma_size);
  1231. DPRINTK(INFO, "done writing descripter\n");
  1232. producer =
  1233. get_next_index(producer, rcv_desc->max_rx_desc_count);
  1234. index = get_next_index(index, rcv_desc->max_rx_desc_count);
  1235. buffer = &rcv_desc->rx_buf_arr[index];
  1236. }
  1237. /* if we did allocate buffers, then write the count to Phantom */
  1238. if (count) {
  1239. rcv_desc->begin_alloc = index;
  1240. rcv_desc->rcv_pending += count;
  1241. rcv_desc->producer = producer;
  1242. if (rcv_desc->rcv_free >= 32) {
  1243. rcv_desc->rcv_free = 0;
  1244. /* Window = 1 */
  1245. writel((producer - 1) &
  1246. (rcv_desc->max_rx_desc_count - 1),
  1247. NETXEN_CRB_NORMALIZE(adapter,
  1248. recv_crb_registers[
  1249. adapter->portnum].
  1250. rcv_desc_crb[ringid].
  1251. crb_rcv_producer_offset));
  1252. /*
  1253. * Write a doorbell msg to tell phanmon of change in
  1254. * receive ring producer
  1255. */
  1256. netxen_set_msg_peg_id(msg, NETXEN_RCV_PEG_DB_ID);
  1257. netxen_set_msg_privid(msg);
  1258. netxen_set_msg_count(msg,
  1259. ((producer -
  1260. 1) & (rcv_desc->
  1261. max_rx_desc_count - 1)));
  1262. netxen_set_msg_ctxid(msg, adapter->portnum);
  1263. netxen_set_msg_opcode(msg, NETXEN_RCV_PRODUCER(ringid));
  1264. writel(msg,
  1265. DB_NORMALIZE(adapter,
  1266. NETXEN_RCV_PRODUCER_OFFSET));
  1267. }
  1268. }
  1269. }
  1270. void netxen_post_rx_buffers_nodb(struct netxen_adapter *adapter, uint32_t ctx,
  1271. uint32_t ringid)
  1272. {
  1273. struct pci_dev *pdev = adapter->ahw.pdev;
  1274. struct sk_buff *skb;
  1275. struct netxen_recv_context *recv_ctx = &(adapter->recv_ctx[ctx]);
  1276. struct netxen_rcv_desc_ctx *rcv_desc = NULL;
  1277. u32 producer;
  1278. struct rcv_desc *pdesc;
  1279. struct netxen_rx_buffer *buffer;
  1280. int count = 0;
  1281. int index = 0;
  1282. rcv_desc = &recv_ctx->rcv_desc[ringid];
  1283. producer = rcv_desc->producer;
  1284. index = rcv_desc->begin_alloc;
  1285. buffer = &rcv_desc->rx_buf_arr[index];
  1286. /* We can start writing rx descriptors into the phantom memory. */
  1287. while (buffer->state == NETXEN_BUFFER_FREE) {
  1288. skb = dev_alloc_skb(rcv_desc->skb_size);
  1289. if (unlikely(!skb)) {
  1290. /*
  1291. * We need to schedule the posting of buffers to the pegs.
  1292. */
  1293. rcv_desc->begin_alloc = index;
  1294. DPRINTK(ERR, "netxen_post_rx_buffers_nodb: "
  1295. " allocated only %d buffers\n", count);
  1296. break;
  1297. }
  1298. count++; /* now there should be no failure */
  1299. pdesc = &rcv_desc->desc_head[producer];
  1300. skb_reserve(skb, 2);
  1301. /*
  1302. * This will be setup when we receive the
  1303. * buffer after it has been filled
  1304. * skb->dev = netdev;
  1305. */
  1306. buffer->skb = skb;
  1307. buffer->state = NETXEN_BUFFER_BUSY;
  1308. buffer->dma = pci_map_single(pdev, skb->data,
  1309. rcv_desc->dma_size,
  1310. PCI_DMA_FROMDEVICE);
  1311. /* make a rcv descriptor */
  1312. pdesc->reference_handle = cpu_to_le16(buffer->ref_handle);
  1313. pdesc->buffer_length = cpu_to_le32(rcv_desc->dma_size);
  1314. pdesc->addr_buffer = cpu_to_le64(buffer->dma);
  1315. DPRINTK(INFO, "done writing descripter\n");
  1316. producer =
  1317. get_next_index(producer, rcv_desc->max_rx_desc_count);
  1318. index = get_next_index(index, rcv_desc->max_rx_desc_count);
  1319. buffer = &rcv_desc->rx_buf_arr[index];
  1320. }
  1321. /* if we did allocate buffers, then write the count to Phantom */
  1322. if (count) {
  1323. rcv_desc->begin_alloc = index;
  1324. rcv_desc->rcv_pending += count;
  1325. rcv_desc->producer = producer;
  1326. if (rcv_desc->rcv_free >= 32) {
  1327. rcv_desc->rcv_free = 0;
  1328. /* Window = 1 */
  1329. writel((producer - 1) &
  1330. (rcv_desc->max_rx_desc_count - 1),
  1331. NETXEN_CRB_NORMALIZE(adapter,
  1332. recv_crb_registers[
  1333. adapter->portnum].
  1334. rcv_desc_crb[ringid].
  1335. crb_rcv_producer_offset));
  1336. wmb();
  1337. }
  1338. }
  1339. }
  1340. int netxen_nic_tx_has_work(struct netxen_adapter *adapter)
  1341. {
  1342. if (find_diff_among(adapter->last_cmd_consumer,
  1343. adapter->cmd_producer,
  1344. adapter->max_tx_desc_count) > 0)
  1345. return 1;
  1346. return 0;
  1347. }
  1348. void netxen_nic_clear_stats(struct netxen_adapter *adapter)
  1349. {
  1350. memset(&adapter->stats, 0, sizeof(adapter->stats));
  1351. return;
  1352. }