omap_hwmod.c 50 KB

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  1. /*
  2. * omap_hwmod implementation for OMAP2/3/4
  3. *
  4. * Copyright (C) 2009-2010 Nokia Corporation
  5. *
  6. * Paul Walmsley, Benoît Cousson, Kevin Hilman
  7. *
  8. * Created in collaboration with (alphabetical order): Thara Gopinath,
  9. * Tony Lindgren, Rajendra Nayak, Vikram Pandita, Sakari Poussa, Anand
  10. * Sawant, Santosh Shilimkar, Richard Woodruff
  11. *
  12. * This program is free software; you can redistribute it and/or modify
  13. * it under the terms of the GNU General Public License version 2 as
  14. * published by the Free Software Foundation.
  15. *
  16. * This code manages "OMAP modules" (on-chip devices) and their
  17. * integration with Linux device driver and bus code.
  18. *
  19. * References:
  20. * - OMAP2420 Multimedia Processor Silicon Revision 2.1.1, 2.2 (SWPU064)
  21. * - OMAP2430 Multimedia Device POP Silicon Revision 2.1 (SWPU090)
  22. * - OMAP34xx Multimedia Device Silicon Revision 3.1 (SWPU108)
  23. * - OMAP4430 Multimedia Device Silicon Revision 1.0 (SWPU140)
  24. * - Open Core Protocol Specification 2.2
  25. *
  26. * To do:
  27. * - pin mux handling
  28. * - handle IO mapping
  29. * - bus throughput & module latency measurement code
  30. *
  31. * XXX add tests at the beginning of each function to ensure the hwmod is
  32. * in the appropriate state
  33. * XXX error return values should be checked to ensure that they are
  34. * appropriate
  35. */
  36. #undef DEBUG
  37. #include <linux/kernel.h>
  38. #include <linux/errno.h>
  39. #include <linux/io.h>
  40. #include <linux/clk.h>
  41. #include <linux/delay.h>
  42. #include <linux/err.h>
  43. #include <linux/list.h>
  44. #include <linux/mutex.h>
  45. #include <plat/common.h>
  46. #include <plat/cpu.h>
  47. #include <plat/clockdomain.h>
  48. #include <plat/powerdomain.h>
  49. #include <plat/clock.h>
  50. #include <plat/omap_hwmod.h>
  51. #include <plat/prcm.h>
  52. #include "cm.h"
  53. #include "prm.h"
  54. /* Maximum microseconds to wait for OMAP module to softreset */
  55. #define MAX_MODULE_SOFTRESET_WAIT 10000
  56. /* Name of the OMAP hwmod for the MPU */
  57. #define MPU_INITIATOR_NAME "mpu"
  58. /* omap_hwmod_list contains all registered struct omap_hwmods */
  59. static LIST_HEAD(omap_hwmod_list);
  60. static DEFINE_MUTEX(omap_hwmod_mutex);
  61. /* mpu_oh: used to add/remove MPU initiator from sleepdep list */
  62. static struct omap_hwmod *mpu_oh;
  63. /* inited: 0 if omap_hwmod_init() has not yet been called; 1 otherwise */
  64. static u8 inited;
  65. /* Private functions */
  66. /**
  67. * _update_sysc_cache - return the module OCP_SYSCONFIG register, keep copy
  68. * @oh: struct omap_hwmod *
  69. *
  70. * Load the current value of the hwmod OCP_SYSCONFIG register into the
  71. * struct omap_hwmod for later use. Returns -EINVAL if the hwmod has no
  72. * OCP_SYSCONFIG register or 0 upon success.
  73. */
  74. static int _update_sysc_cache(struct omap_hwmod *oh)
  75. {
  76. if (!oh->class->sysc) {
  77. WARN(1, "omap_hwmod: %s: cannot read OCP_SYSCONFIG: not defined on hwmod's class\n", oh->name);
  78. return -EINVAL;
  79. }
  80. /* XXX ensure module interface clock is up */
  81. oh->_sysc_cache = omap_hwmod_readl(oh, oh->class->sysc->sysc_offs);
  82. if (!(oh->class->sysc->sysc_flags & SYSC_NO_CACHE))
  83. oh->_int_flags |= _HWMOD_SYSCONFIG_LOADED;
  84. return 0;
  85. }
  86. /**
  87. * _write_sysconfig - write a value to the module's OCP_SYSCONFIG register
  88. * @v: OCP_SYSCONFIG value to write
  89. * @oh: struct omap_hwmod *
  90. *
  91. * Write @v into the module class' OCP_SYSCONFIG register, if it has
  92. * one. No return value.
  93. */
  94. static void _write_sysconfig(u32 v, struct omap_hwmod *oh)
  95. {
  96. if (!oh->class->sysc) {
  97. WARN(1, "omap_hwmod: %s: cannot write OCP_SYSCONFIG: not defined on hwmod's class\n", oh->name);
  98. return;
  99. }
  100. /* XXX ensure module interface clock is up */
  101. if (oh->_sysc_cache != v) {
  102. oh->_sysc_cache = v;
  103. omap_hwmod_writel(v, oh, oh->class->sysc->sysc_offs);
  104. }
  105. }
  106. /**
  107. * _set_master_standbymode: set the OCP_SYSCONFIG MIDLEMODE field in @v
  108. * @oh: struct omap_hwmod *
  109. * @standbymode: MIDLEMODE field bits
  110. * @v: pointer to register contents to modify
  111. *
  112. * Update the master standby mode bits in @v to be @standbymode for
  113. * the @oh hwmod. Does not write to the hardware. Returns -EINVAL
  114. * upon error or 0 upon success.
  115. */
  116. static int _set_master_standbymode(struct omap_hwmod *oh, u8 standbymode,
  117. u32 *v)
  118. {
  119. u32 mstandby_mask;
  120. u8 mstandby_shift;
  121. if (!oh->class->sysc ||
  122. !(oh->class->sysc->sysc_flags & SYSC_HAS_MIDLEMODE))
  123. return -EINVAL;
  124. if (!oh->class->sysc->sysc_fields) {
  125. WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
  126. return -EINVAL;
  127. }
  128. mstandby_shift = oh->class->sysc->sysc_fields->midle_shift;
  129. mstandby_mask = (0x3 << mstandby_shift);
  130. *v &= ~mstandby_mask;
  131. *v |= __ffs(standbymode) << mstandby_shift;
  132. return 0;
  133. }
  134. /**
  135. * _set_slave_idlemode: set the OCP_SYSCONFIG SIDLEMODE field in @v
  136. * @oh: struct omap_hwmod *
  137. * @idlemode: SIDLEMODE field bits
  138. * @v: pointer to register contents to modify
  139. *
  140. * Update the slave idle mode bits in @v to be @idlemode for the @oh
  141. * hwmod. Does not write to the hardware. Returns -EINVAL upon error
  142. * or 0 upon success.
  143. */
  144. static int _set_slave_idlemode(struct omap_hwmod *oh, u8 idlemode, u32 *v)
  145. {
  146. u32 sidle_mask;
  147. u8 sidle_shift;
  148. if (!oh->class->sysc ||
  149. !(oh->class->sysc->sysc_flags & SYSC_HAS_SIDLEMODE))
  150. return -EINVAL;
  151. if (!oh->class->sysc->sysc_fields) {
  152. WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
  153. return -EINVAL;
  154. }
  155. sidle_shift = oh->class->sysc->sysc_fields->sidle_shift;
  156. sidle_mask = (0x3 << sidle_shift);
  157. *v &= ~sidle_mask;
  158. *v |= __ffs(idlemode) << sidle_shift;
  159. return 0;
  160. }
  161. /**
  162. * _set_clockactivity: set OCP_SYSCONFIG.CLOCKACTIVITY bits in @v
  163. * @oh: struct omap_hwmod *
  164. * @clockact: CLOCKACTIVITY field bits
  165. * @v: pointer to register contents to modify
  166. *
  167. * Update the clockactivity mode bits in @v to be @clockact for the
  168. * @oh hwmod. Used for additional powersaving on some modules. Does
  169. * not write to the hardware. Returns -EINVAL upon error or 0 upon
  170. * success.
  171. */
  172. static int _set_clockactivity(struct omap_hwmod *oh, u8 clockact, u32 *v)
  173. {
  174. u32 clkact_mask;
  175. u8 clkact_shift;
  176. if (!oh->class->sysc ||
  177. !(oh->class->sysc->sysc_flags & SYSC_HAS_CLOCKACTIVITY))
  178. return -EINVAL;
  179. if (!oh->class->sysc->sysc_fields) {
  180. WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
  181. return -EINVAL;
  182. }
  183. clkact_shift = oh->class->sysc->sysc_fields->clkact_shift;
  184. clkact_mask = (0x3 << clkact_shift);
  185. *v &= ~clkact_mask;
  186. *v |= clockact << clkact_shift;
  187. return 0;
  188. }
  189. /**
  190. * _set_softreset: set OCP_SYSCONFIG.CLOCKACTIVITY bits in @v
  191. * @oh: struct omap_hwmod *
  192. * @v: pointer to register contents to modify
  193. *
  194. * Set the SOFTRESET bit in @v for hwmod @oh. Returns -EINVAL upon
  195. * error or 0 upon success.
  196. */
  197. static int _set_softreset(struct omap_hwmod *oh, u32 *v)
  198. {
  199. u32 softrst_mask;
  200. if (!oh->class->sysc ||
  201. !(oh->class->sysc->sysc_flags & SYSC_HAS_SOFTRESET))
  202. return -EINVAL;
  203. if (!oh->class->sysc->sysc_fields) {
  204. WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
  205. return -EINVAL;
  206. }
  207. softrst_mask = (0x1 << oh->class->sysc->sysc_fields->srst_shift);
  208. *v |= softrst_mask;
  209. return 0;
  210. }
  211. /**
  212. * _set_module_autoidle: set the OCP_SYSCONFIG AUTOIDLE field in @v
  213. * @oh: struct omap_hwmod *
  214. * @autoidle: desired AUTOIDLE bitfield value (0 or 1)
  215. * @v: pointer to register contents to modify
  216. *
  217. * Update the module autoidle bit in @v to be @autoidle for the @oh
  218. * hwmod. The autoidle bit controls whether the module can gate
  219. * internal clocks automatically when it isn't doing anything; the
  220. * exact function of this bit varies on a per-module basis. This
  221. * function does not write to the hardware. Returns -EINVAL upon
  222. * error or 0 upon success.
  223. */
  224. static int _set_module_autoidle(struct omap_hwmod *oh, u8 autoidle,
  225. u32 *v)
  226. {
  227. u32 autoidle_mask;
  228. u8 autoidle_shift;
  229. if (!oh->class->sysc ||
  230. !(oh->class->sysc->sysc_flags & SYSC_HAS_AUTOIDLE))
  231. return -EINVAL;
  232. if (!oh->class->sysc->sysc_fields) {
  233. WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
  234. return -EINVAL;
  235. }
  236. autoidle_shift = oh->class->sysc->sysc_fields->autoidle_shift;
  237. autoidle_mask = (0x3 << autoidle_shift);
  238. *v &= ~autoidle_mask;
  239. *v |= autoidle << autoidle_shift;
  240. return 0;
  241. }
  242. /**
  243. * _enable_wakeup: set OCP_SYSCONFIG.ENAWAKEUP bit in the hardware
  244. * @oh: struct omap_hwmod *
  245. *
  246. * Allow the hardware module @oh to send wakeups. Returns -EINVAL
  247. * upon error or 0 upon success.
  248. */
  249. static int _enable_wakeup(struct omap_hwmod *oh)
  250. {
  251. u32 v, wakeup_mask;
  252. if (!oh->class->sysc ||
  253. !(oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP))
  254. return -EINVAL;
  255. if (!oh->class->sysc->sysc_fields) {
  256. WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
  257. return -EINVAL;
  258. }
  259. wakeup_mask = (0x1 << oh->class->sysc->sysc_fields->enwkup_shift);
  260. v = oh->_sysc_cache;
  261. v |= wakeup_mask;
  262. _write_sysconfig(v, oh);
  263. /* XXX test pwrdm_get_wken for this hwmod's subsystem */
  264. oh->_int_flags |= _HWMOD_WAKEUP_ENABLED;
  265. return 0;
  266. }
  267. /**
  268. * _disable_wakeup: clear OCP_SYSCONFIG.ENAWAKEUP bit in the hardware
  269. * @oh: struct omap_hwmod *
  270. *
  271. * Prevent the hardware module @oh to send wakeups. Returns -EINVAL
  272. * upon error or 0 upon success.
  273. */
  274. static int _disable_wakeup(struct omap_hwmod *oh)
  275. {
  276. u32 v, wakeup_mask;
  277. if (!oh->class->sysc ||
  278. !(oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP))
  279. return -EINVAL;
  280. if (!oh->class->sysc->sysc_fields) {
  281. WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
  282. return -EINVAL;
  283. }
  284. wakeup_mask = (0x1 << oh->class->sysc->sysc_fields->enwkup_shift);
  285. v = oh->_sysc_cache;
  286. v &= ~wakeup_mask;
  287. _write_sysconfig(v, oh);
  288. /* XXX test pwrdm_get_wken for this hwmod's subsystem */
  289. oh->_int_flags &= ~_HWMOD_WAKEUP_ENABLED;
  290. return 0;
  291. }
  292. /**
  293. * _add_initiator_dep: prevent @oh from smart-idling while @init_oh is active
  294. * @oh: struct omap_hwmod *
  295. *
  296. * Prevent the hardware module @oh from entering idle while the
  297. * hardare module initiator @init_oh is active. Useful when a module
  298. * will be accessed by a particular initiator (e.g., if a module will
  299. * be accessed by the IVA, there should be a sleepdep between the IVA
  300. * initiator and the module). Only applies to modules in smart-idle
  301. * mode. Returns -EINVAL upon error or passes along
  302. * clkdm_add_sleepdep() value upon success.
  303. */
  304. static int _add_initiator_dep(struct omap_hwmod *oh, struct omap_hwmod *init_oh)
  305. {
  306. if (!oh->_clk)
  307. return -EINVAL;
  308. return clkdm_add_sleepdep(oh->_clk->clkdm, init_oh->_clk->clkdm);
  309. }
  310. /**
  311. * _del_initiator_dep: allow @oh to smart-idle even if @init_oh is active
  312. * @oh: struct omap_hwmod *
  313. *
  314. * Allow the hardware module @oh to enter idle while the hardare
  315. * module initiator @init_oh is active. Useful when a module will not
  316. * be accessed by a particular initiator (e.g., if a module will not
  317. * be accessed by the IVA, there should be no sleepdep between the IVA
  318. * initiator and the module). Only applies to modules in smart-idle
  319. * mode. Returns -EINVAL upon error or passes along
  320. * clkdm_del_sleepdep() value upon success.
  321. */
  322. static int _del_initiator_dep(struct omap_hwmod *oh, struct omap_hwmod *init_oh)
  323. {
  324. if (!oh->_clk)
  325. return -EINVAL;
  326. return clkdm_del_sleepdep(oh->_clk->clkdm, init_oh->_clk->clkdm);
  327. }
  328. /**
  329. * _init_main_clk - get a struct clk * for the the hwmod's main functional clk
  330. * @oh: struct omap_hwmod *
  331. *
  332. * Called from _init_clocks(). Populates the @oh _clk (main
  333. * functional clock pointer) if a main_clk is present. Returns 0 on
  334. * success or -EINVAL on error.
  335. */
  336. static int _init_main_clk(struct omap_hwmod *oh)
  337. {
  338. int ret = 0;
  339. if (!oh->main_clk)
  340. return 0;
  341. oh->_clk = omap_clk_get_by_name(oh->main_clk);
  342. if (!oh->_clk) {
  343. pr_warning("omap_hwmod: %s: cannot clk_get main_clk %s\n",
  344. oh->name, oh->main_clk);
  345. return -EINVAL;
  346. }
  347. if (!oh->_clk->clkdm)
  348. pr_warning("omap_hwmod: %s: missing clockdomain for %s.\n",
  349. oh->main_clk, oh->_clk->name);
  350. return ret;
  351. }
  352. /**
  353. * _init_interface_clks - get a struct clk * for the the hwmod's interface clks
  354. * @oh: struct omap_hwmod *
  355. *
  356. * Called from _init_clocks(). Populates the @oh OCP slave interface
  357. * clock pointers. Returns 0 on success or -EINVAL on error.
  358. */
  359. static int _init_interface_clks(struct omap_hwmod *oh)
  360. {
  361. struct clk *c;
  362. int i;
  363. int ret = 0;
  364. if (oh->slaves_cnt == 0)
  365. return 0;
  366. for (i = 0; i < oh->slaves_cnt; i++) {
  367. struct omap_hwmod_ocp_if *os = oh->slaves[i];
  368. if (!os->clk)
  369. continue;
  370. c = omap_clk_get_by_name(os->clk);
  371. if (!c) {
  372. pr_warning("omap_hwmod: %s: cannot clk_get interface_clk %s\n",
  373. oh->name, os->clk);
  374. ret = -EINVAL;
  375. }
  376. os->_clk = c;
  377. }
  378. return ret;
  379. }
  380. /**
  381. * _init_opt_clk - get a struct clk * for the the hwmod's optional clocks
  382. * @oh: struct omap_hwmod *
  383. *
  384. * Called from _init_clocks(). Populates the @oh omap_hwmod_opt_clk
  385. * clock pointers. Returns 0 on success or -EINVAL on error.
  386. */
  387. static int _init_opt_clks(struct omap_hwmod *oh)
  388. {
  389. struct omap_hwmod_opt_clk *oc;
  390. struct clk *c;
  391. int i;
  392. int ret = 0;
  393. for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++) {
  394. c = omap_clk_get_by_name(oc->clk);
  395. if (!c) {
  396. pr_warning("omap_hwmod: %s: cannot clk_get opt_clk %s\n",
  397. oh->name, oc->clk);
  398. ret = -EINVAL;
  399. }
  400. oc->_clk = c;
  401. }
  402. return ret;
  403. }
  404. /**
  405. * _enable_clocks - enable hwmod main clock and interface clocks
  406. * @oh: struct omap_hwmod *
  407. *
  408. * Enables all clocks necessary for register reads and writes to succeed
  409. * on the hwmod @oh. Returns 0.
  410. */
  411. static int _enable_clocks(struct omap_hwmod *oh)
  412. {
  413. int i;
  414. pr_debug("omap_hwmod: %s: enabling clocks\n", oh->name);
  415. if (oh->_clk)
  416. clk_enable(oh->_clk);
  417. if (oh->slaves_cnt > 0) {
  418. for (i = 0; i < oh->slaves_cnt; i++) {
  419. struct omap_hwmod_ocp_if *os = oh->slaves[i];
  420. struct clk *c = os->_clk;
  421. if (c && (os->flags & OCPIF_SWSUP_IDLE))
  422. clk_enable(c);
  423. }
  424. }
  425. /* The opt clocks are controlled by the device driver. */
  426. return 0;
  427. }
  428. /**
  429. * _disable_clocks - disable hwmod main clock and interface clocks
  430. * @oh: struct omap_hwmod *
  431. *
  432. * Disables the hwmod @oh main functional and interface clocks. Returns 0.
  433. */
  434. static int _disable_clocks(struct omap_hwmod *oh)
  435. {
  436. int i;
  437. pr_debug("omap_hwmod: %s: disabling clocks\n", oh->name);
  438. if (oh->_clk)
  439. clk_disable(oh->_clk);
  440. if (oh->slaves_cnt > 0) {
  441. for (i = 0; i < oh->slaves_cnt; i++) {
  442. struct omap_hwmod_ocp_if *os = oh->slaves[i];
  443. struct clk *c = os->_clk;
  444. if (c && (os->flags & OCPIF_SWSUP_IDLE))
  445. clk_disable(c);
  446. }
  447. }
  448. /* The opt clocks are controlled by the device driver. */
  449. return 0;
  450. }
  451. /**
  452. * _find_mpu_port_index - find hwmod OCP slave port ID intended for MPU use
  453. * @oh: struct omap_hwmod *
  454. *
  455. * Returns the array index of the OCP slave port that the MPU
  456. * addresses the device on, or -EINVAL upon error or not found.
  457. */
  458. static int _find_mpu_port_index(struct omap_hwmod *oh)
  459. {
  460. int i;
  461. int found = 0;
  462. if (!oh || oh->slaves_cnt == 0)
  463. return -EINVAL;
  464. for (i = 0; i < oh->slaves_cnt; i++) {
  465. struct omap_hwmod_ocp_if *os = oh->slaves[i];
  466. if (os->user & OCP_USER_MPU) {
  467. found = 1;
  468. break;
  469. }
  470. }
  471. if (found)
  472. pr_debug("omap_hwmod: %s: MPU OCP slave port ID %d\n",
  473. oh->name, i);
  474. else
  475. pr_debug("omap_hwmod: %s: no MPU OCP slave port found\n",
  476. oh->name);
  477. return (found) ? i : -EINVAL;
  478. }
  479. /**
  480. * _find_mpu_rt_base - find hwmod register target base addr accessible by MPU
  481. * @oh: struct omap_hwmod *
  482. *
  483. * Return the virtual address of the base of the register target of
  484. * device @oh, or NULL on error.
  485. */
  486. static void __iomem *_find_mpu_rt_base(struct omap_hwmod *oh, u8 index)
  487. {
  488. struct omap_hwmod_ocp_if *os;
  489. struct omap_hwmod_addr_space *mem;
  490. int i;
  491. int found = 0;
  492. void __iomem *va_start;
  493. if (!oh || oh->slaves_cnt == 0)
  494. return NULL;
  495. os = oh->slaves[index];
  496. for (i = 0, mem = os->addr; i < os->addr_cnt; i++, mem++) {
  497. if (mem->flags & ADDR_TYPE_RT) {
  498. found = 1;
  499. break;
  500. }
  501. }
  502. if (found) {
  503. va_start = ioremap(mem->pa_start, mem->pa_end - mem->pa_start);
  504. if (!va_start) {
  505. pr_err("omap_hwmod: %s: Could not ioremap\n", oh->name);
  506. return NULL;
  507. }
  508. pr_debug("omap_hwmod: %s: MPU register target at va %p\n",
  509. oh->name, va_start);
  510. } else {
  511. pr_debug("omap_hwmod: %s: no MPU register target found\n",
  512. oh->name);
  513. }
  514. return (found) ? va_start : NULL;
  515. }
  516. /**
  517. * _sysc_enable - try to bring a module out of idle via OCP_SYSCONFIG
  518. * @oh: struct omap_hwmod *
  519. *
  520. * If module is marked as SWSUP_SIDLE, force the module out of slave
  521. * idle; otherwise, configure it for smart-idle. If module is marked
  522. * as SWSUP_MSUSPEND, force the module out of master standby;
  523. * otherwise, configure it for smart-standby. No return value.
  524. */
  525. static void _sysc_enable(struct omap_hwmod *oh)
  526. {
  527. u8 idlemode, sf;
  528. u32 v;
  529. if (!oh->class->sysc)
  530. return;
  531. v = oh->_sysc_cache;
  532. sf = oh->class->sysc->sysc_flags;
  533. if (sf & SYSC_HAS_SIDLEMODE) {
  534. idlemode = (oh->flags & HWMOD_SWSUP_SIDLE) ?
  535. HWMOD_IDLEMODE_NO : HWMOD_IDLEMODE_SMART;
  536. _set_slave_idlemode(oh, idlemode, &v);
  537. }
  538. if (sf & SYSC_HAS_MIDLEMODE) {
  539. idlemode = (oh->flags & HWMOD_SWSUP_MSTANDBY) ?
  540. HWMOD_IDLEMODE_NO : HWMOD_IDLEMODE_SMART;
  541. _set_master_standbymode(oh, idlemode, &v);
  542. }
  543. if (sf & SYSC_HAS_AUTOIDLE) {
  544. idlemode = (oh->flags & HWMOD_NO_OCP_AUTOIDLE) ?
  545. 0 : 1;
  546. _set_module_autoidle(oh, idlemode, &v);
  547. }
  548. /* XXX OCP ENAWAKEUP bit? */
  549. /*
  550. * XXX The clock framework should handle this, by
  551. * calling into this code. But this must wait until the
  552. * clock structures are tagged with omap_hwmod entries
  553. */
  554. if ((oh->flags & HWMOD_SET_DEFAULT_CLOCKACT) &&
  555. (sf & SYSC_HAS_CLOCKACTIVITY))
  556. _set_clockactivity(oh, oh->class->sysc->clockact, &v);
  557. _write_sysconfig(v, oh);
  558. }
  559. /**
  560. * _sysc_idle - try to put a module into idle via OCP_SYSCONFIG
  561. * @oh: struct omap_hwmod *
  562. *
  563. * If module is marked as SWSUP_SIDLE, force the module into slave
  564. * idle; otherwise, configure it for smart-idle. If module is marked
  565. * as SWSUP_MSUSPEND, force the module into master standby; otherwise,
  566. * configure it for smart-standby. No return value.
  567. */
  568. static void _sysc_idle(struct omap_hwmod *oh)
  569. {
  570. u8 idlemode, sf;
  571. u32 v;
  572. if (!oh->class->sysc)
  573. return;
  574. v = oh->_sysc_cache;
  575. sf = oh->class->sysc->sysc_flags;
  576. if (sf & SYSC_HAS_SIDLEMODE) {
  577. idlemode = (oh->flags & HWMOD_SWSUP_SIDLE) ?
  578. HWMOD_IDLEMODE_FORCE : HWMOD_IDLEMODE_SMART;
  579. _set_slave_idlemode(oh, idlemode, &v);
  580. }
  581. if (sf & SYSC_HAS_MIDLEMODE) {
  582. idlemode = (oh->flags & HWMOD_SWSUP_MSTANDBY) ?
  583. HWMOD_IDLEMODE_FORCE : HWMOD_IDLEMODE_SMART;
  584. _set_master_standbymode(oh, idlemode, &v);
  585. }
  586. _write_sysconfig(v, oh);
  587. }
  588. /**
  589. * _sysc_shutdown - force a module into idle via OCP_SYSCONFIG
  590. * @oh: struct omap_hwmod *
  591. *
  592. * Force the module into slave idle and master suspend. No return
  593. * value.
  594. */
  595. static void _sysc_shutdown(struct omap_hwmod *oh)
  596. {
  597. u32 v;
  598. u8 sf;
  599. if (!oh->class->sysc)
  600. return;
  601. v = oh->_sysc_cache;
  602. sf = oh->class->sysc->sysc_flags;
  603. if (sf & SYSC_HAS_SIDLEMODE)
  604. _set_slave_idlemode(oh, HWMOD_IDLEMODE_FORCE, &v);
  605. if (sf & SYSC_HAS_MIDLEMODE)
  606. _set_master_standbymode(oh, HWMOD_IDLEMODE_FORCE, &v);
  607. if (sf & SYSC_HAS_AUTOIDLE)
  608. _set_module_autoidle(oh, 1, &v);
  609. _write_sysconfig(v, oh);
  610. }
  611. /**
  612. * _lookup - find an omap_hwmod by name
  613. * @name: find an omap_hwmod by name
  614. *
  615. * Return a pointer to an omap_hwmod by name, or NULL if not found.
  616. * Caller must hold omap_hwmod_mutex.
  617. */
  618. static struct omap_hwmod *_lookup(const char *name)
  619. {
  620. struct omap_hwmod *oh, *temp_oh;
  621. oh = NULL;
  622. list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
  623. if (!strcmp(name, temp_oh->name)) {
  624. oh = temp_oh;
  625. break;
  626. }
  627. }
  628. return oh;
  629. }
  630. /**
  631. * _init_clocks - clk_get() all clocks associated with this hwmod
  632. * @oh: struct omap_hwmod *
  633. * @data: not used; pass NULL
  634. *
  635. * Called by omap_hwmod_late_init() (after omap2_clk_init()).
  636. * Resolves all clock names embedded in the hwmod. Returns -EINVAL if
  637. * the omap_hwmod has not yet been registered or if the clocks have
  638. * already been initialized, 0 on success, or a non-zero error on
  639. * failure.
  640. */
  641. static int _init_clocks(struct omap_hwmod *oh, void *data)
  642. {
  643. int ret = 0;
  644. if (!oh || (oh->_state != _HWMOD_STATE_REGISTERED))
  645. return -EINVAL;
  646. pr_debug("omap_hwmod: %s: looking up clocks\n", oh->name);
  647. ret |= _init_main_clk(oh);
  648. ret |= _init_interface_clks(oh);
  649. ret |= _init_opt_clks(oh);
  650. if (!ret)
  651. oh->_state = _HWMOD_STATE_CLKS_INITED;
  652. return 0;
  653. }
  654. /**
  655. * _wait_target_ready - wait for a module to leave slave idle
  656. * @oh: struct omap_hwmod *
  657. *
  658. * Wait for a module @oh to leave slave idle. Returns 0 if the module
  659. * does not have an IDLEST bit or if the module successfully leaves
  660. * slave idle; otherwise, pass along the return value of the
  661. * appropriate *_cm_wait_module_ready() function.
  662. */
  663. static int _wait_target_ready(struct omap_hwmod *oh)
  664. {
  665. struct omap_hwmod_ocp_if *os;
  666. int ret;
  667. if (!oh)
  668. return -EINVAL;
  669. if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
  670. return 0;
  671. os = oh->slaves[oh->_mpu_port_index];
  672. if (oh->flags & HWMOD_NO_IDLEST)
  673. return 0;
  674. /* XXX check module SIDLEMODE */
  675. /* XXX check clock enable states */
  676. if (cpu_is_omap24xx() || cpu_is_omap34xx()) {
  677. ret = omap2_cm_wait_module_ready(oh->prcm.omap2.module_offs,
  678. oh->prcm.omap2.idlest_reg_id,
  679. oh->prcm.omap2.idlest_idle_bit);
  680. } else if (cpu_is_omap44xx()) {
  681. ret = omap4_cm_wait_module_ready(oh->prcm.omap4.clkctrl_reg);
  682. } else {
  683. BUG();
  684. };
  685. return ret;
  686. }
  687. /**
  688. * _lookup_hardreset - return the register bit shift for this hwmod/reset line
  689. * @oh: struct omap_hwmod *
  690. * @name: name of the reset line in the context of this hwmod
  691. *
  692. * Return the bit position of the reset line that match the
  693. * input name. Return -ENOENT if not found.
  694. */
  695. static u8 _lookup_hardreset(struct omap_hwmod *oh, const char *name)
  696. {
  697. int i;
  698. for (i = 0; i < oh->rst_lines_cnt; i++) {
  699. const char *rst_line = oh->rst_lines[i].name;
  700. if (!strcmp(rst_line, name)) {
  701. u8 shift = oh->rst_lines[i].rst_shift;
  702. pr_debug("omap_hwmod: %s: _lookup_hardreset: %s: %d\n",
  703. oh->name, rst_line, shift);
  704. return shift;
  705. }
  706. }
  707. return -ENOENT;
  708. }
  709. /**
  710. * _assert_hardreset - assert the HW reset line of submodules
  711. * contained in the hwmod module.
  712. * @oh: struct omap_hwmod *
  713. * @name: name of the reset line to lookup and assert
  714. *
  715. * Some IP like dsp, ipu or iva contain processor that require
  716. * an HW reset line to be assert / deassert in order to enable fully
  717. * the IP.
  718. */
  719. static int _assert_hardreset(struct omap_hwmod *oh, const char *name)
  720. {
  721. u8 shift;
  722. if (!oh)
  723. return -EINVAL;
  724. shift = _lookup_hardreset(oh, name);
  725. if (IS_ERR_VALUE(shift))
  726. return shift;
  727. if (cpu_is_omap24xx() || cpu_is_omap34xx())
  728. return omap2_prm_assert_hardreset(oh->prcm.omap2.module_offs,
  729. shift);
  730. else if (cpu_is_omap44xx())
  731. return omap4_prm_assert_hardreset(oh->prcm.omap4.rstctrl_reg,
  732. shift);
  733. else
  734. return -EINVAL;
  735. }
  736. /**
  737. * _deassert_hardreset - deassert the HW reset line of submodules contained
  738. * in the hwmod module.
  739. * @oh: struct omap_hwmod *
  740. * @name: name of the reset line to look up and deassert
  741. *
  742. * Some IP like dsp, ipu or iva contain processor that require
  743. * an HW reset line to be assert / deassert in order to enable fully
  744. * the IP.
  745. */
  746. static int _deassert_hardreset(struct omap_hwmod *oh, const char *name)
  747. {
  748. u8 shift;
  749. int r;
  750. if (!oh)
  751. return -EINVAL;
  752. shift = _lookup_hardreset(oh, name);
  753. if (IS_ERR_VALUE(shift))
  754. return shift;
  755. if (cpu_is_omap24xx() || cpu_is_omap34xx())
  756. r = omap2_prm_deassert_hardreset(oh->prcm.omap2.module_offs,
  757. shift);
  758. else if (cpu_is_omap44xx())
  759. r = omap4_prm_deassert_hardreset(oh->prcm.omap4.rstctrl_reg,
  760. shift);
  761. else
  762. return -EINVAL;
  763. if (r == -EBUSY)
  764. pr_warning("omap_hwmod: %s: failed to hardreset\n", oh->name);
  765. return r;
  766. }
  767. /**
  768. * _read_hardreset - read the HW reset line state of submodules
  769. * contained in the hwmod module
  770. * @oh: struct omap_hwmod *
  771. * @name: name of the reset line to look up and read
  772. *
  773. * Return the state of the reset line.
  774. */
  775. static int _read_hardreset(struct omap_hwmod *oh, const char *name)
  776. {
  777. u8 shift;
  778. if (!oh)
  779. return -EINVAL;
  780. shift = _lookup_hardreset(oh, name);
  781. if (IS_ERR_VALUE(shift))
  782. return shift;
  783. if (cpu_is_omap24xx() || cpu_is_omap34xx()) {
  784. return omap2_prm_is_hardreset_asserted(oh->prcm.omap2.module_offs,
  785. shift);
  786. } else if (cpu_is_omap44xx()) {
  787. return omap4_prm_is_hardreset_asserted(oh->prcm.omap4.rstctrl_reg,
  788. shift);
  789. } else {
  790. return -EINVAL;
  791. }
  792. }
  793. /**
  794. * _reset - reset an omap_hwmod
  795. * @oh: struct omap_hwmod *
  796. *
  797. * Resets an omap_hwmod @oh via the OCP_SYSCONFIG bit. hwmod must be
  798. * enabled for this to work. Returns -EINVAL if the hwmod cannot be
  799. * reset this way or if the hwmod is in the wrong state, -ETIMEDOUT if
  800. * the module did not reset in time, or 0 upon success.
  801. *
  802. * In OMAP3 a specific SYSSTATUS register is used to get the reset status.
  803. * Starting in OMAP4, some IPs does not have SYSSTATUS register and instead
  804. * use the SYSCONFIG softreset bit to provide the status.
  805. *
  806. * Note that some IP like McBSP does have a reset control but no reset status.
  807. */
  808. static int _reset(struct omap_hwmod *oh)
  809. {
  810. u32 r, v;
  811. int c = 0;
  812. if (!oh->class->sysc ||
  813. !(oh->class->sysc->sysc_flags & SYSC_HAS_SOFTRESET))
  814. return -EINVAL;
  815. /* clocks must be on for this operation */
  816. if (oh->_state != _HWMOD_STATE_ENABLED) {
  817. pr_warning("omap_hwmod: %s: reset can only be entered from "
  818. "enabled state\n", oh->name);
  819. return -EINVAL;
  820. }
  821. pr_debug("omap_hwmod: %s: resetting\n", oh->name);
  822. v = oh->_sysc_cache;
  823. r = _set_softreset(oh, &v);
  824. if (r)
  825. return r;
  826. _write_sysconfig(v, oh);
  827. if (oh->class->sysc->sysc_flags & SYSS_HAS_RESET_STATUS)
  828. omap_test_timeout((omap_hwmod_readl(oh,
  829. oh->class->sysc->syss_offs)
  830. & SYSS_RESETDONE_MASK),
  831. MAX_MODULE_SOFTRESET_WAIT, c);
  832. else if (oh->class->sysc->sysc_flags & SYSC_HAS_RESET_STATUS)
  833. omap_test_timeout(!(omap_hwmod_readl(oh,
  834. oh->class->sysc->sysc_offs)
  835. & SYSC_TYPE2_SOFTRESET_MASK),
  836. MAX_MODULE_SOFTRESET_WAIT, c);
  837. if (c == MAX_MODULE_SOFTRESET_WAIT)
  838. pr_warning("omap_hwmod: %s: softreset failed (waited %d usec)\n",
  839. oh->name, MAX_MODULE_SOFTRESET_WAIT);
  840. else
  841. pr_debug("omap_hwmod: %s: softreset in %d usec\n", oh->name, c);
  842. /*
  843. * XXX add _HWMOD_STATE_WEDGED for modules that don't come back from
  844. * _wait_target_ready() or _reset()
  845. */
  846. return (c == MAX_MODULE_SOFTRESET_WAIT) ? -ETIMEDOUT : 0;
  847. }
  848. /**
  849. * _omap_hwmod_enable - enable an omap_hwmod
  850. * @oh: struct omap_hwmod *
  851. *
  852. * Enables an omap_hwmod @oh such that the MPU can access the hwmod's
  853. * register target. Returns -EINVAL if the hwmod is in the wrong
  854. * state or passes along the return value of _wait_target_ready().
  855. */
  856. int _omap_hwmod_enable(struct omap_hwmod *oh)
  857. {
  858. int r;
  859. if (oh->_state != _HWMOD_STATE_INITIALIZED &&
  860. oh->_state != _HWMOD_STATE_IDLE &&
  861. oh->_state != _HWMOD_STATE_DISABLED) {
  862. WARN(1, "omap_hwmod: %s: enabled state can only be entered "
  863. "from initialized, idle, or disabled state\n", oh->name);
  864. return -EINVAL;
  865. }
  866. pr_debug("omap_hwmod: %s: enabling\n", oh->name);
  867. /*
  868. * If an IP contains only one HW reset line, then de-assert it in order
  869. * to allow to enable the clocks. Otherwise the PRCM will return
  870. * Intransition status, and the init will failed.
  871. */
  872. if ((oh->_state == _HWMOD_STATE_INITIALIZED ||
  873. oh->_state == _HWMOD_STATE_DISABLED) && oh->rst_lines_cnt == 1)
  874. _deassert_hardreset(oh, oh->rst_lines[0].name);
  875. /* XXX mux balls */
  876. _add_initiator_dep(oh, mpu_oh);
  877. _enable_clocks(oh);
  878. r = _wait_target_ready(oh);
  879. if (!r) {
  880. oh->_state = _HWMOD_STATE_ENABLED;
  881. /* Access the sysconfig only if the target is ready */
  882. if (oh->class->sysc) {
  883. if (!(oh->_int_flags & _HWMOD_SYSCONFIG_LOADED))
  884. _update_sysc_cache(oh);
  885. _sysc_enable(oh);
  886. }
  887. } else {
  888. pr_debug("omap_hwmod: %s: _wait_target_ready: %d\n",
  889. oh->name, r);
  890. }
  891. return r;
  892. }
  893. /**
  894. * _idle - idle an omap_hwmod
  895. * @oh: struct omap_hwmod *
  896. *
  897. * Idles an omap_hwmod @oh. This should be called once the hwmod has
  898. * no further work. Returns -EINVAL if the hwmod is in the wrong
  899. * state or returns 0.
  900. */
  901. int _omap_hwmod_idle(struct omap_hwmod *oh)
  902. {
  903. if (oh->_state != _HWMOD_STATE_ENABLED) {
  904. WARN(1, "omap_hwmod: %s: idle state can only be entered from "
  905. "enabled state\n", oh->name);
  906. return -EINVAL;
  907. }
  908. pr_debug("omap_hwmod: %s: idling\n", oh->name);
  909. if (oh->class->sysc)
  910. _sysc_idle(oh);
  911. _del_initiator_dep(oh, mpu_oh);
  912. _disable_clocks(oh);
  913. oh->_state = _HWMOD_STATE_IDLE;
  914. return 0;
  915. }
  916. /**
  917. * _shutdown - shutdown an omap_hwmod
  918. * @oh: struct omap_hwmod *
  919. *
  920. * Shut down an omap_hwmod @oh. This should be called when the driver
  921. * used for the hwmod is removed or unloaded or if the driver is not
  922. * used by the system. Returns -EINVAL if the hwmod is in the wrong
  923. * state or returns 0.
  924. */
  925. static int _shutdown(struct omap_hwmod *oh)
  926. {
  927. if (oh->_state != _HWMOD_STATE_IDLE &&
  928. oh->_state != _HWMOD_STATE_ENABLED) {
  929. WARN(1, "omap_hwmod: %s: disabled state can only be entered "
  930. "from idle, or enabled state\n", oh->name);
  931. return -EINVAL;
  932. }
  933. pr_debug("omap_hwmod: %s: disabling\n", oh->name);
  934. if (oh->class->sysc)
  935. _sysc_shutdown(oh);
  936. /*
  937. * If an IP contains only one HW reset line, then assert it
  938. * before disabling the clocks and shutting down the IP.
  939. */
  940. if (oh->rst_lines_cnt == 1)
  941. _assert_hardreset(oh, oh->rst_lines[0].name);
  942. /* clocks and deps are already disabled in idle */
  943. if (oh->_state == _HWMOD_STATE_ENABLED) {
  944. _del_initiator_dep(oh, mpu_oh);
  945. /* XXX what about the other system initiators here? dma, dsp */
  946. _disable_clocks(oh);
  947. }
  948. /* XXX Should this code also force-disable the optional clocks? */
  949. /* XXX mux any associated balls to safe mode */
  950. oh->_state = _HWMOD_STATE_DISABLED;
  951. return 0;
  952. }
  953. /**
  954. * _setup - do initial configuration of omap_hwmod
  955. * @oh: struct omap_hwmod *
  956. * @skip_setup_idle_p: do not idle hwmods at the end of the fn if 1
  957. *
  958. * Writes the CLOCKACTIVITY bits @clockact to the hwmod @oh
  959. * OCP_SYSCONFIG register. @skip_setup_idle is intended to be used on
  960. * a system that will not call omap_hwmod_enable() to enable devices
  961. * (e.g., a system without PM runtime). Returns -EINVAL if the hwmod
  962. * is in the wrong state or returns 0.
  963. */
  964. static int _setup(struct omap_hwmod *oh, void *data)
  965. {
  966. int i, r;
  967. u8 skip_setup_idle;
  968. if (!oh || !data)
  969. return -EINVAL;
  970. skip_setup_idle = *(u8 *)data;
  971. /* Set iclk autoidle mode */
  972. if (oh->slaves_cnt > 0) {
  973. for (i = 0; i < oh->slaves_cnt; i++) {
  974. struct omap_hwmod_ocp_if *os = oh->slaves[i];
  975. struct clk *c = os->_clk;
  976. if (!c)
  977. continue;
  978. if (os->flags & OCPIF_SWSUP_IDLE) {
  979. /* XXX omap_iclk_deny_idle(c); */
  980. } else {
  981. /* XXX omap_iclk_allow_idle(c); */
  982. clk_enable(c);
  983. }
  984. }
  985. }
  986. mutex_init(&oh->_mutex);
  987. oh->_state = _HWMOD_STATE_INITIALIZED;
  988. /*
  989. * In the case of hwmod with hardreset that should not be
  990. * de-assert at boot time, we have to keep the module
  991. * initialized, because we cannot enable it properly with the
  992. * reset asserted. Exit without warning because that behavior is
  993. * expected.
  994. */
  995. if ((oh->flags & HWMOD_INIT_NO_RESET) && oh->rst_lines_cnt == 1)
  996. return 0;
  997. r = _omap_hwmod_enable(oh);
  998. if (r) {
  999. pr_warning("omap_hwmod: %s: cannot be enabled (%d)\n",
  1000. oh->name, oh->_state);
  1001. return 0;
  1002. }
  1003. if (!(oh->flags & HWMOD_INIT_NO_RESET)) {
  1004. _reset(oh);
  1005. /*
  1006. * OCP_SYSCONFIG bits need to be reprogrammed after a softreset.
  1007. * The _omap_hwmod_enable() function should be split to
  1008. * avoid the rewrite of the OCP_SYSCONFIG register.
  1009. */
  1010. if (oh->class->sysc) {
  1011. _update_sysc_cache(oh);
  1012. _sysc_enable(oh);
  1013. }
  1014. }
  1015. if (!(oh->flags & HWMOD_INIT_NO_IDLE) && !skip_setup_idle)
  1016. _omap_hwmod_idle(oh);
  1017. return 0;
  1018. }
  1019. /* Public functions */
  1020. u32 omap_hwmod_readl(struct omap_hwmod *oh, u16 reg_offs)
  1021. {
  1022. return __raw_readl(oh->_mpu_rt_va + reg_offs);
  1023. }
  1024. void omap_hwmod_writel(u32 v, struct omap_hwmod *oh, u16 reg_offs)
  1025. {
  1026. __raw_writel(v, oh->_mpu_rt_va + reg_offs);
  1027. }
  1028. /**
  1029. * omap_hwmod_set_slave_idlemode - set the hwmod's OCP slave idlemode
  1030. * @oh: struct omap_hwmod *
  1031. * @idlemode: SIDLEMODE field bits (shifted to bit 0)
  1032. *
  1033. * Sets the IP block's OCP slave idlemode in hardware, and updates our
  1034. * local copy. Intended to be used by drivers that have some erratum
  1035. * that requires direct manipulation of the SIDLEMODE bits. Returns
  1036. * -EINVAL if @oh is null, or passes along the return value from
  1037. * _set_slave_idlemode().
  1038. *
  1039. * XXX Does this function have any current users? If not, we should
  1040. * remove it; it is better to let the rest of the hwmod code handle this.
  1041. * Any users of this function should be scrutinized carefully.
  1042. */
  1043. int omap_hwmod_set_slave_idlemode(struct omap_hwmod *oh, u8 idlemode)
  1044. {
  1045. u32 v;
  1046. int retval = 0;
  1047. if (!oh)
  1048. return -EINVAL;
  1049. v = oh->_sysc_cache;
  1050. retval = _set_slave_idlemode(oh, idlemode, &v);
  1051. if (!retval)
  1052. _write_sysconfig(v, oh);
  1053. return retval;
  1054. }
  1055. /**
  1056. * omap_hwmod_register - register a struct omap_hwmod
  1057. * @oh: struct omap_hwmod *
  1058. *
  1059. * Registers the omap_hwmod @oh. Returns -EEXIST if an omap_hwmod
  1060. * already has been registered by the same name; -EINVAL if the
  1061. * omap_hwmod is in the wrong state, if @oh is NULL, if the
  1062. * omap_hwmod's class field is NULL; if the omap_hwmod is missing a
  1063. * name, or if the omap_hwmod's class is missing a name; or 0 upon
  1064. * success.
  1065. *
  1066. * XXX The data should be copied into bootmem, so the original data
  1067. * should be marked __initdata and freed after init. This would allow
  1068. * unneeded omap_hwmods to be freed on multi-OMAP configurations. Note
  1069. * that the copy process would be relatively complex due to the large number
  1070. * of substructures.
  1071. */
  1072. int omap_hwmod_register(struct omap_hwmod *oh)
  1073. {
  1074. int ret, ms_id;
  1075. if (!oh || !oh->name || !oh->class || !oh->class->name ||
  1076. (oh->_state != _HWMOD_STATE_UNKNOWN))
  1077. return -EINVAL;
  1078. mutex_lock(&omap_hwmod_mutex);
  1079. pr_debug("omap_hwmod: %s: registering\n", oh->name);
  1080. if (_lookup(oh->name)) {
  1081. ret = -EEXIST;
  1082. goto ohr_unlock;
  1083. }
  1084. ms_id = _find_mpu_port_index(oh);
  1085. if (!IS_ERR_VALUE(ms_id)) {
  1086. oh->_mpu_port_index = ms_id;
  1087. oh->_mpu_rt_va = _find_mpu_rt_base(oh, oh->_mpu_port_index);
  1088. } else {
  1089. oh->_int_flags |= _HWMOD_NO_MPU_PORT;
  1090. }
  1091. list_add_tail(&oh->node, &omap_hwmod_list);
  1092. oh->_state = _HWMOD_STATE_REGISTERED;
  1093. ret = 0;
  1094. ohr_unlock:
  1095. mutex_unlock(&omap_hwmod_mutex);
  1096. return ret;
  1097. }
  1098. /**
  1099. * omap_hwmod_lookup - look up a registered omap_hwmod by name
  1100. * @name: name of the omap_hwmod to look up
  1101. *
  1102. * Given a @name of an omap_hwmod, return a pointer to the registered
  1103. * struct omap_hwmod *, or NULL upon error.
  1104. */
  1105. struct omap_hwmod *omap_hwmod_lookup(const char *name)
  1106. {
  1107. struct omap_hwmod *oh;
  1108. if (!name)
  1109. return NULL;
  1110. mutex_lock(&omap_hwmod_mutex);
  1111. oh = _lookup(name);
  1112. mutex_unlock(&omap_hwmod_mutex);
  1113. return oh;
  1114. }
  1115. /**
  1116. * omap_hwmod_for_each - call function for each registered omap_hwmod
  1117. * @fn: pointer to a callback function
  1118. * @data: void * data to pass to callback function
  1119. *
  1120. * Call @fn for each registered omap_hwmod, passing @data to each
  1121. * function. @fn must return 0 for success or any other value for
  1122. * failure. If @fn returns non-zero, the iteration across omap_hwmods
  1123. * will stop and the non-zero return value will be passed to the
  1124. * caller of omap_hwmod_for_each(). @fn is called with
  1125. * omap_hwmod_for_each() held.
  1126. */
  1127. int omap_hwmod_for_each(int (*fn)(struct omap_hwmod *oh, void *data),
  1128. void *data)
  1129. {
  1130. struct omap_hwmod *temp_oh;
  1131. int ret;
  1132. if (!fn)
  1133. return -EINVAL;
  1134. mutex_lock(&omap_hwmod_mutex);
  1135. list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
  1136. ret = (*fn)(temp_oh, data);
  1137. if (ret)
  1138. break;
  1139. }
  1140. mutex_unlock(&omap_hwmod_mutex);
  1141. return ret;
  1142. }
  1143. /**
  1144. * omap_hwmod_init - init omap_hwmod code and register hwmods
  1145. * @ohs: pointer to an array of omap_hwmods to register
  1146. *
  1147. * Intended to be called early in boot before the clock framework is
  1148. * initialized. If @ohs is not null, will register all omap_hwmods
  1149. * listed in @ohs that are valid for this chip. Returns -EINVAL if
  1150. * omap_hwmod_init() has already been called or 0 otherwise.
  1151. */
  1152. int omap_hwmod_init(struct omap_hwmod **ohs)
  1153. {
  1154. struct omap_hwmod *oh;
  1155. int r;
  1156. if (inited)
  1157. return -EINVAL;
  1158. inited = 1;
  1159. if (!ohs)
  1160. return 0;
  1161. oh = *ohs;
  1162. while (oh) {
  1163. if (omap_chip_is(oh->omap_chip)) {
  1164. r = omap_hwmod_register(oh);
  1165. WARN(r, "omap_hwmod: %s: omap_hwmod_register returned "
  1166. "%d\n", oh->name, r);
  1167. }
  1168. oh = *++ohs;
  1169. }
  1170. return 0;
  1171. }
  1172. /**
  1173. * omap_hwmod_late_init - do some post-clock framework initialization
  1174. * @skip_setup_idle: if 1, do not idle hwmods in _setup()
  1175. *
  1176. * Must be called after omap2_clk_init(). Resolves the struct clk names
  1177. * to struct clk pointers for each registered omap_hwmod. Also calls
  1178. * _setup() on each hwmod. Returns 0.
  1179. */
  1180. int omap_hwmod_late_init(u8 skip_setup_idle)
  1181. {
  1182. int r;
  1183. /* XXX check return value */
  1184. r = omap_hwmod_for_each(_init_clocks, NULL);
  1185. WARN(r, "omap_hwmod: omap_hwmod_late_init(): _init_clocks failed\n");
  1186. mpu_oh = omap_hwmod_lookup(MPU_INITIATOR_NAME);
  1187. WARN(!mpu_oh, "omap_hwmod: could not find MPU initiator hwmod %s\n",
  1188. MPU_INITIATOR_NAME);
  1189. if (skip_setup_idle)
  1190. pr_debug("omap_hwmod: will leave hwmods enabled during setup\n");
  1191. omap_hwmod_for_each(_setup, &skip_setup_idle);
  1192. return 0;
  1193. }
  1194. /**
  1195. * omap_hwmod_unregister - unregister an omap_hwmod
  1196. * @oh: struct omap_hwmod *
  1197. *
  1198. * Unregisters a previously-registered omap_hwmod @oh. There's probably
  1199. * no use case for this, so it is likely to be removed in a later version.
  1200. *
  1201. * XXX Free all of the bootmem-allocated structures here when that is
  1202. * implemented. Make it clear that core code is the only code that is
  1203. * expected to unregister modules.
  1204. */
  1205. int omap_hwmod_unregister(struct omap_hwmod *oh)
  1206. {
  1207. if (!oh)
  1208. return -EINVAL;
  1209. pr_debug("omap_hwmod: %s: unregistering\n", oh->name);
  1210. mutex_lock(&omap_hwmod_mutex);
  1211. iounmap(oh->_mpu_rt_va);
  1212. list_del(&oh->node);
  1213. mutex_unlock(&omap_hwmod_mutex);
  1214. return 0;
  1215. }
  1216. /**
  1217. * omap_hwmod_enable - enable an omap_hwmod
  1218. * @oh: struct omap_hwmod *
  1219. *
  1220. * Enable an omap_hwomd @oh. Intended to be called by omap_device_enable().
  1221. * Returns -EINVAL on error or passes along the return value from _enable().
  1222. */
  1223. int omap_hwmod_enable(struct omap_hwmod *oh)
  1224. {
  1225. int r;
  1226. if (!oh)
  1227. return -EINVAL;
  1228. mutex_lock(&oh->_mutex);
  1229. r = _omap_hwmod_enable(oh);
  1230. mutex_unlock(&oh->_mutex);
  1231. return r;
  1232. }
  1233. /**
  1234. * omap_hwmod_idle - idle an omap_hwmod
  1235. * @oh: struct omap_hwmod *
  1236. *
  1237. * Idle an omap_hwomd @oh. Intended to be called by omap_device_idle().
  1238. * Returns -EINVAL on error or passes along the return value from _idle().
  1239. */
  1240. int omap_hwmod_idle(struct omap_hwmod *oh)
  1241. {
  1242. if (!oh)
  1243. return -EINVAL;
  1244. mutex_lock(&oh->_mutex);
  1245. _omap_hwmod_idle(oh);
  1246. mutex_unlock(&oh->_mutex);
  1247. return 0;
  1248. }
  1249. /**
  1250. * omap_hwmod_shutdown - shutdown an omap_hwmod
  1251. * @oh: struct omap_hwmod *
  1252. *
  1253. * Shutdown an omap_hwomd @oh. Intended to be called by
  1254. * omap_device_shutdown(). Returns -EINVAL on error or passes along
  1255. * the return value from _shutdown().
  1256. */
  1257. int omap_hwmod_shutdown(struct omap_hwmod *oh)
  1258. {
  1259. if (!oh)
  1260. return -EINVAL;
  1261. mutex_lock(&oh->_mutex);
  1262. _shutdown(oh);
  1263. mutex_unlock(&oh->_mutex);
  1264. return 0;
  1265. }
  1266. /**
  1267. * omap_hwmod_enable_clocks - enable main_clk, all interface clocks
  1268. * @oh: struct omap_hwmod *oh
  1269. *
  1270. * Intended to be called by the omap_device code.
  1271. */
  1272. int omap_hwmod_enable_clocks(struct omap_hwmod *oh)
  1273. {
  1274. mutex_lock(&oh->_mutex);
  1275. _enable_clocks(oh);
  1276. mutex_unlock(&oh->_mutex);
  1277. return 0;
  1278. }
  1279. /**
  1280. * omap_hwmod_disable_clocks - disable main_clk, all interface clocks
  1281. * @oh: struct omap_hwmod *oh
  1282. *
  1283. * Intended to be called by the omap_device code.
  1284. */
  1285. int omap_hwmod_disable_clocks(struct omap_hwmod *oh)
  1286. {
  1287. mutex_lock(&oh->_mutex);
  1288. _disable_clocks(oh);
  1289. mutex_unlock(&oh->_mutex);
  1290. return 0;
  1291. }
  1292. /**
  1293. * omap_hwmod_ocp_barrier - wait for posted writes against the hwmod to complete
  1294. * @oh: struct omap_hwmod *oh
  1295. *
  1296. * Intended to be called by drivers and core code when all posted
  1297. * writes to a device must complete before continuing further
  1298. * execution (for example, after clearing some device IRQSTATUS
  1299. * register bits)
  1300. *
  1301. * XXX what about targets with multiple OCP threads?
  1302. */
  1303. void omap_hwmod_ocp_barrier(struct omap_hwmod *oh)
  1304. {
  1305. BUG_ON(!oh);
  1306. if (!oh->class->sysc || !oh->class->sysc->sysc_flags) {
  1307. WARN(1, "omap_device: %s: OCP barrier impossible due to "
  1308. "device configuration\n", oh->name);
  1309. return;
  1310. }
  1311. /*
  1312. * Forces posted writes to complete on the OCP thread handling
  1313. * register writes
  1314. */
  1315. omap_hwmod_readl(oh, oh->class->sysc->sysc_offs);
  1316. }
  1317. /**
  1318. * omap_hwmod_reset - reset the hwmod
  1319. * @oh: struct omap_hwmod *
  1320. *
  1321. * Under some conditions, a driver may wish to reset the entire device.
  1322. * Called from omap_device code. Returns -EINVAL on error or passes along
  1323. * the return value from _reset().
  1324. */
  1325. int omap_hwmod_reset(struct omap_hwmod *oh)
  1326. {
  1327. int r;
  1328. if (!oh)
  1329. return -EINVAL;
  1330. mutex_lock(&oh->_mutex);
  1331. r = _reset(oh);
  1332. mutex_unlock(&oh->_mutex);
  1333. return r;
  1334. }
  1335. /**
  1336. * omap_hwmod_count_resources - count number of struct resources needed by hwmod
  1337. * @oh: struct omap_hwmod *
  1338. * @res: pointer to the first element of an array of struct resource to fill
  1339. *
  1340. * Count the number of struct resource array elements necessary to
  1341. * contain omap_hwmod @oh resources. Intended to be called by code
  1342. * that registers omap_devices. Intended to be used to determine the
  1343. * size of a dynamically-allocated struct resource array, before
  1344. * calling omap_hwmod_fill_resources(). Returns the number of struct
  1345. * resource array elements needed.
  1346. *
  1347. * XXX This code is not optimized. It could attempt to merge adjacent
  1348. * resource IDs.
  1349. *
  1350. */
  1351. int omap_hwmod_count_resources(struct omap_hwmod *oh)
  1352. {
  1353. int ret, i;
  1354. ret = oh->mpu_irqs_cnt + oh->sdma_reqs_cnt;
  1355. for (i = 0; i < oh->slaves_cnt; i++)
  1356. ret += oh->slaves[i]->addr_cnt;
  1357. return ret;
  1358. }
  1359. /**
  1360. * omap_hwmod_fill_resources - fill struct resource array with hwmod data
  1361. * @oh: struct omap_hwmod *
  1362. * @res: pointer to the first element of an array of struct resource to fill
  1363. *
  1364. * Fill the struct resource array @res with resource data from the
  1365. * omap_hwmod @oh. Intended to be called by code that registers
  1366. * omap_devices. See also omap_hwmod_count_resources(). Returns the
  1367. * number of array elements filled.
  1368. */
  1369. int omap_hwmod_fill_resources(struct omap_hwmod *oh, struct resource *res)
  1370. {
  1371. int i, j;
  1372. int r = 0;
  1373. /* For each IRQ, DMA, memory area, fill in array.*/
  1374. for (i = 0; i < oh->mpu_irqs_cnt; i++) {
  1375. (res + r)->name = (oh->mpu_irqs + i)->name;
  1376. (res + r)->start = (oh->mpu_irqs + i)->irq;
  1377. (res + r)->end = (oh->mpu_irqs + i)->irq;
  1378. (res + r)->flags = IORESOURCE_IRQ;
  1379. r++;
  1380. }
  1381. for (i = 0; i < oh->sdma_reqs_cnt; i++) {
  1382. (res + r)->name = (oh->sdma_reqs + i)->name;
  1383. (res + r)->start = (oh->sdma_reqs + i)->dma_req;
  1384. (res + r)->end = (oh->sdma_reqs + i)->dma_req;
  1385. (res + r)->flags = IORESOURCE_DMA;
  1386. r++;
  1387. }
  1388. for (i = 0; i < oh->slaves_cnt; i++) {
  1389. struct omap_hwmod_ocp_if *os;
  1390. os = oh->slaves[i];
  1391. for (j = 0; j < os->addr_cnt; j++) {
  1392. (res + r)->start = (os->addr + j)->pa_start;
  1393. (res + r)->end = (os->addr + j)->pa_end;
  1394. (res + r)->flags = IORESOURCE_MEM;
  1395. r++;
  1396. }
  1397. }
  1398. return r;
  1399. }
  1400. /**
  1401. * omap_hwmod_get_pwrdm - return pointer to this module's main powerdomain
  1402. * @oh: struct omap_hwmod *
  1403. *
  1404. * Return the powerdomain pointer associated with the OMAP module
  1405. * @oh's main clock. If @oh does not have a main clk, return the
  1406. * powerdomain associated with the interface clock associated with the
  1407. * module's MPU port. (XXX Perhaps this should use the SDMA port
  1408. * instead?) Returns NULL on error, or a struct powerdomain * on
  1409. * success.
  1410. */
  1411. struct powerdomain *omap_hwmod_get_pwrdm(struct omap_hwmod *oh)
  1412. {
  1413. struct clk *c;
  1414. if (!oh)
  1415. return NULL;
  1416. if (oh->_clk) {
  1417. c = oh->_clk;
  1418. } else {
  1419. if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
  1420. return NULL;
  1421. c = oh->slaves[oh->_mpu_port_index]->_clk;
  1422. }
  1423. if (!c->clkdm)
  1424. return NULL;
  1425. return c->clkdm->pwrdm.ptr;
  1426. }
  1427. /**
  1428. * omap_hwmod_get_mpu_rt_va - return the module's base address (for the MPU)
  1429. * @oh: struct omap_hwmod *
  1430. *
  1431. * Returns the virtual address corresponding to the beginning of the
  1432. * module's register target, in the address range that is intended to
  1433. * be used by the MPU. Returns the virtual address upon success or NULL
  1434. * upon error.
  1435. */
  1436. void __iomem *omap_hwmod_get_mpu_rt_va(struct omap_hwmod *oh)
  1437. {
  1438. if (!oh)
  1439. return NULL;
  1440. if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
  1441. return NULL;
  1442. if (oh->_state == _HWMOD_STATE_UNKNOWN)
  1443. return NULL;
  1444. return oh->_mpu_rt_va;
  1445. }
  1446. /**
  1447. * omap_hwmod_add_initiator_dep - add sleepdep from @init_oh to @oh
  1448. * @oh: struct omap_hwmod *
  1449. * @init_oh: struct omap_hwmod * (initiator)
  1450. *
  1451. * Add a sleep dependency between the initiator @init_oh and @oh.
  1452. * Intended to be called by DSP/Bridge code via platform_data for the
  1453. * DSP case; and by the DMA code in the sDMA case. DMA code, *Bridge
  1454. * code needs to add/del initiator dependencies dynamically
  1455. * before/after accessing a device. Returns the return value from
  1456. * _add_initiator_dep().
  1457. *
  1458. * XXX Keep a usecount in the clockdomain code
  1459. */
  1460. int omap_hwmod_add_initiator_dep(struct omap_hwmod *oh,
  1461. struct omap_hwmod *init_oh)
  1462. {
  1463. return _add_initiator_dep(oh, init_oh);
  1464. }
  1465. /*
  1466. * XXX what about functions for drivers to save/restore ocp_sysconfig
  1467. * for context save/restore operations?
  1468. */
  1469. /**
  1470. * omap_hwmod_del_initiator_dep - remove sleepdep from @init_oh to @oh
  1471. * @oh: struct omap_hwmod *
  1472. * @init_oh: struct omap_hwmod * (initiator)
  1473. *
  1474. * Remove a sleep dependency between the initiator @init_oh and @oh.
  1475. * Intended to be called by DSP/Bridge code via platform_data for the
  1476. * DSP case; and by the DMA code in the sDMA case. DMA code, *Bridge
  1477. * code needs to add/del initiator dependencies dynamically
  1478. * before/after accessing a device. Returns the return value from
  1479. * _del_initiator_dep().
  1480. *
  1481. * XXX Keep a usecount in the clockdomain code
  1482. */
  1483. int omap_hwmod_del_initiator_dep(struct omap_hwmod *oh,
  1484. struct omap_hwmod *init_oh)
  1485. {
  1486. return _del_initiator_dep(oh, init_oh);
  1487. }
  1488. /**
  1489. * omap_hwmod_enable_wakeup - allow device to wake up the system
  1490. * @oh: struct omap_hwmod *
  1491. *
  1492. * Sets the module OCP socket ENAWAKEUP bit to allow the module to
  1493. * send wakeups to the PRCM. Eventually this should sets PRCM wakeup
  1494. * registers to cause the PRCM to receive wakeup events from the
  1495. * module. Does not set any wakeup routing registers beyond this
  1496. * point - if the module is to wake up any other module or subsystem,
  1497. * that must be set separately. Called by omap_device code. Returns
  1498. * -EINVAL on error or 0 upon success.
  1499. */
  1500. int omap_hwmod_enable_wakeup(struct omap_hwmod *oh)
  1501. {
  1502. if (!oh->class->sysc ||
  1503. !(oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP))
  1504. return -EINVAL;
  1505. mutex_lock(&oh->_mutex);
  1506. _enable_wakeup(oh);
  1507. mutex_unlock(&oh->_mutex);
  1508. return 0;
  1509. }
  1510. /**
  1511. * omap_hwmod_disable_wakeup - prevent device from waking the system
  1512. * @oh: struct omap_hwmod *
  1513. *
  1514. * Clears the module OCP socket ENAWAKEUP bit to prevent the module
  1515. * from sending wakeups to the PRCM. Eventually this should clear
  1516. * PRCM wakeup registers to cause the PRCM to ignore wakeup events
  1517. * from the module. Does not set any wakeup routing registers beyond
  1518. * this point - if the module is to wake up any other module or
  1519. * subsystem, that must be set separately. Called by omap_device
  1520. * code. Returns -EINVAL on error or 0 upon success.
  1521. */
  1522. int omap_hwmod_disable_wakeup(struct omap_hwmod *oh)
  1523. {
  1524. if (!oh->class->sysc ||
  1525. !(oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP))
  1526. return -EINVAL;
  1527. mutex_lock(&oh->_mutex);
  1528. _disable_wakeup(oh);
  1529. mutex_unlock(&oh->_mutex);
  1530. return 0;
  1531. }
  1532. /**
  1533. * omap_hwmod_assert_hardreset - assert the HW reset line of submodules
  1534. * contained in the hwmod module.
  1535. * @oh: struct omap_hwmod *
  1536. * @name: name of the reset line to lookup and assert
  1537. *
  1538. * Some IP like dsp, ipu or iva contain processor that require
  1539. * an HW reset line to be assert / deassert in order to enable fully
  1540. * the IP. Returns -EINVAL if @oh is null or if the operation is not
  1541. * yet supported on this OMAP; otherwise, passes along the return value
  1542. * from _assert_hardreset().
  1543. */
  1544. int omap_hwmod_assert_hardreset(struct omap_hwmod *oh, const char *name)
  1545. {
  1546. int ret;
  1547. if (!oh)
  1548. return -EINVAL;
  1549. mutex_lock(&oh->_mutex);
  1550. ret = _assert_hardreset(oh, name);
  1551. mutex_unlock(&oh->_mutex);
  1552. return ret;
  1553. }
  1554. /**
  1555. * omap_hwmod_deassert_hardreset - deassert the HW reset line of submodules
  1556. * contained in the hwmod module.
  1557. * @oh: struct omap_hwmod *
  1558. * @name: name of the reset line to look up and deassert
  1559. *
  1560. * Some IP like dsp, ipu or iva contain processor that require
  1561. * an HW reset line to be assert / deassert in order to enable fully
  1562. * the IP. Returns -EINVAL if @oh is null or if the operation is not
  1563. * yet supported on this OMAP; otherwise, passes along the return value
  1564. * from _deassert_hardreset().
  1565. */
  1566. int omap_hwmod_deassert_hardreset(struct omap_hwmod *oh, const char *name)
  1567. {
  1568. int ret;
  1569. if (!oh)
  1570. return -EINVAL;
  1571. mutex_lock(&oh->_mutex);
  1572. ret = _deassert_hardreset(oh, name);
  1573. mutex_unlock(&oh->_mutex);
  1574. return ret;
  1575. }
  1576. /**
  1577. * omap_hwmod_read_hardreset - read the HW reset line state of submodules
  1578. * contained in the hwmod module
  1579. * @oh: struct omap_hwmod *
  1580. * @name: name of the reset line to look up and read
  1581. *
  1582. * Return the current state of the hwmod @oh's reset line named @name:
  1583. * returns -EINVAL upon parameter error or if this operation
  1584. * is unsupported on the current OMAP; otherwise, passes along the return
  1585. * value from _read_hardreset().
  1586. */
  1587. int omap_hwmod_read_hardreset(struct omap_hwmod *oh, const char *name)
  1588. {
  1589. int ret;
  1590. if (!oh)
  1591. return -EINVAL;
  1592. mutex_lock(&oh->_mutex);
  1593. ret = _read_hardreset(oh, name);
  1594. mutex_unlock(&oh->_mutex);
  1595. return ret;
  1596. }
  1597. /**
  1598. * omap_hwmod_for_each_by_class - call @fn for each hwmod of class @classname
  1599. * @classname: struct omap_hwmod_class name to search for
  1600. * @fn: callback function pointer to call for each hwmod in class @classname
  1601. * @user: arbitrary context data to pass to the callback function
  1602. *
  1603. * For each omap_hwmod of class @classname, call @fn. Takes
  1604. * omap_hwmod_mutex to prevent the hwmod list from changing during the
  1605. * iteration. If the callback function returns something other than
  1606. * zero, the iterator is terminated, and the callback function's return
  1607. * value is passed back to the caller. Returns 0 upon success, -EINVAL
  1608. * if @classname or @fn are NULL, or passes back the error code from @fn.
  1609. */
  1610. int omap_hwmod_for_each_by_class(const char *classname,
  1611. int (*fn)(struct omap_hwmod *oh,
  1612. void *user),
  1613. void *user)
  1614. {
  1615. struct omap_hwmod *temp_oh;
  1616. int ret = 0;
  1617. if (!classname || !fn)
  1618. return -EINVAL;
  1619. pr_debug("omap_hwmod: %s: looking for modules of class %s\n",
  1620. __func__, classname);
  1621. mutex_lock(&omap_hwmod_mutex);
  1622. list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
  1623. if (!strcmp(temp_oh->class->name, classname)) {
  1624. pr_debug("omap_hwmod: %s: %s: calling callback fn\n",
  1625. __func__, temp_oh->name);
  1626. ret = (*fn)(temp_oh, user);
  1627. if (ret)
  1628. break;
  1629. }
  1630. }
  1631. mutex_unlock(&omap_hwmod_mutex);
  1632. if (ret)
  1633. pr_debug("omap_hwmod: %s: iterator terminated early: %d\n",
  1634. __func__, ret);
  1635. return ret;
  1636. }