atl1_main.c 68 KB

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  1. /*
  2. * Copyright(c) 2005 - 2006 Attansic Corporation. All rights reserved.
  3. * Copyright(c) 2006 Chris Snook <csnook@redhat.com>
  4. * Copyright(c) 2006 Jay Cliburn <jcliburn@gmail.com>
  5. *
  6. * Derived from Intel e1000 driver
  7. * Copyright(c) 1999 - 2005 Intel Corporation. All rights reserved.
  8. *
  9. * This program is free software; you can redistribute it and/or modify it
  10. * under the terms of the GNU General Public License as published by the Free
  11. * Software Foundation; either version 2 of the License, or (at your option)
  12. * any later version.
  13. *
  14. * This program is distributed in the hope that it will be useful, but WITHOUT
  15. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  16. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  17. * more details.
  18. *
  19. * You should have received a copy of the GNU General Public License along with
  20. * this program; if not, write to the Free Software Foundation, Inc., 59
  21. * Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  22. *
  23. * The full GNU General Public License is included in this distribution in the
  24. * file called COPYING.
  25. *
  26. * Contact Information:
  27. * Xiong Huang <xiong_huang@attansic.com>
  28. * Attansic Technology Corp. 3F 147, Xianzheng 9th Road, Zhubei,
  29. * Xinzhu 302, TAIWAN, REPUBLIC OF CHINA
  30. *
  31. * Chris Snook <csnook@redhat.com>
  32. * Jay Cliburn <jcliburn@gmail.com>
  33. *
  34. * This version is adapted from the Attansic reference driver for
  35. * inclusion in the Linux kernel. It is currently under heavy development.
  36. * A very incomplete list of things that need to be dealt with:
  37. *
  38. * TODO:
  39. * Fix TSO; tx performance is horrible with TSO enabled.
  40. * Wake on LAN.
  41. * Add more ethtool functions.
  42. * Fix abstruse irq enable/disable condition described here:
  43. * http://marc.theaimsgroup.com/?l=linux-netdev&m=116398508500553&w=2
  44. *
  45. * NEEDS TESTING:
  46. * VLAN
  47. * multicast
  48. * promiscuous mode
  49. * interrupt coalescing
  50. * SMP torture testing
  51. */
  52. #include <linux/types.h>
  53. #include <linux/netdevice.h>
  54. #include <linux/pci.h>
  55. #include <linux/spinlock.h>
  56. #include <linux/slab.h>
  57. #include <linux/string.h>
  58. #include <linux/skbuff.h>
  59. #include <linux/etherdevice.h>
  60. #include <linux/if_vlan.h>
  61. #include <linux/irqreturn.h>
  62. #include <linux/workqueue.h>
  63. #include <linux/timer.h>
  64. #include <linux/jiffies.h>
  65. #include <linux/hardirq.h>
  66. #include <linux/interrupt.h>
  67. #include <linux/irqflags.h>
  68. #include <linux/dma-mapping.h>
  69. #include <linux/net.h>
  70. #include <linux/pm.h>
  71. #include <linux/in.h>
  72. #include <linux/ip.h>
  73. #include <linux/tcp.h>
  74. #include <linux/compiler.h>
  75. #include <linux/delay.h>
  76. #include <linux/mii.h>
  77. #include <net/checksum.h>
  78. #include <asm/atomic.h>
  79. #include <asm/byteorder.h>
  80. #include "atl1.h"
  81. #define DRIVER_VERSION "2.0.7"
  82. char atl1_driver_name[] = "atl1";
  83. static const char atl1_driver_string[] = "Attansic L1 Ethernet Network Driver";
  84. static const char atl1_copyright[] = "Copyright(c) 2005-2006 Attansic Corporation.";
  85. char atl1_driver_version[] = DRIVER_VERSION;
  86. MODULE_AUTHOR
  87. ("Attansic Corporation <xiong_huang@attansic.com>, Chris Snook <csnook@redhat.com>, Jay Cliburn <jcliburn@gmail.com>");
  88. MODULE_DESCRIPTION("Attansic 1000M Ethernet Network Driver");
  89. MODULE_LICENSE("GPL");
  90. MODULE_VERSION(DRIVER_VERSION);
  91. /*
  92. * atl1_pci_tbl - PCI Device ID Table
  93. */
  94. static const struct pci_device_id atl1_pci_tbl[] = {
  95. {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATTANSIC_L1)},
  96. /* required last entry */
  97. {0,}
  98. };
  99. MODULE_DEVICE_TABLE(pci, atl1_pci_tbl);
  100. /*
  101. * atl1_sw_init - Initialize general software structures (struct atl1_adapter)
  102. * @adapter: board private structure to initialize
  103. *
  104. * atl1_sw_init initializes the Adapter private data structure.
  105. * Fields are initialized based on PCI device information and
  106. * OS network device settings (MTU size).
  107. */
  108. static int __devinit atl1_sw_init(struct atl1_adapter *adapter)
  109. {
  110. struct atl1_hw *hw = &adapter->hw;
  111. struct net_device *netdev = adapter->netdev;
  112. struct pci_dev *pdev = adapter->pdev;
  113. /* PCI config space info */
  114. pci_read_config_byte(pdev, PCI_REVISION_ID, &hw->revision_id);
  115. hw->max_frame_size = netdev->mtu + ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
  116. hw->min_frame_size = MINIMUM_ETHERNET_FRAME_SIZE;
  117. adapter->wol = 0;
  118. adapter->rx_buffer_len = (hw->max_frame_size + 7) & ~7;
  119. adapter->ict = 50000; /* 100ms */
  120. adapter->link_speed = SPEED_0; /* hardware init */
  121. adapter->link_duplex = FULL_DUPLEX;
  122. hw->phy_configured = false;
  123. hw->preamble_len = 7;
  124. hw->ipgt = 0x60;
  125. hw->min_ifg = 0x50;
  126. hw->ipgr1 = 0x40;
  127. hw->ipgr2 = 0x60;
  128. hw->max_retry = 0xf;
  129. hw->lcol = 0x37;
  130. hw->jam_ipg = 7;
  131. hw->rfd_burst = 8;
  132. hw->rrd_burst = 8;
  133. hw->rfd_fetch_gap = 1;
  134. hw->rx_jumbo_th = adapter->rx_buffer_len / 8;
  135. hw->rx_jumbo_lkah = 1;
  136. hw->rrd_ret_timer = 16;
  137. hw->tpd_burst = 4;
  138. hw->tpd_fetch_th = 16;
  139. hw->txf_burst = 0x100;
  140. hw->tx_jumbo_task_th = (hw->max_frame_size + 7) >> 3;
  141. hw->tpd_fetch_gap = 1;
  142. hw->rcb_value = atl1_rcb_64;
  143. hw->dma_ord = atl1_dma_ord_enh;
  144. hw->dmar_block = atl1_dma_req_256;
  145. hw->dmaw_block = atl1_dma_req_256;
  146. hw->cmb_rrd = 4;
  147. hw->cmb_tpd = 4;
  148. hw->cmb_rx_timer = 1; /* about 2us */
  149. hw->cmb_tx_timer = 1; /* about 2us */
  150. hw->smb_timer = 100000; /* about 200ms */
  151. spin_lock_init(&adapter->lock);
  152. spin_lock_init(&adapter->mb_lock);
  153. return 0;
  154. }
  155. /*
  156. * atl1_setup_mem_resources - allocate Tx / RX descriptor resources
  157. * @adapter: board private structure
  158. *
  159. * Return 0 on success, negative on failure
  160. */
  161. s32 atl1_setup_ring_resources(struct atl1_adapter *adapter)
  162. {
  163. struct atl1_tpd_ring *tpd_ring = &adapter->tpd_ring;
  164. struct atl1_rfd_ring *rfd_ring = &adapter->rfd_ring;
  165. struct atl1_rrd_ring *rrd_ring = &adapter->rrd_ring;
  166. struct atl1_ring_header *ring_header = &adapter->ring_header;
  167. struct pci_dev *pdev = adapter->pdev;
  168. int size;
  169. u8 offset = 0;
  170. size = sizeof(struct atl1_buffer) * (tpd_ring->count + rfd_ring->count);
  171. tpd_ring->buffer_info = kzalloc(size, GFP_KERNEL);
  172. if (unlikely(!tpd_ring->buffer_info)) {
  173. dev_err(&pdev->dev, "kzalloc failed , size = D%d\n", size);
  174. goto err_nomem;
  175. }
  176. rfd_ring->buffer_info =
  177. (struct atl1_buffer *)(tpd_ring->buffer_info + tpd_ring->count);
  178. /* real ring DMA buffer
  179. * each ring/block may need up to 8 bytes for alignment, hence the
  180. * additional 40 bytes tacked onto the end.
  181. */
  182. ring_header->size = size =
  183. sizeof(struct tx_packet_desc) * tpd_ring->count
  184. + sizeof(struct rx_free_desc) * rfd_ring->count
  185. + sizeof(struct rx_return_desc) * rrd_ring->count
  186. + sizeof(struct coals_msg_block)
  187. + sizeof(struct stats_msg_block)
  188. + 40;
  189. ring_header->desc = pci_alloc_consistent(pdev, ring_header->size,
  190. &ring_header->dma);
  191. if (unlikely(!ring_header->desc)) {
  192. dev_err(&pdev->dev, "pci_alloc_consistent failed\n");
  193. goto err_nomem;
  194. }
  195. memset(ring_header->desc, 0, ring_header->size);
  196. /* init TPD ring */
  197. tpd_ring->dma = ring_header->dma;
  198. offset = (tpd_ring->dma & 0x7) ? (8 - (ring_header->dma & 0x7)) : 0;
  199. tpd_ring->dma += offset;
  200. tpd_ring->desc = (u8 *) ring_header->desc + offset;
  201. tpd_ring->size = sizeof(struct tx_packet_desc) * tpd_ring->count;
  202. /* init RFD ring */
  203. rfd_ring->dma = tpd_ring->dma + tpd_ring->size;
  204. offset = (rfd_ring->dma & 0x7) ? (8 - (rfd_ring->dma & 0x7)) : 0;
  205. rfd_ring->dma += offset;
  206. rfd_ring->desc = (u8 *) tpd_ring->desc + (tpd_ring->size + offset);
  207. rfd_ring->size = sizeof(struct rx_free_desc) * rfd_ring->count;
  208. /* init RRD ring */
  209. rrd_ring->dma = rfd_ring->dma + rfd_ring->size;
  210. offset = (rrd_ring->dma & 0x7) ? (8 - (rrd_ring->dma & 0x7)) : 0;
  211. rrd_ring->dma += offset;
  212. rrd_ring->desc = (u8 *) rfd_ring->desc + (rfd_ring->size + offset);
  213. rrd_ring->size = sizeof(struct rx_return_desc) * rrd_ring->count;
  214. /* init CMB */
  215. adapter->cmb.dma = rrd_ring->dma + rrd_ring->size;
  216. offset = (adapter->cmb.dma & 0x7) ? (8 - (adapter->cmb.dma & 0x7)) : 0;
  217. adapter->cmb.dma += offset;
  218. adapter->cmb.cmb = (struct coals_msg_block *)
  219. ((u8 *) rrd_ring->desc + (rrd_ring->size + offset));
  220. /* init SMB */
  221. adapter->smb.dma = adapter->cmb.dma + sizeof(struct coals_msg_block);
  222. offset = (adapter->smb.dma & 0x7) ? (8 - (adapter->smb.dma & 0x7)) : 0;
  223. adapter->smb.dma += offset;
  224. adapter->smb.smb = (struct stats_msg_block *)
  225. ((u8 *) adapter->cmb.cmb +
  226. (sizeof(struct coals_msg_block) + offset));
  227. return ATL1_SUCCESS;
  228. err_nomem:
  229. kfree(tpd_ring->buffer_info);
  230. return -ENOMEM;
  231. }
  232. void atl1_init_ring_ptrs(struct atl1_adapter *adapter)
  233. {
  234. struct atl1_tpd_ring *tpd_ring = &adapter->tpd_ring;
  235. struct atl1_rfd_ring *rfd_ring = &adapter->rfd_ring;
  236. struct atl1_rrd_ring *rrd_ring = &adapter->rrd_ring;
  237. atomic_set(&tpd_ring->next_to_use, 0);
  238. atomic_set(&tpd_ring->next_to_clean, 0);
  239. rfd_ring->next_to_clean = 0;
  240. atomic_set(&rfd_ring->next_to_use, 0);
  241. rrd_ring->next_to_use = 0;
  242. atomic_set(&rrd_ring->next_to_clean, 0);
  243. }
  244. /*
  245. * atl1_irq_enable - Enable default interrupt generation settings
  246. * @adapter: board private structure
  247. */
  248. static void atl1_irq_enable(struct atl1_adapter *adapter)
  249. {
  250. iowrite32(IMR_NORMAL_MASK, adapter->hw.hw_addr + REG_IMR);
  251. ioread32(adapter->hw.hw_addr + REG_IMR);
  252. }
  253. static void atl1_clear_phy_int(struct atl1_adapter *adapter)
  254. {
  255. u16 phy_data;
  256. unsigned long flags;
  257. spin_lock_irqsave(&adapter->lock, flags);
  258. atl1_read_phy_reg(&adapter->hw, 19, &phy_data);
  259. spin_unlock_irqrestore(&adapter->lock, flags);
  260. }
  261. static void atl1_inc_smb(struct atl1_adapter *adapter)
  262. {
  263. struct stats_msg_block *smb = adapter->smb.smb;
  264. /* Fill out the OS statistics structure */
  265. adapter->soft_stats.rx_packets += smb->rx_ok;
  266. adapter->soft_stats.tx_packets += smb->tx_ok;
  267. adapter->soft_stats.rx_bytes += smb->rx_byte_cnt;
  268. adapter->soft_stats.tx_bytes += smb->tx_byte_cnt;
  269. adapter->soft_stats.multicast += smb->rx_mcast;
  270. adapter->soft_stats.collisions += (smb->tx_1_col + smb->tx_2_col * 2 +
  271. smb->tx_late_col + smb->tx_abort_col * adapter->hw.max_retry);
  272. /* Rx Errors */
  273. adapter->soft_stats.rx_errors += (smb->rx_frag + smb->rx_fcs_err +
  274. smb->rx_len_err + smb->rx_sz_ov + smb->rx_rxf_ov +
  275. smb->rx_rrd_ov + smb->rx_align_err);
  276. adapter->soft_stats.rx_fifo_errors += smb->rx_rxf_ov;
  277. adapter->soft_stats.rx_length_errors += smb->rx_len_err;
  278. adapter->soft_stats.rx_crc_errors += smb->rx_fcs_err;
  279. adapter->soft_stats.rx_frame_errors += smb->rx_align_err;
  280. adapter->soft_stats.rx_missed_errors += (smb->rx_rrd_ov +
  281. smb->rx_rxf_ov);
  282. adapter->soft_stats.rx_pause += smb->rx_pause;
  283. adapter->soft_stats.rx_rrd_ov += smb->rx_rrd_ov;
  284. adapter->soft_stats.rx_trunc += smb->rx_sz_ov;
  285. /* Tx Errors */
  286. adapter->soft_stats.tx_errors += (smb->tx_late_col +
  287. smb->tx_abort_col + smb->tx_underrun + smb->tx_trunc);
  288. adapter->soft_stats.tx_fifo_errors += smb->tx_underrun;
  289. adapter->soft_stats.tx_aborted_errors += smb->tx_abort_col;
  290. adapter->soft_stats.tx_window_errors += smb->tx_late_col;
  291. adapter->soft_stats.excecol += smb->tx_abort_col;
  292. adapter->soft_stats.deffer += smb->tx_defer;
  293. adapter->soft_stats.scc += smb->tx_1_col;
  294. adapter->soft_stats.mcc += smb->tx_2_col;
  295. adapter->soft_stats.latecol += smb->tx_late_col;
  296. adapter->soft_stats.tx_underun += smb->tx_underrun;
  297. adapter->soft_stats.tx_trunc += smb->tx_trunc;
  298. adapter->soft_stats.tx_pause += smb->tx_pause;
  299. adapter->net_stats.rx_packets = adapter->soft_stats.rx_packets;
  300. adapter->net_stats.tx_packets = adapter->soft_stats.tx_packets;
  301. adapter->net_stats.rx_bytes = adapter->soft_stats.rx_bytes;
  302. adapter->net_stats.tx_bytes = adapter->soft_stats.tx_bytes;
  303. adapter->net_stats.multicast = adapter->soft_stats.multicast;
  304. adapter->net_stats.collisions = adapter->soft_stats.collisions;
  305. adapter->net_stats.rx_errors = adapter->soft_stats.rx_errors;
  306. adapter->net_stats.rx_over_errors =
  307. adapter->soft_stats.rx_missed_errors;
  308. adapter->net_stats.rx_length_errors =
  309. adapter->soft_stats.rx_length_errors;
  310. adapter->net_stats.rx_crc_errors = adapter->soft_stats.rx_crc_errors;
  311. adapter->net_stats.rx_frame_errors =
  312. adapter->soft_stats.rx_frame_errors;
  313. adapter->net_stats.rx_fifo_errors = adapter->soft_stats.rx_fifo_errors;
  314. adapter->net_stats.rx_missed_errors =
  315. adapter->soft_stats.rx_missed_errors;
  316. adapter->net_stats.tx_errors = adapter->soft_stats.tx_errors;
  317. adapter->net_stats.tx_fifo_errors = adapter->soft_stats.tx_fifo_errors;
  318. adapter->net_stats.tx_aborted_errors =
  319. adapter->soft_stats.tx_aborted_errors;
  320. adapter->net_stats.tx_window_errors =
  321. adapter->soft_stats.tx_window_errors;
  322. adapter->net_stats.tx_carrier_errors =
  323. adapter->soft_stats.tx_carrier_errors;
  324. }
  325. static void atl1_rx_checksum(struct atl1_adapter *adapter,
  326. struct rx_return_desc *rrd, struct sk_buff *skb)
  327. {
  328. struct pci_dev *pdev = adapter->pdev;
  329. skb->ip_summed = CHECKSUM_NONE;
  330. if (unlikely(rrd->pkt_flg & PACKET_FLAG_ERR)) {
  331. if (rrd->err_flg & (ERR_FLAG_CRC | ERR_FLAG_TRUNC |
  332. ERR_FLAG_CODE | ERR_FLAG_OV)) {
  333. adapter->hw_csum_err++;
  334. dev_printk(KERN_DEBUG, &pdev->dev,
  335. "rx checksum error\n");
  336. return;
  337. }
  338. }
  339. /* not IPv4 */
  340. if (!(rrd->pkt_flg & PACKET_FLAG_IPV4))
  341. /* checksum is invalid, but it's not an IPv4 pkt, so ok */
  342. return;
  343. /* IPv4 packet */
  344. if (likely(!(rrd->err_flg &
  345. (ERR_FLAG_IP_CHKSUM | ERR_FLAG_L4_CHKSUM)))) {
  346. skb->ip_summed = CHECKSUM_UNNECESSARY;
  347. adapter->hw_csum_good++;
  348. return;
  349. }
  350. /* IPv4, but hardware thinks its checksum is wrong */
  351. dev_printk(KERN_DEBUG, &pdev->dev,
  352. "hw csum wrong, pkt_flag:%x, err_flag:%x\n",
  353. rrd->pkt_flg, rrd->err_flg);
  354. skb->ip_summed = CHECKSUM_COMPLETE;
  355. skb->csum = htons(rrd->xsz.xsum_sz.rx_chksum);
  356. adapter->hw_csum_err++;
  357. return;
  358. }
  359. /*
  360. * atl1_alloc_rx_buffers - Replace used receive buffers
  361. * @adapter: address of board private structure
  362. */
  363. static u16 atl1_alloc_rx_buffers(struct atl1_adapter *adapter)
  364. {
  365. struct atl1_rfd_ring *rfd_ring = &adapter->rfd_ring;
  366. struct pci_dev *pdev = adapter->pdev;
  367. struct page *page;
  368. unsigned long offset;
  369. struct atl1_buffer *buffer_info, *next_info;
  370. struct sk_buff *skb;
  371. u16 num_alloc = 0;
  372. u16 rfd_next_to_use, next_next;
  373. struct rx_free_desc *rfd_desc;
  374. next_next = rfd_next_to_use = atomic_read(&rfd_ring->next_to_use);
  375. if (++next_next == rfd_ring->count)
  376. next_next = 0;
  377. buffer_info = &rfd_ring->buffer_info[rfd_next_to_use];
  378. next_info = &rfd_ring->buffer_info[next_next];
  379. while (!buffer_info->alloced && !next_info->alloced) {
  380. if (buffer_info->skb) {
  381. buffer_info->alloced = 1;
  382. goto next;
  383. }
  384. rfd_desc = ATL1_RFD_DESC(rfd_ring, rfd_next_to_use);
  385. skb = dev_alloc_skb(adapter->rx_buffer_len + NET_IP_ALIGN);
  386. if (unlikely(!skb)) { /* Better luck next round */
  387. adapter->net_stats.rx_dropped++;
  388. break;
  389. }
  390. /*
  391. * Make buffer alignment 2 beyond a 16 byte boundary
  392. * this will result in a 16 byte aligned IP header after
  393. * the 14 byte MAC header is removed
  394. */
  395. skb_reserve(skb, NET_IP_ALIGN);
  396. buffer_info->alloced = 1;
  397. buffer_info->skb = skb;
  398. buffer_info->length = (u16) adapter->rx_buffer_len;
  399. page = virt_to_page(skb->data);
  400. offset = (unsigned long)skb->data & ~PAGE_MASK;
  401. buffer_info->dma = pci_map_page(pdev, page, offset,
  402. adapter->rx_buffer_len,
  403. PCI_DMA_FROMDEVICE);
  404. rfd_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
  405. rfd_desc->buf_len = cpu_to_le16(adapter->rx_buffer_len);
  406. rfd_desc->coalese = 0;
  407. next:
  408. rfd_next_to_use = next_next;
  409. if (unlikely(++next_next == rfd_ring->count))
  410. next_next = 0;
  411. buffer_info = &rfd_ring->buffer_info[rfd_next_to_use];
  412. next_info = &rfd_ring->buffer_info[next_next];
  413. num_alloc++;
  414. }
  415. if (num_alloc) {
  416. /*
  417. * Force memory writes to complete before letting h/w
  418. * know there are new descriptors to fetch. (Only
  419. * applicable for weak-ordered memory model archs,
  420. * such as IA-64).
  421. */
  422. wmb();
  423. atomic_set(&rfd_ring->next_to_use, (int)rfd_next_to_use);
  424. }
  425. return num_alloc;
  426. }
  427. static void atl1_clean_alloc_flag(struct atl1_adapter *adapter,
  428. struct rx_return_desc *rrd, u16 offset)
  429. {
  430. struct atl1_rfd_ring *rfd_ring = &adapter->rfd_ring;
  431. while (rfd_ring->next_to_clean != (rrd->buf_indx + offset)) {
  432. rfd_ring->buffer_info[rfd_ring->next_to_clean].alloced = 0;
  433. if (++rfd_ring->next_to_clean == rfd_ring->count) {
  434. rfd_ring->next_to_clean = 0;
  435. }
  436. }
  437. }
  438. static void atl1_update_rfd_index(struct atl1_adapter *adapter,
  439. struct rx_return_desc *rrd)
  440. {
  441. u16 num_buf;
  442. num_buf = (rrd->xsz.xsum_sz.pkt_size + adapter->rx_buffer_len - 1) /
  443. adapter->rx_buffer_len;
  444. if (rrd->num_buf == num_buf)
  445. /* clean alloc flag for bad rrd */
  446. atl1_clean_alloc_flag(adapter, rrd, num_buf);
  447. }
  448. static void atl1_intr_rx(struct atl1_adapter *adapter)
  449. {
  450. int i, count;
  451. u16 length;
  452. u16 rrd_next_to_clean;
  453. u32 value;
  454. struct atl1_rfd_ring *rfd_ring = &adapter->rfd_ring;
  455. struct atl1_rrd_ring *rrd_ring = &adapter->rrd_ring;
  456. struct atl1_buffer *buffer_info;
  457. struct rx_return_desc *rrd;
  458. struct sk_buff *skb;
  459. count = 0;
  460. rrd_next_to_clean = atomic_read(&rrd_ring->next_to_clean);
  461. while (1) {
  462. rrd = ATL1_RRD_DESC(rrd_ring, rrd_next_to_clean);
  463. i = 1;
  464. if (likely(rrd->xsz.valid)) { /* packet valid */
  465. chk_rrd:
  466. /* check rrd status */
  467. if (likely(rrd->num_buf == 1))
  468. goto rrd_ok;
  469. /* rrd seems to be bad */
  470. if (unlikely(i-- > 0)) {
  471. /* rrd may not be DMAed completely */
  472. dev_printk(KERN_DEBUG, &adapter->pdev->dev,
  473. "incomplete RRD DMA transfer\n");
  474. udelay(1);
  475. goto chk_rrd;
  476. }
  477. /* bad rrd */
  478. dev_printk(KERN_DEBUG, &adapter->pdev->dev,
  479. "bad RRD\n");
  480. /* see if update RFD index */
  481. if (rrd->num_buf > 1)
  482. atl1_update_rfd_index(adapter, rrd);
  483. /* update rrd */
  484. rrd->xsz.valid = 0;
  485. if (++rrd_next_to_clean == rrd_ring->count)
  486. rrd_next_to_clean = 0;
  487. count++;
  488. continue;
  489. } else { /* current rrd still not be updated */
  490. break;
  491. }
  492. rrd_ok:
  493. /* clean alloc flag for bad rrd */
  494. atl1_clean_alloc_flag(adapter, rrd, 0);
  495. buffer_info = &rfd_ring->buffer_info[rrd->buf_indx];
  496. if (++rfd_ring->next_to_clean == rfd_ring->count)
  497. rfd_ring->next_to_clean = 0;
  498. /* update rrd next to clean */
  499. if (++rrd_next_to_clean == rrd_ring->count)
  500. rrd_next_to_clean = 0;
  501. count++;
  502. if (unlikely(rrd->pkt_flg & PACKET_FLAG_ERR)) {
  503. if (!(rrd->err_flg &
  504. (ERR_FLAG_IP_CHKSUM | ERR_FLAG_L4_CHKSUM
  505. | ERR_FLAG_LEN))) {
  506. /* packet error, don't need upstream */
  507. buffer_info->alloced = 0;
  508. rrd->xsz.valid = 0;
  509. continue;
  510. }
  511. }
  512. /* Good Receive */
  513. pci_unmap_page(adapter->pdev, buffer_info->dma,
  514. buffer_info->length, PCI_DMA_FROMDEVICE);
  515. skb = buffer_info->skb;
  516. length = le16_to_cpu(rrd->xsz.xsum_sz.pkt_size);
  517. skb_put(skb, length - ETHERNET_FCS_SIZE);
  518. /* Receive Checksum Offload */
  519. atl1_rx_checksum(adapter, rrd, skb);
  520. skb->protocol = eth_type_trans(skb, adapter->netdev);
  521. if (adapter->vlgrp && (rrd->pkt_flg & PACKET_FLAG_VLAN_INS)) {
  522. u16 vlan_tag = (rrd->vlan_tag >> 4) |
  523. ((rrd->vlan_tag & 7) << 13) |
  524. ((rrd->vlan_tag & 8) << 9);
  525. vlan_hwaccel_rx(skb, adapter->vlgrp, vlan_tag);
  526. } else
  527. netif_rx(skb);
  528. /* let protocol layer free skb */
  529. buffer_info->skb = NULL;
  530. buffer_info->alloced = 0;
  531. rrd->xsz.valid = 0;
  532. adapter->netdev->last_rx = jiffies;
  533. }
  534. atomic_set(&rrd_ring->next_to_clean, rrd_next_to_clean);
  535. atl1_alloc_rx_buffers(adapter);
  536. /* update mailbox ? */
  537. if (count) {
  538. u32 tpd_next_to_use;
  539. u32 rfd_next_to_use;
  540. u32 rrd_next_to_clean;
  541. spin_lock(&adapter->mb_lock);
  542. tpd_next_to_use = atomic_read(&adapter->tpd_ring.next_to_use);
  543. rfd_next_to_use =
  544. atomic_read(&adapter->rfd_ring.next_to_use);
  545. rrd_next_to_clean =
  546. atomic_read(&adapter->rrd_ring.next_to_clean);
  547. value = ((rfd_next_to_use & MB_RFD_PROD_INDX_MASK) <<
  548. MB_RFD_PROD_INDX_SHIFT) |
  549. ((rrd_next_to_clean & MB_RRD_CONS_INDX_MASK) <<
  550. MB_RRD_CONS_INDX_SHIFT) |
  551. ((tpd_next_to_use & MB_TPD_PROD_INDX_MASK) <<
  552. MB_TPD_PROD_INDX_SHIFT);
  553. iowrite32(value, adapter->hw.hw_addr + REG_MAILBOX);
  554. spin_unlock(&adapter->mb_lock);
  555. }
  556. }
  557. static void atl1_intr_tx(struct atl1_adapter *adapter)
  558. {
  559. struct atl1_tpd_ring *tpd_ring = &adapter->tpd_ring;
  560. struct atl1_buffer *buffer_info;
  561. u16 sw_tpd_next_to_clean;
  562. u16 cmb_tpd_next_to_clean;
  563. sw_tpd_next_to_clean = atomic_read(&tpd_ring->next_to_clean);
  564. cmb_tpd_next_to_clean = le16_to_cpu(adapter->cmb.cmb->tpd_cons_idx);
  565. while (cmb_tpd_next_to_clean != sw_tpd_next_to_clean) {
  566. struct tx_packet_desc *tpd;
  567. tpd = ATL1_TPD_DESC(tpd_ring, sw_tpd_next_to_clean);
  568. buffer_info = &tpd_ring->buffer_info[sw_tpd_next_to_clean];
  569. if (buffer_info->dma) {
  570. pci_unmap_page(adapter->pdev, buffer_info->dma,
  571. buffer_info->length, PCI_DMA_TODEVICE);
  572. buffer_info->dma = 0;
  573. }
  574. if (buffer_info->skb) {
  575. dev_kfree_skb_irq(buffer_info->skb);
  576. buffer_info->skb = NULL;
  577. }
  578. tpd->buffer_addr = 0;
  579. tpd->desc.data = 0;
  580. if (++sw_tpd_next_to_clean == tpd_ring->count)
  581. sw_tpd_next_to_clean = 0;
  582. }
  583. atomic_set(&tpd_ring->next_to_clean, sw_tpd_next_to_clean);
  584. if (netif_queue_stopped(adapter->netdev)
  585. && netif_carrier_ok(adapter->netdev))
  586. netif_wake_queue(adapter->netdev);
  587. }
  588. static void atl1_check_for_link(struct atl1_adapter *adapter)
  589. {
  590. struct net_device *netdev = adapter->netdev;
  591. u16 phy_data = 0;
  592. spin_lock(&adapter->lock);
  593. adapter->phy_timer_pending = false;
  594. atl1_read_phy_reg(&adapter->hw, MII_BMSR, &phy_data);
  595. atl1_read_phy_reg(&adapter->hw, MII_BMSR, &phy_data);
  596. spin_unlock(&adapter->lock);
  597. /* notify upper layer link down ASAP */
  598. if (!(phy_data & BMSR_LSTATUS)) { /* Link Down */
  599. if (netif_carrier_ok(netdev)) { /* old link state: Up */
  600. dev_info(&adapter->pdev->dev, "%s link is down\n",
  601. netdev->name);
  602. adapter->link_speed = SPEED_0;
  603. netif_carrier_off(netdev);
  604. netif_stop_queue(netdev);
  605. }
  606. }
  607. schedule_work(&adapter->link_chg_task);
  608. }
  609. /*
  610. * atl1_intr - Interrupt Handler
  611. * @irq: interrupt number
  612. * @data: pointer to a network interface device structure
  613. * @pt_regs: CPU registers structure
  614. */
  615. static irqreturn_t atl1_intr(int irq, void *data)
  616. {
  617. struct atl1_adapter *adapter = netdev_priv(data);
  618. u32 status;
  619. u8 update_rx;
  620. int max_ints = 10;
  621. status = adapter->cmb.cmb->int_stats;
  622. if (!status)
  623. return IRQ_NONE;
  624. update_rx = 0;
  625. do {
  626. /* clear CMB interrupt status at once */
  627. adapter->cmb.cmb->int_stats = 0;
  628. if (status & ISR_GPHY) /* clear phy status */
  629. atl1_clear_phy_int(adapter);
  630. /* clear ISR status, and Enable CMB DMA/Disable Interrupt */
  631. iowrite32(status | ISR_DIS_INT, adapter->hw.hw_addr + REG_ISR);
  632. /* check if SMB intr */
  633. if (status & ISR_SMB)
  634. atl1_inc_smb(adapter);
  635. /* check if PCIE PHY Link down */
  636. if (status & ISR_PHY_LINKDOWN) {
  637. dev_printk(KERN_DEBUG, &adapter->pdev->dev,
  638. "pcie phy link down %x\n", status);
  639. if (netif_running(adapter->netdev)) { /* reset MAC */
  640. iowrite32(0, adapter->hw.hw_addr + REG_IMR);
  641. schedule_work(&adapter->pcie_dma_to_rst_task);
  642. return IRQ_HANDLED;
  643. }
  644. }
  645. /* check if DMA read/write error ? */
  646. if (status & (ISR_DMAR_TO_RST | ISR_DMAW_TO_RST)) {
  647. dev_printk(KERN_DEBUG, &adapter->pdev->dev,
  648. "pcie DMA r/w error (status = 0x%x)\n",
  649. status);
  650. iowrite32(0, adapter->hw.hw_addr + REG_IMR);
  651. schedule_work(&adapter->pcie_dma_to_rst_task);
  652. return IRQ_HANDLED;
  653. }
  654. /* link event */
  655. if (status & ISR_GPHY) {
  656. adapter->soft_stats.tx_carrier_errors++;
  657. atl1_check_for_link(adapter);
  658. }
  659. /* transmit event */
  660. if (status & ISR_CMB_TX)
  661. atl1_intr_tx(adapter);
  662. /* rx exception */
  663. if (unlikely(status & (ISR_RXF_OV | ISR_RFD_UNRUN |
  664. ISR_RRD_OV | ISR_HOST_RFD_UNRUN |
  665. ISR_HOST_RRD_OV | ISR_CMB_RX))) {
  666. if (status & (ISR_RXF_OV | ISR_RFD_UNRUN |
  667. ISR_RRD_OV | ISR_HOST_RFD_UNRUN |
  668. ISR_HOST_RRD_OV))
  669. dev_printk(KERN_DEBUG, &adapter->pdev->dev,
  670. "rx exception, ISR = 0x%x\n", status);
  671. atl1_intr_rx(adapter);
  672. }
  673. if (--max_ints < 0)
  674. break;
  675. } while ((status = adapter->cmb.cmb->int_stats));
  676. /* re-enable Interrupt */
  677. iowrite32(ISR_DIS_SMB | ISR_DIS_DMA, adapter->hw.hw_addr + REG_ISR);
  678. return IRQ_HANDLED;
  679. }
  680. /*
  681. * atl1_set_multi - Multicast and Promiscuous mode set
  682. * @netdev: network interface device structure
  683. *
  684. * The set_multi entry point is called whenever the multicast address
  685. * list or the network interface flags are updated. This routine is
  686. * responsible for configuring the hardware for proper multicast,
  687. * promiscuous mode, and all-multi behavior.
  688. */
  689. static void atl1_set_multi(struct net_device *netdev)
  690. {
  691. struct atl1_adapter *adapter = netdev_priv(netdev);
  692. struct atl1_hw *hw = &adapter->hw;
  693. struct dev_mc_list *mc_ptr;
  694. u32 rctl;
  695. u32 hash_value;
  696. /* Check for Promiscuous and All Multicast modes */
  697. rctl = ioread32(hw->hw_addr + REG_MAC_CTRL);
  698. if (netdev->flags & IFF_PROMISC)
  699. rctl |= MAC_CTRL_PROMIS_EN;
  700. else if (netdev->flags & IFF_ALLMULTI) {
  701. rctl |= MAC_CTRL_MC_ALL_EN;
  702. rctl &= ~MAC_CTRL_PROMIS_EN;
  703. } else
  704. rctl &= ~(MAC_CTRL_PROMIS_EN | MAC_CTRL_MC_ALL_EN);
  705. iowrite32(rctl, hw->hw_addr + REG_MAC_CTRL);
  706. /* clear the old settings from the multicast hash table */
  707. iowrite32(0, hw->hw_addr + REG_RX_HASH_TABLE);
  708. iowrite32(0, (hw->hw_addr + REG_RX_HASH_TABLE) + (1 << 2));
  709. /* compute mc addresses' hash value ,and put it into hash table */
  710. for (mc_ptr = netdev->mc_list; mc_ptr; mc_ptr = mc_ptr->next) {
  711. hash_value = atl1_hash_mc_addr(hw, mc_ptr->dmi_addr);
  712. atl1_hash_set(hw, hash_value);
  713. }
  714. }
  715. static void atl1_setup_mac_ctrl(struct atl1_adapter *adapter)
  716. {
  717. u32 value;
  718. struct atl1_hw *hw = &adapter->hw;
  719. struct net_device *netdev = adapter->netdev;
  720. /* Config MAC CTRL Register */
  721. value = MAC_CTRL_TX_EN | MAC_CTRL_RX_EN;
  722. /* duplex */
  723. if (FULL_DUPLEX == adapter->link_duplex)
  724. value |= MAC_CTRL_DUPLX;
  725. /* speed */
  726. value |= ((u32) ((SPEED_1000 == adapter->link_speed) ?
  727. MAC_CTRL_SPEED_1000 : MAC_CTRL_SPEED_10_100) <<
  728. MAC_CTRL_SPEED_SHIFT);
  729. /* flow control */
  730. value |= (MAC_CTRL_TX_FLOW | MAC_CTRL_RX_FLOW);
  731. /* PAD & CRC */
  732. value |= (MAC_CTRL_ADD_CRC | MAC_CTRL_PAD);
  733. /* preamble length */
  734. value |= (((u32) adapter->hw.preamble_len
  735. & MAC_CTRL_PRMLEN_MASK) << MAC_CTRL_PRMLEN_SHIFT);
  736. /* vlan */
  737. if (adapter->vlgrp)
  738. value |= MAC_CTRL_RMV_VLAN;
  739. /* rx checksum
  740. if (adapter->rx_csum)
  741. value |= MAC_CTRL_RX_CHKSUM_EN;
  742. */
  743. /* filter mode */
  744. value |= MAC_CTRL_BC_EN;
  745. if (netdev->flags & IFF_PROMISC)
  746. value |= MAC_CTRL_PROMIS_EN;
  747. else if (netdev->flags & IFF_ALLMULTI)
  748. value |= MAC_CTRL_MC_ALL_EN;
  749. /* value |= MAC_CTRL_LOOPBACK; */
  750. iowrite32(value, hw->hw_addr + REG_MAC_CTRL);
  751. }
  752. static u32 atl1_check_link(struct atl1_adapter *adapter)
  753. {
  754. struct atl1_hw *hw = &adapter->hw;
  755. struct net_device *netdev = adapter->netdev;
  756. u32 ret_val;
  757. u16 speed, duplex, phy_data;
  758. int reconfig = 0;
  759. /* MII_BMSR must read twice */
  760. atl1_read_phy_reg(hw, MII_BMSR, &phy_data);
  761. atl1_read_phy_reg(hw, MII_BMSR, &phy_data);
  762. if (!(phy_data & BMSR_LSTATUS)) { /* link down */
  763. if (netif_carrier_ok(netdev)) { /* old link state: Up */
  764. dev_info(&adapter->pdev->dev, "link is down\n");
  765. adapter->link_speed = SPEED_0;
  766. netif_carrier_off(netdev);
  767. netif_stop_queue(netdev);
  768. }
  769. return ATL1_SUCCESS;
  770. }
  771. /* Link Up */
  772. ret_val = atl1_get_speed_and_duplex(hw, &speed, &duplex);
  773. if (ret_val)
  774. return ret_val;
  775. switch (hw->media_type) {
  776. case MEDIA_TYPE_1000M_FULL:
  777. if (speed != SPEED_1000 || duplex != FULL_DUPLEX)
  778. reconfig = 1;
  779. break;
  780. case MEDIA_TYPE_100M_FULL:
  781. if (speed != SPEED_100 || duplex != FULL_DUPLEX)
  782. reconfig = 1;
  783. break;
  784. case MEDIA_TYPE_100M_HALF:
  785. if (speed != SPEED_100 || duplex != HALF_DUPLEX)
  786. reconfig = 1;
  787. break;
  788. case MEDIA_TYPE_10M_FULL:
  789. if (speed != SPEED_10 || duplex != FULL_DUPLEX)
  790. reconfig = 1;
  791. break;
  792. case MEDIA_TYPE_10M_HALF:
  793. if (speed != SPEED_10 || duplex != HALF_DUPLEX)
  794. reconfig = 1;
  795. break;
  796. }
  797. /* link result is our setting */
  798. if (!reconfig) {
  799. if (adapter->link_speed != speed
  800. || adapter->link_duplex != duplex) {
  801. adapter->link_speed = speed;
  802. adapter->link_duplex = duplex;
  803. atl1_setup_mac_ctrl(adapter);
  804. dev_info(&adapter->pdev->dev,
  805. "%s link is up %d Mbps %s\n",
  806. netdev->name, adapter->link_speed,
  807. adapter->link_duplex == FULL_DUPLEX ?
  808. "full duplex" : "half duplex");
  809. }
  810. if (!netif_carrier_ok(netdev)) { /* Link down -> Up */
  811. netif_carrier_on(netdev);
  812. netif_wake_queue(netdev);
  813. }
  814. return ATL1_SUCCESS;
  815. }
  816. /* change orignal link status */
  817. if (netif_carrier_ok(netdev)) {
  818. adapter->link_speed = SPEED_0;
  819. netif_carrier_off(netdev);
  820. netif_stop_queue(netdev);
  821. }
  822. if (hw->media_type != MEDIA_TYPE_AUTO_SENSOR &&
  823. hw->media_type != MEDIA_TYPE_1000M_FULL) {
  824. switch (hw->media_type) {
  825. case MEDIA_TYPE_100M_FULL:
  826. phy_data = MII_CR_FULL_DUPLEX | MII_CR_SPEED_100 |
  827. MII_CR_RESET;
  828. break;
  829. case MEDIA_TYPE_100M_HALF:
  830. phy_data = MII_CR_SPEED_100 | MII_CR_RESET;
  831. break;
  832. case MEDIA_TYPE_10M_FULL:
  833. phy_data =
  834. MII_CR_FULL_DUPLEX | MII_CR_SPEED_10 | MII_CR_RESET;
  835. break;
  836. default: /* MEDIA_TYPE_10M_HALF: */
  837. phy_data = MII_CR_SPEED_10 | MII_CR_RESET;
  838. break;
  839. }
  840. atl1_write_phy_reg(hw, MII_BMCR, phy_data);
  841. return ATL1_SUCCESS;
  842. }
  843. /* auto-neg, insert timer to re-config phy */
  844. if (!adapter->phy_timer_pending) {
  845. adapter->phy_timer_pending = true;
  846. mod_timer(&adapter->phy_config_timer, jiffies + 3 * HZ);
  847. }
  848. return ATL1_SUCCESS;
  849. }
  850. static void set_flow_ctrl_old(struct atl1_adapter *adapter)
  851. {
  852. u32 hi, lo, value;
  853. /* RFD Flow Control */
  854. value = adapter->rfd_ring.count;
  855. hi = value / 16;
  856. if (hi < 2)
  857. hi = 2;
  858. lo = value * 7 / 8;
  859. value = ((hi & RXQ_RXF_PAUSE_TH_HI_MASK) << RXQ_RXF_PAUSE_TH_HI_SHIFT) |
  860. ((lo & RXQ_RXF_PAUSE_TH_LO_MASK) << RXQ_RXF_PAUSE_TH_LO_SHIFT);
  861. iowrite32(value, adapter->hw.hw_addr + REG_RXQ_RXF_PAUSE_THRESH);
  862. /* RRD Flow Control */
  863. value = adapter->rrd_ring.count;
  864. lo = value / 16;
  865. hi = value * 7 / 8;
  866. if (lo < 2)
  867. lo = 2;
  868. value = ((hi & RXQ_RRD_PAUSE_TH_HI_MASK) << RXQ_RRD_PAUSE_TH_HI_SHIFT) |
  869. ((lo & RXQ_RRD_PAUSE_TH_LO_MASK) << RXQ_RRD_PAUSE_TH_LO_SHIFT);
  870. iowrite32(value, adapter->hw.hw_addr + REG_RXQ_RRD_PAUSE_THRESH);
  871. }
  872. static void set_flow_ctrl_new(struct atl1_hw *hw)
  873. {
  874. u32 hi, lo, value;
  875. /* RXF Flow Control */
  876. value = ioread32(hw->hw_addr + REG_SRAM_RXF_LEN);
  877. lo = value / 16;
  878. if (lo < 192)
  879. lo = 192;
  880. hi = value * 7 / 8;
  881. if (hi < lo)
  882. hi = lo + 16;
  883. value = ((hi & RXQ_RXF_PAUSE_TH_HI_MASK) << RXQ_RXF_PAUSE_TH_HI_SHIFT) |
  884. ((lo & RXQ_RXF_PAUSE_TH_LO_MASK) << RXQ_RXF_PAUSE_TH_LO_SHIFT);
  885. iowrite32(value, hw->hw_addr + REG_RXQ_RXF_PAUSE_THRESH);
  886. /* RRD Flow Control */
  887. value = ioread32(hw->hw_addr + REG_SRAM_RRD_LEN);
  888. lo = value / 8;
  889. hi = value * 7 / 8;
  890. if (lo < 2)
  891. lo = 2;
  892. if (hi < lo)
  893. hi = lo + 3;
  894. value = ((hi & RXQ_RRD_PAUSE_TH_HI_MASK) << RXQ_RRD_PAUSE_TH_HI_SHIFT) |
  895. ((lo & RXQ_RRD_PAUSE_TH_LO_MASK) << RXQ_RRD_PAUSE_TH_LO_SHIFT);
  896. iowrite32(value, hw->hw_addr + REG_RXQ_RRD_PAUSE_THRESH);
  897. }
  898. /*
  899. * atl1_configure - Configure Transmit&Receive Unit after Reset
  900. * @adapter: board private structure
  901. *
  902. * Configure the Tx /Rx unit of the MAC after a reset.
  903. */
  904. static u32 atl1_configure(struct atl1_adapter *adapter)
  905. {
  906. struct atl1_hw *hw = &adapter->hw;
  907. u32 value;
  908. /* clear interrupt status */
  909. iowrite32(0xffffffff, adapter->hw.hw_addr + REG_ISR);
  910. /* set MAC Address */
  911. value = (((u32) hw->mac_addr[2]) << 24) |
  912. (((u32) hw->mac_addr[3]) << 16) |
  913. (((u32) hw->mac_addr[4]) << 8) |
  914. (((u32) hw->mac_addr[5]));
  915. iowrite32(value, hw->hw_addr + REG_MAC_STA_ADDR);
  916. value = (((u32) hw->mac_addr[0]) << 8) | (((u32) hw->mac_addr[1]));
  917. iowrite32(value, hw->hw_addr + (REG_MAC_STA_ADDR + 4));
  918. /* tx / rx ring */
  919. /* HI base address */
  920. iowrite32((u32) ((adapter->tpd_ring.dma & 0xffffffff00000000ULL) >> 32),
  921. hw->hw_addr + REG_DESC_BASE_ADDR_HI);
  922. /* LO base address */
  923. iowrite32((u32) (adapter->rfd_ring.dma & 0x00000000ffffffffULL),
  924. hw->hw_addr + REG_DESC_RFD_ADDR_LO);
  925. iowrite32((u32) (adapter->rrd_ring.dma & 0x00000000ffffffffULL),
  926. hw->hw_addr + REG_DESC_RRD_ADDR_LO);
  927. iowrite32((u32) (adapter->tpd_ring.dma & 0x00000000ffffffffULL),
  928. hw->hw_addr + REG_DESC_TPD_ADDR_LO);
  929. iowrite32((u32) (adapter->cmb.dma & 0x00000000ffffffffULL),
  930. hw->hw_addr + REG_DESC_CMB_ADDR_LO);
  931. iowrite32((u32) (adapter->smb.dma & 0x00000000ffffffffULL),
  932. hw->hw_addr + REG_DESC_SMB_ADDR_LO);
  933. /* element count */
  934. value = adapter->rrd_ring.count;
  935. value <<= 16;
  936. value += adapter->rfd_ring.count;
  937. iowrite32(value, hw->hw_addr + REG_DESC_RFD_RRD_RING_SIZE);
  938. iowrite32(adapter->tpd_ring.count, hw->hw_addr +
  939. REG_DESC_TPD_RING_SIZE);
  940. /* Load Ptr */
  941. iowrite32(1, hw->hw_addr + REG_LOAD_PTR);
  942. /* config Mailbox */
  943. value = ((atomic_read(&adapter->tpd_ring.next_to_use)
  944. & MB_TPD_PROD_INDX_MASK) << MB_TPD_PROD_INDX_SHIFT) |
  945. ((atomic_read(&adapter->rrd_ring.next_to_clean)
  946. & MB_RRD_CONS_INDX_MASK) << MB_RRD_CONS_INDX_SHIFT) |
  947. ((atomic_read(&adapter->rfd_ring.next_to_use)
  948. & MB_RFD_PROD_INDX_MASK) << MB_RFD_PROD_INDX_SHIFT);
  949. iowrite32(value, hw->hw_addr + REG_MAILBOX);
  950. /* config IPG/IFG */
  951. value = (((u32) hw->ipgt & MAC_IPG_IFG_IPGT_MASK)
  952. << MAC_IPG_IFG_IPGT_SHIFT) |
  953. (((u32) hw->min_ifg & MAC_IPG_IFG_MIFG_MASK)
  954. << MAC_IPG_IFG_MIFG_SHIFT) |
  955. (((u32) hw->ipgr1 & MAC_IPG_IFG_IPGR1_MASK)
  956. << MAC_IPG_IFG_IPGR1_SHIFT) |
  957. (((u32) hw->ipgr2 & MAC_IPG_IFG_IPGR2_MASK)
  958. << MAC_IPG_IFG_IPGR2_SHIFT);
  959. iowrite32(value, hw->hw_addr + REG_MAC_IPG_IFG);
  960. /* config Half-Duplex Control */
  961. value = ((u32) hw->lcol & MAC_HALF_DUPLX_CTRL_LCOL_MASK) |
  962. (((u32) hw->max_retry & MAC_HALF_DUPLX_CTRL_RETRY_MASK)
  963. << MAC_HALF_DUPLX_CTRL_RETRY_SHIFT) |
  964. MAC_HALF_DUPLX_CTRL_EXC_DEF_EN |
  965. (0xa << MAC_HALF_DUPLX_CTRL_ABEBT_SHIFT) |
  966. (((u32) hw->jam_ipg & MAC_HALF_DUPLX_CTRL_JAMIPG_MASK)
  967. << MAC_HALF_DUPLX_CTRL_JAMIPG_SHIFT);
  968. iowrite32(value, hw->hw_addr + REG_MAC_HALF_DUPLX_CTRL);
  969. /* set Interrupt Moderator Timer */
  970. iowrite16(adapter->imt, hw->hw_addr + REG_IRQ_MODU_TIMER_INIT);
  971. iowrite32(MASTER_CTRL_ITIMER_EN, hw->hw_addr + REG_MASTER_CTRL);
  972. /* set Interrupt Clear Timer */
  973. iowrite16(adapter->ict, hw->hw_addr + REG_CMBDISDMA_TIMER);
  974. /* set MTU, 4 : VLAN */
  975. iowrite32(hw->max_frame_size + 4, hw->hw_addr + REG_MTU);
  976. /* jumbo size & rrd retirement timer */
  977. value = (((u32) hw->rx_jumbo_th & RXQ_JMBOSZ_TH_MASK)
  978. << RXQ_JMBOSZ_TH_SHIFT) |
  979. (((u32) hw->rx_jumbo_lkah & RXQ_JMBO_LKAH_MASK)
  980. << RXQ_JMBO_LKAH_SHIFT) |
  981. (((u32) hw->rrd_ret_timer & RXQ_RRD_TIMER_MASK)
  982. << RXQ_RRD_TIMER_SHIFT);
  983. iowrite32(value, hw->hw_addr + REG_RXQ_JMBOSZ_RRDTIM);
  984. /* Flow Control */
  985. switch (hw->dev_rev) {
  986. case 0x8001:
  987. case 0x9001:
  988. case 0x9002:
  989. case 0x9003:
  990. set_flow_ctrl_old(adapter);
  991. break;
  992. default:
  993. set_flow_ctrl_new(hw);
  994. break;
  995. }
  996. /* config TXQ */
  997. value = (((u32) hw->tpd_burst & TXQ_CTRL_TPD_BURST_NUM_MASK)
  998. << TXQ_CTRL_TPD_BURST_NUM_SHIFT) |
  999. (((u32) hw->txf_burst & TXQ_CTRL_TXF_BURST_NUM_MASK)
  1000. << TXQ_CTRL_TXF_BURST_NUM_SHIFT) |
  1001. (((u32) hw->tpd_fetch_th & TXQ_CTRL_TPD_FETCH_TH_MASK)
  1002. << TXQ_CTRL_TPD_FETCH_TH_SHIFT) | TXQ_CTRL_ENH_MODE |
  1003. TXQ_CTRL_EN;
  1004. iowrite32(value, hw->hw_addr + REG_TXQ_CTRL);
  1005. /* min tpd fetch gap & tx jumbo packet size threshold for taskoffload */
  1006. value = (((u32) hw->tx_jumbo_task_th & TX_JUMBO_TASK_TH_MASK)
  1007. << TX_JUMBO_TASK_TH_SHIFT) |
  1008. (((u32) hw->tpd_fetch_gap & TX_TPD_MIN_IPG_MASK)
  1009. << TX_TPD_MIN_IPG_SHIFT);
  1010. iowrite32(value, hw->hw_addr + REG_TX_JUMBO_TASK_TH_TPD_IPG);
  1011. /* config RXQ */
  1012. value = (((u32) hw->rfd_burst & RXQ_CTRL_RFD_BURST_NUM_MASK)
  1013. << RXQ_CTRL_RFD_BURST_NUM_SHIFT) |
  1014. (((u32) hw->rrd_burst & RXQ_CTRL_RRD_BURST_THRESH_MASK)
  1015. << RXQ_CTRL_RRD_BURST_THRESH_SHIFT) |
  1016. (((u32) hw->rfd_fetch_gap & RXQ_CTRL_RFD_PREF_MIN_IPG_MASK)
  1017. << RXQ_CTRL_RFD_PREF_MIN_IPG_SHIFT) | RXQ_CTRL_CUT_THRU_EN |
  1018. RXQ_CTRL_EN;
  1019. iowrite32(value, hw->hw_addr + REG_RXQ_CTRL);
  1020. /* config DMA Engine */
  1021. value = ((((u32) hw->dmar_block) & DMA_CTRL_DMAR_BURST_LEN_MASK)
  1022. << DMA_CTRL_DMAR_BURST_LEN_SHIFT) |
  1023. ((((u32) hw->dmaw_block) & DMA_CTRL_DMAR_BURST_LEN_MASK)
  1024. << DMA_CTRL_DMAR_BURST_LEN_SHIFT) | DMA_CTRL_DMAR_EN |
  1025. DMA_CTRL_DMAW_EN;
  1026. value |= (u32) hw->dma_ord;
  1027. if (atl1_rcb_128 == hw->rcb_value)
  1028. value |= DMA_CTRL_RCB_VALUE;
  1029. iowrite32(value, hw->hw_addr + REG_DMA_CTRL);
  1030. /* config CMB / SMB */
  1031. value = hw->cmb_rrd | ((u32) hw->cmb_tpd << 16);
  1032. iowrite32(value, hw->hw_addr + REG_CMB_WRITE_TH);
  1033. value = hw->cmb_rx_timer | ((u32) hw->cmb_tx_timer << 16);
  1034. iowrite32(value, hw->hw_addr + REG_CMB_WRITE_TIMER);
  1035. iowrite32(hw->smb_timer, hw->hw_addr + REG_SMB_TIMER);
  1036. /* --- enable CMB / SMB */
  1037. value = CSMB_CTRL_CMB_EN | CSMB_CTRL_SMB_EN;
  1038. iowrite32(value, hw->hw_addr + REG_CSMB_CTRL);
  1039. value = ioread32(adapter->hw.hw_addr + REG_ISR);
  1040. if (unlikely((value & ISR_PHY_LINKDOWN) != 0))
  1041. value = 1; /* config failed */
  1042. else
  1043. value = 0;
  1044. /* clear all interrupt status */
  1045. iowrite32(0x3fffffff, adapter->hw.hw_addr + REG_ISR);
  1046. iowrite32(0, adapter->hw.hw_addr + REG_ISR);
  1047. return value;
  1048. }
  1049. /*
  1050. * atl1_irq_disable - Mask off interrupt generation on the NIC
  1051. * @adapter: board private structure
  1052. */
  1053. static void atl1_irq_disable(struct atl1_adapter *adapter)
  1054. {
  1055. iowrite32(0, adapter->hw.hw_addr + REG_IMR);
  1056. ioread32(adapter->hw.hw_addr + REG_IMR);
  1057. synchronize_irq(adapter->pdev->irq);
  1058. }
  1059. static void atl1_vlan_rx_register(struct net_device *netdev,
  1060. struct vlan_group *grp)
  1061. {
  1062. struct atl1_adapter *adapter = netdev_priv(netdev);
  1063. unsigned long flags;
  1064. u32 ctrl;
  1065. spin_lock_irqsave(&adapter->lock, flags);
  1066. /* atl1_irq_disable(adapter); */
  1067. adapter->vlgrp = grp;
  1068. if (grp) {
  1069. /* enable VLAN tag insert/strip */
  1070. ctrl = ioread32(adapter->hw.hw_addr + REG_MAC_CTRL);
  1071. ctrl |= MAC_CTRL_RMV_VLAN;
  1072. iowrite32(ctrl, adapter->hw.hw_addr + REG_MAC_CTRL);
  1073. } else {
  1074. /* disable VLAN tag insert/strip */
  1075. ctrl = ioread32(adapter->hw.hw_addr + REG_MAC_CTRL);
  1076. ctrl &= ~MAC_CTRL_RMV_VLAN;
  1077. iowrite32(ctrl, adapter->hw.hw_addr + REG_MAC_CTRL);
  1078. }
  1079. /* atl1_irq_enable(adapter); */
  1080. spin_unlock_irqrestore(&adapter->lock, flags);
  1081. }
  1082. static void atl1_restore_vlan(struct atl1_adapter *adapter)
  1083. {
  1084. atl1_vlan_rx_register(adapter->netdev, adapter->vlgrp);
  1085. }
  1086. static u16 tpd_avail(struct atl1_tpd_ring *tpd_ring)
  1087. {
  1088. u16 next_to_clean = atomic_read(&tpd_ring->next_to_clean);
  1089. u16 next_to_use = atomic_read(&tpd_ring->next_to_use);
  1090. return ((next_to_clean > next_to_use) ?
  1091. next_to_clean - next_to_use - 1 :
  1092. tpd_ring->count + next_to_clean - next_to_use - 1);
  1093. }
  1094. static int atl1_tso(struct atl1_adapter *adapter, struct sk_buff *skb,
  1095. struct tso_param *tso)
  1096. {
  1097. /* We enter this function holding a spinlock. */
  1098. u8 ipofst;
  1099. int err;
  1100. if (skb_shinfo(skb)->gso_size) {
  1101. if (skb_header_cloned(skb)) {
  1102. err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
  1103. if (unlikely(err))
  1104. return err;
  1105. }
  1106. if (skb->protocol == ntohs(ETH_P_IP)) {
  1107. struct iphdr *iph = ip_hdr(skb);
  1108. iph->tot_len = 0;
  1109. iph->check = 0;
  1110. tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr,
  1111. iph->daddr, 0, IPPROTO_TCP, 0);
  1112. ipofst = skb_network_offset(skb);
  1113. if (ipofst != ENET_HEADER_SIZE) /* 802.3 frame */
  1114. tso->tsopl |= 1 << TSO_PARAM_ETHTYPE_SHIFT;
  1115. tso->tsopl |= (iph->ihl &
  1116. CSUM_PARAM_IPHL_MASK) << CSUM_PARAM_IPHL_SHIFT;
  1117. tso->tsopl |= (tcp_hdrlen(skb) &
  1118. TSO_PARAM_TCPHDRLEN_MASK) <<
  1119. TSO_PARAM_TCPHDRLEN_SHIFT;
  1120. tso->tsopl |= (skb_shinfo(skb)->gso_size &
  1121. TSO_PARAM_MSS_MASK) << TSO_PARAM_MSS_SHIFT;
  1122. tso->tsopl |= 1 << TSO_PARAM_IPCKSUM_SHIFT;
  1123. tso->tsopl |= 1 << TSO_PARAM_TCPCKSUM_SHIFT;
  1124. tso->tsopl |= 1 << TSO_PARAM_SEGMENT_SHIFT;
  1125. return true;
  1126. }
  1127. }
  1128. return false;
  1129. }
  1130. static int atl1_tx_csum(struct atl1_adapter *adapter, struct sk_buff *skb,
  1131. struct csum_param *csum)
  1132. {
  1133. u8 css, cso;
  1134. if (likely(skb->ip_summed == CHECKSUM_PARTIAL)) {
  1135. cso = skb_transport_offset(skb);
  1136. css = cso + skb->csum_offset;
  1137. if (unlikely(cso & 0x1)) {
  1138. dev_printk(KERN_DEBUG, &adapter->pdev->dev,
  1139. "payload offset not an even number\n");
  1140. return -1;
  1141. }
  1142. csum->csumpl |= (cso & CSUM_PARAM_PLOADOFFSET_MASK) <<
  1143. CSUM_PARAM_PLOADOFFSET_SHIFT;
  1144. csum->csumpl |= (css & CSUM_PARAM_XSUMOFFSET_MASK) <<
  1145. CSUM_PARAM_XSUMOFFSET_SHIFT;
  1146. csum->csumpl |= 1 << CSUM_PARAM_CUSTOMCKSUM_SHIFT;
  1147. return true;
  1148. }
  1149. return true;
  1150. }
  1151. static void atl1_tx_map(struct atl1_adapter *adapter, struct sk_buff *skb,
  1152. bool tcp_seg)
  1153. {
  1154. /* We enter this function holding a spinlock. */
  1155. struct atl1_tpd_ring *tpd_ring = &adapter->tpd_ring;
  1156. struct atl1_buffer *buffer_info;
  1157. struct page *page;
  1158. int first_buf_len = skb->len;
  1159. unsigned long offset;
  1160. unsigned int nr_frags;
  1161. unsigned int f;
  1162. u16 tpd_next_to_use;
  1163. u16 proto_hdr_len;
  1164. u16 i, m, len12;
  1165. first_buf_len -= skb->data_len;
  1166. nr_frags = skb_shinfo(skb)->nr_frags;
  1167. tpd_next_to_use = atomic_read(&tpd_ring->next_to_use);
  1168. buffer_info = &tpd_ring->buffer_info[tpd_next_to_use];
  1169. if (unlikely(buffer_info->skb))
  1170. BUG();
  1171. buffer_info->skb = NULL; /* put skb in last TPD */
  1172. if (tcp_seg) {
  1173. /* TSO/GSO */
  1174. proto_hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
  1175. buffer_info->length = proto_hdr_len;
  1176. page = virt_to_page(skb->data);
  1177. offset = (unsigned long)skb->data & ~PAGE_MASK;
  1178. buffer_info->dma = pci_map_page(adapter->pdev, page,
  1179. offset, proto_hdr_len,
  1180. PCI_DMA_TODEVICE);
  1181. if (++tpd_next_to_use == tpd_ring->count)
  1182. tpd_next_to_use = 0;
  1183. if (first_buf_len > proto_hdr_len) {
  1184. len12 = first_buf_len - proto_hdr_len;
  1185. m = (len12 + ATL1_MAX_TX_BUF_LEN - 1) /
  1186. ATL1_MAX_TX_BUF_LEN;
  1187. for (i = 0; i < m; i++) {
  1188. buffer_info =
  1189. &tpd_ring->buffer_info[tpd_next_to_use];
  1190. buffer_info->skb = NULL;
  1191. buffer_info->length =
  1192. (ATL1_MAX_TX_BUF_LEN >=
  1193. len12) ? ATL1_MAX_TX_BUF_LEN : len12;
  1194. len12 -= buffer_info->length;
  1195. page = virt_to_page(skb->data +
  1196. (proto_hdr_len +
  1197. i * ATL1_MAX_TX_BUF_LEN));
  1198. offset = (unsigned long)(skb->data +
  1199. (proto_hdr_len +
  1200. i * ATL1_MAX_TX_BUF_LEN)) & ~PAGE_MASK;
  1201. buffer_info->dma = pci_map_page(adapter->pdev,
  1202. page, offset, buffer_info->length,
  1203. PCI_DMA_TODEVICE);
  1204. if (++tpd_next_to_use == tpd_ring->count)
  1205. tpd_next_to_use = 0;
  1206. }
  1207. }
  1208. } else {
  1209. /* not TSO/GSO */
  1210. buffer_info->length = first_buf_len;
  1211. page = virt_to_page(skb->data);
  1212. offset = (unsigned long)skb->data & ~PAGE_MASK;
  1213. buffer_info->dma = pci_map_page(adapter->pdev, page,
  1214. offset, first_buf_len, PCI_DMA_TODEVICE);
  1215. if (++tpd_next_to_use == tpd_ring->count)
  1216. tpd_next_to_use = 0;
  1217. }
  1218. for (f = 0; f < nr_frags; f++) {
  1219. struct skb_frag_struct *frag;
  1220. u16 lenf, i, m;
  1221. frag = &skb_shinfo(skb)->frags[f];
  1222. lenf = frag->size;
  1223. m = (lenf + ATL1_MAX_TX_BUF_LEN - 1) / ATL1_MAX_TX_BUF_LEN;
  1224. for (i = 0; i < m; i++) {
  1225. buffer_info = &tpd_ring->buffer_info[tpd_next_to_use];
  1226. if (unlikely(buffer_info->skb))
  1227. BUG();
  1228. buffer_info->skb = NULL;
  1229. buffer_info->length = (lenf > ATL1_MAX_TX_BUF_LEN) ?
  1230. ATL1_MAX_TX_BUF_LEN : lenf;
  1231. lenf -= buffer_info->length;
  1232. buffer_info->dma = pci_map_page(adapter->pdev,
  1233. frag->page,
  1234. frag->page_offset + (i * ATL1_MAX_TX_BUF_LEN),
  1235. buffer_info->length, PCI_DMA_TODEVICE);
  1236. if (++tpd_next_to_use == tpd_ring->count)
  1237. tpd_next_to_use = 0;
  1238. }
  1239. }
  1240. /* last tpd's buffer-info */
  1241. buffer_info->skb = skb;
  1242. }
  1243. static void atl1_tx_queue(struct atl1_adapter *adapter, int count,
  1244. union tpd_descr *descr)
  1245. {
  1246. /* We enter this function holding a spinlock. */
  1247. struct atl1_tpd_ring *tpd_ring = &adapter->tpd_ring;
  1248. int j;
  1249. u32 val;
  1250. struct atl1_buffer *buffer_info;
  1251. struct tx_packet_desc *tpd;
  1252. u16 tpd_next_to_use = atomic_read(&tpd_ring->next_to_use);
  1253. for (j = 0; j < count; j++) {
  1254. buffer_info = &tpd_ring->buffer_info[tpd_next_to_use];
  1255. tpd = ATL1_TPD_DESC(&adapter->tpd_ring, tpd_next_to_use);
  1256. tpd->desc.csum.csumpu = descr->csum.csumpu;
  1257. tpd->desc.csum.csumpl = descr->csum.csumpl;
  1258. tpd->desc.tso.tsopu = descr->tso.tsopu;
  1259. tpd->desc.tso.tsopl = descr->tso.tsopl;
  1260. tpd->buffer_addr = cpu_to_le64(buffer_info->dma);
  1261. tpd->desc.data = descr->data;
  1262. tpd->desc.csum.csumpu |= (cpu_to_le16(buffer_info->length) &
  1263. CSUM_PARAM_BUFLEN_MASK) << CSUM_PARAM_BUFLEN_SHIFT;
  1264. val = (descr->tso.tsopl >> TSO_PARAM_SEGMENT_SHIFT) &
  1265. TSO_PARAM_SEGMENT_MASK;
  1266. if (val && !j)
  1267. tpd->desc.tso.tsopl |= 1 << TSO_PARAM_HDRFLAG_SHIFT;
  1268. if (j == (count - 1))
  1269. tpd->desc.csum.csumpl |= 1 << CSUM_PARAM_EOP_SHIFT;
  1270. if (++tpd_next_to_use == tpd_ring->count)
  1271. tpd_next_to_use = 0;
  1272. }
  1273. /*
  1274. * Force memory writes to complete before letting h/w
  1275. * know there are new descriptors to fetch. (Only
  1276. * applicable for weak-ordered memory model archs,
  1277. * such as IA-64).
  1278. */
  1279. wmb();
  1280. atomic_set(&tpd_ring->next_to_use, (int)tpd_next_to_use);
  1281. }
  1282. static void atl1_update_mailbox(struct atl1_adapter *adapter)
  1283. {
  1284. unsigned long flags;
  1285. u32 tpd_next_to_use;
  1286. u32 rfd_next_to_use;
  1287. u32 rrd_next_to_clean;
  1288. u32 value;
  1289. spin_lock_irqsave(&adapter->mb_lock, flags);
  1290. tpd_next_to_use = atomic_read(&adapter->tpd_ring.next_to_use);
  1291. rfd_next_to_use = atomic_read(&adapter->rfd_ring.next_to_use);
  1292. rrd_next_to_clean = atomic_read(&adapter->rrd_ring.next_to_clean);
  1293. value = ((rfd_next_to_use & MB_RFD_PROD_INDX_MASK) <<
  1294. MB_RFD_PROD_INDX_SHIFT) |
  1295. ((rrd_next_to_clean & MB_RRD_CONS_INDX_MASK) <<
  1296. MB_RRD_CONS_INDX_SHIFT) |
  1297. ((tpd_next_to_use & MB_TPD_PROD_INDX_MASK) <<
  1298. MB_TPD_PROD_INDX_SHIFT);
  1299. iowrite32(value, adapter->hw.hw_addr + REG_MAILBOX);
  1300. spin_unlock_irqrestore(&adapter->mb_lock, flags);
  1301. }
  1302. static int atl1_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
  1303. {
  1304. struct atl1_adapter *adapter = netdev_priv(netdev);
  1305. int len = skb->len;
  1306. int tso;
  1307. int count = 1;
  1308. int ret_val;
  1309. u32 val;
  1310. union tpd_descr param;
  1311. u16 frag_size;
  1312. u16 vlan_tag;
  1313. unsigned long flags;
  1314. unsigned int nr_frags = 0;
  1315. unsigned int mss = 0;
  1316. unsigned int f;
  1317. unsigned int proto_hdr_len;
  1318. len -= skb->data_len;
  1319. if (unlikely(skb->len == 0)) {
  1320. dev_kfree_skb_any(skb);
  1321. return NETDEV_TX_OK;
  1322. }
  1323. param.data = 0;
  1324. param.tso.tsopu = 0;
  1325. param.tso.tsopl = 0;
  1326. param.csum.csumpu = 0;
  1327. param.csum.csumpl = 0;
  1328. /* nr_frags will be nonzero if we're doing scatter/gather (SG) */
  1329. nr_frags = skb_shinfo(skb)->nr_frags;
  1330. for (f = 0; f < nr_frags; f++) {
  1331. frag_size = skb_shinfo(skb)->frags[f].size;
  1332. if (frag_size)
  1333. count += (frag_size + ATL1_MAX_TX_BUF_LEN - 1) /
  1334. ATL1_MAX_TX_BUF_LEN;
  1335. }
  1336. /* mss will be nonzero if we're doing segment offload (TSO/GSO) */
  1337. mss = skb_shinfo(skb)->gso_size;
  1338. if (mss) {
  1339. if (skb->protocol == htons(ETH_P_IP)) {
  1340. proto_hdr_len = (skb_transport_offset(skb) +
  1341. tcp_hdrlen(skb));
  1342. if (unlikely(proto_hdr_len > len)) {
  1343. dev_kfree_skb_any(skb);
  1344. return NETDEV_TX_OK;
  1345. }
  1346. /* need additional TPD ? */
  1347. if (proto_hdr_len != len)
  1348. count += (len - proto_hdr_len +
  1349. ATL1_MAX_TX_BUF_LEN - 1) /
  1350. ATL1_MAX_TX_BUF_LEN;
  1351. }
  1352. }
  1353. local_irq_save(flags);
  1354. if (!spin_trylock(&adapter->lock)) {
  1355. /* Can't get lock - tell upper layer to requeue */
  1356. local_irq_restore(flags);
  1357. dev_printk(KERN_DEBUG, &adapter->pdev->dev, "tx locked\n");
  1358. return NETDEV_TX_LOCKED;
  1359. }
  1360. if (tpd_avail(&adapter->tpd_ring) < count) {
  1361. /* not enough descriptors */
  1362. netif_stop_queue(netdev);
  1363. spin_unlock_irqrestore(&adapter->lock, flags);
  1364. dev_printk(KERN_DEBUG, &adapter->pdev->dev, "tx busy\n");
  1365. return NETDEV_TX_BUSY;
  1366. }
  1367. param.data = 0;
  1368. if (adapter->vlgrp && vlan_tx_tag_present(skb)) {
  1369. vlan_tag = vlan_tx_tag_get(skb);
  1370. vlan_tag = (vlan_tag << 4) | (vlan_tag >> 13) |
  1371. ((vlan_tag >> 9) & 0x8);
  1372. param.csum.csumpl |= 1 << CSUM_PARAM_INSVLAG_SHIFT;
  1373. param.csum.csumpu |= (vlan_tag & CSUM_PARAM_VALANTAG_MASK) <<
  1374. CSUM_PARAM_VALAN_SHIFT;
  1375. }
  1376. tso = atl1_tso(adapter, skb, &param.tso);
  1377. if (tso < 0) {
  1378. spin_unlock_irqrestore(&adapter->lock, flags);
  1379. dev_kfree_skb_any(skb);
  1380. return NETDEV_TX_OK;
  1381. }
  1382. if (!tso) {
  1383. ret_val = atl1_tx_csum(adapter, skb, &param.csum);
  1384. if (ret_val < 0) {
  1385. spin_unlock_irqrestore(&adapter->lock, flags);
  1386. dev_kfree_skb_any(skb);
  1387. return NETDEV_TX_OK;
  1388. }
  1389. }
  1390. val = (param.csum.csumpl >> CSUM_PARAM_SEGMENT_SHIFT) &
  1391. CSUM_PARAM_SEGMENT_MASK;
  1392. atl1_tx_map(adapter, skb, 1 == val);
  1393. atl1_tx_queue(adapter, count, &param);
  1394. netdev->trans_start = jiffies;
  1395. spin_unlock_irqrestore(&adapter->lock, flags);
  1396. atl1_update_mailbox(adapter);
  1397. return NETDEV_TX_OK;
  1398. }
  1399. /*
  1400. * atl1_get_stats - Get System Network Statistics
  1401. * @netdev: network interface device structure
  1402. *
  1403. * Returns the address of the device statistics structure.
  1404. * The statistics are actually updated from the timer callback.
  1405. */
  1406. static struct net_device_stats *atl1_get_stats(struct net_device *netdev)
  1407. {
  1408. struct atl1_adapter *adapter = netdev_priv(netdev);
  1409. return &adapter->net_stats;
  1410. }
  1411. /*
  1412. * atl1_clean_rx_ring - Free RFD Buffers
  1413. * @adapter: board private structure
  1414. */
  1415. static void atl1_clean_rx_ring(struct atl1_adapter *adapter)
  1416. {
  1417. struct atl1_rfd_ring *rfd_ring = &adapter->rfd_ring;
  1418. struct atl1_rrd_ring *rrd_ring = &adapter->rrd_ring;
  1419. struct atl1_buffer *buffer_info;
  1420. struct pci_dev *pdev = adapter->pdev;
  1421. unsigned long size;
  1422. unsigned int i;
  1423. /* Free all the Rx ring sk_buffs */
  1424. for (i = 0; i < rfd_ring->count; i++) {
  1425. buffer_info = &rfd_ring->buffer_info[i];
  1426. if (buffer_info->dma) {
  1427. pci_unmap_page(pdev, buffer_info->dma,
  1428. buffer_info->length, PCI_DMA_FROMDEVICE);
  1429. buffer_info->dma = 0;
  1430. }
  1431. if (buffer_info->skb) {
  1432. dev_kfree_skb(buffer_info->skb);
  1433. buffer_info->skb = NULL;
  1434. }
  1435. }
  1436. size = sizeof(struct atl1_buffer) * rfd_ring->count;
  1437. memset(rfd_ring->buffer_info, 0, size);
  1438. /* Zero out the descriptor ring */
  1439. memset(rfd_ring->desc, 0, rfd_ring->size);
  1440. rfd_ring->next_to_clean = 0;
  1441. atomic_set(&rfd_ring->next_to_use, 0);
  1442. rrd_ring->next_to_use = 0;
  1443. atomic_set(&rrd_ring->next_to_clean, 0);
  1444. }
  1445. /*
  1446. * atl1_clean_tx_ring - Free Tx Buffers
  1447. * @adapter: board private structure
  1448. */
  1449. static void atl1_clean_tx_ring(struct atl1_adapter *adapter)
  1450. {
  1451. struct atl1_tpd_ring *tpd_ring = &adapter->tpd_ring;
  1452. struct atl1_buffer *buffer_info;
  1453. struct pci_dev *pdev = adapter->pdev;
  1454. unsigned long size;
  1455. unsigned int i;
  1456. /* Free all the Tx ring sk_buffs */
  1457. for (i = 0; i < tpd_ring->count; i++) {
  1458. buffer_info = &tpd_ring->buffer_info[i];
  1459. if (buffer_info->dma) {
  1460. pci_unmap_page(pdev, buffer_info->dma,
  1461. buffer_info->length, PCI_DMA_TODEVICE);
  1462. buffer_info->dma = 0;
  1463. }
  1464. }
  1465. for (i = 0; i < tpd_ring->count; i++) {
  1466. buffer_info = &tpd_ring->buffer_info[i];
  1467. if (buffer_info->skb) {
  1468. dev_kfree_skb_any(buffer_info->skb);
  1469. buffer_info->skb = NULL;
  1470. }
  1471. }
  1472. size = sizeof(struct atl1_buffer) * tpd_ring->count;
  1473. memset(tpd_ring->buffer_info, 0, size);
  1474. /* Zero out the descriptor ring */
  1475. memset(tpd_ring->desc, 0, tpd_ring->size);
  1476. atomic_set(&tpd_ring->next_to_use, 0);
  1477. atomic_set(&tpd_ring->next_to_clean, 0);
  1478. }
  1479. /*
  1480. * atl1_free_ring_resources - Free Tx / RX descriptor Resources
  1481. * @adapter: board private structure
  1482. *
  1483. * Free all transmit software resources
  1484. */
  1485. void atl1_free_ring_resources(struct atl1_adapter *adapter)
  1486. {
  1487. struct pci_dev *pdev = adapter->pdev;
  1488. struct atl1_tpd_ring *tpd_ring = &adapter->tpd_ring;
  1489. struct atl1_rfd_ring *rfd_ring = &adapter->rfd_ring;
  1490. struct atl1_rrd_ring *rrd_ring = &adapter->rrd_ring;
  1491. struct atl1_ring_header *ring_header = &adapter->ring_header;
  1492. atl1_clean_tx_ring(adapter);
  1493. atl1_clean_rx_ring(adapter);
  1494. kfree(tpd_ring->buffer_info);
  1495. pci_free_consistent(pdev, ring_header->size, ring_header->desc,
  1496. ring_header->dma);
  1497. tpd_ring->buffer_info = NULL;
  1498. tpd_ring->desc = NULL;
  1499. tpd_ring->dma = 0;
  1500. rfd_ring->buffer_info = NULL;
  1501. rfd_ring->desc = NULL;
  1502. rfd_ring->dma = 0;
  1503. rrd_ring->desc = NULL;
  1504. rrd_ring->dma = 0;
  1505. }
  1506. s32 atl1_up(struct atl1_adapter *adapter)
  1507. {
  1508. struct net_device *netdev = adapter->netdev;
  1509. int err;
  1510. int irq_flags = IRQF_SAMPLE_RANDOM;
  1511. /* hardware has been reset, we need to reload some things */
  1512. atl1_set_multi(netdev);
  1513. atl1_init_ring_ptrs(adapter);
  1514. atl1_restore_vlan(adapter);
  1515. err = atl1_alloc_rx_buffers(adapter);
  1516. if (unlikely(!err)) /* no RX BUFFER allocated */
  1517. return -ENOMEM;
  1518. if (unlikely(atl1_configure(adapter))) {
  1519. err = -EIO;
  1520. goto err_up;
  1521. }
  1522. err = pci_enable_msi(adapter->pdev);
  1523. if (err) {
  1524. dev_info(&adapter->pdev->dev,
  1525. "Unable to enable MSI: %d\n", err);
  1526. irq_flags |= IRQF_SHARED;
  1527. }
  1528. err = request_irq(adapter->pdev->irq, &atl1_intr, irq_flags,
  1529. netdev->name, netdev);
  1530. if (unlikely(err))
  1531. goto err_up;
  1532. mod_timer(&adapter->watchdog_timer, jiffies);
  1533. atl1_irq_enable(adapter);
  1534. atl1_check_link(adapter);
  1535. return 0;
  1536. err_up:
  1537. pci_disable_msi(adapter->pdev);
  1538. /* free rx_buffers */
  1539. atl1_clean_rx_ring(adapter);
  1540. return err;
  1541. }
  1542. void atl1_down(struct atl1_adapter *adapter)
  1543. {
  1544. struct net_device *netdev = adapter->netdev;
  1545. del_timer_sync(&adapter->watchdog_timer);
  1546. del_timer_sync(&adapter->phy_config_timer);
  1547. adapter->phy_timer_pending = false;
  1548. atl1_irq_disable(adapter);
  1549. free_irq(adapter->pdev->irq, netdev);
  1550. pci_disable_msi(adapter->pdev);
  1551. atl1_reset_hw(&adapter->hw);
  1552. adapter->cmb.cmb->int_stats = 0;
  1553. adapter->link_speed = SPEED_0;
  1554. adapter->link_duplex = -1;
  1555. netif_carrier_off(netdev);
  1556. netif_stop_queue(netdev);
  1557. atl1_clean_tx_ring(adapter);
  1558. atl1_clean_rx_ring(adapter);
  1559. }
  1560. /*
  1561. * atl1_change_mtu - Change the Maximum Transfer Unit
  1562. * @netdev: network interface device structure
  1563. * @new_mtu: new value for maximum frame size
  1564. *
  1565. * Returns 0 on success, negative on failure
  1566. */
  1567. static int atl1_change_mtu(struct net_device *netdev, int new_mtu)
  1568. {
  1569. struct atl1_adapter *adapter = netdev_priv(netdev);
  1570. int old_mtu = netdev->mtu;
  1571. int max_frame = new_mtu + ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
  1572. if ((max_frame < MINIMUM_ETHERNET_FRAME_SIZE) ||
  1573. (max_frame > MAX_JUMBO_FRAME_SIZE)) {
  1574. dev_warn(&adapter->pdev->dev, "invalid MTU setting\n");
  1575. return -EINVAL;
  1576. }
  1577. adapter->hw.max_frame_size = max_frame;
  1578. adapter->hw.tx_jumbo_task_th = (max_frame + 7) >> 3;
  1579. adapter->rx_buffer_len = (max_frame + 7) & ~7;
  1580. adapter->hw.rx_jumbo_th = adapter->rx_buffer_len / 8;
  1581. netdev->mtu = new_mtu;
  1582. if ((old_mtu != new_mtu) && netif_running(netdev)) {
  1583. atl1_down(adapter);
  1584. atl1_up(adapter);
  1585. }
  1586. return 0;
  1587. }
  1588. /*
  1589. * atl1_set_mac - Change the Ethernet Address of the NIC
  1590. * @netdev: network interface device structure
  1591. * @p: pointer to an address structure
  1592. *
  1593. * Returns 0 on success, negative on failure
  1594. */
  1595. static int atl1_set_mac(struct net_device *netdev, void *p)
  1596. {
  1597. struct atl1_adapter *adapter = netdev_priv(netdev);
  1598. struct sockaddr *addr = p;
  1599. if (netif_running(netdev))
  1600. return -EBUSY;
  1601. if (!is_valid_ether_addr(addr->sa_data))
  1602. return -EADDRNOTAVAIL;
  1603. memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
  1604. memcpy(adapter->hw.mac_addr, addr->sa_data, netdev->addr_len);
  1605. atl1_set_mac_addr(&adapter->hw);
  1606. return 0;
  1607. }
  1608. /*
  1609. * atl1_watchdog - Timer Call-back
  1610. * @data: pointer to netdev cast into an unsigned long
  1611. */
  1612. static void atl1_watchdog(unsigned long data)
  1613. {
  1614. struct atl1_adapter *adapter = (struct atl1_adapter *)data;
  1615. /* Reset the timer */
  1616. mod_timer(&adapter->watchdog_timer, jiffies + 2 * HZ);
  1617. }
  1618. static int mdio_read(struct net_device *netdev, int phy_id, int reg_num)
  1619. {
  1620. struct atl1_adapter *adapter = netdev_priv(netdev);
  1621. u16 result;
  1622. atl1_read_phy_reg(&adapter->hw, reg_num & 0x1f, &result);
  1623. return result;
  1624. }
  1625. static void mdio_write(struct net_device *netdev, int phy_id, int reg_num,
  1626. int val)
  1627. {
  1628. struct atl1_adapter *adapter = netdev_priv(netdev);
  1629. atl1_write_phy_reg(&adapter->hw, reg_num, val);
  1630. }
  1631. /*
  1632. * atl1_mii_ioctl -
  1633. * @netdev:
  1634. * @ifreq:
  1635. * @cmd:
  1636. */
  1637. static int atl1_mii_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
  1638. {
  1639. struct atl1_adapter *adapter = netdev_priv(netdev);
  1640. unsigned long flags;
  1641. int retval;
  1642. if (!netif_running(netdev))
  1643. return -EINVAL;
  1644. spin_lock_irqsave(&adapter->lock, flags);
  1645. retval = generic_mii_ioctl(&adapter->mii, if_mii(ifr), cmd, NULL);
  1646. spin_unlock_irqrestore(&adapter->lock, flags);
  1647. return retval;
  1648. }
  1649. /*
  1650. * atl1_ioctl -
  1651. * @netdev:
  1652. * @ifreq:
  1653. * @cmd:
  1654. */
  1655. static int atl1_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
  1656. {
  1657. switch (cmd) {
  1658. case SIOCGMIIPHY:
  1659. case SIOCGMIIREG:
  1660. case SIOCSMIIREG:
  1661. return atl1_mii_ioctl(netdev, ifr, cmd);
  1662. default:
  1663. return -EOPNOTSUPP;
  1664. }
  1665. }
  1666. /*
  1667. * atl1_tx_timeout - Respond to a Tx Hang
  1668. * @netdev: network interface device structure
  1669. */
  1670. static void atl1_tx_timeout(struct net_device *netdev)
  1671. {
  1672. struct atl1_adapter *adapter = netdev_priv(netdev);
  1673. /* Do the reset outside of interrupt context */
  1674. schedule_work(&adapter->tx_timeout_task);
  1675. }
  1676. /*
  1677. * atl1_phy_config - Timer Call-back
  1678. * @data: pointer to netdev cast into an unsigned long
  1679. */
  1680. static void atl1_phy_config(unsigned long data)
  1681. {
  1682. struct atl1_adapter *adapter = (struct atl1_adapter *)data;
  1683. struct atl1_hw *hw = &adapter->hw;
  1684. unsigned long flags;
  1685. spin_lock_irqsave(&adapter->lock, flags);
  1686. adapter->phy_timer_pending = false;
  1687. atl1_write_phy_reg(hw, MII_ADVERTISE, hw->mii_autoneg_adv_reg);
  1688. atl1_write_phy_reg(hw, MII_AT001_CR, hw->mii_1000t_ctrl_reg);
  1689. atl1_write_phy_reg(hw, MII_BMCR, MII_CR_RESET | MII_CR_AUTO_NEG_EN);
  1690. spin_unlock_irqrestore(&adapter->lock, flags);
  1691. }
  1692. int atl1_reset(struct atl1_adapter *adapter)
  1693. {
  1694. int ret;
  1695. ret = atl1_reset_hw(&adapter->hw);
  1696. if (ret != ATL1_SUCCESS)
  1697. return ret;
  1698. return atl1_init_hw(&adapter->hw);
  1699. }
  1700. /*
  1701. * atl1_open - Called when a network interface is made active
  1702. * @netdev: network interface device structure
  1703. *
  1704. * Returns 0 on success, negative value on failure
  1705. *
  1706. * The open entry point is called when a network interface is made
  1707. * active by the system (IFF_UP). At this point all resources needed
  1708. * for transmit and receive operations are allocated, the interrupt
  1709. * handler is registered with the OS, the watchdog timer is started,
  1710. * and the stack is notified that the interface is ready.
  1711. */
  1712. static int atl1_open(struct net_device *netdev)
  1713. {
  1714. struct atl1_adapter *adapter = netdev_priv(netdev);
  1715. int err;
  1716. /* allocate transmit descriptors */
  1717. err = atl1_setup_ring_resources(adapter);
  1718. if (err)
  1719. return err;
  1720. err = atl1_up(adapter);
  1721. if (err)
  1722. goto err_up;
  1723. return 0;
  1724. err_up:
  1725. atl1_reset(adapter);
  1726. return err;
  1727. }
  1728. /*
  1729. * atl1_close - Disables a network interface
  1730. * @netdev: network interface device structure
  1731. *
  1732. * Returns 0, this is not allowed to fail
  1733. *
  1734. * The close entry point is called when an interface is de-activated
  1735. * by the OS. The hardware is still under the drivers control, but
  1736. * needs to be disabled. A global MAC reset is issued to stop the
  1737. * hardware, and all transmit and receive resources are freed.
  1738. */
  1739. static int atl1_close(struct net_device *netdev)
  1740. {
  1741. struct atl1_adapter *adapter = netdev_priv(netdev);
  1742. atl1_down(adapter);
  1743. atl1_free_ring_resources(adapter);
  1744. return 0;
  1745. }
  1746. #ifdef CONFIG_NET_POLL_CONTROLLER
  1747. static void atl1_poll_controller(struct net_device *netdev)
  1748. {
  1749. disable_irq(netdev->irq);
  1750. atl1_intr(netdev->irq, netdev);
  1751. enable_irq(netdev->irq);
  1752. }
  1753. #endif
  1754. /*
  1755. * Orphaned vendor comment left intact here:
  1756. * <vendor comment>
  1757. * If TPD Buffer size equal to 0, PCIE DMAR_TO_INT
  1758. * will assert. We do soft reset <0x1400=1> according
  1759. * with the SPEC. BUT, it seemes that PCIE or DMA
  1760. * state-machine will not be reset. DMAR_TO_INT will
  1761. * assert again and again.
  1762. * </vendor comment>
  1763. */
  1764. static void atl1_tx_timeout_task(struct work_struct *work)
  1765. {
  1766. struct atl1_adapter *adapter =
  1767. container_of(work, struct atl1_adapter, tx_timeout_task);
  1768. struct net_device *netdev = adapter->netdev;
  1769. netif_device_detach(netdev);
  1770. atl1_down(adapter);
  1771. atl1_up(adapter);
  1772. netif_device_attach(netdev);
  1773. }
  1774. /*
  1775. * atl1_link_chg_task - deal with link change event Out of interrupt context
  1776. */
  1777. static void atl1_link_chg_task(struct work_struct *work)
  1778. {
  1779. struct atl1_adapter *adapter =
  1780. container_of(work, struct atl1_adapter, link_chg_task);
  1781. unsigned long flags;
  1782. spin_lock_irqsave(&adapter->lock, flags);
  1783. atl1_check_link(adapter);
  1784. spin_unlock_irqrestore(&adapter->lock, flags);
  1785. }
  1786. /*
  1787. * atl1_pcie_patch - Patch for PCIE module
  1788. */
  1789. static void atl1_pcie_patch(struct atl1_adapter *adapter)
  1790. {
  1791. u32 value;
  1792. /* much vendor magic here */
  1793. value = 0x6500;
  1794. iowrite32(value, adapter->hw.hw_addr + 0x12FC);
  1795. /* pcie flow control mode change */
  1796. value = ioread32(adapter->hw.hw_addr + 0x1008);
  1797. value |= 0x8000;
  1798. iowrite32(value, adapter->hw.hw_addr + 0x1008);
  1799. }
  1800. /*
  1801. * When ACPI resume on some VIA MotherBoard, the Interrupt Disable bit/0x400
  1802. * on PCI Command register is disable.
  1803. * The function enable this bit.
  1804. * Brackett, 2006/03/15
  1805. */
  1806. static void atl1_via_workaround(struct atl1_adapter *adapter)
  1807. {
  1808. unsigned long value;
  1809. value = ioread16(adapter->hw.hw_addr + PCI_COMMAND);
  1810. if (value & PCI_COMMAND_INTX_DISABLE)
  1811. value &= ~PCI_COMMAND_INTX_DISABLE;
  1812. iowrite32(value, adapter->hw.hw_addr + PCI_COMMAND);
  1813. }
  1814. /*
  1815. * atl1_probe - Device Initialization Routine
  1816. * @pdev: PCI device information struct
  1817. * @ent: entry in atl1_pci_tbl
  1818. *
  1819. * Returns 0 on success, negative on failure
  1820. *
  1821. * atl1_probe initializes an adapter identified by a pci_dev structure.
  1822. * The OS initialization, configuring of the adapter private structure,
  1823. * and a hardware reset occur.
  1824. */
  1825. static int __devinit atl1_probe(struct pci_dev *pdev,
  1826. const struct pci_device_id *ent)
  1827. {
  1828. struct net_device *netdev;
  1829. struct atl1_adapter *adapter;
  1830. static int cards_found = 0;
  1831. bool pci_using_64 = true;
  1832. int err;
  1833. err = pci_enable_device(pdev);
  1834. if (err)
  1835. return err;
  1836. err = pci_set_dma_mask(pdev, DMA_64BIT_MASK);
  1837. if (err) {
  1838. err = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
  1839. if (err) {
  1840. dev_err(&pdev->dev, "no usable DMA configuration\n");
  1841. goto err_dma;
  1842. }
  1843. pci_using_64 = false;
  1844. }
  1845. /* Mark all PCI regions associated with PCI device
  1846. * pdev as being reserved by owner atl1_driver_name
  1847. */
  1848. err = pci_request_regions(pdev, atl1_driver_name);
  1849. if (err)
  1850. goto err_request_regions;
  1851. /* Enables bus-mastering on the device and calls
  1852. * pcibios_set_master to do the needed arch specific settings
  1853. */
  1854. pci_set_master(pdev);
  1855. netdev = alloc_etherdev(sizeof(struct atl1_adapter));
  1856. if (!netdev) {
  1857. err = -ENOMEM;
  1858. goto err_alloc_etherdev;
  1859. }
  1860. SET_MODULE_OWNER(netdev);
  1861. SET_NETDEV_DEV(netdev, &pdev->dev);
  1862. pci_set_drvdata(pdev, netdev);
  1863. adapter = netdev_priv(netdev);
  1864. adapter->netdev = netdev;
  1865. adapter->pdev = pdev;
  1866. adapter->hw.back = adapter;
  1867. adapter->hw.hw_addr = pci_iomap(pdev, 0, 0);
  1868. if (!adapter->hw.hw_addr) {
  1869. err = -EIO;
  1870. goto err_pci_iomap;
  1871. }
  1872. /* get device revision number */
  1873. adapter->hw.dev_rev = ioread16(adapter->hw.hw_addr +
  1874. (REG_MASTER_CTRL + 2));
  1875. dev_info(&pdev->dev, "version %s\n", DRIVER_VERSION);
  1876. /* set default ring resource counts */
  1877. adapter->rfd_ring.count = adapter->rrd_ring.count = ATL1_DEFAULT_RFD;
  1878. adapter->tpd_ring.count = ATL1_DEFAULT_TPD;
  1879. adapter->mii.dev = netdev;
  1880. adapter->mii.mdio_read = mdio_read;
  1881. adapter->mii.mdio_write = mdio_write;
  1882. adapter->mii.phy_id_mask = 0x1f;
  1883. adapter->mii.reg_num_mask = 0x1f;
  1884. netdev->open = &atl1_open;
  1885. netdev->stop = &atl1_close;
  1886. netdev->hard_start_xmit = &atl1_xmit_frame;
  1887. netdev->get_stats = &atl1_get_stats;
  1888. netdev->set_multicast_list = &atl1_set_multi;
  1889. netdev->set_mac_address = &atl1_set_mac;
  1890. netdev->change_mtu = &atl1_change_mtu;
  1891. netdev->do_ioctl = &atl1_ioctl;
  1892. netdev->tx_timeout = &atl1_tx_timeout;
  1893. netdev->watchdog_timeo = 5 * HZ;
  1894. #ifdef CONFIG_NET_POLL_CONTROLLER
  1895. netdev->poll_controller = atl1_poll_controller;
  1896. #endif
  1897. netdev->vlan_rx_register = atl1_vlan_rx_register;
  1898. netdev->ethtool_ops = &atl1_ethtool_ops;
  1899. adapter->bd_number = cards_found;
  1900. adapter->pci_using_64 = pci_using_64;
  1901. /* setup the private structure */
  1902. err = atl1_sw_init(adapter);
  1903. if (err)
  1904. goto err_common;
  1905. netdev->features = NETIF_F_HW_CSUM;
  1906. netdev->features |= NETIF_F_SG;
  1907. netdev->features |= (NETIF_F_HW_VLAN_TX | NETIF_F_HW_VLAN_RX);
  1908. /*
  1909. * FIXME - Until tso performance gets fixed, disable the feature.
  1910. * Enable it with ethtool -K if desired.
  1911. */
  1912. /* netdev->features |= NETIF_F_TSO; */
  1913. if (pci_using_64)
  1914. netdev->features |= NETIF_F_HIGHDMA;
  1915. netdev->features |= NETIF_F_LLTX;
  1916. /*
  1917. * patch for some L1 of old version,
  1918. * the final version of L1 may not need these
  1919. * patches
  1920. */
  1921. /* atl1_pcie_patch(adapter); */
  1922. /* really reset GPHY core */
  1923. iowrite16(0, adapter->hw.hw_addr + REG_GPHY_ENABLE);
  1924. /*
  1925. * reset the controller to
  1926. * put the device in a known good starting state
  1927. */
  1928. if (atl1_reset_hw(&adapter->hw)) {
  1929. err = -EIO;
  1930. goto err_common;
  1931. }
  1932. /* copy the MAC address out of the EEPROM */
  1933. atl1_read_mac_addr(&adapter->hw);
  1934. memcpy(netdev->dev_addr, adapter->hw.mac_addr, netdev->addr_len);
  1935. if (!is_valid_ether_addr(netdev->dev_addr)) {
  1936. err = -EIO;
  1937. goto err_common;
  1938. }
  1939. atl1_check_options(adapter);
  1940. /* pre-init the MAC, and setup link */
  1941. err = atl1_init_hw(&adapter->hw);
  1942. if (err) {
  1943. err = -EIO;
  1944. goto err_common;
  1945. }
  1946. atl1_pcie_patch(adapter);
  1947. /* assume we have no link for now */
  1948. netif_carrier_off(netdev);
  1949. netif_stop_queue(netdev);
  1950. init_timer(&adapter->watchdog_timer);
  1951. adapter->watchdog_timer.function = &atl1_watchdog;
  1952. adapter->watchdog_timer.data = (unsigned long)adapter;
  1953. init_timer(&adapter->phy_config_timer);
  1954. adapter->phy_config_timer.function = &atl1_phy_config;
  1955. adapter->phy_config_timer.data = (unsigned long)adapter;
  1956. adapter->phy_timer_pending = false;
  1957. INIT_WORK(&adapter->tx_timeout_task, atl1_tx_timeout_task);
  1958. INIT_WORK(&adapter->link_chg_task, atl1_link_chg_task);
  1959. INIT_WORK(&adapter->pcie_dma_to_rst_task, atl1_tx_timeout_task);
  1960. err = register_netdev(netdev);
  1961. if (err)
  1962. goto err_common;
  1963. cards_found++;
  1964. atl1_via_workaround(adapter);
  1965. return 0;
  1966. err_common:
  1967. pci_iounmap(pdev, adapter->hw.hw_addr);
  1968. err_pci_iomap:
  1969. free_netdev(netdev);
  1970. err_alloc_etherdev:
  1971. pci_release_regions(pdev);
  1972. err_dma:
  1973. err_request_regions:
  1974. pci_disable_device(pdev);
  1975. return err;
  1976. }
  1977. /*
  1978. * atl1_remove - Device Removal Routine
  1979. * @pdev: PCI device information struct
  1980. *
  1981. * atl1_remove is called by the PCI subsystem to alert the driver
  1982. * that it should release a PCI device. The could be caused by a
  1983. * Hot-Plug event, or because the driver is going to be removed from
  1984. * memory.
  1985. */
  1986. static void __devexit atl1_remove(struct pci_dev *pdev)
  1987. {
  1988. struct net_device *netdev = pci_get_drvdata(pdev);
  1989. struct atl1_adapter *adapter;
  1990. /* Device not available. Return. */
  1991. if (!netdev)
  1992. return;
  1993. adapter = netdev_priv(netdev);
  1994. /* Some atl1 boards lack persistent storage for their MAC, and get it
  1995. * from the BIOS during POST. If we've been messing with the MAC
  1996. * address, we need to save the permanent one.
  1997. */
  1998. if (memcmp(adapter->hw.mac_addr, adapter->hw.perm_mac_addr, ETH_ALEN)) {
  1999. memcpy(adapter->hw.mac_addr, adapter->hw.perm_mac_addr,
  2000. ETH_ALEN);
  2001. atl1_set_mac_addr(&adapter->hw);
  2002. }
  2003. iowrite16(0, adapter->hw.hw_addr + REG_GPHY_ENABLE);
  2004. unregister_netdev(netdev);
  2005. pci_iounmap(pdev, adapter->hw.hw_addr);
  2006. pci_release_regions(pdev);
  2007. free_netdev(netdev);
  2008. pci_disable_device(pdev);
  2009. }
  2010. #ifdef CONFIG_PM
  2011. static int atl1_suspend(struct pci_dev *pdev, pm_message_t state)
  2012. {
  2013. struct net_device *netdev = pci_get_drvdata(pdev);
  2014. struct atl1_adapter *adapter = netdev_priv(netdev);
  2015. struct atl1_hw *hw = &adapter->hw;
  2016. u32 ctrl = 0;
  2017. u32 wufc = adapter->wol;
  2018. netif_device_detach(netdev);
  2019. if (netif_running(netdev))
  2020. atl1_down(adapter);
  2021. atl1_read_phy_reg(hw, MII_BMSR, (u16 *) & ctrl);
  2022. atl1_read_phy_reg(hw, MII_BMSR, (u16 *) & ctrl);
  2023. if (ctrl & BMSR_LSTATUS)
  2024. wufc &= ~ATL1_WUFC_LNKC;
  2025. /* reduce speed to 10/100M */
  2026. if (wufc) {
  2027. atl1_phy_enter_power_saving(hw);
  2028. /* if resume, let driver to re- setup link */
  2029. hw->phy_configured = false;
  2030. atl1_set_mac_addr(hw);
  2031. atl1_set_multi(netdev);
  2032. ctrl = 0;
  2033. /* turn on magic packet wol */
  2034. if (wufc & ATL1_WUFC_MAG)
  2035. ctrl = WOL_MAGIC_EN | WOL_MAGIC_PME_EN;
  2036. /* turn on Link change WOL */
  2037. if (wufc & ATL1_WUFC_LNKC)
  2038. ctrl |= (WOL_LINK_CHG_EN | WOL_LINK_CHG_PME_EN);
  2039. iowrite32(ctrl, hw->hw_addr + REG_WOL_CTRL);
  2040. /* turn on all-multi mode if wake on multicast is enabled */
  2041. ctrl = ioread32(hw->hw_addr + REG_MAC_CTRL);
  2042. ctrl &= ~MAC_CTRL_DBG;
  2043. ctrl &= ~MAC_CTRL_PROMIS_EN;
  2044. if (wufc & ATL1_WUFC_MC)
  2045. ctrl |= MAC_CTRL_MC_ALL_EN;
  2046. else
  2047. ctrl &= ~MAC_CTRL_MC_ALL_EN;
  2048. /* turn on broadcast mode if wake on-BC is enabled */
  2049. if (wufc & ATL1_WUFC_BC)
  2050. ctrl |= MAC_CTRL_BC_EN;
  2051. else
  2052. ctrl &= ~MAC_CTRL_BC_EN;
  2053. /* enable RX */
  2054. ctrl |= MAC_CTRL_RX_EN;
  2055. iowrite32(ctrl, hw->hw_addr + REG_MAC_CTRL);
  2056. pci_enable_wake(pdev, PCI_D3hot, 1);
  2057. pci_enable_wake(pdev, PCI_D3cold, 1);
  2058. } else {
  2059. iowrite32(0, hw->hw_addr + REG_WOL_CTRL);
  2060. pci_enable_wake(pdev, PCI_D3hot, 0);
  2061. pci_enable_wake(pdev, PCI_D3cold, 0);
  2062. }
  2063. pci_save_state(pdev);
  2064. pci_disable_device(pdev);
  2065. pci_set_power_state(pdev, PCI_D3hot);
  2066. return 0;
  2067. }
  2068. static int atl1_resume(struct pci_dev *pdev)
  2069. {
  2070. struct net_device *netdev = pci_get_drvdata(pdev);
  2071. struct atl1_adapter *adapter = netdev_priv(netdev);
  2072. u32 ret_val;
  2073. pci_set_power_state(pdev, 0);
  2074. pci_restore_state(pdev);
  2075. ret_val = pci_enable_device(pdev);
  2076. pci_enable_wake(pdev, PCI_D3hot, 0);
  2077. pci_enable_wake(pdev, PCI_D3cold, 0);
  2078. iowrite32(0, adapter->hw.hw_addr + REG_WOL_CTRL);
  2079. atl1_reset(adapter);
  2080. if (netif_running(netdev))
  2081. atl1_up(adapter);
  2082. netif_device_attach(netdev);
  2083. atl1_via_workaround(adapter);
  2084. return 0;
  2085. }
  2086. #else
  2087. #define atl1_suspend NULL
  2088. #define atl1_resume NULL
  2089. #endif
  2090. static struct pci_driver atl1_driver = {
  2091. .name = atl1_driver_name,
  2092. .id_table = atl1_pci_tbl,
  2093. .probe = atl1_probe,
  2094. .remove = __devexit_p(atl1_remove),
  2095. .suspend = atl1_suspend,
  2096. .resume = atl1_resume
  2097. };
  2098. /*
  2099. * atl1_exit_module - Driver Exit Cleanup Routine
  2100. *
  2101. * atl1_exit_module is called just before the driver is removed
  2102. * from memory.
  2103. */
  2104. static void __exit atl1_exit_module(void)
  2105. {
  2106. pci_unregister_driver(&atl1_driver);
  2107. }
  2108. /*
  2109. * atl1_init_module - Driver Registration Routine
  2110. *
  2111. * atl1_init_module is the first routine called when the driver is
  2112. * loaded. All it does is register with the PCI subsystem.
  2113. */
  2114. static int __init atl1_init_module(void)
  2115. {
  2116. return pci_register_driver(&atl1_driver);
  2117. }
  2118. module_init(atl1_init_module);
  2119. module_exit(atl1_exit_module);