setup-r8a7779.c 16 KB

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  1. /*
  2. * r8a7779 processor support
  3. *
  4. * Copyright (C) 2011, 2013 Renesas Solutions Corp.
  5. * Copyright (C) 2011 Magnus Damm
  6. * Copyright (C) 2013 Cogent Embedded, Inc.
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License as published by
  10. * the Free Software Foundation; version 2 of the License.
  11. *
  12. * This program is distributed in the hope that it will be useful,
  13. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  15. * GNU General Public License for more details.
  16. *
  17. * You should have received a copy of the GNU General Public License
  18. * along with this program; if not, write to the Free Software
  19. * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
  20. */
  21. #include <linux/kernel.h>
  22. #include <linux/init.h>
  23. #include <linux/interrupt.h>
  24. #include <linux/irq.h>
  25. #include <linux/of_platform.h>
  26. #include <linux/platform_data/gpio-rcar.h>
  27. #include <linux/platform_device.h>
  28. #include <linux/delay.h>
  29. #include <linux/input.h>
  30. #include <linux/io.h>
  31. #include <linux/serial_sci.h>
  32. #include <linux/sh_intc.h>
  33. #include <linux/sh_timer.h>
  34. #include <linux/dma-mapping.h>
  35. #include <linux/usb/otg.h>
  36. #include <linux/usb/ehci_pdriver.h>
  37. #include <linux/usb/ohci_pdriver.h>
  38. #include <linux/pm_runtime.h>
  39. #include <mach/hardware.h>
  40. #include <mach/irqs.h>
  41. #include <mach/r8a7779.h>
  42. #include <mach/common.h>
  43. #include <asm/mach-types.h>
  44. #include <asm/mach/arch.h>
  45. #include <asm/mach/time.h>
  46. #include <asm/mach/map.h>
  47. #include <asm/hardware/cache-l2x0.h>
  48. static struct map_desc r8a7779_io_desc[] __initdata = {
  49. /* 2M entity map for 0xf0000000 (MPCORE) */
  50. {
  51. .virtual = 0xf0000000,
  52. .pfn = __phys_to_pfn(0xf0000000),
  53. .length = SZ_2M,
  54. .type = MT_DEVICE_NONSHARED
  55. },
  56. /* 16M entity map for 0xfexxxxxx (DMAC-S/HPBREG/INTC2/LRAM/DBSC) */
  57. {
  58. .virtual = 0xfe000000,
  59. .pfn = __phys_to_pfn(0xfe000000),
  60. .length = SZ_16M,
  61. .type = MT_DEVICE_NONSHARED
  62. },
  63. };
  64. void __init r8a7779_map_io(void)
  65. {
  66. iotable_init(r8a7779_io_desc, ARRAY_SIZE(r8a7779_io_desc));
  67. }
  68. static struct resource r8a7779_pfc_resources[] = {
  69. DEFINE_RES_MEM(0xfffc0000, 0x023c),
  70. };
  71. static struct platform_device r8a7779_pfc_device = {
  72. .name = "pfc-r8a7779",
  73. .id = -1,
  74. .resource = r8a7779_pfc_resources,
  75. .num_resources = ARRAY_SIZE(r8a7779_pfc_resources),
  76. };
  77. #define R8A7779_GPIO(idx, npins) \
  78. static struct resource r8a7779_gpio##idx##_resources[] = { \
  79. DEFINE_RES_MEM(0xffc40000 + (0x1000 * (idx)), 0x002c), \
  80. DEFINE_RES_IRQ(gic_iid(0xad + (idx))), \
  81. }; \
  82. \
  83. static struct gpio_rcar_config r8a7779_gpio##idx##_platform_data = { \
  84. .gpio_base = 32 * (idx), \
  85. .irq_base = 0, \
  86. .number_of_pins = npins, \
  87. .pctl_name = "pfc-r8a7779", \
  88. }; \
  89. \
  90. static struct platform_device r8a7779_gpio##idx##_device = { \
  91. .name = "gpio_rcar", \
  92. .id = idx, \
  93. .resource = r8a7779_gpio##idx##_resources, \
  94. .num_resources = ARRAY_SIZE(r8a7779_gpio##idx##_resources), \
  95. .dev = { \
  96. .platform_data = &r8a7779_gpio##idx##_platform_data, \
  97. }, \
  98. }
  99. R8A7779_GPIO(0, 32);
  100. R8A7779_GPIO(1, 32);
  101. R8A7779_GPIO(2, 32);
  102. R8A7779_GPIO(3, 32);
  103. R8A7779_GPIO(4, 32);
  104. R8A7779_GPIO(5, 32);
  105. R8A7779_GPIO(6, 9);
  106. static struct platform_device *r8a7779_pinctrl_devices[] __initdata = {
  107. &r8a7779_pfc_device,
  108. &r8a7779_gpio0_device,
  109. &r8a7779_gpio1_device,
  110. &r8a7779_gpio2_device,
  111. &r8a7779_gpio3_device,
  112. &r8a7779_gpio4_device,
  113. &r8a7779_gpio5_device,
  114. &r8a7779_gpio6_device,
  115. };
  116. void __init r8a7779_pinmux_init(void)
  117. {
  118. platform_add_devices(r8a7779_pinctrl_devices,
  119. ARRAY_SIZE(r8a7779_pinctrl_devices));
  120. }
  121. static struct plat_sci_port scif0_platform_data = {
  122. .mapbase = 0xffe40000,
  123. .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP,
  124. .scscr = SCSCR_RE | SCSCR_TE | SCSCR_CKE1,
  125. .scbrr_algo_id = SCBRR_ALGO_2,
  126. .type = PORT_SCIF,
  127. .irqs = SCIx_IRQ_MUXED(gic_iid(0x78)),
  128. };
  129. static struct platform_device scif0_device = {
  130. .name = "sh-sci",
  131. .id = 0,
  132. .dev = {
  133. .platform_data = &scif0_platform_data,
  134. },
  135. };
  136. static struct plat_sci_port scif1_platform_data = {
  137. .mapbase = 0xffe41000,
  138. .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP,
  139. .scscr = SCSCR_RE | SCSCR_TE | SCSCR_CKE1,
  140. .scbrr_algo_id = SCBRR_ALGO_2,
  141. .type = PORT_SCIF,
  142. .irqs = SCIx_IRQ_MUXED(gic_iid(0x79)),
  143. };
  144. static struct platform_device scif1_device = {
  145. .name = "sh-sci",
  146. .id = 1,
  147. .dev = {
  148. .platform_data = &scif1_platform_data,
  149. },
  150. };
  151. static struct plat_sci_port scif2_platform_data = {
  152. .mapbase = 0xffe42000,
  153. .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP,
  154. .scscr = SCSCR_RE | SCSCR_TE | SCSCR_CKE1,
  155. .scbrr_algo_id = SCBRR_ALGO_2,
  156. .type = PORT_SCIF,
  157. .irqs = SCIx_IRQ_MUXED(gic_iid(0x7a)),
  158. };
  159. static struct platform_device scif2_device = {
  160. .name = "sh-sci",
  161. .id = 2,
  162. .dev = {
  163. .platform_data = &scif2_platform_data,
  164. },
  165. };
  166. static struct plat_sci_port scif3_platform_data = {
  167. .mapbase = 0xffe43000,
  168. .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP,
  169. .scscr = SCSCR_RE | SCSCR_TE | SCSCR_CKE1,
  170. .scbrr_algo_id = SCBRR_ALGO_2,
  171. .type = PORT_SCIF,
  172. .irqs = SCIx_IRQ_MUXED(gic_iid(0x7b)),
  173. };
  174. static struct platform_device scif3_device = {
  175. .name = "sh-sci",
  176. .id = 3,
  177. .dev = {
  178. .platform_data = &scif3_platform_data,
  179. },
  180. };
  181. static struct plat_sci_port scif4_platform_data = {
  182. .mapbase = 0xffe44000,
  183. .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP,
  184. .scscr = SCSCR_RE | SCSCR_TE | SCSCR_CKE1,
  185. .scbrr_algo_id = SCBRR_ALGO_2,
  186. .type = PORT_SCIF,
  187. .irqs = SCIx_IRQ_MUXED(gic_iid(0x7c)),
  188. };
  189. static struct platform_device scif4_device = {
  190. .name = "sh-sci",
  191. .id = 4,
  192. .dev = {
  193. .platform_data = &scif4_platform_data,
  194. },
  195. };
  196. static struct plat_sci_port scif5_platform_data = {
  197. .mapbase = 0xffe45000,
  198. .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP,
  199. .scscr = SCSCR_RE | SCSCR_TE | SCSCR_CKE1,
  200. .scbrr_algo_id = SCBRR_ALGO_2,
  201. .type = PORT_SCIF,
  202. .irqs = SCIx_IRQ_MUXED(gic_iid(0x7d)),
  203. };
  204. static struct platform_device scif5_device = {
  205. .name = "sh-sci",
  206. .id = 5,
  207. .dev = {
  208. .platform_data = &scif5_platform_data,
  209. },
  210. };
  211. /* TMU */
  212. static struct sh_timer_config tmu00_platform_data = {
  213. .name = "TMU00",
  214. .channel_offset = 0x4,
  215. .timer_bit = 0,
  216. .clockevent_rating = 200,
  217. };
  218. static struct resource tmu00_resources[] = {
  219. [0] = {
  220. .name = "TMU00",
  221. .start = 0xffd80008,
  222. .end = 0xffd80013,
  223. .flags = IORESOURCE_MEM,
  224. },
  225. [1] = {
  226. .start = gic_iid(0x40),
  227. .flags = IORESOURCE_IRQ,
  228. },
  229. };
  230. static struct platform_device tmu00_device = {
  231. .name = "sh_tmu",
  232. .id = 0,
  233. .dev = {
  234. .platform_data = &tmu00_platform_data,
  235. },
  236. .resource = tmu00_resources,
  237. .num_resources = ARRAY_SIZE(tmu00_resources),
  238. };
  239. static struct sh_timer_config tmu01_platform_data = {
  240. .name = "TMU01",
  241. .channel_offset = 0x10,
  242. .timer_bit = 1,
  243. .clocksource_rating = 200,
  244. };
  245. static struct resource tmu01_resources[] = {
  246. [0] = {
  247. .name = "TMU01",
  248. .start = 0xffd80014,
  249. .end = 0xffd8001f,
  250. .flags = IORESOURCE_MEM,
  251. },
  252. [1] = {
  253. .start = gic_iid(0x41),
  254. .flags = IORESOURCE_IRQ,
  255. },
  256. };
  257. static struct platform_device tmu01_device = {
  258. .name = "sh_tmu",
  259. .id = 1,
  260. .dev = {
  261. .platform_data = &tmu01_platform_data,
  262. },
  263. .resource = tmu01_resources,
  264. .num_resources = ARRAY_SIZE(tmu01_resources),
  265. };
  266. /* I2C */
  267. static struct resource rcar_i2c0_res[] = {
  268. {
  269. .start = 0xffc70000,
  270. .end = 0xffc70fff,
  271. .flags = IORESOURCE_MEM,
  272. }, {
  273. .start = gic_iid(0x6f),
  274. .flags = IORESOURCE_IRQ,
  275. },
  276. };
  277. static struct platform_device i2c0_device = {
  278. .name = "i2c-rcar",
  279. .id = 0,
  280. .resource = rcar_i2c0_res,
  281. .num_resources = ARRAY_SIZE(rcar_i2c0_res),
  282. };
  283. static struct resource rcar_i2c1_res[] = {
  284. {
  285. .start = 0xffc71000,
  286. .end = 0xffc71fff,
  287. .flags = IORESOURCE_MEM,
  288. }, {
  289. .start = gic_iid(0x72),
  290. .flags = IORESOURCE_IRQ,
  291. },
  292. };
  293. static struct platform_device i2c1_device = {
  294. .name = "i2c-rcar",
  295. .id = 1,
  296. .resource = rcar_i2c1_res,
  297. .num_resources = ARRAY_SIZE(rcar_i2c1_res),
  298. };
  299. static struct resource rcar_i2c2_res[] = {
  300. {
  301. .start = 0xffc72000,
  302. .end = 0xffc72fff,
  303. .flags = IORESOURCE_MEM,
  304. }, {
  305. .start = gic_iid(0x70),
  306. .flags = IORESOURCE_IRQ,
  307. },
  308. };
  309. static struct platform_device i2c2_device = {
  310. .name = "i2c-rcar",
  311. .id = 2,
  312. .resource = rcar_i2c2_res,
  313. .num_resources = ARRAY_SIZE(rcar_i2c2_res),
  314. };
  315. static struct resource rcar_i2c3_res[] = {
  316. {
  317. .start = 0xffc73000,
  318. .end = 0xffc73fff,
  319. .flags = IORESOURCE_MEM,
  320. }, {
  321. .start = gic_iid(0x71),
  322. .flags = IORESOURCE_IRQ,
  323. },
  324. };
  325. static struct platform_device i2c3_device = {
  326. .name = "i2c-rcar",
  327. .id = 3,
  328. .resource = rcar_i2c3_res,
  329. .num_resources = ARRAY_SIZE(rcar_i2c3_res),
  330. };
  331. static struct resource sata_resources[] = {
  332. [0] = {
  333. .name = "rcar-sata",
  334. .start = 0xfc600000,
  335. .end = 0xfc601fff,
  336. .flags = IORESOURCE_MEM,
  337. },
  338. [1] = {
  339. .start = gic_iid(0x84),
  340. .flags = IORESOURCE_IRQ,
  341. },
  342. };
  343. static struct platform_device sata_device = {
  344. .name = "sata_rcar",
  345. .id = -1,
  346. .resource = sata_resources,
  347. .num_resources = ARRAY_SIZE(sata_resources),
  348. .dev = {
  349. .dma_mask = &sata_device.dev.coherent_dma_mask,
  350. .coherent_dma_mask = DMA_BIT_MASK(32),
  351. },
  352. };
  353. /* USB PHY */
  354. static struct resource usb_phy_resources[] = {
  355. [0] = {
  356. .start = 0xffe70000,
  357. .end = 0xffe70900 - 1,
  358. .flags = IORESOURCE_MEM,
  359. },
  360. [1] = {
  361. .start = 0xfff70000,
  362. .end = 0xfff70900 - 1,
  363. .flags = IORESOURCE_MEM,
  364. },
  365. };
  366. static struct platform_device usb_phy_device = {
  367. .name = "rcar_usb_phy",
  368. .id = -1,
  369. .resource = usb_phy_resources,
  370. .num_resources = ARRAY_SIZE(usb_phy_resources),
  371. };
  372. /* USB */
  373. static struct usb_phy *phy;
  374. static int usb_power_on(struct platform_device *pdev)
  375. {
  376. if (IS_ERR(phy))
  377. return PTR_ERR(phy);
  378. pm_runtime_enable(&pdev->dev);
  379. pm_runtime_get_sync(&pdev->dev);
  380. usb_phy_init(phy);
  381. return 0;
  382. }
  383. static void usb_power_off(struct platform_device *pdev)
  384. {
  385. if (IS_ERR(phy))
  386. return;
  387. usb_phy_shutdown(phy);
  388. pm_runtime_put_sync(&pdev->dev);
  389. pm_runtime_disable(&pdev->dev);
  390. }
  391. static struct usb_ehci_pdata ehcix_pdata = {
  392. .power_on = usb_power_on,
  393. .power_off = usb_power_off,
  394. .power_suspend = usb_power_off,
  395. };
  396. static struct resource ehci0_resources[] = {
  397. [0] = {
  398. .start = 0xffe70000,
  399. .end = 0xffe70400 - 1,
  400. .flags = IORESOURCE_MEM,
  401. },
  402. [1] = {
  403. .start = gic_iid(0x4c),
  404. .flags = IORESOURCE_IRQ,
  405. },
  406. };
  407. static struct platform_device ehci0_device = {
  408. .name = "ehci-platform",
  409. .id = 0,
  410. .dev = {
  411. .dma_mask = &ehci0_device.dev.coherent_dma_mask,
  412. .coherent_dma_mask = 0xffffffff,
  413. .platform_data = &ehcix_pdata,
  414. },
  415. .num_resources = ARRAY_SIZE(ehci0_resources),
  416. .resource = ehci0_resources,
  417. };
  418. static struct resource ehci1_resources[] = {
  419. [0] = {
  420. .start = 0xfff70000,
  421. .end = 0xfff70400 - 1,
  422. .flags = IORESOURCE_MEM,
  423. },
  424. [1] = {
  425. .start = gic_iid(0x4d),
  426. .flags = IORESOURCE_IRQ,
  427. },
  428. };
  429. static struct platform_device ehci1_device = {
  430. .name = "ehci-platform",
  431. .id = 1,
  432. .dev = {
  433. .dma_mask = &ehci1_device.dev.coherent_dma_mask,
  434. .coherent_dma_mask = 0xffffffff,
  435. .platform_data = &ehcix_pdata,
  436. },
  437. .num_resources = ARRAY_SIZE(ehci1_resources),
  438. .resource = ehci1_resources,
  439. };
  440. static struct usb_ohci_pdata ohcix_pdata = {
  441. .power_on = usb_power_on,
  442. .power_off = usb_power_off,
  443. .power_suspend = usb_power_off,
  444. };
  445. static struct resource ohci0_resources[] = {
  446. [0] = {
  447. .start = 0xffe70400,
  448. .end = 0xffe70800 - 1,
  449. .flags = IORESOURCE_MEM,
  450. },
  451. [1] = {
  452. .start = gic_iid(0x4c),
  453. .flags = IORESOURCE_IRQ,
  454. },
  455. };
  456. static struct platform_device ohci0_device = {
  457. .name = "ohci-platform",
  458. .id = 0,
  459. .dev = {
  460. .dma_mask = &ohci0_device.dev.coherent_dma_mask,
  461. .coherent_dma_mask = 0xffffffff,
  462. .platform_data = &ohcix_pdata,
  463. },
  464. .num_resources = ARRAY_SIZE(ohci0_resources),
  465. .resource = ohci0_resources,
  466. };
  467. static struct resource ohci1_resources[] = {
  468. [0] = {
  469. .start = 0xfff70400,
  470. .end = 0xfff70800 - 1,
  471. .flags = IORESOURCE_MEM,
  472. },
  473. [1] = {
  474. .start = gic_iid(0x4d),
  475. .flags = IORESOURCE_IRQ,
  476. },
  477. };
  478. static struct platform_device ohci1_device = {
  479. .name = "ohci-platform",
  480. .id = 1,
  481. .dev = {
  482. .dma_mask = &ohci1_device.dev.coherent_dma_mask,
  483. .coherent_dma_mask = 0xffffffff,
  484. .platform_data = &ohcix_pdata,
  485. },
  486. .num_resources = ARRAY_SIZE(ohci1_resources),
  487. .resource = ohci1_resources,
  488. };
  489. /* Ether */
  490. static struct resource ether_resources[] = {
  491. {
  492. .start = 0xfde00000,
  493. .end = 0xfde003ff,
  494. .flags = IORESOURCE_MEM,
  495. }, {
  496. .start = gic_iid(0xb4),
  497. .flags = IORESOURCE_IRQ,
  498. },
  499. };
  500. static struct platform_device *r8a7779_devices_dt[] __initdata = {
  501. &scif0_device,
  502. &scif1_device,
  503. &scif2_device,
  504. &scif3_device,
  505. &scif4_device,
  506. &scif5_device,
  507. &tmu00_device,
  508. &tmu01_device,
  509. &usb_phy_device,
  510. };
  511. static struct platform_device *r8a7779_standard_devices[] __initdata = {
  512. &i2c0_device,
  513. &i2c1_device,
  514. &i2c2_device,
  515. &i2c3_device,
  516. &sata_device,
  517. };
  518. void __init r8a7779_add_standard_devices(void)
  519. {
  520. #ifdef CONFIG_CACHE_L2X0
  521. /* Early BRESP enable, Shared attribute override enable, 64K*16way */
  522. l2x0_init(IOMEM(0xf0100000), 0x40470000, 0x82000fff);
  523. #endif
  524. r8a7779_pm_init();
  525. r8a7779_init_pm_domains();
  526. platform_add_devices(r8a7779_devices_dt,
  527. ARRAY_SIZE(r8a7779_devices_dt));
  528. platform_add_devices(r8a7779_standard_devices,
  529. ARRAY_SIZE(r8a7779_standard_devices));
  530. }
  531. void __init r8a7779_add_ether_device(struct sh_eth_plat_data *pdata)
  532. {
  533. platform_device_register_resndata(&platform_bus, "sh_eth", -1,
  534. ether_resources,
  535. ARRAY_SIZE(ether_resources),
  536. pdata, sizeof(*pdata));
  537. }
  538. /* do nothing for !CONFIG_SMP or !CONFIG_HAVE_TWD */
  539. void __init __weak r8a7779_register_twd(void) { }
  540. void __init r8a7779_earlytimer_init(void)
  541. {
  542. r8a7779_clock_init();
  543. shmobile_earlytimer_init();
  544. r8a7779_register_twd();
  545. }
  546. void __init r8a7779_add_early_devices(void)
  547. {
  548. early_platform_add_devices(r8a7779_devices_dt,
  549. ARRAY_SIZE(r8a7779_devices_dt));
  550. /* Early serial console setup is not included here due to
  551. * memory map collisions. The SCIF serial ports in r8a7779
  552. * are difficult to entity map 1:1 due to collision with the
  553. * virtual memory range used by the coherent DMA code on ARM.
  554. *
  555. * Anyone wanting to debug early can remove UPF_IOREMAP from
  556. * the sh-sci serial console platform data, adjust mapbase
  557. * to a static M:N virt:phys mapping that needs to be added to
  558. * the mappings passed with iotable_init() above.
  559. *
  560. * Then add a call to shmobile_setup_console() from this function.
  561. *
  562. * As a final step pass earlyprint=sh-sci.2,115200 on the kernel
  563. * command line in case of the marzen board.
  564. */
  565. }
  566. static struct platform_device *r8a7779_late_devices[] __initdata = {
  567. &ehci0_device,
  568. &ehci1_device,
  569. &ohci0_device,
  570. &ohci1_device,
  571. };
  572. void __init r8a7779_init_late(void)
  573. {
  574. /* get USB PHY */
  575. phy = usb_get_phy(USB_PHY_TYPE_USB2);
  576. shmobile_init_late();
  577. platform_add_devices(r8a7779_late_devices,
  578. ARRAY_SIZE(r8a7779_late_devices));
  579. }
  580. #ifdef CONFIG_USE_OF
  581. void __init r8a7779_init_delay(void)
  582. {
  583. shmobile_setup_delay(1000, 2, 4); /* Cortex-A9 @ 1000MHz */
  584. }
  585. static const struct of_dev_auxdata r8a7779_auxdata_lookup[] __initconst = {
  586. {},
  587. };
  588. void __init r8a7779_add_standard_devices_dt(void)
  589. {
  590. /* clocks are setup late during boot in the case of DT */
  591. r8a7779_clock_init();
  592. platform_add_devices(r8a7779_devices_dt,
  593. ARRAY_SIZE(r8a7779_devices_dt));
  594. of_platform_populate(NULL, of_default_bus_match_table,
  595. r8a7779_auxdata_lookup, NULL);
  596. }
  597. static const char *r8a7779_compat_dt[] __initdata = {
  598. "renesas,r8a7779",
  599. NULL,
  600. };
  601. DT_MACHINE_START(R8A7779_DT, "Generic R8A7779 (Flattened Device Tree)")
  602. .map_io = r8a7779_map_io,
  603. .init_early = r8a7779_init_delay,
  604. .nr_irqs = NR_IRQS_LEGACY,
  605. .init_irq = r8a7779_init_irq_dt,
  606. .init_machine = r8a7779_add_standard_devices_dt,
  607. .init_time = shmobile_timer_init,
  608. .init_late = r8a7779_init_late,
  609. .dt_compat = r8a7779_compat_dt,
  610. MACHINE_END
  611. #endif /* CONFIG_USE_OF */