swiotlb.c 26 KB

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  1. /*
  2. * Dynamic DMA mapping support.
  3. *
  4. * This implementation is a fallback for platforms that do not support
  5. * I/O TLBs (aka DMA address translation hardware).
  6. * Copyright (C) 2000 Asit Mallick <Asit.K.Mallick@intel.com>
  7. * Copyright (C) 2000 Goutham Rao <goutham.rao@intel.com>
  8. * Copyright (C) 2000, 2003 Hewlett-Packard Co
  9. * David Mosberger-Tang <davidm@hpl.hp.com>
  10. *
  11. * 03/05/07 davidm Switch from PCI-DMA to generic device DMA API.
  12. * 00/12/13 davidm Rename to swiotlb.c and add mark_clean() to avoid
  13. * unnecessary i-cache flushing.
  14. * 04/07/.. ak Better overflow handling. Assorted fixes.
  15. * 05/09/10 linville Add support for syncing ranges, support syncing for
  16. * DMA_BIDIRECTIONAL mappings, miscellaneous cleanup.
  17. * 08/12/11 beckyb Add highmem support
  18. */
  19. #include <linux/cache.h>
  20. #include <linux/dma-mapping.h>
  21. #include <linux/mm.h>
  22. #include <linux/module.h>
  23. #include <linux/spinlock.h>
  24. #include <linux/string.h>
  25. #include <linux/swiotlb.h>
  26. #include <linux/pfn.h>
  27. #include <linux/types.h>
  28. #include <linux/ctype.h>
  29. #include <linux/highmem.h>
  30. #include <asm/io.h>
  31. #include <asm/dma.h>
  32. #include <asm/scatterlist.h>
  33. #include <linux/init.h>
  34. #include <linux/bootmem.h>
  35. #include <linux/iommu-helper.h>
  36. #define OFFSET(val,align) ((unsigned long) \
  37. ( (val) & ( (align) - 1)))
  38. #define SLABS_PER_PAGE (1 << (PAGE_SHIFT - IO_TLB_SHIFT))
  39. /*
  40. * Minimum IO TLB size to bother booting with. Systems with mainly
  41. * 64bit capable cards will only lightly use the swiotlb. If we can't
  42. * allocate a contiguous 1MB, we're probably in trouble anyway.
  43. */
  44. #define IO_TLB_MIN_SLABS ((1<<20) >> IO_TLB_SHIFT)
  45. /*
  46. * Enumeration for sync targets
  47. */
  48. enum dma_sync_target {
  49. SYNC_FOR_CPU = 0,
  50. SYNC_FOR_DEVICE = 1,
  51. };
  52. int swiotlb_force;
  53. /*
  54. * Used to do a quick range check in swiotlb_unmap_single and
  55. * swiotlb_sync_single_*, to see if the memory was in fact allocated by this
  56. * API.
  57. */
  58. static char *io_tlb_start, *io_tlb_end;
  59. /*
  60. * The number of IO TLB blocks (in groups of 64) betweeen io_tlb_start and
  61. * io_tlb_end. This is command line adjustable via setup_io_tlb_npages.
  62. */
  63. static unsigned long io_tlb_nslabs;
  64. /*
  65. * When the IOMMU overflows we return a fallback buffer. This sets the size.
  66. */
  67. static unsigned long io_tlb_overflow = 32*1024;
  68. void *io_tlb_overflow_buffer;
  69. /*
  70. * This is a free list describing the number of free entries available from
  71. * each index
  72. */
  73. static unsigned int *io_tlb_list;
  74. static unsigned int io_tlb_index;
  75. /*
  76. * We need to save away the original address corresponding to a mapped entry
  77. * for the sync operations.
  78. */
  79. static phys_addr_t *io_tlb_orig_addr;
  80. /*
  81. * Protect the above data structures in the map and unmap calls
  82. */
  83. static DEFINE_SPINLOCK(io_tlb_lock);
  84. static int __init
  85. setup_io_tlb_npages(char *str)
  86. {
  87. if (isdigit(*str)) {
  88. io_tlb_nslabs = simple_strtoul(str, &str, 0);
  89. /* avoid tail segment of size < IO_TLB_SEGSIZE */
  90. io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE);
  91. }
  92. if (*str == ',')
  93. ++str;
  94. if (!strcmp(str, "force"))
  95. swiotlb_force = 1;
  96. return 1;
  97. }
  98. __setup("swiotlb=", setup_io_tlb_npages);
  99. /* make io_tlb_overflow tunable too? */
  100. void * __weak __init swiotlb_alloc_boot(size_t size, unsigned long nslabs)
  101. {
  102. return alloc_bootmem_low_pages(size);
  103. }
  104. void * __weak swiotlb_alloc(unsigned order, unsigned long nslabs)
  105. {
  106. return (void *)__get_free_pages(GFP_DMA | __GFP_NOWARN, order);
  107. }
  108. dma_addr_t __weak swiotlb_phys_to_bus(struct device *hwdev, phys_addr_t paddr)
  109. {
  110. return paddr;
  111. }
  112. phys_addr_t __weak swiotlb_bus_to_phys(dma_addr_t baddr)
  113. {
  114. return baddr;
  115. }
  116. static dma_addr_t swiotlb_virt_to_bus(struct device *hwdev,
  117. volatile void *address)
  118. {
  119. return swiotlb_phys_to_bus(hwdev, virt_to_phys(address));
  120. }
  121. static void *swiotlb_bus_to_virt(dma_addr_t address)
  122. {
  123. return phys_to_virt(swiotlb_bus_to_phys(address));
  124. }
  125. int __weak swiotlb_arch_range_needs_mapping(phys_addr_t paddr, size_t size)
  126. {
  127. return 0;
  128. }
  129. static void swiotlb_print_info(unsigned long bytes)
  130. {
  131. phys_addr_t pstart, pend;
  132. pstart = virt_to_phys(io_tlb_start);
  133. pend = virt_to_phys(io_tlb_end);
  134. printk(KERN_INFO "Placing %luMB software IO TLB between %p - %p\n",
  135. bytes >> 20, io_tlb_start, io_tlb_end);
  136. printk(KERN_INFO "software IO TLB at phys %#llx - %#llx\n",
  137. (unsigned long long)pstart,
  138. (unsigned long long)pend);
  139. }
  140. /*
  141. * Statically reserve bounce buffer space and initialize bounce buffer data
  142. * structures for the software IO TLB used to implement the DMA API.
  143. */
  144. void __init
  145. swiotlb_init_with_default_size(size_t default_size)
  146. {
  147. unsigned long i, bytes;
  148. if (!io_tlb_nslabs) {
  149. io_tlb_nslabs = (default_size >> IO_TLB_SHIFT);
  150. io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE);
  151. }
  152. bytes = io_tlb_nslabs << IO_TLB_SHIFT;
  153. /*
  154. * Get IO TLB memory from the low pages
  155. */
  156. io_tlb_start = swiotlb_alloc_boot(bytes, io_tlb_nslabs);
  157. if (!io_tlb_start)
  158. panic("Cannot allocate SWIOTLB buffer");
  159. io_tlb_end = io_tlb_start + bytes;
  160. /*
  161. * Allocate and initialize the free list array. This array is used
  162. * to find contiguous free memory regions of size up to IO_TLB_SEGSIZE
  163. * between io_tlb_start and io_tlb_end.
  164. */
  165. io_tlb_list = alloc_bootmem(io_tlb_nslabs * sizeof(int));
  166. for (i = 0; i < io_tlb_nslabs; i++)
  167. io_tlb_list[i] = IO_TLB_SEGSIZE - OFFSET(i, IO_TLB_SEGSIZE);
  168. io_tlb_index = 0;
  169. io_tlb_orig_addr = alloc_bootmem(io_tlb_nslabs * sizeof(phys_addr_t));
  170. /*
  171. * Get the overflow emergency buffer
  172. */
  173. io_tlb_overflow_buffer = alloc_bootmem_low(io_tlb_overflow);
  174. if (!io_tlb_overflow_buffer)
  175. panic("Cannot allocate SWIOTLB overflow buffer!\n");
  176. swiotlb_print_info(bytes);
  177. }
  178. void __init
  179. swiotlb_init(void)
  180. {
  181. swiotlb_init_with_default_size(64 * (1<<20)); /* default to 64MB */
  182. }
  183. /*
  184. * Systems with larger DMA zones (those that don't support ISA) can
  185. * initialize the swiotlb later using the slab allocator if needed.
  186. * This should be just like above, but with some error catching.
  187. */
  188. int
  189. swiotlb_late_init_with_default_size(size_t default_size)
  190. {
  191. unsigned long i, bytes, req_nslabs = io_tlb_nslabs;
  192. unsigned int order;
  193. if (!io_tlb_nslabs) {
  194. io_tlb_nslabs = (default_size >> IO_TLB_SHIFT);
  195. io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE);
  196. }
  197. /*
  198. * Get IO TLB memory from the low pages
  199. */
  200. order = get_order(io_tlb_nslabs << IO_TLB_SHIFT);
  201. io_tlb_nslabs = SLABS_PER_PAGE << order;
  202. bytes = io_tlb_nslabs << IO_TLB_SHIFT;
  203. while ((SLABS_PER_PAGE << order) > IO_TLB_MIN_SLABS) {
  204. io_tlb_start = swiotlb_alloc(order, io_tlb_nslabs);
  205. if (io_tlb_start)
  206. break;
  207. order--;
  208. }
  209. if (!io_tlb_start)
  210. goto cleanup1;
  211. if (order != get_order(bytes)) {
  212. printk(KERN_WARNING "Warning: only able to allocate %ld MB "
  213. "for software IO TLB\n", (PAGE_SIZE << order) >> 20);
  214. io_tlb_nslabs = SLABS_PER_PAGE << order;
  215. bytes = io_tlb_nslabs << IO_TLB_SHIFT;
  216. }
  217. io_tlb_end = io_tlb_start + bytes;
  218. memset(io_tlb_start, 0, bytes);
  219. /*
  220. * Allocate and initialize the free list array. This array is used
  221. * to find contiguous free memory regions of size up to IO_TLB_SEGSIZE
  222. * between io_tlb_start and io_tlb_end.
  223. */
  224. io_tlb_list = (unsigned int *)__get_free_pages(GFP_KERNEL,
  225. get_order(io_tlb_nslabs * sizeof(int)));
  226. if (!io_tlb_list)
  227. goto cleanup2;
  228. for (i = 0; i < io_tlb_nslabs; i++)
  229. io_tlb_list[i] = IO_TLB_SEGSIZE - OFFSET(i, IO_TLB_SEGSIZE);
  230. io_tlb_index = 0;
  231. io_tlb_orig_addr = (phys_addr_t *)
  232. __get_free_pages(GFP_KERNEL,
  233. get_order(io_tlb_nslabs *
  234. sizeof(phys_addr_t)));
  235. if (!io_tlb_orig_addr)
  236. goto cleanup3;
  237. memset(io_tlb_orig_addr, 0, io_tlb_nslabs * sizeof(phys_addr_t));
  238. /*
  239. * Get the overflow emergency buffer
  240. */
  241. io_tlb_overflow_buffer = (void *)__get_free_pages(GFP_DMA,
  242. get_order(io_tlb_overflow));
  243. if (!io_tlb_overflow_buffer)
  244. goto cleanup4;
  245. swiotlb_print_info(bytes);
  246. return 0;
  247. cleanup4:
  248. free_pages((unsigned long)io_tlb_orig_addr,
  249. get_order(io_tlb_nslabs * sizeof(phys_addr_t)));
  250. io_tlb_orig_addr = NULL;
  251. cleanup3:
  252. free_pages((unsigned long)io_tlb_list, get_order(io_tlb_nslabs *
  253. sizeof(int)));
  254. io_tlb_list = NULL;
  255. cleanup2:
  256. io_tlb_end = NULL;
  257. free_pages((unsigned long)io_tlb_start, order);
  258. io_tlb_start = NULL;
  259. cleanup1:
  260. io_tlb_nslabs = req_nslabs;
  261. return -ENOMEM;
  262. }
  263. static int
  264. address_needs_mapping(struct device *hwdev, dma_addr_t addr, size_t size)
  265. {
  266. return !is_buffer_dma_capable(dma_get_mask(hwdev), addr, size);
  267. }
  268. static inline int range_needs_mapping(phys_addr_t paddr, size_t size)
  269. {
  270. return swiotlb_force || swiotlb_arch_range_needs_mapping(paddr, size);
  271. }
  272. static int is_swiotlb_buffer(char *addr)
  273. {
  274. return addr >= io_tlb_start && addr < io_tlb_end;
  275. }
  276. /*
  277. * Bounce: copy the swiotlb buffer back to the original dma location
  278. */
  279. static void swiotlb_bounce(phys_addr_t phys, char *dma_addr, size_t size,
  280. enum dma_data_direction dir)
  281. {
  282. unsigned long pfn = PFN_DOWN(phys);
  283. if (PageHighMem(pfn_to_page(pfn))) {
  284. /* The buffer does not have a mapping. Map it in and copy */
  285. unsigned int offset = phys & ~PAGE_MASK;
  286. char *buffer;
  287. unsigned int sz = 0;
  288. unsigned long flags;
  289. while (size) {
  290. sz = min(PAGE_SIZE - offset, size);
  291. local_irq_save(flags);
  292. buffer = kmap_atomic(pfn_to_page(pfn),
  293. KM_BOUNCE_READ);
  294. if (dir == DMA_TO_DEVICE)
  295. memcpy(dma_addr, buffer + offset, sz);
  296. else
  297. memcpy(buffer + offset, dma_addr, sz);
  298. kunmap_atomic(buffer, KM_BOUNCE_READ);
  299. local_irq_restore(flags);
  300. size -= sz;
  301. pfn++;
  302. dma_addr += sz;
  303. offset = 0;
  304. }
  305. } else {
  306. if (dir == DMA_TO_DEVICE)
  307. memcpy(dma_addr, phys_to_virt(phys), size);
  308. else
  309. memcpy(phys_to_virt(phys), dma_addr, size);
  310. }
  311. }
  312. /*
  313. * Allocates bounce buffer and returns its kernel virtual address.
  314. */
  315. static void *
  316. map_single(struct device *hwdev, phys_addr_t phys, size_t size, int dir)
  317. {
  318. unsigned long flags;
  319. char *dma_addr;
  320. unsigned int nslots, stride, index, wrap;
  321. int i;
  322. unsigned long start_dma_addr;
  323. unsigned long mask;
  324. unsigned long offset_slots;
  325. unsigned long max_slots;
  326. mask = dma_get_seg_boundary(hwdev);
  327. start_dma_addr = swiotlb_virt_to_bus(hwdev, io_tlb_start) & mask;
  328. offset_slots = ALIGN(start_dma_addr, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT;
  329. /*
  330. * Carefully handle integer overflow which can occur when mask == ~0UL.
  331. */
  332. max_slots = mask + 1
  333. ? ALIGN(mask + 1, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT
  334. : 1UL << (BITS_PER_LONG - IO_TLB_SHIFT);
  335. /*
  336. * For mappings greater than a page, we limit the stride (and
  337. * hence alignment) to a page size.
  338. */
  339. nslots = ALIGN(size, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT;
  340. if (size > PAGE_SIZE)
  341. stride = (1 << (PAGE_SHIFT - IO_TLB_SHIFT));
  342. else
  343. stride = 1;
  344. BUG_ON(!nslots);
  345. /*
  346. * Find suitable number of IO TLB entries size that will fit this
  347. * request and allocate a buffer from that IO TLB pool.
  348. */
  349. spin_lock_irqsave(&io_tlb_lock, flags);
  350. index = ALIGN(io_tlb_index, stride);
  351. if (index >= io_tlb_nslabs)
  352. index = 0;
  353. wrap = index;
  354. do {
  355. while (iommu_is_span_boundary(index, nslots, offset_slots,
  356. max_slots)) {
  357. index += stride;
  358. if (index >= io_tlb_nslabs)
  359. index = 0;
  360. if (index == wrap)
  361. goto not_found;
  362. }
  363. /*
  364. * If we find a slot that indicates we have 'nslots' number of
  365. * contiguous buffers, we allocate the buffers from that slot
  366. * and mark the entries as '0' indicating unavailable.
  367. */
  368. if (io_tlb_list[index] >= nslots) {
  369. int count = 0;
  370. for (i = index; i < (int) (index + nslots); i++)
  371. io_tlb_list[i] = 0;
  372. for (i = index - 1; (OFFSET(i, IO_TLB_SEGSIZE) != IO_TLB_SEGSIZE - 1) && io_tlb_list[i]; i--)
  373. io_tlb_list[i] = ++count;
  374. dma_addr = io_tlb_start + (index << IO_TLB_SHIFT);
  375. /*
  376. * Update the indices to avoid searching in the next
  377. * round.
  378. */
  379. io_tlb_index = ((index + nslots) < io_tlb_nslabs
  380. ? (index + nslots) : 0);
  381. goto found;
  382. }
  383. index += stride;
  384. if (index >= io_tlb_nslabs)
  385. index = 0;
  386. } while (index != wrap);
  387. not_found:
  388. spin_unlock_irqrestore(&io_tlb_lock, flags);
  389. return NULL;
  390. found:
  391. spin_unlock_irqrestore(&io_tlb_lock, flags);
  392. /*
  393. * Save away the mapping from the original address to the DMA address.
  394. * This is needed when we sync the memory. Then we sync the buffer if
  395. * needed.
  396. */
  397. for (i = 0; i < nslots; i++)
  398. io_tlb_orig_addr[index+i] = phys + (i << IO_TLB_SHIFT);
  399. if (dir == DMA_TO_DEVICE || dir == DMA_BIDIRECTIONAL)
  400. swiotlb_bounce(phys, dma_addr, size, DMA_TO_DEVICE);
  401. return dma_addr;
  402. }
  403. /*
  404. * dma_addr is the kernel virtual address of the bounce buffer to unmap.
  405. */
  406. static void
  407. unmap_single(struct device *hwdev, char *dma_addr, size_t size, int dir)
  408. {
  409. unsigned long flags;
  410. int i, count, nslots = ALIGN(size, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT;
  411. int index = (dma_addr - io_tlb_start) >> IO_TLB_SHIFT;
  412. phys_addr_t phys = io_tlb_orig_addr[index];
  413. /*
  414. * First, sync the memory before unmapping the entry
  415. */
  416. if (phys && ((dir == DMA_FROM_DEVICE) || (dir == DMA_BIDIRECTIONAL)))
  417. swiotlb_bounce(phys, dma_addr, size, DMA_FROM_DEVICE);
  418. /*
  419. * Return the buffer to the free list by setting the corresponding
  420. * entries to indicate the number of contigous entries available.
  421. * While returning the entries to the free list, we merge the entries
  422. * with slots below and above the pool being returned.
  423. */
  424. spin_lock_irqsave(&io_tlb_lock, flags);
  425. {
  426. count = ((index + nslots) < ALIGN(index + 1, IO_TLB_SEGSIZE) ?
  427. io_tlb_list[index + nslots] : 0);
  428. /*
  429. * Step 1: return the slots to the free list, merging the
  430. * slots with superceeding slots
  431. */
  432. for (i = index + nslots - 1; i >= index; i--)
  433. io_tlb_list[i] = ++count;
  434. /*
  435. * Step 2: merge the returned slots with the preceding slots,
  436. * if available (non zero)
  437. */
  438. for (i = index - 1; (OFFSET(i, IO_TLB_SEGSIZE) != IO_TLB_SEGSIZE -1) && io_tlb_list[i]; i--)
  439. io_tlb_list[i] = ++count;
  440. }
  441. spin_unlock_irqrestore(&io_tlb_lock, flags);
  442. }
  443. static void
  444. sync_single(struct device *hwdev, char *dma_addr, size_t size,
  445. int dir, int target)
  446. {
  447. int index = (dma_addr - io_tlb_start) >> IO_TLB_SHIFT;
  448. phys_addr_t phys = io_tlb_orig_addr[index];
  449. phys += ((unsigned long)dma_addr & ((1 << IO_TLB_SHIFT) - 1));
  450. switch (target) {
  451. case SYNC_FOR_CPU:
  452. if (likely(dir == DMA_FROM_DEVICE || dir == DMA_BIDIRECTIONAL))
  453. swiotlb_bounce(phys, dma_addr, size, DMA_FROM_DEVICE);
  454. else
  455. BUG_ON(dir != DMA_TO_DEVICE);
  456. break;
  457. case SYNC_FOR_DEVICE:
  458. if (likely(dir == DMA_TO_DEVICE || dir == DMA_BIDIRECTIONAL))
  459. swiotlb_bounce(phys, dma_addr, size, DMA_TO_DEVICE);
  460. else
  461. BUG_ON(dir != DMA_FROM_DEVICE);
  462. break;
  463. default:
  464. BUG();
  465. }
  466. }
  467. void *
  468. swiotlb_alloc_coherent(struct device *hwdev, size_t size,
  469. dma_addr_t *dma_handle, gfp_t flags)
  470. {
  471. dma_addr_t dev_addr;
  472. void *ret;
  473. int order = get_order(size);
  474. u64 dma_mask = DMA_BIT_MASK(32);
  475. if (hwdev && hwdev->coherent_dma_mask)
  476. dma_mask = hwdev->coherent_dma_mask;
  477. ret = (void *)__get_free_pages(flags, order);
  478. if (ret &&
  479. !is_buffer_dma_capable(dma_mask, swiotlb_virt_to_bus(hwdev, ret),
  480. size)) {
  481. /*
  482. * The allocated memory isn't reachable by the device.
  483. * Fall back on swiotlb_map_single().
  484. */
  485. free_pages((unsigned long) ret, order);
  486. ret = NULL;
  487. }
  488. if (!ret) {
  489. /*
  490. * We are either out of memory or the device can't DMA
  491. * to GFP_DMA memory; fall back on
  492. * swiotlb_map_single(), which will grab memory from
  493. * the lowest available address range.
  494. */
  495. ret = map_single(hwdev, 0, size, DMA_FROM_DEVICE);
  496. if (!ret)
  497. return NULL;
  498. }
  499. memset(ret, 0, size);
  500. dev_addr = swiotlb_virt_to_bus(hwdev, ret);
  501. /* Confirm address can be DMA'd by device */
  502. if (!is_buffer_dma_capable(dma_mask, dev_addr, size)) {
  503. printk("hwdev DMA mask = 0x%016Lx, dev_addr = 0x%016Lx\n",
  504. (unsigned long long)dma_mask,
  505. (unsigned long long)dev_addr);
  506. /* DMA_TO_DEVICE to avoid memcpy in unmap_single */
  507. unmap_single(hwdev, ret, size, DMA_TO_DEVICE);
  508. return NULL;
  509. }
  510. *dma_handle = dev_addr;
  511. return ret;
  512. }
  513. EXPORT_SYMBOL(swiotlb_alloc_coherent);
  514. void
  515. swiotlb_free_coherent(struct device *hwdev, size_t size, void *vaddr,
  516. dma_addr_t dma_handle)
  517. {
  518. WARN_ON(irqs_disabled());
  519. if (!is_swiotlb_buffer(vaddr))
  520. free_pages((unsigned long) vaddr, get_order(size));
  521. else
  522. /* DMA_TO_DEVICE to avoid memcpy in unmap_single */
  523. unmap_single(hwdev, vaddr, size, DMA_TO_DEVICE);
  524. }
  525. EXPORT_SYMBOL(swiotlb_free_coherent);
  526. static void
  527. swiotlb_full(struct device *dev, size_t size, int dir, int do_panic)
  528. {
  529. /*
  530. * Ran out of IOMMU space for this operation. This is very bad.
  531. * Unfortunately the drivers cannot handle this operation properly.
  532. * unless they check for dma_mapping_error (most don't)
  533. * When the mapping is small enough return a static buffer to limit
  534. * the damage, or panic when the transfer is too big.
  535. */
  536. printk(KERN_ERR "DMA: Out of SW-IOMMU space for %zu bytes at "
  537. "device %s\n", size, dev ? dev_name(dev) : "?");
  538. if (size > io_tlb_overflow && do_panic) {
  539. if (dir == DMA_FROM_DEVICE || dir == DMA_BIDIRECTIONAL)
  540. panic("DMA: Memory would be corrupted\n");
  541. if (dir == DMA_TO_DEVICE || dir == DMA_BIDIRECTIONAL)
  542. panic("DMA: Random memory would be DMAed\n");
  543. }
  544. }
  545. /*
  546. * Map a single buffer of the indicated size for DMA in streaming mode. The
  547. * physical address to use is returned.
  548. *
  549. * Once the device is given the dma address, the device owns this memory until
  550. * either swiotlb_unmap_single or swiotlb_dma_sync_single is performed.
  551. */
  552. dma_addr_t swiotlb_map_page(struct device *dev, struct page *page,
  553. unsigned long offset, size_t size,
  554. enum dma_data_direction dir,
  555. struct dma_attrs *attrs)
  556. {
  557. phys_addr_t phys = page_to_phys(page) + offset;
  558. void *ptr = page_address(page) + offset;
  559. dma_addr_t dev_addr = swiotlb_phys_to_bus(dev, phys);
  560. void *map;
  561. BUG_ON(dir == DMA_NONE);
  562. /*
  563. * If the pointer passed in happens to be in the device's DMA window,
  564. * we can safely return the device addr and not worry about bounce
  565. * buffering it.
  566. */
  567. if (!address_needs_mapping(dev, dev_addr, size) &&
  568. !range_needs_mapping(virt_to_phys(ptr), size))
  569. return dev_addr;
  570. /*
  571. * Oh well, have to allocate and map a bounce buffer.
  572. */
  573. map = map_single(dev, phys, size, dir);
  574. if (!map) {
  575. swiotlb_full(dev, size, dir, 1);
  576. map = io_tlb_overflow_buffer;
  577. }
  578. dev_addr = swiotlb_virt_to_bus(dev, map);
  579. /*
  580. * Ensure that the address returned is DMA'ble
  581. */
  582. if (address_needs_mapping(dev, dev_addr, size))
  583. panic("map_single: bounce buffer is not DMA'ble");
  584. return dev_addr;
  585. }
  586. EXPORT_SYMBOL_GPL(swiotlb_map_page);
  587. /*
  588. * Unmap a single streaming mode DMA translation. The dma_addr and size must
  589. * match what was provided for in a previous swiotlb_map_single call. All
  590. * other usages are undefined.
  591. *
  592. * After this call, reads by the cpu to the buffer are guaranteed to see
  593. * whatever the device wrote there.
  594. */
  595. void swiotlb_unmap_page(struct device *hwdev, dma_addr_t dev_addr,
  596. size_t size, enum dma_data_direction dir,
  597. struct dma_attrs *attrs)
  598. {
  599. char *dma_addr = swiotlb_bus_to_virt(dev_addr);
  600. BUG_ON(dir == DMA_NONE);
  601. if (is_swiotlb_buffer(dma_addr))
  602. unmap_single(hwdev, dma_addr, size, dir);
  603. else if (dir == DMA_FROM_DEVICE)
  604. dma_mark_clean(dma_addr, size);
  605. }
  606. EXPORT_SYMBOL_GPL(swiotlb_unmap_page);
  607. /*
  608. * Make physical memory consistent for a single streaming mode DMA translation
  609. * after a transfer.
  610. *
  611. * If you perform a swiotlb_map_single() but wish to interrogate the buffer
  612. * using the cpu, yet do not wish to teardown the dma mapping, you must
  613. * call this function before doing so. At the next point you give the dma
  614. * address back to the card, you must first perform a
  615. * swiotlb_dma_sync_for_device, and then the device again owns the buffer
  616. */
  617. static void
  618. swiotlb_sync_single(struct device *hwdev, dma_addr_t dev_addr,
  619. size_t size, int dir, int target)
  620. {
  621. char *dma_addr = swiotlb_bus_to_virt(dev_addr);
  622. BUG_ON(dir == DMA_NONE);
  623. if (is_swiotlb_buffer(dma_addr))
  624. sync_single(hwdev, dma_addr, size, dir, target);
  625. else if (dir == DMA_FROM_DEVICE)
  626. dma_mark_clean(dma_addr, size);
  627. }
  628. void
  629. swiotlb_sync_single_for_cpu(struct device *hwdev, dma_addr_t dev_addr,
  630. size_t size, enum dma_data_direction dir)
  631. {
  632. swiotlb_sync_single(hwdev, dev_addr, size, dir, SYNC_FOR_CPU);
  633. }
  634. EXPORT_SYMBOL(swiotlb_sync_single_for_cpu);
  635. void
  636. swiotlb_sync_single_for_device(struct device *hwdev, dma_addr_t dev_addr,
  637. size_t size, enum dma_data_direction dir)
  638. {
  639. swiotlb_sync_single(hwdev, dev_addr, size, dir, SYNC_FOR_DEVICE);
  640. }
  641. EXPORT_SYMBOL(swiotlb_sync_single_for_device);
  642. /*
  643. * Same as above, but for a sub-range of the mapping.
  644. */
  645. static void
  646. swiotlb_sync_single_range(struct device *hwdev, dma_addr_t dev_addr,
  647. unsigned long offset, size_t size,
  648. int dir, int target)
  649. {
  650. char *dma_addr = swiotlb_bus_to_virt(dev_addr) + offset;
  651. BUG_ON(dir == DMA_NONE);
  652. if (is_swiotlb_buffer(dma_addr))
  653. sync_single(hwdev, dma_addr, size, dir, target);
  654. else if (dir == DMA_FROM_DEVICE)
  655. dma_mark_clean(dma_addr, size);
  656. }
  657. void
  658. swiotlb_sync_single_range_for_cpu(struct device *hwdev, dma_addr_t dev_addr,
  659. unsigned long offset, size_t size,
  660. enum dma_data_direction dir)
  661. {
  662. swiotlb_sync_single_range(hwdev, dev_addr, offset, size, dir,
  663. SYNC_FOR_CPU);
  664. }
  665. EXPORT_SYMBOL_GPL(swiotlb_sync_single_range_for_cpu);
  666. void
  667. swiotlb_sync_single_range_for_device(struct device *hwdev, dma_addr_t dev_addr,
  668. unsigned long offset, size_t size,
  669. enum dma_data_direction dir)
  670. {
  671. swiotlb_sync_single_range(hwdev, dev_addr, offset, size, dir,
  672. SYNC_FOR_DEVICE);
  673. }
  674. EXPORT_SYMBOL_GPL(swiotlb_sync_single_range_for_device);
  675. /*
  676. * Map a set of buffers described by scatterlist in streaming mode for DMA.
  677. * This is the scatter-gather version of the above swiotlb_map_single
  678. * interface. Here the scatter gather list elements are each tagged with the
  679. * appropriate dma address and length. They are obtained via
  680. * sg_dma_{address,length}(SG).
  681. *
  682. * NOTE: An implementation may be able to use a smaller number of
  683. * DMA address/length pairs than there are SG table elements.
  684. * (for example via virtual mapping capabilities)
  685. * The routine returns the number of addr/length pairs actually
  686. * used, at most nents.
  687. *
  688. * Device ownership issues as mentioned above for swiotlb_map_single are the
  689. * same here.
  690. */
  691. int
  692. swiotlb_map_sg_attrs(struct device *hwdev, struct scatterlist *sgl, int nelems,
  693. enum dma_data_direction dir, struct dma_attrs *attrs)
  694. {
  695. struct scatterlist *sg;
  696. int i;
  697. BUG_ON(dir == DMA_NONE);
  698. for_each_sg(sgl, sg, nelems, i) {
  699. phys_addr_t paddr = sg_phys(sg);
  700. dma_addr_t dev_addr = swiotlb_phys_to_bus(hwdev, paddr);
  701. if (range_needs_mapping(paddr, sg->length) ||
  702. address_needs_mapping(hwdev, dev_addr, sg->length)) {
  703. void *map = map_single(hwdev, sg_phys(sg),
  704. sg->length, dir);
  705. if (!map) {
  706. /* Don't panic here, we expect map_sg users
  707. to do proper error handling. */
  708. swiotlb_full(hwdev, sg->length, dir, 0);
  709. swiotlb_unmap_sg_attrs(hwdev, sgl, i, dir,
  710. attrs);
  711. sgl[0].dma_length = 0;
  712. return 0;
  713. }
  714. sg->dma_address = swiotlb_virt_to_bus(hwdev, map);
  715. } else
  716. sg->dma_address = dev_addr;
  717. sg->dma_length = sg->length;
  718. }
  719. return nelems;
  720. }
  721. EXPORT_SYMBOL(swiotlb_map_sg_attrs);
  722. int
  723. swiotlb_map_sg(struct device *hwdev, struct scatterlist *sgl, int nelems,
  724. int dir)
  725. {
  726. return swiotlb_map_sg_attrs(hwdev, sgl, nelems, dir, NULL);
  727. }
  728. EXPORT_SYMBOL(swiotlb_map_sg);
  729. /*
  730. * Unmap a set of streaming mode DMA translations. Again, cpu read rules
  731. * concerning calls here are the same as for swiotlb_unmap_single() above.
  732. */
  733. void
  734. swiotlb_unmap_sg_attrs(struct device *hwdev, struct scatterlist *sgl,
  735. int nelems, enum dma_data_direction dir, struct dma_attrs *attrs)
  736. {
  737. struct scatterlist *sg;
  738. int i;
  739. BUG_ON(dir == DMA_NONE);
  740. for_each_sg(sgl, sg, nelems, i) {
  741. if (sg->dma_address != swiotlb_phys_to_bus(hwdev, sg_phys(sg)))
  742. unmap_single(hwdev, swiotlb_bus_to_virt(sg->dma_address),
  743. sg->dma_length, dir);
  744. else if (dir == DMA_FROM_DEVICE)
  745. dma_mark_clean(swiotlb_bus_to_virt(sg->dma_address), sg->dma_length);
  746. }
  747. }
  748. EXPORT_SYMBOL(swiotlb_unmap_sg_attrs);
  749. void
  750. swiotlb_unmap_sg(struct device *hwdev, struct scatterlist *sgl, int nelems,
  751. int dir)
  752. {
  753. return swiotlb_unmap_sg_attrs(hwdev, sgl, nelems, dir, NULL);
  754. }
  755. EXPORT_SYMBOL(swiotlb_unmap_sg);
  756. /*
  757. * Make physical memory consistent for a set of streaming mode DMA translations
  758. * after a transfer.
  759. *
  760. * The same as swiotlb_sync_single_* but for a scatter-gather list, same rules
  761. * and usage.
  762. */
  763. static void
  764. swiotlb_sync_sg(struct device *hwdev, struct scatterlist *sgl,
  765. int nelems, int dir, int target)
  766. {
  767. struct scatterlist *sg;
  768. int i;
  769. BUG_ON(dir == DMA_NONE);
  770. for_each_sg(sgl, sg, nelems, i) {
  771. if (sg->dma_address != swiotlb_phys_to_bus(hwdev, sg_phys(sg)))
  772. sync_single(hwdev, swiotlb_bus_to_virt(sg->dma_address),
  773. sg->dma_length, dir, target);
  774. else if (dir == DMA_FROM_DEVICE)
  775. dma_mark_clean(swiotlb_bus_to_virt(sg->dma_address), sg->dma_length);
  776. }
  777. }
  778. void
  779. swiotlb_sync_sg_for_cpu(struct device *hwdev, struct scatterlist *sg,
  780. int nelems, enum dma_data_direction dir)
  781. {
  782. swiotlb_sync_sg(hwdev, sg, nelems, dir, SYNC_FOR_CPU);
  783. }
  784. EXPORT_SYMBOL(swiotlb_sync_sg_for_cpu);
  785. void
  786. swiotlb_sync_sg_for_device(struct device *hwdev, struct scatterlist *sg,
  787. int nelems, enum dma_data_direction dir)
  788. {
  789. swiotlb_sync_sg(hwdev, sg, nelems, dir, SYNC_FOR_DEVICE);
  790. }
  791. EXPORT_SYMBOL(swiotlb_sync_sg_for_device);
  792. int
  793. swiotlb_dma_mapping_error(struct device *hwdev, dma_addr_t dma_addr)
  794. {
  795. return (dma_addr == swiotlb_virt_to_bus(hwdev, io_tlb_overflow_buffer));
  796. }
  797. EXPORT_SYMBOL(swiotlb_dma_mapping_error);
  798. /*
  799. * Return whether the given device DMA address mask can be supported
  800. * properly. For example, if your device can only drive the low 24-bits
  801. * during bus mastering, then you would pass 0x00ffffff as the mask to
  802. * this function.
  803. */
  804. int
  805. swiotlb_dma_supported(struct device *hwdev, u64 mask)
  806. {
  807. return swiotlb_virt_to_bus(hwdev, io_tlb_end - 1) <= mask;
  808. }
  809. EXPORT_SYMBOL(swiotlb_dma_supported);