omap_wdt.c 11 KB

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  1. /*
  2. * omap_wdt.c
  3. *
  4. * Watchdog driver for the TI OMAP 16xx & 24xx/34xx 32KHz (non-secure) watchdog
  5. *
  6. * Author: MontaVista Software, Inc.
  7. * <gdavis@mvista.com> or <source@mvista.com>
  8. *
  9. * 2003 (c) MontaVista Software, Inc. This file is licensed under the
  10. * terms of the GNU General Public License version 2. This program is
  11. * licensed "as is" without any warranty of any kind, whether express
  12. * or implied.
  13. *
  14. * History:
  15. *
  16. * 20030527: George G. Davis <gdavis@mvista.com>
  17. * Initially based on linux-2.4.19-rmk7-pxa1/drivers/char/sa1100_wdt.c
  18. * (c) Copyright 2000 Oleg Drokin <green@crimea.edu>
  19. * Based on SoftDog driver by Alan Cox <alan@lxorguk.ukuu.org.uk>
  20. *
  21. * Copyright (c) 2004 Texas Instruments.
  22. * 1. Modified to support OMAP1610 32-KHz watchdog timer
  23. * 2. Ported to 2.6 kernel
  24. *
  25. * Copyright (c) 2005 David Brownell
  26. * Use the driver model and standard identifiers; handle bigger timeouts.
  27. */
  28. #include <linux/module.h>
  29. #include <linux/types.h>
  30. #include <linux/kernel.h>
  31. #include <linux/fs.h>
  32. #include <linux/mm.h>
  33. #include <linux/miscdevice.h>
  34. #include <linux/watchdog.h>
  35. #include <linux/reboot.h>
  36. #include <linux/init.h>
  37. #include <linux/err.h>
  38. #include <linux/platform_device.h>
  39. #include <linux/moduleparam.h>
  40. #include <linux/clk.h>
  41. #include <linux/bitops.h>
  42. #include <linux/io.h>
  43. #include <linux/uaccess.h>
  44. #include <mach/hardware.h>
  45. #include <mach/prcm.h>
  46. #include "omap_wdt.h"
  47. static struct platform_device *omap_wdt_dev;
  48. static unsigned timer_margin;
  49. module_param(timer_margin, uint, 0);
  50. MODULE_PARM_DESC(timer_margin, "initial watchdog timeout (in seconds)");
  51. static unsigned int wdt_trgr_pattern = 0x1234;
  52. static spinlock_t wdt_lock;
  53. struct omap_wdt_dev {
  54. void __iomem *base; /* physical */
  55. struct device *dev;
  56. int omap_wdt_users;
  57. struct clk *ick;
  58. struct clk *fck;
  59. struct resource *mem;
  60. struct miscdevice omap_wdt_miscdev;
  61. };
  62. static void omap_wdt_ping(struct omap_wdt_dev *wdev)
  63. {
  64. void __iomem *base = wdev->base;
  65. /* wait for posted write to complete */
  66. while ((__raw_readl(base + OMAP_WATCHDOG_WPS)) & 0x08)
  67. cpu_relax();
  68. wdt_trgr_pattern = ~wdt_trgr_pattern;
  69. __raw_writel(wdt_trgr_pattern, (base + OMAP_WATCHDOG_TGR));
  70. /* wait for posted write to complete */
  71. while ((__raw_readl(base + OMAP_WATCHDOG_WPS)) & 0x08)
  72. cpu_relax();
  73. /* reloaded WCRR from WLDR */
  74. }
  75. static void omap_wdt_enable(struct omap_wdt_dev *wdev)
  76. {
  77. void __iomem *base = wdev->base;
  78. /* Sequence to enable the watchdog */
  79. __raw_writel(0xBBBB, base + OMAP_WATCHDOG_SPR);
  80. while ((__raw_readl(base + OMAP_WATCHDOG_WPS)) & 0x10)
  81. cpu_relax();
  82. __raw_writel(0x4444, base + OMAP_WATCHDOG_SPR);
  83. while ((__raw_readl(base + OMAP_WATCHDOG_WPS)) & 0x10)
  84. cpu_relax();
  85. }
  86. static void omap_wdt_disable(struct omap_wdt_dev *wdev)
  87. {
  88. void __iomem *base = wdev->base;
  89. /* sequence required to disable watchdog */
  90. __raw_writel(0xAAAA, base + OMAP_WATCHDOG_SPR); /* TIMER_MODE */
  91. while (__raw_readl(base + OMAP_WATCHDOG_WPS) & 0x10)
  92. cpu_relax();
  93. __raw_writel(0x5555, base + OMAP_WATCHDOG_SPR); /* TIMER_MODE */
  94. while (__raw_readl(base + OMAP_WATCHDOG_WPS) & 0x10)
  95. cpu_relax();
  96. }
  97. static void omap_wdt_adjust_timeout(unsigned new_timeout)
  98. {
  99. if (new_timeout < TIMER_MARGIN_MIN)
  100. new_timeout = TIMER_MARGIN_DEFAULT;
  101. if (new_timeout > TIMER_MARGIN_MAX)
  102. new_timeout = TIMER_MARGIN_MAX;
  103. timer_margin = new_timeout;
  104. }
  105. static void omap_wdt_set_timeout(struct omap_wdt_dev *wdev)
  106. {
  107. u32 pre_margin = GET_WLDR_VAL(timer_margin);
  108. void __iomem *base = wdev->base;
  109. /* just count up at 32 KHz */
  110. while (__raw_readl(base + OMAP_WATCHDOG_WPS) & 0x04)
  111. cpu_relax();
  112. __raw_writel(pre_margin, base + OMAP_WATCHDOG_LDR);
  113. while (__raw_readl(base + OMAP_WATCHDOG_WPS) & 0x04)
  114. cpu_relax();
  115. }
  116. /*
  117. * Allow only one task to hold it open
  118. */
  119. static int omap_wdt_open(struct inode *inode, struct file *file)
  120. {
  121. struct omap_wdt_dev *wdev = platform_get_drvdata(omap_wdt_dev);
  122. void __iomem *base = wdev->base;
  123. if (test_and_set_bit(1, (unsigned long *)&(wdev->omap_wdt_users)))
  124. return -EBUSY;
  125. clk_enable(wdev->ick); /* Enable the interface clock */
  126. clk_enable(wdev->fck); /* Enable the functional clock */
  127. /* initialize prescaler */
  128. while (__raw_readl(base + OMAP_WATCHDOG_WPS) & 0x01)
  129. cpu_relax();
  130. __raw_writel((1 << 5) | (PTV << 2), base + OMAP_WATCHDOG_CNTRL);
  131. while (__raw_readl(base + OMAP_WATCHDOG_WPS) & 0x01)
  132. cpu_relax();
  133. file->private_data = (void *) wdev;
  134. omap_wdt_set_timeout(wdev);
  135. omap_wdt_enable(wdev);
  136. return nonseekable_open(inode, file);
  137. }
  138. static int omap_wdt_release(struct inode *inode, struct file *file)
  139. {
  140. struct omap_wdt_dev *wdev = file->private_data;
  141. /*
  142. * Shut off the timer unless NOWAYOUT is defined.
  143. */
  144. #ifndef CONFIG_WATCHDOG_NOWAYOUT
  145. omap_wdt_disable(wdev);
  146. clk_disable(wdev->ick);
  147. clk_disable(wdev->fck);
  148. #else
  149. printk(KERN_CRIT "omap_wdt: Unexpected close, not stopping!\n");
  150. #endif
  151. wdev->omap_wdt_users = 0;
  152. return 0;
  153. }
  154. static ssize_t omap_wdt_write(struct file *file, const char __user *data,
  155. size_t len, loff_t *ppos)
  156. {
  157. struct omap_wdt_dev *wdev = file->private_data;
  158. /* Refresh LOAD_TIME. */
  159. if (len) {
  160. spin_lock(&wdt_lock);
  161. omap_wdt_ping(wdev);
  162. spin_unlock(&wdt_lock);
  163. }
  164. return len;
  165. }
  166. static long omap_wdt_ioctl(struct file *file, unsigned int cmd,
  167. unsigned long arg)
  168. {
  169. struct omap_wdt_dev *wdev;
  170. int new_margin;
  171. static const struct watchdog_info ident = {
  172. .identity = "OMAP Watchdog",
  173. .options = WDIOF_SETTIMEOUT,
  174. .firmware_version = 0,
  175. };
  176. wdev = file->private_data;
  177. switch (cmd) {
  178. case WDIOC_GETSUPPORT:
  179. return copy_to_user((struct watchdog_info __user *)arg, &ident,
  180. sizeof(ident));
  181. case WDIOC_GETSTATUS:
  182. return put_user(0, (int __user *)arg);
  183. case WDIOC_GETBOOTSTATUS:
  184. if (cpu_is_omap16xx())
  185. return put_user(__raw_readw(ARM_SYSST),
  186. (int __user *)arg);
  187. if (cpu_is_omap24xx())
  188. return put_user(omap_prcm_get_reset_sources(),
  189. (int __user *)arg);
  190. case WDIOC_KEEPALIVE:
  191. spin_lock(&wdt_lock);
  192. omap_wdt_ping(wdev);
  193. spin_unlock(&wdt_lock);
  194. return 0;
  195. case WDIOC_SETTIMEOUT:
  196. if (get_user(new_margin, (int __user *)arg))
  197. return -EFAULT;
  198. omap_wdt_adjust_timeout(new_margin);
  199. spin_lock(&wdt_lock);
  200. omap_wdt_disable(wdev);
  201. omap_wdt_set_timeout(wdev);
  202. omap_wdt_enable(wdev);
  203. omap_wdt_ping(wdev);
  204. spin_unlock(&wdt_lock);
  205. /* Fall */
  206. case WDIOC_GETTIMEOUT:
  207. return put_user(timer_margin, (int __user *)arg);
  208. default:
  209. return -ENOTTY;
  210. }
  211. }
  212. static const struct file_operations omap_wdt_fops = {
  213. .owner = THIS_MODULE,
  214. .write = omap_wdt_write,
  215. .unlocked_ioctl = omap_wdt_ioctl,
  216. .open = omap_wdt_open,
  217. .release = omap_wdt_release,
  218. };
  219. static int __devinit omap_wdt_probe(struct platform_device *pdev)
  220. {
  221. struct resource *res, *mem;
  222. struct omap_wdt_dev *wdev;
  223. int ret;
  224. /* reserve static register mappings */
  225. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  226. if (!res) {
  227. ret = -ENOENT;
  228. goto err_get_resource;
  229. }
  230. if (omap_wdt_dev) {
  231. ret = -EBUSY;
  232. goto err_busy;
  233. }
  234. mem = request_mem_region(res->start, res->end - res->start + 1,
  235. pdev->name);
  236. if (!mem) {
  237. ret = -EBUSY;
  238. goto err_busy;
  239. }
  240. wdev = kzalloc(sizeof(struct omap_wdt_dev), GFP_KERNEL);
  241. if (!wdev) {
  242. ret = -ENOMEM;
  243. goto err_kzalloc;
  244. }
  245. wdev->omap_wdt_users = 0;
  246. wdev->mem = mem;
  247. wdev->ick = clk_get(&pdev->dev, "ick");
  248. if (IS_ERR(wdev->ick)) {
  249. ret = PTR_ERR(wdev->ick);
  250. wdev->ick = NULL;
  251. goto err_clk;
  252. }
  253. wdev->fck = clk_get(&pdev->dev, "fck");
  254. if (IS_ERR(wdev->fck)) {
  255. ret = PTR_ERR(wdev->fck);
  256. wdev->fck = NULL;
  257. goto err_clk;
  258. }
  259. wdev->base = ioremap(res->start, res->end - res->start + 1);
  260. if (!wdev->base) {
  261. ret = -ENOMEM;
  262. goto err_ioremap;
  263. }
  264. platform_set_drvdata(pdev, wdev);
  265. omap_wdt_disable(wdev);
  266. omap_wdt_adjust_timeout(timer_margin);
  267. wdev->omap_wdt_miscdev.parent = &pdev->dev;
  268. wdev->omap_wdt_miscdev.minor = WATCHDOG_MINOR;
  269. wdev->omap_wdt_miscdev.name = "watchdog";
  270. wdev->omap_wdt_miscdev.fops = &omap_wdt_fops;
  271. ret = misc_register(&(wdev->omap_wdt_miscdev));
  272. if (ret)
  273. goto err_misc;
  274. pr_info("OMAP Watchdog Timer Rev 0x%02x: initial timeout %d sec\n",
  275. __raw_readl(wdev->base + OMAP_WATCHDOG_REV) & 0xFF,
  276. timer_margin);
  277. /* autogate OCP interface clock */
  278. __raw_writel(0x01, wdev->base + OMAP_WATCHDOG_SYS_CONFIG);
  279. omap_wdt_dev = pdev;
  280. return 0;
  281. err_misc:
  282. platform_set_drvdata(pdev, NULL);
  283. iounmap(wdev->base);
  284. err_ioremap:
  285. wdev->base = NULL;
  286. err_clk:
  287. if (wdev->ick)
  288. clk_put(wdev->ick);
  289. if (wdev->fck)
  290. clk_put(wdev->fck);
  291. kfree(wdev);
  292. err_kzalloc:
  293. release_mem_region(res->start, res->end - res->start + 1);
  294. err_busy:
  295. err_get_resource:
  296. return ret;
  297. }
  298. static void omap_wdt_shutdown(struct platform_device *pdev)
  299. {
  300. struct omap_wdt_dev *wdev = platform_get_drvdata(pdev);
  301. if (wdev->omap_wdt_users)
  302. omap_wdt_disable(wdev);
  303. }
  304. static int __devexit omap_wdt_remove(struct platform_device *pdev)
  305. {
  306. struct omap_wdt_dev *wdev = platform_get_drvdata(pdev);
  307. struct resource *res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  308. if (!res)
  309. return -ENOENT;
  310. misc_deregister(&(wdev->omap_wdt_miscdev));
  311. release_mem_region(res->start, res->end - res->start + 1);
  312. platform_set_drvdata(pdev, NULL);
  313. clk_put(wdev->ick);
  314. clk_put(wdev->fck);
  315. iounmap(wdev->base);
  316. kfree(wdev);
  317. omap_wdt_dev = NULL;
  318. return 0;
  319. }
  320. #ifdef CONFIG_PM
  321. /* REVISIT ... not clear this is the best way to handle system suspend; and
  322. * it's very inappropriate for selective device suspend (e.g. suspending this
  323. * through sysfs rather than by stopping the watchdog daemon). Also, this
  324. * may not play well enough with NOWAYOUT...
  325. */
  326. static int omap_wdt_suspend(struct platform_device *pdev, pm_message_t state)
  327. {
  328. struct omap_wdt_dev *wdev = platform_get_drvdata(pdev);
  329. if (wdev->omap_wdt_users)
  330. omap_wdt_disable(wdev);
  331. return 0;
  332. }
  333. static int omap_wdt_resume(struct platform_device *pdev)
  334. {
  335. struct omap_wdt_dev *wdev = platform_get_drvdata(pdev);
  336. if (wdev->omap_wdt_users) {
  337. omap_wdt_enable(wdev);
  338. omap_wdt_ping(wdev);
  339. }
  340. return 0;
  341. }
  342. #else
  343. #define omap_wdt_suspend NULL
  344. #define omap_wdt_resume NULL
  345. #endif
  346. static struct platform_driver omap_wdt_driver = {
  347. .probe = omap_wdt_probe,
  348. .remove = __devexit_p(omap_wdt_remove),
  349. .shutdown = omap_wdt_shutdown,
  350. .suspend = omap_wdt_suspend,
  351. .resume = omap_wdt_resume,
  352. .driver = {
  353. .owner = THIS_MODULE,
  354. .name = "omap_wdt",
  355. },
  356. };
  357. static int __init omap_wdt_init(void)
  358. {
  359. spin_lock_init(&wdt_lock);
  360. return platform_driver_register(&omap_wdt_driver);
  361. }
  362. static void __exit omap_wdt_exit(void)
  363. {
  364. platform_driver_unregister(&omap_wdt_driver);
  365. }
  366. module_init(omap_wdt_init);
  367. module_exit(omap_wdt_exit);
  368. MODULE_AUTHOR("George G. Davis");
  369. MODULE_LICENSE("GPL");
  370. MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR);
  371. MODULE_ALIAS("platform:omap_wdt");