gef_wdt.c 7.5 KB

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  1. /*
  2. * GE Fanuc watchdog userspace interface
  3. *
  4. * Author: Martyn Welch <martyn.welch@gefanuc.com>
  5. *
  6. * Copyright 2008 GE Fanuc Intelligent Platforms Embedded Systems, Inc.
  7. *
  8. * This program is free software; you can redistribute it and/or modify it
  9. * under the terms of the GNU General Public License as published by the
  10. * Free Software Foundation; either version 2 of the License, or (at your
  11. * option) any later version.
  12. *
  13. * Based on: mv64x60_wdt.c (MV64X60 watchdog userspace interface)
  14. * Author: James Chapman <jchapman@katalix.com>
  15. */
  16. /* TODO:
  17. * This driver does not provide support for the hardwares capability of sending
  18. * an interrupt at a programmable threshold.
  19. *
  20. * This driver currently can only support 1 watchdog - there are 2 in the
  21. * hardware that this driver supports. Thus one could be configured as a
  22. * process-based watchdog (via /dev/watchdog), the second (using the interrupt
  23. * capabilities) a kernel-based watchdog.
  24. */
  25. #include <linux/kernel.h>
  26. #include <linux/compiler.h>
  27. #include <linux/init.h>
  28. #include <linux/module.h>
  29. #include <linux/miscdevice.h>
  30. #include <linux/watchdog.h>
  31. #include <linux/of.h>
  32. #include <linux/of_platform.h>
  33. #include <linux/io.h>
  34. #include <linux/uaccess.h>
  35. #include <sysdev/fsl_soc.h>
  36. /*
  37. * The watchdog configuration register contains a pair of 2-bit fields,
  38. * 1. a reload field, bits 27-26, which triggers a reload of
  39. * the countdown register, and
  40. * 2. an enable field, bits 25-24, which toggles between
  41. * enabling and disabling the watchdog timer.
  42. * Bit 31 is a read-only field which indicates whether the
  43. * watchdog timer is currently enabled.
  44. *
  45. * The low 24 bits contain the timer reload value.
  46. */
  47. #define GEF_WDC_ENABLE_SHIFT 24
  48. #define GEF_WDC_SERVICE_SHIFT 26
  49. #define GEF_WDC_ENABLED_SHIFT 31
  50. #define GEF_WDC_ENABLED_TRUE 1
  51. #define GEF_WDC_ENABLED_FALSE 0
  52. /* Flags bits */
  53. #define GEF_WDOG_FLAG_OPENED 0
  54. static unsigned long wdt_flags;
  55. static int wdt_status;
  56. static void __iomem *gef_wdt_regs;
  57. static int gef_wdt_timeout;
  58. static int gef_wdt_count;
  59. static unsigned int bus_clk;
  60. static char expect_close;
  61. static DEFINE_SPINLOCK(gef_wdt_spinlock);
  62. static int nowayout = WATCHDOG_NOWAYOUT;
  63. module_param(nowayout, int, 0);
  64. MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default="
  65. __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
  66. static int gef_wdt_toggle_wdc(int enabled_predicate, int field_shift)
  67. {
  68. u32 data;
  69. u32 enabled;
  70. int ret = 0;
  71. spin_lock(&gef_wdt_spinlock);
  72. data = ioread32be(gef_wdt_regs);
  73. enabled = (data >> GEF_WDC_ENABLED_SHIFT) & 1;
  74. /* only toggle the requested field if enabled state matches predicate */
  75. if ((enabled ^ enabled_predicate) == 0) {
  76. /* We write a 1, then a 2 -- to the appropriate field */
  77. data = (1 << field_shift) | gef_wdt_count;
  78. iowrite32be(data, gef_wdt_regs);
  79. data = (2 << field_shift) | gef_wdt_count;
  80. iowrite32be(data, gef_wdt_regs);
  81. ret = 1;
  82. }
  83. spin_unlock(&gef_wdt_spinlock);
  84. return ret;
  85. }
  86. static void gef_wdt_service(void)
  87. {
  88. gef_wdt_toggle_wdc(GEF_WDC_ENABLED_TRUE,
  89. GEF_WDC_SERVICE_SHIFT);
  90. }
  91. static void gef_wdt_handler_enable(void)
  92. {
  93. if (gef_wdt_toggle_wdc(GEF_WDC_ENABLED_FALSE,
  94. GEF_WDC_ENABLE_SHIFT)) {
  95. gef_wdt_service();
  96. printk(KERN_NOTICE "gef_wdt: watchdog activated\n");
  97. }
  98. }
  99. static void gef_wdt_handler_disable(void)
  100. {
  101. if (gef_wdt_toggle_wdc(GEF_WDC_ENABLED_TRUE,
  102. GEF_WDC_ENABLE_SHIFT))
  103. printk(KERN_NOTICE "gef_wdt: watchdog deactivated\n");
  104. }
  105. static void gef_wdt_set_timeout(unsigned int timeout)
  106. {
  107. /* maximum bus cycle count is 0xFFFFFFFF */
  108. if (timeout > 0xFFFFFFFF / bus_clk)
  109. timeout = 0xFFFFFFFF / bus_clk;
  110. /* Register only holds upper 24 bits, bit shifted into lower 24 */
  111. gef_wdt_count = (timeout * bus_clk) >> 8;
  112. gef_wdt_timeout = timeout;
  113. }
  114. static ssize_t gef_wdt_write(struct file *file, const char __user *data,
  115. size_t len, loff_t *ppos)
  116. {
  117. if (len) {
  118. if (!nowayout) {
  119. size_t i;
  120. expect_close = 0;
  121. for (i = 0; i != len; i++) {
  122. char c;
  123. if (get_user(c, data + i))
  124. return -EFAULT;
  125. if (c == 'V')
  126. expect_close = 42;
  127. }
  128. }
  129. gef_wdt_service();
  130. }
  131. return len;
  132. }
  133. static long gef_wdt_ioctl(struct file *file, unsigned int cmd,
  134. unsigned long arg)
  135. {
  136. int timeout;
  137. int options;
  138. void __user *argp = (void __user *)arg;
  139. static struct watchdog_info info = {
  140. .options = WDIOF_SETTIMEOUT | WDIOF_MAGICCLOSE |
  141. WDIOF_KEEPALIVEPING,
  142. .firmware_version = 0,
  143. .identity = "GE Fanuc watchdog",
  144. };
  145. switch (cmd) {
  146. case WDIOC_GETSUPPORT:
  147. if (copy_to_user(argp, &info, sizeof(info)))
  148. return -EFAULT;
  149. break;
  150. case WDIOC_GETSTATUS:
  151. case WDIOC_GETBOOTSTATUS:
  152. if (put_user(wdt_status, (int __user *)argp))
  153. return -EFAULT;
  154. wdt_status &= ~WDIOF_KEEPALIVEPING;
  155. break;
  156. case WDIOC_SETOPTIONS:
  157. if (get_user(options, (int __user *)argp))
  158. return -EFAULT;
  159. if (options & WDIOS_DISABLECARD)
  160. gef_wdt_handler_disable();
  161. if (options & WDIOS_ENABLECARD)
  162. gef_wdt_handler_enable();
  163. break;
  164. case WDIOC_KEEPALIVE:
  165. gef_wdt_service();
  166. wdt_status |= WDIOF_KEEPALIVEPING;
  167. break;
  168. case WDIOC_SETTIMEOUT:
  169. if (get_user(timeout, (int __user *)argp))
  170. return -EFAULT;
  171. gef_wdt_set_timeout(timeout);
  172. /* Fall through */
  173. case WDIOC_GETTIMEOUT:
  174. if (put_user(gef_wdt_timeout, (int __user *)argp))
  175. return -EFAULT;
  176. break;
  177. default:
  178. return -ENOTTY;
  179. }
  180. return 0;
  181. }
  182. static int gef_wdt_open(struct inode *inode, struct file *file)
  183. {
  184. if (test_and_set_bit(GEF_WDOG_FLAG_OPENED, &wdt_flags))
  185. return -EBUSY;
  186. if (nowayout)
  187. __module_get(THIS_MODULE);
  188. gef_wdt_handler_enable();
  189. return nonseekable_open(inode, file);
  190. }
  191. static int gef_wdt_release(struct inode *inode, struct file *file)
  192. {
  193. if (expect_close == 42)
  194. gef_wdt_handler_disable();
  195. else {
  196. printk(KERN_CRIT
  197. "gef_wdt: unexpected close, not stopping timer!\n");
  198. gef_wdt_service();
  199. }
  200. expect_close = 0;
  201. clear_bit(GEF_WDOG_FLAG_OPENED, &wdt_flags);
  202. return 0;
  203. }
  204. static const struct file_operations gef_wdt_fops = {
  205. .owner = THIS_MODULE,
  206. .llseek = no_llseek,
  207. .write = gef_wdt_write,
  208. .unlocked_ioctl = gef_wdt_ioctl,
  209. .open = gef_wdt_open,
  210. .release = gef_wdt_release,
  211. };
  212. static struct miscdevice gef_wdt_miscdev = {
  213. .minor = WATCHDOG_MINOR,
  214. .name = "watchdog",
  215. .fops = &gef_wdt_fops,
  216. };
  217. static int __devinit gef_wdt_probe(struct of_device *dev,
  218. const struct of_device_id *match)
  219. {
  220. int timeout = 10;
  221. u32 freq;
  222. bus_clk = 133; /* in MHz */
  223. freq = fsl_get_sys_freq();
  224. if (freq != -1)
  225. bus_clk = freq;
  226. /* Map devices registers into memory */
  227. gef_wdt_regs = of_iomap(dev->node, 0);
  228. if (gef_wdt_regs == NULL)
  229. return -ENOMEM;
  230. gef_wdt_set_timeout(timeout);
  231. gef_wdt_handler_disable(); /* in case timer was already running */
  232. return misc_register(&gef_wdt_miscdev);
  233. }
  234. static int __devexit gef_wdt_remove(struct platform_device *dev)
  235. {
  236. misc_deregister(&gef_wdt_miscdev);
  237. gef_wdt_handler_disable();
  238. iounmap(gef_wdt_regs);
  239. return 0;
  240. }
  241. static const struct of_device_id gef_wdt_ids[] = {
  242. {
  243. .compatible = "gef,fpga-wdt",
  244. },
  245. {},
  246. };
  247. static struct of_platform_driver gef_wdt_driver = {
  248. .owner = THIS_MODULE,
  249. .name = "gef_wdt",
  250. .match_table = gef_wdt_ids,
  251. .probe = gef_wdt_probe,
  252. };
  253. static int __init gef_wdt_init(void)
  254. {
  255. printk(KERN_INFO "GE Fanuc watchdog driver\n");
  256. return of_register_platform_driver(&gef_wdt_driver);
  257. }
  258. static void __exit gef_wdt_exit(void)
  259. {
  260. of_unregister_platform_driver(&gef_wdt_driver);
  261. }
  262. module_init(gef_wdt_init);
  263. module_exit(gef_wdt_exit);
  264. MODULE_AUTHOR("Martyn Welch <martyn.welch@gefanuc.com>");
  265. MODULE_DESCRIPTION("GE Fanuc watchdog driver");
  266. MODULE_LICENSE("GPL");
  267. MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR);
  268. MODULE_ALIAS("platform: gef_wdt");