lh7a40x_udc.c 50 KB

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  1. /*
  2. * linux/drivers/usb/gadget/lh7a40x_udc.c
  3. * Sharp LH7A40x on-chip full speed USB device controllers
  4. *
  5. * Copyright (C) 2004 Mikko Lahteenmaki, Nordic ID
  6. * Copyright (C) 2004 Bo Henriksen, Nordic ID
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License as published by
  10. * the Free Software Foundation; either version 2 of the License, or
  11. * (at your option) any later version.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program; if not, write to the Free Software
  20. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  21. *
  22. */
  23. #include <linux/platform_device.h>
  24. #include "lh7a40x_udc.h"
  25. //#define DEBUG printk
  26. //#define DEBUG_EP0 printk
  27. //#define DEBUG_SETUP printk
  28. #ifndef DEBUG_EP0
  29. # define DEBUG_EP0(fmt,args...)
  30. #endif
  31. #ifndef DEBUG_SETUP
  32. # define DEBUG_SETUP(fmt,args...)
  33. #endif
  34. #ifndef DEBUG
  35. # define NO_STATES
  36. # define DEBUG(fmt,args...)
  37. #endif
  38. #define DRIVER_DESC "LH7A40x USB Device Controller"
  39. #define DRIVER_VERSION __DATE__
  40. #ifndef _BIT /* FIXME - what happended to _BIT in 2.6.7bk18? */
  41. #define _BIT(x) (1<<(x))
  42. #endif
  43. struct lh7a40x_udc *the_controller;
  44. static const char driver_name[] = "lh7a40x_udc";
  45. static const char driver_desc[] = DRIVER_DESC;
  46. static const char ep0name[] = "ep0-control";
  47. /*
  48. Local definintions.
  49. */
  50. #ifndef NO_STATES
  51. static char *state_names[] = {
  52. "WAIT_FOR_SETUP",
  53. "DATA_STATE_XMIT",
  54. "DATA_STATE_NEED_ZLP",
  55. "WAIT_FOR_OUT_STATUS",
  56. "DATA_STATE_RECV"
  57. };
  58. #endif
  59. /*
  60. Local declarations.
  61. */
  62. static int lh7a40x_ep_enable(struct usb_ep *ep,
  63. const struct usb_endpoint_descriptor *);
  64. static int lh7a40x_ep_disable(struct usb_ep *ep);
  65. static struct usb_request *lh7a40x_alloc_request(struct usb_ep *ep, gfp_t);
  66. static void lh7a40x_free_request(struct usb_ep *ep, struct usb_request *);
  67. static int lh7a40x_queue(struct usb_ep *ep, struct usb_request *, gfp_t);
  68. static int lh7a40x_dequeue(struct usb_ep *ep, struct usb_request *);
  69. static int lh7a40x_set_halt(struct usb_ep *ep, int);
  70. static int lh7a40x_fifo_status(struct usb_ep *ep);
  71. static void lh7a40x_fifo_flush(struct usb_ep *ep);
  72. static void lh7a40x_ep0_kick(struct lh7a40x_udc *dev, struct lh7a40x_ep *ep);
  73. static void lh7a40x_handle_ep0(struct lh7a40x_udc *dev, u32 intr);
  74. static void done(struct lh7a40x_ep *ep, struct lh7a40x_request *req,
  75. int status);
  76. static void pio_irq_enable(int bEndpointAddress);
  77. static void pio_irq_disable(int bEndpointAddress);
  78. static void stop_activity(struct lh7a40x_udc *dev,
  79. struct usb_gadget_driver *driver);
  80. static void flush(struct lh7a40x_ep *ep);
  81. static void udc_enable(struct lh7a40x_udc *dev);
  82. static void udc_set_address(struct lh7a40x_udc *dev, unsigned char address);
  83. static struct usb_ep_ops lh7a40x_ep_ops = {
  84. .enable = lh7a40x_ep_enable,
  85. .disable = lh7a40x_ep_disable,
  86. .alloc_request = lh7a40x_alloc_request,
  87. .free_request = lh7a40x_free_request,
  88. .queue = lh7a40x_queue,
  89. .dequeue = lh7a40x_dequeue,
  90. .set_halt = lh7a40x_set_halt,
  91. .fifo_status = lh7a40x_fifo_status,
  92. .fifo_flush = lh7a40x_fifo_flush,
  93. };
  94. /* Inline code */
  95. static __inline__ int write_packet(struct lh7a40x_ep *ep,
  96. struct lh7a40x_request *req, int max)
  97. {
  98. u8 *buf;
  99. int length, count;
  100. volatile u32 *fifo = (volatile u32 *)ep->fifo;
  101. buf = req->req.buf + req->req.actual;
  102. prefetch(buf);
  103. length = req->req.length - req->req.actual;
  104. length = min(length, max);
  105. req->req.actual += length;
  106. DEBUG("Write %d (max %d), fifo %p\n", length, max, fifo);
  107. count = length;
  108. while (count--) {
  109. *fifo = *buf++;
  110. }
  111. return length;
  112. }
  113. static __inline__ void usb_set_index(u32 ep)
  114. {
  115. *(volatile u32 *)io_p2v(USB_INDEX) = ep;
  116. }
  117. static __inline__ u32 usb_read(u32 port)
  118. {
  119. return *(volatile u32 *)io_p2v(port);
  120. }
  121. static __inline__ void usb_write(u32 val, u32 port)
  122. {
  123. *(volatile u32 *)io_p2v(port) = val;
  124. }
  125. static __inline__ void usb_set(u32 val, u32 port)
  126. {
  127. volatile u32 *ioport = (volatile u32 *)io_p2v(port);
  128. u32 after = (*ioport) | val;
  129. *ioport = after;
  130. }
  131. static __inline__ void usb_clear(u32 val, u32 port)
  132. {
  133. volatile u32 *ioport = (volatile u32 *)io_p2v(port);
  134. u32 after = (*ioport) & ~val;
  135. *ioport = after;
  136. }
  137. /*-------------------------------------------------------------------------*/
  138. #define GPIO_PORTC_DR (0x80000E08)
  139. #define GPIO_PORTC_DDR (0x80000E18)
  140. #define GPIO_PORTC_PDR (0x80000E70)
  141. /* get port C pin data register */
  142. #define get_portc_pdr(bit) ((usb_read(GPIO_PORTC_PDR) & _BIT(bit)) != 0)
  143. /* get port C data direction register */
  144. #define get_portc_ddr(bit) ((usb_read(GPIO_PORTC_DDR) & _BIT(bit)) != 0)
  145. /* set port C data register */
  146. #define set_portc_dr(bit, val) (val ? usb_set(_BIT(bit), GPIO_PORTC_DR) : usb_clear(_BIT(bit), GPIO_PORTC_DR))
  147. /* set port C data direction register */
  148. #define set_portc_ddr(bit, val) (val ? usb_set(_BIT(bit), GPIO_PORTC_DDR) : usb_clear(_BIT(bit), GPIO_PORTC_DDR))
  149. /*
  150. * LPD7A404 GPIO's:
  151. * Port C bit 1 = USB Port 1 Power Enable
  152. * Port C bit 2 = USB Port 1 Data Carrier Detect
  153. */
  154. #define is_usb_connected() get_portc_pdr(2)
  155. #ifdef CONFIG_USB_GADGET_DEBUG_FILES
  156. static const char proc_node_name[] = "driver/udc";
  157. static int
  158. udc_proc_read(char *page, char **start, off_t off, int count,
  159. int *eof, void *_dev)
  160. {
  161. char *buf = page;
  162. struct lh7a40x_udc *dev = _dev;
  163. char *next = buf;
  164. unsigned size = count;
  165. unsigned long flags;
  166. int t;
  167. if (off != 0)
  168. return 0;
  169. local_irq_save(flags);
  170. /* basic device status */
  171. t = scnprintf(next, size,
  172. DRIVER_DESC "\n"
  173. "%s version: %s\n"
  174. "Gadget driver: %s\n"
  175. "Host: %s\n\n",
  176. driver_name, DRIVER_VERSION,
  177. dev->driver ? dev->driver->driver.name : "(none)",
  178. is_usb_connected()? "full speed" : "disconnected");
  179. size -= t;
  180. next += t;
  181. t = scnprintf(next, size,
  182. "GPIO:\n"
  183. " Port C bit 1: %d, dir %d\n"
  184. " Port C bit 2: %d, dir %d\n\n",
  185. get_portc_pdr(1), get_portc_ddr(1),
  186. get_portc_pdr(2), get_portc_ddr(2)
  187. );
  188. size -= t;
  189. next += t;
  190. t = scnprintf(next, size,
  191. "DCP pullup: %d\n\n",
  192. (usb_read(USB_PM) & PM_USB_DCP) != 0);
  193. size -= t;
  194. next += t;
  195. local_irq_restore(flags);
  196. *eof = 1;
  197. return count - size;
  198. }
  199. #define create_proc_files() create_proc_read_entry(proc_node_name, 0, NULL, udc_proc_read, dev)
  200. #define remove_proc_files() remove_proc_entry(proc_node_name, NULL)
  201. #else /* !CONFIG_USB_GADGET_DEBUG_FILES */
  202. #define create_proc_files() do {} while (0)
  203. #define remove_proc_files() do {} while (0)
  204. #endif /* CONFIG_USB_GADGET_DEBUG_FILES */
  205. /*
  206. * udc_disable - disable USB device controller
  207. */
  208. static void udc_disable(struct lh7a40x_udc *dev)
  209. {
  210. DEBUG("%s, %p\n", __func__, dev);
  211. udc_set_address(dev, 0);
  212. /* Disable interrupts */
  213. usb_write(0, USB_IN_INT_EN);
  214. usb_write(0, USB_OUT_INT_EN);
  215. usb_write(0, USB_INT_EN);
  216. /* Disable the USB */
  217. usb_write(0, USB_PM);
  218. #ifdef CONFIG_ARCH_LH7A404
  219. /* Disable USB power */
  220. set_portc_dr(1, 0);
  221. #endif
  222. /* if hardware supports it, disconnect from usb */
  223. /* make_usb_disappear(); */
  224. dev->ep0state = WAIT_FOR_SETUP;
  225. dev->gadget.speed = USB_SPEED_UNKNOWN;
  226. dev->usb_address = 0;
  227. }
  228. /*
  229. * udc_reinit - initialize software state
  230. */
  231. static void udc_reinit(struct lh7a40x_udc *dev)
  232. {
  233. u32 i;
  234. DEBUG("%s, %p\n", __func__, dev);
  235. /* device/ep0 records init */
  236. INIT_LIST_HEAD(&dev->gadget.ep_list);
  237. INIT_LIST_HEAD(&dev->gadget.ep0->ep_list);
  238. dev->ep0state = WAIT_FOR_SETUP;
  239. /* basic endpoint records init */
  240. for (i = 0; i < UDC_MAX_ENDPOINTS; i++) {
  241. struct lh7a40x_ep *ep = &dev->ep[i];
  242. if (i != 0)
  243. list_add_tail(&ep->ep.ep_list, &dev->gadget.ep_list);
  244. ep->desc = 0;
  245. ep->stopped = 0;
  246. INIT_LIST_HEAD(&ep->queue);
  247. ep->pio_irqs = 0;
  248. }
  249. /* the rest was statically initialized, and is read-only */
  250. }
  251. #define BYTES2MAXP(x) (x / 8)
  252. #define MAXP2BYTES(x) (x * 8)
  253. /* until it's enabled, this UDC should be completely invisible
  254. * to any USB host.
  255. */
  256. static void udc_enable(struct lh7a40x_udc *dev)
  257. {
  258. int ep;
  259. DEBUG("%s, %p\n", __func__, dev);
  260. dev->gadget.speed = USB_SPEED_UNKNOWN;
  261. #ifdef CONFIG_ARCH_LH7A404
  262. /* Set Port C bit 1 & 2 as output */
  263. set_portc_ddr(1, 1);
  264. set_portc_ddr(2, 1);
  265. /* Enable USB power */
  266. set_portc_dr(1, 0);
  267. #endif
  268. /*
  269. * C.f Chapter 18.1.3.1 Initializing the USB
  270. */
  271. /* Disable the USB */
  272. usb_clear(PM_USB_ENABLE, USB_PM);
  273. /* Reset APB & I/O sides of the USB */
  274. usb_set(USB_RESET_APB | USB_RESET_IO, USB_RESET);
  275. mdelay(5);
  276. usb_clear(USB_RESET_APB | USB_RESET_IO, USB_RESET);
  277. /* Set MAXP values for each */
  278. for (ep = 0; ep < UDC_MAX_ENDPOINTS; ep++) {
  279. struct lh7a40x_ep *ep_reg = &dev->ep[ep];
  280. u32 csr;
  281. usb_set_index(ep);
  282. switch (ep_reg->ep_type) {
  283. case ep_bulk_in:
  284. case ep_interrupt:
  285. usb_clear(USB_IN_CSR2_USB_DMA_EN | USB_IN_CSR2_AUTO_SET,
  286. ep_reg->csr2);
  287. /* Fall through */
  288. case ep_control:
  289. usb_write(BYTES2MAXP(ep_maxpacket(ep_reg)),
  290. USB_IN_MAXP);
  291. break;
  292. case ep_bulk_out:
  293. usb_clear(USB_OUT_CSR2_USB_DMA_EN |
  294. USB_OUT_CSR2_AUTO_CLR, ep_reg->csr2);
  295. usb_write(BYTES2MAXP(ep_maxpacket(ep_reg)),
  296. USB_OUT_MAXP);
  297. break;
  298. }
  299. /* Read & Write CSR1, just in case */
  300. csr = usb_read(ep_reg->csr1);
  301. usb_write(csr, ep_reg->csr1);
  302. flush(ep_reg);
  303. }
  304. /* Disable interrupts */
  305. usb_write(0, USB_IN_INT_EN);
  306. usb_write(0, USB_OUT_INT_EN);
  307. usb_write(0, USB_INT_EN);
  308. /* Enable interrupts */
  309. usb_set(USB_IN_INT_EP0, USB_IN_INT_EN);
  310. usb_set(USB_INT_RESET_INT | USB_INT_RESUME_INT, USB_INT_EN);
  311. /* Dont enable rest of the interrupts */
  312. /* usb_set(USB_IN_INT_EP3 | USB_IN_INT_EP1 | USB_IN_INT_EP0, USB_IN_INT_EN);
  313. usb_set(USB_OUT_INT_EP2, USB_OUT_INT_EN); */
  314. /* Enable SUSPEND */
  315. usb_set(PM_ENABLE_SUSPEND, USB_PM);
  316. /* Enable the USB */
  317. usb_set(PM_USB_ENABLE, USB_PM);
  318. #ifdef CONFIG_ARCH_LH7A404
  319. /* NOTE: DOES NOT WORK! */
  320. /* Let host detect UDC:
  321. * Software must write a 0 to the PMR:DCP_CTRL bit to turn this
  322. * transistor on and pull the USBDP pin HIGH.
  323. */
  324. /* usb_clear(PM_USB_DCP, USB_PM);
  325. usb_set(PM_USB_DCP, USB_PM); */
  326. #endif
  327. }
  328. /*
  329. Register entry point for the peripheral controller driver.
  330. */
  331. int usb_gadget_register_driver(struct usb_gadget_driver *driver)
  332. {
  333. struct lh7a40x_udc *dev = the_controller;
  334. int retval;
  335. DEBUG("%s: %s\n", __func__, driver->driver.name);
  336. if (!driver
  337. || driver->speed != USB_SPEED_FULL
  338. || !driver->bind
  339. || !driver->disconnect
  340. || !driver->setup)
  341. return -EINVAL;
  342. if (!dev)
  343. return -ENODEV;
  344. if (dev->driver)
  345. return -EBUSY;
  346. /* first hook up the driver ... */
  347. dev->driver = driver;
  348. dev->gadget.dev.driver = &driver->driver;
  349. device_add(&dev->gadget.dev);
  350. retval = driver->bind(&dev->gadget);
  351. if (retval) {
  352. printk(KERN_WARNING "%s: bind to driver %s --> error %d\n",
  353. dev->gadget.name, driver->driver.name, retval);
  354. device_del(&dev->gadget.dev);
  355. dev->driver = 0;
  356. dev->gadget.dev.driver = 0;
  357. return retval;
  358. }
  359. /* ... then enable host detection and ep0; and we're ready
  360. * for set_configuration as well as eventual disconnect.
  361. * NOTE: this shouldn't power up until later.
  362. */
  363. printk(KERN_WARNING "%s: registered gadget driver '%s'\n",
  364. dev->gadget.name, driver->driver.name);
  365. udc_enable(dev);
  366. return 0;
  367. }
  368. EXPORT_SYMBOL(usb_gadget_register_driver);
  369. /*
  370. Unregister entry point for the peripheral controller driver.
  371. */
  372. int usb_gadget_unregister_driver(struct usb_gadget_driver *driver)
  373. {
  374. struct lh7a40x_udc *dev = the_controller;
  375. unsigned long flags;
  376. if (!dev)
  377. return -ENODEV;
  378. if (!driver || driver != dev->driver || !driver->unbind)
  379. return -EINVAL;
  380. spin_lock_irqsave(&dev->lock, flags);
  381. dev->driver = 0;
  382. stop_activity(dev, driver);
  383. spin_unlock_irqrestore(&dev->lock, flags);
  384. driver->unbind(&dev->gadget);
  385. dev->gadget.dev.driver = NULL;
  386. device_del(&dev->gadget.dev);
  387. udc_disable(dev);
  388. DEBUG("unregistered gadget driver '%s'\n", driver->driver.name);
  389. return 0;
  390. }
  391. EXPORT_SYMBOL(usb_gadget_unregister_driver);
  392. /*-------------------------------------------------------------------------*/
  393. /** Write request to FIFO (max write == maxp size)
  394. * Return: 0 = still running, 1 = completed, negative = errno
  395. * NOTE: INDEX register must be set for EP
  396. */
  397. static int write_fifo(struct lh7a40x_ep *ep, struct lh7a40x_request *req)
  398. {
  399. u32 max;
  400. u32 csr;
  401. max = le16_to_cpu(ep->desc->wMaxPacketSize);
  402. csr = usb_read(ep->csr1);
  403. DEBUG("CSR: %x %d\n", csr, csr & USB_IN_CSR1_FIFO_NOT_EMPTY);
  404. if (!(csr & USB_IN_CSR1_FIFO_NOT_EMPTY)) {
  405. unsigned count;
  406. int is_last, is_short;
  407. count = write_packet(ep, req, max);
  408. usb_set(USB_IN_CSR1_IN_PKT_RDY, ep->csr1);
  409. /* last packet is usually short (or a zlp) */
  410. if (unlikely(count != max))
  411. is_last = is_short = 1;
  412. else {
  413. if (likely(req->req.length != req->req.actual)
  414. || req->req.zero)
  415. is_last = 0;
  416. else
  417. is_last = 1;
  418. /* interrupt/iso maxpacket may not fill the fifo */
  419. is_short = unlikely(max < ep_maxpacket(ep));
  420. }
  421. DEBUG("%s: wrote %s %d bytes%s%s %d left %p\n", __func__,
  422. ep->ep.name, count,
  423. is_last ? "/L" : "", is_short ? "/S" : "",
  424. req->req.length - req->req.actual, req);
  425. /* requests complete when all IN data is in the FIFO */
  426. if (is_last) {
  427. done(ep, req, 0);
  428. if (list_empty(&ep->queue)) {
  429. pio_irq_disable(ep_index(ep));
  430. }
  431. return 1;
  432. }
  433. } else {
  434. DEBUG("Hmm.. %d ep FIFO is not empty!\n", ep_index(ep));
  435. }
  436. return 0;
  437. }
  438. /** Read to request from FIFO (max read == bytes in fifo)
  439. * Return: 0 = still running, 1 = completed, negative = errno
  440. * NOTE: INDEX register must be set for EP
  441. */
  442. static int read_fifo(struct lh7a40x_ep *ep, struct lh7a40x_request *req)
  443. {
  444. u32 csr;
  445. u8 *buf;
  446. unsigned bufferspace, count, is_short;
  447. volatile u32 *fifo = (volatile u32 *)ep->fifo;
  448. /* make sure there's a packet in the FIFO. */
  449. csr = usb_read(ep->csr1);
  450. if (!(csr & USB_OUT_CSR1_OUT_PKT_RDY)) {
  451. DEBUG("%s: Packet NOT ready!\n", __func__);
  452. return -EINVAL;
  453. }
  454. buf = req->req.buf + req->req.actual;
  455. prefetchw(buf);
  456. bufferspace = req->req.length - req->req.actual;
  457. /* read all bytes from this packet */
  458. count = usb_read(USB_OUT_FIFO_WC1);
  459. req->req.actual += min(count, bufferspace);
  460. is_short = (count < ep->ep.maxpacket);
  461. DEBUG("read %s %02x, %d bytes%s req %p %d/%d\n",
  462. ep->ep.name, csr, count,
  463. is_short ? "/S" : "", req, req->req.actual, req->req.length);
  464. while (likely(count-- != 0)) {
  465. u8 byte = (u8) (*fifo & 0xff);
  466. if (unlikely(bufferspace == 0)) {
  467. /* this happens when the driver's buffer
  468. * is smaller than what the host sent.
  469. * discard the extra data.
  470. */
  471. if (req->req.status != -EOVERFLOW)
  472. printk(KERN_WARNING "%s overflow %d\n",
  473. ep->ep.name, count);
  474. req->req.status = -EOVERFLOW;
  475. } else {
  476. *buf++ = byte;
  477. bufferspace--;
  478. }
  479. }
  480. usb_clear(USB_OUT_CSR1_OUT_PKT_RDY, ep->csr1);
  481. /* completion */
  482. if (is_short || req->req.actual == req->req.length) {
  483. done(ep, req, 0);
  484. usb_set(USB_OUT_CSR1_FIFO_FLUSH, ep->csr1);
  485. if (list_empty(&ep->queue))
  486. pio_irq_disable(ep_index(ep));
  487. return 1;
  488. }
  489. /* finished that packet. the next one may be waiting... */
  490. return 0;
  491. }
  492. /*
  493. * done - retire a request; caller blocked irqs
  494. * INDEX register is preserved to keep same
  495. */
  496. static void done(struct lh7a40x_ep *ep, struct lh7a40x_request *req, int status)
  497. {
  498. unsigned int stopped = ep->stopped;
  499. u32 index;
  500. DEBUG("%s, %p\n", __func__, ep);
  501. list_del_init(&req->queue);
  502. if (likely(req->req.status == -EINPROGRESS))
  503. req->req.status = status;
  504. else
  505. status = req->req.status;
  506. if (status && status != -ESHUTDOWN)
  507. DEBUG("complete %s req %p stat %d len %u/%u\n",
  508. ep->ep.name, &req->req, status,
  509. req->req.actual, req->req.length);
  510. /* don't modify queue heads during completion callback */
  511. ep->stopped = 1;
  512. /* Read current index (completion may modify it) */
  513. index = usb_read(USB_INDEX);
  514. spin_unlock(&ep->dev->lock);
  515. req->req.complete(&ep->ep, &req->req);
  516. spin_lock(&ep->dev->lock);
  517. /* Restore index */
  518. usb_set_index(index);
  519. ep->stopped = stopped;
  520. }
  521. /** Enable EP interrupt */
  522. static void pio_irq_enable(int ep)
  523. {
  524. DEBUG("%s: %d\n", __func__, ep);
  525. switch (ep) {
  526. case 1:
  527. usb_set(USB_IN_INT_EP1, USB_IN_INT_EN);
  528. break;
  529. case 2:
  530. usb_set(USB_OUT_INT_EP2, USB_OUT_INT_EN);
  531. break;
  532. case 3:
  533. usb_set(USB_IN_INT_EP3, USB_IN_INT_EN);
  534. break;
  535. default:
  536. DEBUG("Unknown endpoint: %d\n", ep);
  537. break;
  538. }
  539. }
  540. /** Disable EP interrupt */
  541. static void pio_irq_disable(int ep)
  542. {
  543. DEBUG("%s: %d\n", __func__, ep);
  544. switch (ep) {
  545. case 1:
  546. usb_clear(USB_IN_INT_EP1, USB_IN_INT_EN);
  547. break;
  548. case 2:
  549. usb_clear(USB_OUT_INT_EP2, USB_OUT_INT_EN);
  550. break;
  551. case 3:
  552. usb_clear(USB_IN_INT_EP3, USB_IN_INT_EN);
  553. break;
  554. default:
  555. DEBUG("Unknown endpoint: %d\n", ep);
  556. break;
  557. }
  558. }
  559. /*
  560. * nuke - dequeue ALL requests
  561. */
  562. void nuke(struct lh7a40x_ep *ep, int status)
  563. {
  564. struct lh7a40x_request *req;
  565. DEBUG("%s, %p\n", __func__, ep);
  566. /* Flush FIFO */
  567. flush(ep);
  568. /* called with irqs blocked */
  569. while (!list_empty(&ep->queue)) {
  570. req = list_entry(ep->queue.next, struct lh7a40x_request, queue);
  571. done(ep, req, status);
  572. }
  573. /* Disable IRQ if EP is enabled (has descriptor) */
  574. if (ep->desc)
  575. pio_irq_disable(ep_index(ep));
  576. }
  577. /*
  578. void nuke_all(struct lh7a40x_udc *dev)
  579. {
  580. int n;
  581. for(n=0; n<UDC_MAX_ENDPOINTS; n++) {
  582. struct lh7a40x_ep *ep = &dev->ep[n];
  583. usb_set_index(n);
  584. nuke(ep, 0);
  585. }
  586. }*/
  587. /*
  588. static void flush_all(struct lh7a40x_udc *dev)
  589. {
  590. int n;
  591. for (n = 0; n < UDC_MAX_ENDPOINTS; n++)
  592. {
  593. struct lh7a40x_ep *ep = &dev->ep[n];
  594. flush(ep);
  595. }
  596. }
  597. */
  598. /** Flush EP
  599. * NOTE: INDEX register must be set before this call
  600. */
  601. static void flush(struct lh7a40x_ep *ep)
  602. {
  603. DEBUG("%s, %p\n", __func__, ep);
  604. switch (ep->ep_type) {
  605. case ep_control:
  606. /* check, by implication c.f. 15.1.2.11 */
  607. break;
  608. case ep_bulk_in:
  609. case ep_interrupt:
  610. /* if(csr & USB_IN_CSR1_IN_PKT_RDY) */
  611. usb_set(USB_IN_CSR1_FIFO_FLUSH, ep->csr1);
  612. break;
  613. case ep_bulk_out:
  614. /* if(csr & USB_OUT_CSR1_OUT_PKT_RDY) */
  615. usb_set(USB_OUT_CSR1_FIFO_FLUSH, ep->csr1);
  616. break;
  617. }
  618. }
  619. /**
  620. * lh7a40x_in_epn - handle IN interrupt
  621. */
  622. static void lh7a40x_in_epn(struct lh7a40x_udc *dev, u32 ep_idx, u32 intr)
  623. {
  624. u32 csr;
  625. struct lh7a40x_ep *ep = &dev->ep[ep_idx];
  626. struct lh7a40x_request *req;
  627. usb_set_index(ep_idx);
  628. csr = usb_read(ep->csr1);
  629. DEBUG("%s: %d, csr %x\n", __func__, ep_idx, csr);
  630. if (csr & USB_IN_CSR1_SENT_STALL) {
  631. DEBUG("USB_IN_CSR1_SENT_STALL\n");
  632. usb_set(USB_IN_CSR1_SENT_STALL /*|USB_IN_CSR1_SEND_STALL */ ,
  633. ep->csr1);
  634. return;
  635. }
  636. if (!ep->desc) {
  637. DEBUG("%s: NO EP DESC\n", __func__);
  638. return;
  639. }
  640. if (list_empty(&ep->queue))
  641. req = 0;
  642. else
  643. req = list_entry(ep->queue.next, struct lh7a40x_request, queue);
  644. DEBUG("req: %p\n", req);
  645. if (!req)
  646. return;
  647. write_fifo(ep, req);
  648. }
  649. /* ********************************************************************************************* */
  650. /* Bulk OUT (recv)
  651. */
  652. static void lh7a40x_out_epn(struct lh7a40x_udc *dev, u32 ep_idx, u32 intr)
  653. {
  654. struct lh7a40x_ep *ep = &dev->ep[ep_idx];
  655. struct lh7a40x_request *req;
  656. DEBUG("%s: %d\n", __func__, ep_idx);
  657. usb_set_index(ep_idx);
  658. if (ep->desc) {
  659. u32 csr;
  660. csr = usb_read(ep->csr1);
  661. while ((csr =
  662. usb_read(ep->
  663. csr1)) & (USB_OUT_CSR1_OUT_PKT_RDY |
  664. USB_OUT_CSR1_SENT_STALL)) {
  665. DEBUG("%s: %x\n", __func__, csr);
  666. if (csr & USB_OUT_CSR1_SENT_STALL) {
  667. DEBUG("%s: stall sent, flush fifo\n",
  668. __func__);
  669. /* usb_set(USB_OUT_CSR1_FIFO_FLUSH, ep->csr1); */
  670. flush(ep);
  671. } else if (csr & USB_OUT_CSR1_OUT_PKT_RDY) {
  672. if (list_empty(&ep->queue))
  673. req = 0;
  674. else
  675. req =
  676. list_entry(ep->queue.next,
  677. struct lh7a40x_request,
  678. queue);
  679. if (!req) {
  680. printk(KERN_WARNING
  681. "%s: NULL REQ %d\n",
  682. __func__, ep_idx);
  683. flush(ep);
  684. break;
  685. } else {
  686. read_fifo(ep, req);
  687. }
  688. }
  689. }
  690. } else {
  691. /* Throw packet away.. */
  692. printk(KERN_WARNING "%s: No descriptor?!?\n", __func__);
  693. flush(ep);
  694. }
  695. }
  696. static void stop_activity(struct lh7a40x_udc *dev,
  697. struct usb_gadget_driver *driver)
  698. {
  699. int i;
  700. /* don't disconnect drivers more than once */
  701. if (dev->gadget.speed == USB_SPEED_UNKNOWN)
  702. driver = 0;
  703. dev->gadget.speed = USB_SPEED_UNKNOWN;
  704. /* prevent new request submissions, kill any outstanding requests */
  705. for (i = 0; i < UDC_MAX_ENDPOINTS; i++) {
  706. struct lh7a40x_ep *ep = &dev->ep[i];
  707. ep->stopped = 1;
  708. usb_set_index(i);
  709. nuke(ep, -ESHUTDOWN);
  710. }
  711. /* report disconnect; the driver is already quiesced */
  712. if (driver) {
  713. spin_unlock(&dev->lock);
  714. driver->disconnect(&dev->gadget);
  715. spin_lock(&dev->lock);
  716. }
  717. /* re-init driver-visible data structures */
  718. udc_reinit(dev);
  719. }
  720. /** Handle USB RESET interrupt
  721. */
  722. static void lh7a40x_reset_intr(struct lh7a40x_udc *dev)
  723. {
  724. #if 0 /* def CONFIG_ARCH_LH7A404 */
  725. /* Does not work always... */
  726. DEBUG("%s: %d\n", __func__, dev->usb_address);
  727. if (!dev->usb_address) {
  728. /*usb_set(USB_RESET_IO, USB_RESET);
  729. mdelay(5);
  730. usb_clear(USB_RESET_IO, USB_RESET); */
  731. return;
  732. }
  733. /* Put the USB controller into reset. */
  734. usb_set(USB_RESET_IO, USB_RESET);
  735. /* Set Device ID to 0 */
  736. udc_set_address(dev, 0);
  737. /* Let PLL2 settle down */
  738. mdelay(5);
  739. /* Release the USB controller from reset */
  740. usb_clear(USB_RESET_IO, USB_RESET);
  741. /* Re-enable UDC */
  742. udc_enable(dev);
  743. #endif
  744. dev->gadget.speed = USB_SPEED_FULL;
  745. }
  746. /*
  747. * lh7a40x usb client interrupt handler.
  748. */
  749. static irqreturn_t lh7a40x_udc_irq(int irq, void *_dev)
  750. {
  751. struct lh7a40x_udc *dev = _dev;
  752. DEBUG("\n\n");
  753. spin_lock(&dev->lock);
  754. for (;;) {
  755. u32 intr_in = usb_read(USB_IN_INT);
  756. u32 intr_out = usb_read(USB_OUT_INT);
  757. u32 intr_int = usb_read(USB_INT);
  758. /* Test also against enable bits.. (lh7a40x errata).. Sigh.. */
  759. u32 in_en = usb_read(USB_IN_INT_EN);
  760. u32 out_en = usb_read(USB_OUT_INT_EN);
  761. if (!intr_out && !intr_in && !intr_int)
  762. break;
  763. DEBUG("%s (on state %s)\n", __func__,
  764. state_names[dev->ep0state]);
  765. DEBUG("intr_out = %x\n", intr_out);
  766. DEBUG("intr_in = %x\n", intr_in);
  767. DEBUG("intr_int = %x\n", intr_int);
  768. if (intr_in) {
  769. usb_write(intr_in, USB_IN_INT);
  770. if ((intr_in & USB_IN_INT_EP1)
  771. && (in_en & USB_IN_INT_EP1)) {
  772. DEBUG("USB_IN_INT_EP1\n");
  773. lh7a40x_in_epn(dev, 1, intr_in);
  774. }
  775. if ((intr_in & USB_IN_INT_EP3)
  776. && (in_en & USB_IN_INT_EP3)) {
  777. DEBUG("USB_IN_INT_EP3\n");
  778. lh7a40x_in_epn(dev, 3, intr_in);
  779. }
  780. if (intr_in & USB_IN_INT_EP0) {
  781. DEBUG("USB_IN_INT_EP0 (control)\n");
  782. lh7a40x_handle_ep0(dev, intr_in);
  783. }
  784. }
  785. if (intr_out) {
  786. usb_write(intr_out, USB_OUT_INT);
  787. if ((intr_out & USB_OUT_INT_EP2)
  788. && (out_en & USB_OUT_INT_EP2)) {
  789. DEBUG("USB_OUT_INT_EP2\n");
  790. lh7a40x_out_epn(dev, 2, intr_out);
  791. }
  792. }
  793. if (intr_int) {
  794. usb_write(intr_int, USB_INT);
  795. if (intr_int & USB_INT_RESET_INT) {
  796. lh7a40x_reset_intr(dev);
  797. }
  798. if (intr_int & USB_INT_RESUME_INT) {
  799. DEBUG("USB resume\n");
  800. if (dev->gadget.speed != USB_SPEED_UNKNOWN
  801. && dev->driver
  802. && dev->driver->resume
  803. && is_usb_connected()) {
  804. dev->driver->resume(&dev->gadget);
  805. }
  806. }
  807. if (intr_int & USB_INT_SUSPEND_INT) {
  808. DEBUG("USB suspend%s\n",
  809. is_usb_connected()? "" : "+disconnect");
  810. if (!is_usb_connected()) {
  811. stop_activity(dev, dev->driver);
  812. } else if (dev->gadget.speed !=
  813. USB_SPEED_UNKNOWN && dev->driver
  814. && dev->driver->suspend) {
  815. dev->driver->suspend(&dev->gadget);
  816. }
  817. }
  818. }
  819. }
  820. spin_unlock(&dev->lock);
  821. return IRQ_HANDLED;
  822. }
  823. static int lh7a40x_ep_enable(struct usb_ep *_ep,
  824. const struct usb_endpoint_descriptor *desc)
  825. {
  826. struct lh7a40x_ep *ep;
  827. struct lh7a40x_udc *dev;
  828. unsigned long flags;
  829. DEBUG("%s, %p\n", __func__, _ep);
  830. ep = container_of(_ep, struct lh7a40x_ep, ep);
  831. if (!_ep || !desc || ep->desc || _ep->name == ep0name
  832. || desc->bDescriptorType != USB_DT_ENDPOINT
  833. || ep->bEndpointAddress != desc->bEndpointAddress
  834. || ep_maxpacket(ep) < le16_to_cpu(desc->wMaxPacketSize)) {
  835. DEBUG("%s, bad ep or descriptor\n", __func__);
  836. return -EINVAL;
  837. }
  838. /* xfer types must match, except that interrupt ~= bulk */
  839. if (ep->bmAttributes != desc->bmAttributes
  840. && ep->bmAttributes != USB_ENDPOINT_XFER_BULK
  841. && desc->bmAttributes != USB_ENDPOINT_XFER_INT) {
  842. DEBUG("%s, %s type mismatch\n", __func__, _ep->name);
  843. return -EINVAL;
  844. }
  845. /* hardware _could_ do smaller, but driver doesn't */
  846. if ((desc->bmAttributes == USB_ENDPOINT_XFER_BULK
  847. && le16_to_cpu(desc->wMaxPacketSize) != ep_maxpacket(ep))
  848. || !desc->wMaxPacketSize) {
  849. DEBUG("%s, bad %s maxpacket\n", __func__, _ep->name);
  850. return -ERANGE;
  851. }
  852. dev = ep->dev;
  853. if (!dev->driver || dev->gadget.speed == USB_SPEED_UNKNOWN) {
  854. DEBUG("%s, bogus device state\n", __func__);
  855. return -ESHUTDOWN;
  856. }
  857. spin_lock_irqsave(&ep->dev->lock, flags);
  858. ep->stopped = 0;
  859. ep->desc = desc;
  860. ep->pio_irqs = 0;
  861. ep->ep.maxpacket = le16_to_cpu(desc->wMaxPacketSize);
  862. spin_unlock_irqrestore(&ep->dev->lock, flags);
  863. /* Reset halt state (does flush) */
  864. lh7a40x_set_halt(_ep, 0);
  865. DEBUG("%s: enabled %s\n", __func__, _ep->name);
  866. return 0;
  867. }
  868. /** Disable EP
  869. * NOTE: Sets INDEX register
  870. */
  871. static int lh7a40x_ep_disable(struct usb_ep *_ep)
  872. {
  873. struct lh7a40x_ep *ep;
  874. unsigned long flags;
  875. DEBUG("%s, %p\n", __func__, _ep);
  876. ep = container_of(_ep, struct lh7a40x_ep, ep);
  877. if (!_ep || !ep->desc) {
  878. DEBUG("%s, %s not enabled\n", __func__,
  879. _ep ? ep->ep.name : NULL);
  880. return -EINVAL;
  881. }
  882. spin_lock_irqsave(&ep->dev->lock, flags);
  883. usb_set_index(ep_index(ep));
  884. /* Nuke all pending requests (does flush) */
  885. nuke(ep, -ESHUTDOWN);
  886. /* Disable ep IRQ */
  887. pio_irq_disable(ep_index(ep));
  888. ep->desc = 0;
  889. ep->stopped = 1;
  890. spin_unlock_irqrestore(&ep->dev->lock, flags);
  891. DEBUG("%s: disabled %s\n", __func__, _ep->name);
  892. return 0;
  893. }
  894. static struct usb_request *lh7a40x_alloc_request(struct usb_ep *ep,
  895. gfp_t gfp_flags)
  896. {
  897. struct lh7a40x_request *req;
  898. DEBUG("%s, %p\n", __func__, ep);
  899. req = kzalloc(sizeof(*req), gfp_flags);
  900. if (!req)
  901. return 0;
  902. INIT_LIST_HEAD(&req->queue);
  903. return &req->req;
  904. }
  905. static void lh7a40x_free_request(struct usb_ep *ep, struct usb_request *_req)
  906. {
  907. struct lh7a40x_request *req;
  908. DEBUG("%s, %p\n", __func__, ep);
  909. req = container_of(_req, struct lh7a40x_request, req);
  910. WARN_ON(!list_empty(&req->queue));
  911. kfree(req);
  912. }
  913. /** Queue one request
  914. * Kickstart transfer if needed
  915. * NOTE: Sets INDEX register
  916. */
  917. static int lh7a40x_queue(struct usb_ep *_ep, struct usb_request *_req,
  918. gfp_t gfp_flags)
  919. {
  920. struct lh7a40x_request *req;
  921. struct lh7a40x_ep *ep;
  922. struct lh7a40x_udc *dev;
  923. unsigned long flags;
  924. DEBUG("\n\n\n%s, %p\n", __func__, _ep);
  925. req = container_of(_req, struct lh7a40x_request, req);
  926. if (unlikely
  927. (!_req || !_req->complete || !_req->buf
  928. || !list_empty(&req->queue))) {
  929. DEBUG("%s, bad params\n", __func__);
  930. return -EINVAL;
  931. }
  932. ep = container_of(_ep, struct lh7a40x_ep, ep);
  933. if (unlikely(!_ep || (!ep->desc && ep->ep.name != ep0name))) {
  934. DEBUG("%s, bad ep\n", __func__);
  935. return -EINVAL;
  936. }
  937. dev = ep->dev;
  938. if (unlikely(!dev->driver || dev->gadget.speed == USB_SPEED_UNKNOWN)) {
  939. DEBUG("%s, bogus device state %p\n", __func__, dev->driver);
  940. return -ESHUTDOWN;
  941. }
  942. DEBUG("%s queue req %p, len %d buf %p\n", _ep->name, _req, _req->length,
  943. _req->buf);
  944. spin_lock_irqsave(&dev->lock, flags);
  945. _req->status = -EINPROGRESS;
  946. _req->actual = 0;
  947. /* kickstart this i/o queue? */
  948. DEBUG("Add to %d Q %d %d\n", ep_index(ep), list_empty(&ep->queue),
  949. ep->stopped);
  950. if (list_empty(&ep->queue) && likely(!ep->stopped)) {
  951. u32 csr;
  952. if (unlikely(ep_index(ep) == 0)) {
  953. /* EP0 */
  954. list_add_tail(&req->queue, &ep->queue);
  955. lh7a40x_ep0_kick(dev, ep);
  956. req = 0;
  957. } else if (ep_is_in(ep)) {
  958. /* EP1 & EP3 */
  959. usb_set_index(ep_index(ep));
  960. csr = usb_read(ep->csr1);
  961. pio_irq_enable(ep_index(ep));
  962. if ((csr & USB_IN_CSR1_FIFO_NOT_EMPTY) == 0) {
  963. if (write_fifo(ep, req) == 1)
  964. req = 0;
  965. }
  966. } else {
  967. /* EP2 */
  968. usb_set_index(ep_index(ep));
  969. csr = usb_read(ep->csr1);
  970. pio_irq_enable(ep_index(ep));
  971. if (!(csr & USB_OUT_CSR1_FIFO_FULL)) {
  972. if (read_fifo(ep, req) == 1)
  973. req = 0;
  974. }
  975. }
  976. }
  977. /* pio or dma irq handler advances the queue. */
  978. if (likely(req != 0))
  979. list_add_tail(&req->queue, &ep->queue);
  980. spin_unlock_irqrestore(&dev->lock, flags);
  981. return 0;
  982. }
  983. /* dequeue JUST ONE request */
  984. static int lh7a40x_dequeue(struct usb_ep *_ep, struct usb_request *_req)
  985. {
  986. struct lh7a40x_ep *ep;
  987. struct lh7a40x_request *req;
  988. unsigned long flags;
  989. DEBUG("%s, %p\n", __func__, _ep);
  990. ep = container_of(_ep, struct lh7a40x_ep, ep);
  991. if (!_ep || ep->ep.name == ep0name)
  992. return -EINVAL;
  993. spin_lock_irqsave(&ep->dev->lock, flags);
  994. /* make sure it's actually queued on this endpoint */
  995. list_for_each_entry(req, &ep->queue, queue) {
  996. if (&req->req == _req)
  997. break;
  998. }
  999. if (&req->req != _req) {
  1000. spin_unlock_irqrestore(&ep->dev->lock, flags);
  1001. return -EINVAL;
  1002. }
  1003. done(ep, req, -ECONNRESET);
  1004. spin_unlock_irqrestore(&ep->dev->lock, flags);
  1005. return 0;
  1006. }
  1007. /** Halt specific EP
  1008. * Return 0 if success
  1009. * NOTE: Sets INDEX register to EP !
  1010. */
  1011. static int lh7a40x_set_halt(struct usb_ep *_ep, int value)
  1012. {
  1013. struct lh7a40x_ep *ep;
  1014. unsigned long flags;
  1015. ep = container_of(_ep, struct lh7a40x_ep, ep);
  1016. if (unlikely(!_ep || (!ep->desc && ep->ep.name != ep0name))) {
  1017. DEBUG("%s, bad ep\n", __func__);
  1018. return -EINVAL;
  1019. }
  1020. usb_set_index(ep_index(ep));
  1021. DEBUG("%s, ep %d, val %d\n", __func__, ep_index(ep), value);
  1022. spin_lock_irqsave(&ep->dev->lock, flags);
  1023. if (ep_index(ep) == 0) {
  1024. /* EP0 */
  1025. usb_set(EP0_SEND_STALL, ep->csr1);
  1026. } else if (ep_is_in(ep)) {
  1027. u32 csr = usb_read(ep->csr1);
  1028. if (value && ((csr & USB_IN_CSR1_FIFO_NOT_EMPTY)
  1029. || !list_empty(&ep->queue))) {
  1030. /*
  1031. * Attempts to halt IN endpoints will fail (returning -EAGAIN)
  1032. * if any transfer requests are still queued, or if the controller
  1033. * FIFO still holds bytes that the host hasn't collected.
  1034. */
  1035. spin_unlock_irqrestore(&ep->dev->lock, flags);
  1036. DEBUG
  1037. ("Attempt to halt IN endpoint failed (returning -EAGAIN) %d %d\n",
  1038. (csr & USB_IN_CSR1_FIFO_NOT_EMPTY),
  1039. !list_empty(&ep->queue));
  1040. return -EAGAIN;
  1041. }
  1042. flush(ep);
  1043. if (value)
  1044. usb_set(USB_IN_CSR1_SEND_STALL, ep->csr1);
  1045. else {
  1046. usb_clear(USB_IN_CSR1_SEND_STALL, ep->csr1);
  1047. usb_set(USB_IN_CSR1_CLR_DATA_TOGGLE, ep->csr1);
  1048. }
  1049. } else {
  1050. flush(ep);
  1051. if (value)
  1052. usb_set(USB_OUT_CSR1_SEND_STALL, ep->csr1);
  1053. else {
  1054. usb_clear(USB_OUT_CSR1_SEND_STALL, ep->csr1);
  1055. usb_set(USB_OUT_CSR1_CLR_DATA_REG, ep->csr1);
  1056. }
  1057. }
  1058. if (value) {
  1059. ep->stopped = 1;
  1060. } else {
  1061. ep->stopped = 0;
  1062. }
  1063. spin_unlock_irqrestore(&ep->dev->lock, flags);
  1064. DEBUG("%s %s halted\n", _ep->name, value == 0 ? "NOT" : "IS");
  1065. return 0;
  1066. }
  1067. /** Return bytes in EP FIFO
  1068. * NOTE: Sets INDEX register to EP
  1069. */
  1070. static int lh7a40x_fifo_status(struct usb_ep *_ep)
  1071. {
  1072. u32 csr;
  1073. int count = 0;
  1074. struct lh7a40x_ep *ep;
  1075. ep = container_of(_ep, struct lh7a40x_ep, ep);
  1076. if (!_ep) {
  1077. DEBUG("%s, bad ep\n", __func__);
  1078. return -ENODEV;
  1079. }
  1080. DEBUG("%s, %d\n", __func__, ep_index(ep));
  1081. /* LPD can't report unclaimed bytes from IN fifos */
  1082. if (ep_is_in(ep))
  1083. return -EOPNOTSUPP;
  1084. usb_set_index(ep_index(ep));
  1085. csr = usb_read(ep->csr1);
  1086. if (ep->dev->gadget.speed != USB_SPEED_UNKNOWN ||
  1087. csr & USB_OUT_CSR1_OUT_PKT_RDY) {
  1088. count = usb_read(USB_OUT_FIFO_WC1);
  1089. }
  1090. return count;
  1091. }
  1092. /** Flush EP FIFO
  1093. * NOTE: Sets INDEX register to EP
  1094. */
  1095. static void lh7a40x_fifo_flush(struct usb_ep *_ep)
  1096. {
  1097. struct lh7a40x_ep *ep;
  1098. ep = container_of(_ep, struct lh7a40x_ep, ep);
  1099. if (unlikely(!_ep || (!ep->desc && ep->ep.name != ep0name))) {
  1100. DEBUG("%s, bad ep\n", __func__);
  1101. return;
  1102. }
  1103. usb_set_index(ep_index(ep));
  1104. flush(ep);
  1105. }
  1106. /****************************************************************/
  1107. /* End Point 0 related functions */
  1108. /****************************************************************/
  1109. /* return: 0 = still running, 1 = completed, negative = errno */
  1110. static int write_fifo_ep0(struct lh7a40x_ep *ep, struct lh7a40x_request *req)
  1111. {
  1112. u32 max;
  1113. unsigned count;
  1114. int is_last;
  1115. max = ep_maxpacket(ep);
  1116. DEBUG_EP0("%s\n", __func__);
  1117. count = write_packet(ep, req, max);
  1118. /* last packet is usually short (or a zlp) */
  1119. if (unlikely(count != max))
  1120. is_last = 1;
  1121. else {
  1122. if (likely(req->req.length != req->req.actual) || req->req.zero)
  1123. is_last = 0;
  1124. else
  1125. is_last = 1;
  1126. }
  1127. DEBUG_EP0("%s: wrote %s %d bytes%s %d left %p\n", __func__,
  1128. ep->ep.name, count,
  1129. is_last ? "/L" : "", req->req.length - req->req.actual, req);
  1130. /* requests complete when all IN data is in the FIFO */
  1131. if (is_last) {
  1132. done(ep, req, 0);
  1133. return 1;
  1134. }
  1135. return 0;
  1136. }
  1137. static __inline__ int lh7a40x_fifo_read(struct lh7a40x_ep *ep,
  1138. unsigned char *cp, int max)
  1139. {
  1140. int bytes;
  1141. int count = usb_read(USB_OUT_FIFO_WC1);
  1142. volatile u32 *fifo = (volatile u32 *)ep->fifo;
  1143. if (count > max)
  1144. count = max;
  1145. bytes = count;
  1146. while (count--)
  1147. *cp++ = *fifo & 0xFF;
  1148. return bytes;
  1149. }
  1150. static __inline__ void lh7a40x_fifo_write(struct lh7a40x_ep *ep,
  1151. unsigned char *cp, int count)
  1152. {
  1153. volatile u32 *fifo = (volatile u32 *)ep->fifo;
  1154. DEBUG_EP0("fifo_write: %d %d\n", ep_index(ep), count);
  1155. while (count--)
  1156. *fifo = *cp++;
  1157. }
  1158. static int read_fifo_ep0(struct lh7a40x_ep *ep, struct lh7a40x_request *req)
  1159. {
  1160. u32 csr;
  1161. u8 *buf;
  1162. unsigned bufferspace, count, is_short;
  1163. volatile u32 *fifo = (volatile u32 *)ep->fifo;
  1164. DEBUG_EP0("%s\n", __func__);
  1165. csr = usb_read(USB_EP0_CSR);
  1166. if (!(csr & USB_OUT_CSR1_OUT_PKT_RDY))
  1167. return 0;
  1168. buf = req->req.buf + req->req.actual;
  1169. prefetchw(buf);
  1170. bufferspace = req->req.length - req->req.actual;
  1171. /* read all bytes from this packet */
  1172. if (likely(csr & EP0_OUT_PKT_RDY)) {
  1173. count = usb_read(USB_OUT_FIFO_WC1);
  1174. req->req.actual += min(count, bufferspace);
  1175. } else /* zlp */
  1176. count = 0;
  1177. is_short = (count < ep->ep.maxpacket);
  1178. DEBUG_EP0("read %s %02x, %d bytes%s req %p %d/%d\n",
  1179. ep->ep.name, csr, count,
  1180. is_short ? "/S" : "", req, req->req.actual, req->req.length);
  1181. while (likely(count-- != 0)) {
  1182. u8 byte = (u8) (*fifo & 0xff);
  1183. if (unlikely(bufferspace == 0)) {
  1184. /* this happens when the driver's buffer
  1185. * is smaller than what the host sent.
  1186. * discard the extra data.
  1187. */
  1188. if (req->req.status != -EOVERFLOW)
  1189. DEBUG_EP0("%s overflow %d\n", ep->ep.name,
  1190. count);
  1191. req->req.status = -EOVERFLOW;
  1192. } else {
  1193. *buf++ = byte;
  1194. bufferspace--;
  1195. }
  1196. }
  1197. /* completion */
  1198. if (is_short || req->req.actual == req->req.length) {
  1199. done(ep, req, 0);
  1200. return 1;
  1201. }
  1202. /* finished that packet. the next one may be waiting... */
  1203. return 0;
  1204. }
  1205. /**
  1206. * udc_set_address - set the USB address for this device
  1207. * @address:
  1208. *
  1209. * Called from control endpoint function after it decodes a set address setup packet.
  1210. */
  1211. static void udc_set_address(struct lh7a40x_udc *dev, unsigned char address)
  1212. {
  1213. DEBUG_EP0("%s: %d\n", __func__, address);
  1214. /* c.f. 15.1.2.2 Table 15-4 address will be used after DATA_END is set */
  1215. dev->usb_address = address;
  1216. usb_set((address & USB_FA_FUNCTION_ADDR), USB_FA);
  1217. usb_set(USB_FA_ADDR_UPDATE | (address & USB_FA_FUNCTION_ADDR), USB_FA);
  1218. /* usb_read(USB_FA); */
  1219. }
  1220. /*
  1221. * DATA_STATE_RECV (OUT_PKT_RDY)
  1222. * - if error
  1223. * set EP0_CLR_OUT | EP0_DATA_END | EP0_SEND_STALL bits
  1224. * - else
  1225. * set EP0_CLR_OUT bit
  1226. if last set EP0_DATA_END bit
  1227. */
  1228. static void lh7a40x_ep0_out(struct lh7a40x_udc *dev, u32 csr)
  1229. {
  1230. struct lh7a40x_request *req;
  1231. struct lh7a40x_ep *ep = &dev->ep[0];
  1232. int ret;
  1233. DEBUG_EP0("%s: %x\n", __func__, csr);
  1234. if (list_empty(&ep->queue))
  1235. req = 0;
  1236. else
  1237. req = list_entry(ep->queue.next, struct lh7a40x_request, queue);
  1238. if (req) {
  1239. if (req->req.length == 0) {
  1240. DEBUG_EP0("ZERO LENGTH OUT!\n");
  1241. usb_set((EP0_CLR_OUT | EP0_DATA_END), USB_EP0_CSR);
  1242. dev->ep0state = WAIT_FOR_SETUP;
  1243. return;
  1244. }
  1245. ret = read_fifo_ep0(ep, req);
  1246. if (ret) {
  1247. /* Done! */
  1248. DEBUG_EP0("%s: finished, waiting for status\n",
  1249. __func__);
  1250. usb_set((EP0_CLR_OUT | EP0_DATA_END), USB_EP0_CSR);
  1251. dev->ep0state = WAIT_FOR_SETUP;
  1252. } else {
  1253. /* Not done yet.. */
  1254. DEBUG_EP0("%s: not finished\n", __func__);
  1255. usb_set(EP0_CLR_OUT, USB_EP0_CSR);
  1256. }
  1257. } else {
  1258. DEBUG_EP0("NO REQ??!\n");
  1259. }
  1260. }
  1261. /*
  1262. * DATA_STATE_XMIT
  1263. */
  1264. static int lh7a40x_ep0_in(struct lh7a40x_udc *dev, u32 csr)
  1265. {
  1266. struct lh7a40x_request *req;
  1267. struct lh7a40x_ep *ep = &dev->ep[0];
  1268. int ret, need_zlp = 0;
  1269. DEBUG_EP0("%s: %x\n", __func__, csr);
  1270. if (list_empty(&ep->queue))
  1271. req = 0;
  1272. else
  1273. req = list_entry(ep->queue.next, struct lh7a40x_request, queue);
  1274. if (!req) {
  1275. DEBUG_EP0("%s: NULL REQ\n", __func__);
  1276. return 0;
  1277. }
  1278. if (req->req.length == 0) {
  1279. usb_set((EP0_IN_PKT_RDY | EP0_DATA_END), USB_EP0_CSR);
  1280. dev->ep0state = WAIT_FOR_SETUP;
  1281. return 1;
  1282. }
  1283. if (req->req.length - req->req.actual == EP0_PACKETSIZE) {
  1284. /* Next write will end with the packet size, */
  1285. /* so we need Zero-length-packet */
  1286. need_zlp = 1;
  1287. }
  1288. ret = write_fifo_ep0(ep, req);
  1289. if (ret == 1 && !need_zlp) {
  1290. /* Last packet */
  1291. DEBUG_EP0("%s: finished, waiting for status\n", __func__);
  1292. usb_set((EP0_IN_PKT_RDY | EP0_DATA_END), USB_EP0_CSR);
  1293. dev->ep0state = WAIT_FOR_SETUP;
  1294. } else {
  1295. DEBUG_EP0("%s: not finished\n", __func__);
  1296. usb_set(EP0_IN_PKT_RDY, USB_EP0_CSR);
  1297. }
  1298. if (need_zlp) {
  1299. DEBUG_EP0("%s: Need ZLP!\n", __func__);
  1300. usb_set(EP0_IN_PKT_RDY, USB_EP0_CSR);
  1301. dev->ep0state = DATA_STATE_NEED_ZLP;
  1302. }
  1303. return 1;
  1304. }
  1305. static int lh7a40x_handle_get_status(struct lh7a40x_udc *dev,
  1306. struct usb_ctrlrequest *ctrl)
  1307. {
  1308. struct lh7a40x_ep *ep0 = &dev->ep[0];
  1309. struct lh7a40x_ep *qep;
  1310. int reqtype = (ctrl->bRequestType & USB_RECIP_MASK);
  1311. u16 val = 0;
  1312. if (reqtype == USB_RECIP_INTERFACE) {
  1313. /* This is not supported.
  1314. * And according to the USB spec, this one does nothing..
  1315. * Just return 0
  1316. */
  1317. DEBUG_SETUP("GET_STATUS: USB_RECIP_INTERFACE\n");
  1318. } else if (reqtype == USB_RECIP_DEVICE) {
  1319. DEBUG_SETUP("GET_STATUS: USB_RECIP_DEVICE\n");
  1320. val |= (1 << 0); /* Self powered */
  1321. /*val |= (1<<1); *//* Remote wakeup */
  1322. } else if (reqtype == USB_RECIP_ENDPOINT) {
  1323. int ep_num = (ctrl->wIndex & ~USB_DIR_IN);
  1324. DEBUG_SETUP
  1325. ("GET_STATUS: USB_RECIP_ENDPOINT (%d), ctrl->wLength = %d\n",
  1326. ep_num, ctrl->wLength);
  1327. if (ctrl->wLength > 2 || ep_num > 3)
  1328. return -EOPNOTSUPP;
  1329. qep = &dev->ep[ep_num];
  1330. if (ep_is_in(qep) != ((ctrl->wIndex & USB_DIR_IN) ? 1 : 0)
  1331. && ep_index(qep) != 0) {
  1332. return -EOPNOTSUPP;
  1333. }
  1334. usb_set_index(ep_index(qep));
  1335. /* Return status on next IN token */
  1336. switch (qep->ep_type) {
  1337. case ep_control:
  1338. val =
  1339. (usb_read(qep->csr1) & EP0_SEND_STALL) ==
  1340. EP0_SEND_STALL;
  1341. break;
  1342. case ep_bulk_in:
  1343. case ep_interrupt:
  1344. val =
  1345. (usb_read(qep->csr1) & USB_IN_CSR1_SEND_STALL) ==
  1346. USB_IN_CSR1_SEND_STALL;
  1347. break;
  1348. case ep_bulk_out:
  1349. val =
  1350. (usb_read(qep->csr1) & USB_OUT_CSR1_SEND_STALL) ==
  1351. USB_OUT_CSR1_SEND_STALL;
  1352. break;
  1353. }
  1354. /* Back to EP0 index */
  1355. usb_set_index(0);
  1356. DEBUG_SETUP("GET_STATUS, ep: %d (%x), val = %d\n", ep_num,
  1357. ctrl->wIndex, val);
  1358. } else {
  1359. DEBUG_SETUP("Unknown REQ TYPE: %d\n", reqtype);
  1360. return -EOPNOTSUPP;
  1361. }
  1362. /* Clear "out packet ready" */
  1363. usb_set((EP0_CLR_OUT), USB_EP0_CSR);
  1364. /* Put status to FIFO */
  1365. lh7a40x_fifo_write(ep0, (u8 *) & val, sizeof(val));
  1366. /* Issue "In packet ready" */
  1367. usb_set((EP0_IN_PKT_RDY | EP0_DATA_END), USB_EP0_CSR);
  1368. return 0;
  1369. }
  1370. /*
  1371. * WAIT_FOR_SETUP (OUT_PKT_RDY)
  1372. * - read data packet from EP0 FIFO
  1373. * - decode command
  1374. * - if error
  1375. * set EP0_CLR_OUT | EP0_DATA_END | EP0_SEND_STALL bits
  1376. * - else
  1377. * set EP0_CLR_OUT | EP0_DATA_END bits
  1378. */
  1379. static void lh7a40x_ep0_setup(struct lh7a40x_udc *dev, u32 csr)
  1380. {
  1381. struct lh7a40x_ep *ep = &dev->ep[0];
  1382. struct usb_ctrlrequest ctrl;
  1383. int i, bytes, is_in;
  1384. DEBUG_SETUP("%s: %x\n", __func__, csr);
  1385. /* Nuke all previous transfers */
  1386. nuke(ep, -EPROTO);
  1387. /* read control req from fifo (8 bytes) */
  1388. bytes = lh7a40x_fifo_read(ep, (unsigned char *)&ctrl, 8);
  1389. DEBUG_SETUP("Read CTRL REQ %d bytes\n", bytes);
  1390. DEBUG_SETUP("CTRL.bRequestType = %d (is_in %d)\n", ctrl.bRequestType,
  1391. ctrl.bRequestType == USB_DIR_IN);
  1392. DEBUG_SETUP("CTRL.bRequest = %d\n", ctrl.bRequest);
  1393. DEBUG_SETUP("CTRL.wLength = %d\n", ctrl.wLength);
  1394. DEBUG_SETUP("CTRL.wValue = %d (%d)\n", ctrl.wValue, ctrl.wValue >> 8);
  1395. DEBUG_SETUP("CTRL.wIndex = %d\n", ctrl.wIndex);
  1396. /* Set direction of EP0 */
  1397. if (likely(ctrl.bRequestType & USB_DIR_IN)) {
  1398. ep->bEndpointAddress |= USB_DIR_IN;
  1399. is_in = 1;
  1400. } else {
  1401. ep->bEndpointAddress &= ~USB_DIR_IN;
  1402. is_in = 0;
  1403. }
  1404. dev->req_pending = 1;
  1405. /* Handle some SETUP packets ourselves */
  1406. switch (ctrl.bRequest) {
  1407. case USB_REQ_SET_ADDRESS:
  1408. if (ctrl.bRequestType != (USB_TYPE_STANDARD | USB_RECIP_DEVICE))
  1409. break;
  1410. DEBUG_SETUP("USB_REQ_SET_ADDRESS (%d)\n", ctrl.wValue);
  1411. udc_set_address(dev, ctrl.wValue);
  1412. usb_set((EP0_CLR_OUT | EP0_DATA_END), USB_EP0_CSR);
  1413. return;
  1414. case USB_REQ_GET_STATUS:{
  1415. if (lh7a40x_handle_get_status(dev, &ctrl) == 0)
  1416. return;
  1417. case USB_REQ_CLEAR_FEATURE:
  1418. case USB_REQ_SET_FEATURE:
  1419. if (ctrl.bRequestType == USB_RECIP_ENDPOINT) {
  1420. struct lh7a40x_ep *qep;
  1421. int ep_num = (ctrl.wIndex & 0x0f);
  1422. /* Support only HALT feature */
  1423. if (ctrl.wValue != 0 || ctrl.wLength != 0
  1424. || ep_num > 3 || ep_num < 1)
  1425. break;
  1426. qep = &dev->ep[ep_num];
  1427. spin_unlock(&dev->lock);
  1428. if (ctrl.bRequest == USB_REQ_SET_FEATURE) {
  1429. DEBUG_SETUP("SET_FEATURE (%d)\n",
  1430. ep_num);
  1431. lh7a40x_set_halt(&qep->ep, 1);
  1432. } else {
  1433. DEBUG_SETUP("CLR_FEATURE (%d)\n",
  1434. ep_num);
  1435. lh7a40x_set_halt(&qep->ep, 0);
  1436. }
  1437. spin_lock(&dev->lock);
  1438. usb_set_index(0);
  1439. /* Reply with a ZLP on next IN token */
  1440. usb_set((EP0_CLR_OUT | EP0_DATA_END),
  1441. USB_EP0_CSR);
  1442. return;
  1443. }
  1444. break;
  1445. }
  1446. default:
  1447. break;
  1448. }
  1449. if (likely(dev->driver)) {
  1450. /* device-2-host (IN) or no data setup command, process immediately */
  1451. spin_unlock(&dev->lock);
  1452. i = dev->driver->setup(&dev->gadget, &ctrl);
  1453. spin_lock(&dev->lock);
  1454. if (i < 0) {
  1455. /* setup processing failed, force stall */
  1456. DEBUG_SETUP
  1457. (" --> ERROR: gadget setup FAILED (stalling), setup returned %d\n",
  1458. i);
  1459. usb_set_index(0);
  1460. usb_set((EP0_CLR_OUT | EP0_DATA_END | EP0_SEND_STALL),
  1461. USB_EP0_CSR);
  1462. /* ep->stopped = 1; */
  1463. dev->ep0state = WAIT_FOR_SETUP;
  1464. }
  1465. }
  1466. }
  1467. /*
  1468. * DATA_STATE_NEED_ZLP
  1469. */
  1470. static void lh7a40x_ep0_in_zlp(struct lh7a40x_udc *dev, u32 csr)
  1471. {
  1472. DEBUG_EP0("%s: %x\n", __func__, csr);
  1473. /* c.f. Table 15-14 */
  1474. usb_set((EP0_IN_PKT_RDY | EP0_DATA_END), USB_EP0_CSR);
  1475. dev->ep0state = WAIT_FOR_SETUP;
  1476. }
  1477. /*
  1478. * handle ep0 interrupt
  1479. */
  1480. static void lh7a40x_handle_ep0(struct lh7a40x_udc *dev, u32 intr)
  1481. {
  1482. struct lh7a40x_ep *ep = &dev->ep[0];
  1483. u32 csr;
  1484. /* Set index 0 */
  1485. usb_set_index(0);
  1486. csr = usb_read(USB_EP0_CSR);
  1487. DEBUG_EP0("%s: csr = %x\n", __func__, csr);
  1488. /*
  1489. * For overview of what we should be doing see c.f. Chapter 18.1.2.4
  1490. * We will follow that outline here modified by our own global state
  1491. * indication which provides hints as to what we think should be
  1492. * happening..
  1493. */
  1494. /*
  1495. * if SENT_STALL is set
  1496. * - clear the SENT_STALL bit
  1497. */
  1498. if (csr & EP0_SENT_STALL) {
  1499. DEBUG_EP0("%s: EP0_SENT_STALL is set: %x\n", __func__, csr);
  1500. usb_clear((EP0_SENT_STALL | EP0_SEND_STALL), USB_EP0_CSR);
  1501. nuke(ep, -ECONNABORTED);
  1502. dev->ep0state = WAIT_FOR_SETUP;
  1503. return;
  1504. }
  1505. /*
  1506. * if a transfer is in progress && IN_PKT_RDY and OUT_PKT_RDY are clear
  1507. * - fill EP0 FIFO
  1508. * - if last packet
  1509. * - set IN_PKT_RDY | DATA_END
  1510. * - else
  1511. * set IN_PKT_RDY
  1512. */
  1513. if (!(csr & (EP0_IN_PKT_RDY | EP0_OUT_PKT_RDY))) {
  1514. DEBUG_EP0("%s: IN_PKT_RDY and OUT_PKT_RDY are clear\n",
  1515. __func__);
  1516. switch (dev->ep0state) {
  1517. case DATA_STATE_XMIT:
  1518. DEBUG_EP0("continue with DATA_STATE_XMIT\n");
  1519. lh7a40x_ep0_in(dev, csr);
  1520. return;
  1521. case DATA_STATE_NEED_ZLP:
  1522. DEBUG_EP0("continue with DATA_STATE_NEED_ZLP\n");
  1523. lh7a40x_ep0_in_zlp(dev, csr);
  1524. return;
  1525. default:
  1526. /* Stall? */
  1527. DEBUG_EP0("Odd state!! state = %s\n",
  1528. state_names[dev->ep0state]);
  1529. dev->ep0state = WAIT_FOR_SETUP;
  1530. /* nuke(ep, 0); */
  1531. /* usb_set(EP0_SEND_STALL, ep->csr1); */
  1532. break;
  1533. }
  1534. }
  1535. /*
  1536. * if SETUP_END is set
  1537. * - abort the last transfer
  1538. * - set SERVICED_SETUP_END_BIT
  1539. */
  1540. if (csr & EP0_SETUP_END) {
  1541. DEBUG_EP0("%s: EP0_SETUP_END is set: %x\n", __func__, csr);
  1542. usb_set(EP0_CLR_SETUP_END, USB_EP0_CSR);
  1543. nuke(ep, 0);
  1544. dev->ep0state = WAIT_FOR_SETUP;
  1545. }
  1546. /*
  1547. * if EP0_OUT_PKT_RDY is set
  1548. * - read data packet from EP0 FIFO
  1549. * - decode command
  1550. * - if error
  1551. * set SERVICED_OUT_PKT_RDY | DATA_END bits | SEND_STALL
  1552. * - else
  1553. * set SERVICED_OUT_PKT_RDY | DATA_END bits
  1554. */
  1555. if (csr & EP0_OUT_PKT_RDY) {
  1556. DEBUG_EP0("%s: EP0_OUT_PKT_RDY is set: %x\n", __func__,
  1557. csr);
  1558. switch (dev->ep0state) {
  1559. case WAIT_FOR_SETUP:
  1560. DEBUG_EP0("WAIT_FOR_SETUP\n");
  1561. lh7a40x_ep0_setup(dev, csr);
  1562. break;
  1563. case DATA_STATE_RECV:
  1564. DEBUG_EP0("DATA_STATE_RECV\n");
  1565. lh7a40x_ep0_out(dev, csr);
  1566. break;
  1567. default:
  1568. /* send stall? */
  1569. DEBUG_EP0("strange state!! 2. send stall? state = %d\n",
  1570. dev->ep0state);
  1571. break;
  1572. }
  1573. }
  1574. }
  1575. static void lh7a40x_ep0_kick(struct lh7a40x_udc *dev, struct lh7a40x_ep *ep)
  1576. {
  1577. u32 csr;
  1578. usb_set_index(0);
  1579. csr = usb_read(USB_EP0_CSR);
  1580. DEBUG_EP0("%s: %x\n", __func__, csr);
  1581. /* Clear "out packet ready" */
  1582. usb_set(EP0_CLR_OUT, USB_EP0_CSR);
  1583. if (ep_is_in(ep)) {
  1584. dev->ep0state = DATA_STATE_XMIT;
  1585. lh7a40x_ep0_in(dev, csr);
  1586. } else {
  1587. dev->ep0state = DATA_STATE_RECV;
  1588. lh7a40x_ep0_out(dev, csr);
  1589. }
  1590. }
  1591. /* ---------------------------------------------------------------------------
  1592. * device-scoped parts of the api to the usb controller hardware
  1593. * ---------------------------------------------------------------------------
  1594. */
  1595. static int lh7a40x_udc_get_frame(struct usb_gadget *_gadget)
  1596. {
  1597. u32 frame1 = usb_read(USB_FRM_NUM1); /* Least significant 8 bits */
  1598. u32 frame2 = usb_read(USB_FRM_NUM2); /* Most significant 3 bits */
  1599. DEBUG("%s, %p\n", __func__, _gadget);
  1600. return ((frame2 & 0x07) << 8) | (frame1 & 0xff);
  1601. }
  1602. static int lh7a40x_udc_wakeup(struct usb_gadget *_gadget)
  1603. {
  1604. /* host may not have enabled remote wakeup */
  1605. /*if ((UDCCS0 & UDCCS0_DRWF) == 0)
  1606. return -EHOSTUNREACH;
  1607. udc_set_mask_UDCCR(UDCCR_RSM); */
  1608. return -ENOTSUPP;
  1609. }
  1610. static const struct usb_gadget_ops lh7a40x_udc_ops = {
  1611. .get_frame = lh7a40x_udc_get_frame,
  1612. .wakeup = lh7a40x_udc_wakeup,
  1613. /* current versions must always be self-powered */
  1614. };
  1615. static void nop_release(struct device *dev)
  1616. {
  1617. DEBUG("%s %s\n", __func__, dev_name(dev));
  1618. }
  1619. static struct lh7a40x_udc memory = {
  1620. .usb_address = 0,
  1621. .gadget = {
  1622. .ops = &lh7a40x_udc_ops,
  1623. .ep0 = &memory.ep[0].ep,
  1624. .name = driver_name,
  1625. .dev = {
  1626. .init_name = "gadget",
  1627. .release = nop_release,
  1628. },
  1629. },
  1630. /* control endpoint */
  1631. .ep[0] = {
  1632. .ep = {
  1633. .name = ep0name,
  1634. .ops = &lh7a40x_ep_ops,
  1635. .maxpacket = EP0_PACKETSIZE,
  1636. },
  1637. .dev = &memory,
  1638. .bEndpointAddress = 0,
  1639. .bmAttributes = 0,
  1640. .ep_type = ep_control,
  1641. .fifo = io_p2v(USB_EP0_FIFO),
  1642. .csr1 = USB_EP0_CSR,
  1643. .csr2 = USB_EP0_CSR,
  1644. },
  1645. /* first group of endpoints */
  1646. .ep[1] = {
  1647. .ep = {
  1648. .name = "ep1in-bulk",
  1649. .ops = &lh7a40x_ep_ops,
  1650. .maxpacket = 64,
  1651. },
  1652. .dev = &memory,
  1653. .bEndpointAddress = USB_DIR_IN | 1,
  1654. .bmAttributes = USB_ENDPOINT_XFER_BULK,
  1655. .ep_type = ep_bulk_in,
  1656. .fifo = io_p2v(USB_EP1_FIFO),
  1657. .csr1 = USB_IN_CSR1,
  1658. .csr2 = USB_IN_CSR2,
  1659. },
  1660. .ep[2] = {
  1661. .ep = {
  1662. .name = "ep2out-bulk",
  1663. .ops = &lh7a40x_ep_ops,
  1664. .maxpacket = 64,
  1665. },
  1666. .dev = &memory,
  1667. .bEndpointAddress = 2,
  1668. .bmAttributes = USB_ENDPOINT_XFER_BULK,
  1669. .ep_type = ep_bulk_out,
  1670. .fifo = io_p2v(USB_EP2_FIFO),
  1671. .csr1 = USB_OUT_CSR1,
  1672. .csr2 = USB_OUT_CSR2,
  1673. },
  1674. .ep[3] = {
  1675. .ep = {
  1676. .name = "ep3in-int",
  1677. .ops = &lh7a40x_ep_ops,
  1678. .maxpacket = 64,
  1679. },
  1680. .dev = &memory,
  1681. .bEndpointAddress = USB_DIR_IN | 3,
  1682. .bmAttributes = USB_ENDPOINT_XFER_INT,
  1683. .ep_type = ep_interrupt,
  1684. .fifo = io_p2v(USB_EP3_FIFO),
  1685. .csr1 = USB_IN_CSR1,
  1686. .csr2 = USB_IN_CSR2,
  1687. },
  1688. };
  1689. /*
  1690. * probe - binds to the platform device
  1691. */
  1692. static int lh7a40x_udc_probe(struct platform_device *pdev)
  1693. {
  1694. struct lh7a40x_udc *dev = &memory;
  1695. int retval;
  1696. DEBUG("%s: %p\n", __func__, pdev);
  1697. spin_lock_init(&dev->lock);
  1698. dev->dev = &pdev->dev;
  1699. device_initialize(&dev->gadget.dev);
  1700. dev->gadget.dev.parent = &pdev->dev;
  1701. the_controller = dev;
  1702. platform_set_drvdata(pdev, dev);
  1703. udc_disable(dev);
  1704. udc_reinit(dev);
  1705. /* irq setup after old hardware state is cleaned up */
  1706. retval =
  1707. request_irq(IRQ_USBINTR, lh7a40x_udc_irq, IRQF_DISABLED, driver_name,
  1708. dev);
  1709. if (retval != 0) {
  1710. DEBUG(KERN_ERR "%s: can't get irq %i, err %d\n", driver_name,
  1711. IRQ_USBINTR, retval);
  1712. return -EBUSY;
  1713. }
  1714. create_proc_files();
  1715. return retval;
  1716. }
  1717. static int lh7a40x_udc_remove(struct platform_device *pdev)
  1718. {
  1719. struct lh7a40x_udc *dev = platform_get_drvdata(pdev);
  1720. DEBUG("%s: %p\n", __func__, pdev);
  1721. if (dev->driver)
  1722. return -EBUSY;
  1723. udc_disable(dev);
  1724. remove_proc_files();
  1725. free_irq(IRQ_USBINTR, dev);
  1726. platform_set_drvdata(pdev, 0);
  1727. the_controller = 0;
  1728. return 0;
  1729. }
  1730. /*-------------------------------------------------------------------------*/
  1731. static struct platform_driver udc_driver = {
  1732. .probe = lh7a40x_udc_probe,
  1733. .remove = lh7a40x_udc_remove,
  1734. /* FIXME power management support */
  1735. /* .suspend = ... disable UDC */
  1736. /* .resume = ... re-enable UDC */
  1737. .driver = {
  1738. .name = (char *)driver_name,
  1739. .owner = THIS_MODULE,
  1740. },
  1741. };
  1742. static int __init udc_init(void)
  1743. {
  1744. DEBUG("%s: %s version %s\n", __func__, driver_name, DRIVER_VERSION);
  1745. return platform_driver_register(&udc_driver);
  1746. }
  1747. static void __exit udc_exit(void)
  1748. {
  1749. platform_driver_unregister(&udc_driver);
  1750. }
  1751. module_init(udc_init);
  1752. module_exit(udc_exit);
  1753. MODULE_DESCRIPTION(DRIVER_DESC);
  1754. MODULE_AUTHOR("Mikko Lahteenmaki, Bo Henriksen");
  1755. MODULE_LICENSE("GPL");
  1756. MODULE_ALIAS("platform:lh7a40x_udc");