rtc-sh.c 21 KB

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  1. /*
  2. * SuperH On-Chip RTC Support
  3. *
  4. * Copyright (C) 2006, 2007, 2008 Paul Mundt
  5. * Copyright (C) 2006 Jamie Lenehan
  6. * Copyright (C) 2008 Angelo Castello
  7. *
  8. * Based on the old arch/sh/kernel/cpu/rtc.c by:
  9. *
  10. * Copyright (C) 2000 Philipp Rumpf <prumpf@tux.org>
  11. * Copyright (C) 1999 Tetsuya Okada & Niibe Yutaka
  12. *
  13. * This file is subject to the terms and conditions of the GNU General Public
  14. * License. See the file "COPYING" in the main directory of this archive
  15. * for more details.
  16. */
  17. #include <linux/module.h>
  18. #include <linux/kernel.h>
  19. #include <linux/bcd.h>
  20. #include <linux/rtc.h>
  21. #include <linux/init.h>
  22. #include <linux/platform_device.h>
  23. #include <linux/seq_file.h>
  24. #include <linux/interrupt.h>
  25. #include <linux/spinlock.h>
  26. #include <linux/io.h>
  27. #include <linux/log2.h>
  28. #include <asm/rtc.h>
  29. #define DRV_NAME "sh-rtc"
  30. #define DRV_VERSION "0.2.1"
  31. #define RTC_REG(r) ((r) * rtc_reg_size)
  32. #define R64CNT RTC_REG(0)
  33. #define RSECCNT RTC_REG(1) /* RTC sec */
  34. #define RMINCNT RTC_REG(2) /* RTC min */
  35. #define RHRCNT RTC_REG(3) /* RTC hour */
  36. #define RWKCNT RTC_REG(4) /* RTC week */
  37. #define RDAYCNT RTC_REG(5) /* RTC day */
  38. #define RMONCNT RTC_REG(6) /* RTC month */
  39. #define RYRCNT RTC_REG(7) /* RTC year */
  40. #define RSECAR RTC_REG(8) /* ALARM sec */
  41. #define RMINAR RTC_REG(9) /* ALARM min */
  42. #define RHRAR RTC_REG(10) /* ALARM hour */
  43. #define RWKAR RTC_REG(11) /* ALARM week */
  44. #define RDAYAR RTC_REG(12) /* ALARM day */
  45. #define RMONAR RTC_REG(13) /* ALARM month */
  46. #define RCR1 RTC_REG(14) /* Control */
  47. #define RCR2 RTC_REG(15) /* Control */
  48. /*
  49. * Note on RYRAR and RCR3: Up until this point most of the register
  50. * definitions are consistent across all of the available parts. However,
  51. * the placement of the optional RYRAR and RCR3 (the RYRAR control
  52. * register used to control RYRCNT/RYRAR compare) varies considerably
  53. * across various parts, occasionally being mapped in to a completely
  54. * unrelated address space. For proper RYRAR support a separate resource
  55. * would have to be handed off, but as this is purely optional in
  56. * practice, we simply opt not to support it, thereby keeping the code
  57. * quite a bit more simplified.
  58. */
  59. /* ALARM Bits - or with BCD encoded value */
  60. #define AR_ENB 0x80 /* Enable for alarm cmp */
  61. /* Period Bits */
  62. #define PF_HP 0x100 /* Enable Half Period to support 8,32,128Hz */
  63. #define PF_COUNT 0x200 /* Half periodic counter */
  64. #define PF_OXS 0x400 /* Periodic One x Second */
  65. #define PF_KOU 0x800 /* Kernel or User periodic request 1=kernel */
  66. #define PF_MASK 0xf00
  67. /* RCR1 Bits */
  68. #define RCR1_CF 0x80 /* Carry Flag */
  69. #define RCR1_CIE 0x10 /* Carry Interrupt Enable */
  70. #define RCR1_AIE 0x08 /* Alarm Interrupt Enable */
  71. #define RCR1_AF 0x01 /* Alarm Flag */
  72. /* RCR2 Bits */
  73. #define RCR2_PEF 0x80 /* PEriodic interrupt Flag */
  74. #define RCR2_PESMASK 0x70 /* Periodic interrupt Set */
  75. #define RCR2_RTCEN 0x08 /* ENable RTC */
  76. #define RCR2_ADJ 0x04 /* ADJustment (30-second) */
  77. #define RCR2_RESET 0x02 /* Reset bit */
  78. #define RCR2_START 0x01 /* Start bit */
  79. struct sh_rtc {
  80. void __iomem *regbase;
  81. unsigned long regsize;
  82. struct resource *res;
  83. int alarm_irq;
  84. int periodic_irq;
  85. int carry_irq;
  86. struct rtc_device *rtc_dev;
  87. spinlock_t lock;
  88. unsigned long capabilities; /* See asm-sh/rtc.h for cap bits */
  89. unsigned short periodic_freq;
  90. };
  91. static int __sh_rtc_interrupt(struct sh_rtc *rtc)
  92. {
  93. unsigned int tmp, pending;
  94. tmp = readb(rtc->regbase + RCR1);
  95. pending = tmp & RCR1_CF;
  96. tmp &= ~RCR1_CF;
  97. writeb(tmp, rtc->regbase + RCR1);
  98. /* Users have requested One x Second IRQ */
  99. if (pending && rtc->periodic_freq & PF_OXS)
  100. rtc_update_irq(rtc->rtc_dev, 1, RTC_UF | RTC_IRQF);
  101. return pending;
  102. }
  103. static int __sh_rtc_alarm(struct sh_rtc *rtc)
  104. {
  105. unsigned int tmp, pending;
  106. tmp = readb(rtc->regbase + RCR1);
  107. pending = tmp & RCR1_AF;
  108. tmp &= ~(RCR1_AF | RCR1_AIE);
  109. writeb(tmp, rtc->regbase + RCR1);
  110. if (pending)
  111. rtc_update_irq(rtc->rtc_dev, 1, RTC_AF | RTC_IRQF);
  112. return pending;
  113. }
  114. static int __sh_rtc_periodic(struct sh_rtc *rtc)
  115. {
  116. struct rtc_device *rtc_dev = rtc->rtc_dev;
  117. struct rtc_task *irq_task;
  118. unsigned int tmp, pending;
  119. tmp = readb(rtc->regbase + RCR2);
  120. pending = tmp & RCR2_PEF;
  121. tmp &= ~RCR2_PEF;
  122. writeb(tmp, rtc->regbase + RCR2);
  123. if (!pending)
  124. return 0;
  125. /* Half period enabled than one skipped and the next notified */
  126. if ((rtc->periodic_freq & PF_HP) && (rtc->periodic_freq & PF_COUNT))
  127. rtc->periodic_freq &= ~PF_COUNT;
  128. else {
  129. if (rtc->periodic_freq & PF_HP)
  130. rtc->periodic_freq |= PF_COUNT;
  131. if (rtc->periodic_freq & PF_KOU) {
  132. spin_lock(&rtc_dev->irq_task_lock);
  133. irq_task = rtc_dev->irq_task;
  134. if (irq_task)
  135. irq_task->func(irq_task->private_data);
  136. spin_unlock(&rtc_dev->irq_task_lock);
  137. } else
  138. rtc_update_irq(rtc->rtc_dev, 1, RTC_PF | RTC_IRQF);
  139. }
  140. return pending;
  141. }
  142. static irqreturn_t sh_rtc_interrupt(int irq, void *dev_id)
  143. {
  144. struct sh_rtc *rtc = dev_id;
  145. int ret;
  146. spin_lock(&rtc->lock);
  147. ret = __sh_rtc_interrupt(rtc);
  148. spin_unlock(&rtc->lock);
  149. return IRQ_RETVAL(ret);
  150. }
  151. static irqreturn_t sh_rtc_alarm(int irq, void *dev_id)
  152. {
  153. struct sh_rtc *rtc = dev_id;
  154. int ret;
  155. spin_lock(&rtc->lock);
  156. ret = __sh_rtc_alarm(rtc);
  157. spin_unlock(&rtc->lock);
  158. return IRQ_RETVAL(ret);
  159. }
  160. static irqreturn_t sh_rtc_periodic(int irq, void *dev_id)
  161. {
  162. struct sh_rtc *rtc = dev_id;
  163. int ret;
  164. spin_lock(&rtc->lock);
  165. ret = __sh_rtc_periodic(rtc);
  166. spin_unlock(&rtc->lock);
  167. return IRQ_RETVAL(ret);
  168. }
  169. static irqreturn_t sh_rtc_shared(int irq, void *dev_id)
  170. {
  171. struct sh_rtc *rtc = dev_id;
  172. int ret;
  173. spin_lock(&rtc->lock);
  174. ret = __sh_rtc_interrupt(rtc);
  175. ret |= __sh_rtc_alarm(rtc);
  176. ret |= __sh_rtc_periodic(rtc);
  177. spin_unlock(&rtc->lock);
  178. return IRQ_RETVAL(ret);
  179. }
  180. static inline void sh_rtc_setpie(struct device *dev, unsigned int enable)
  181. {
  182. struct sh_rtc *rtc = dev_get_drvdata(dev);
  183. unsigned int tmp;
  184. spin_lock_irq(&rtc->lock);
  185. tmp = readb(rtc->regbase + RCR2);
  186. if (enable) {
  187. tmp &= ~RCR2_PEF; /* Clear PES bit */
  188. tmp |= (rtc->periodic_freq & ~PF_HP); /* Set PES2-0 */
  189. } else
  190. tmp &= ~(RCR2_PESMASK | RCR2_PEF);
  191. writeb(tmp, rtc->regbase + RCR2);
  192. spin_unlock_irq(&rtc->lock);
  193. }
  194. static inline int sh_rtc_setfreq(struct device *dev, unsigned int freq)
  195. {
  196. struct sh_rtc *rtc = dev_get_drvdata(dev);
  197. int tmp, ret = 0;
  198. spin_lock_irq(&rtc->lock);
  199. tmp = rtc->periodic_freq & PF_MASK;
  200. switch (freq) {
  201. case 0:
  202. rtc->periodic_freq = 0x00;
  203. break;
  204. case 1:
  205. rtc->periodic_freq = 0x60;
  206. break;
  207. case 2:
  208. rtc->periodic_freq = 0x50;
  209. break;
  210. case 4:
  211. rtc->periodic_freq = 0x40;
  212. break;
  213. case 8:
  214. rtc->periodic_freq = 0x30 | PF_HP;
  215. break;
  216. case 16:
  217. rtc->periodic_freq = 0x30;
  218. break;
  219. case 32:
  220. rtc->periodic_freq = 0x20 | PF_HP;
  221. break;
  222. case 64:
  223. rtc->periodic_freq = 0x20;
  224. break;
  225. case 128:
  226. rtc->periodic_freq = 0x10 | PF_HP;
  227. break;
  228. case 256:
  229. rtc->periodic_freq = 0x10;
  230. break;
  231. default:
  232. ret = -ENOTSUPP;
  233. }
  234. if (ret == 0) {
  235. rtc->periodic_freq |= tmp;
  236. rtc->rtc_dev->irq_freq = freq;
  237. }
  238. spin_unlock_irq(&rtc->lock);
  239. return ret;
  240. }
  241. static inline void sh_rtc_setaie(struct device *dev, unsigned int enable)
  242. {
  243. struct sh_rtc *rtc = dev_get_drvdata(dev);
  244. unsigned int tmp;
  245. spin_lock_irq(&rtc->lock);
  246. tmp = readb(rtc->regbase + RCR1);
  247. if (!enable)
  248. tmp &= ~RCR1_AIE;
  249. else
  250. tmp |= RCR1_AIE;
  251. writeb(tmp, rtc->regbase + RCR1);
  252. spin_unlock_irq(&rtc->lock);
  253. }
  254. static int sh_rtc_proc(struct device *dev, struct seq_file *seq)
  255. {
  256. struct sh_rtc *rtc = dev_get_drvdata(dev);
  257. unsigned int tmp;
  258. tmp = readb(rtc->regbase + RCR1);
  259. seq_printf(seq, "carry_IRQ\t: %s\n", (tmp & RCR1_CIE) ? "yes" : "no");
  260. tmp = readb(rtc->regbase + RCR2);
  261. seq_printf(seq, "periodic_IRQ\t: %s\n",
  262. (tmp & RCR2_PESMASK) ? "yes" : "no");
  263. return 0;
  264. }
  265. static inline void sh_rtc_setcie(struct device *dev, unsigned int enable)
  266. {
  267. struct sh_rtc *rtc = dev_get_drvdata(dev);
  268. unsigned int tmp;
  269. spin_lock_irq(&rtc->lock);
  270. tmp = readb(rtc->regbase + RCR1);
  271. if (!enable)
  272. tmp &= ~RCR1_CIE;
  273. else
  274. tmp |= RCR1_CIE;
  275. writeb(tmp, rtc->regbase + RCR1);
  276. spin_unlock_irq(&rtc->lock);
  277. }
  278. static int sh_rtc_ioctl(struct device *dev, unsigned int cmd, unsigned long arg)
  279. {
  280. struct sh_rtc *rtc = dev_get_drvdata(dev);
  281. unsigned int ret = 0;
  282. switch (cmd) {
  283. case RTC_PIE_OFF:
  284. case RTC_PIE_ON:
  285. sh_rtc_setpie(dev, cmd == RTC_PIE_ON);
  286. break;
  287. case RTC_AIE_OFF:
  288. case RTC_AIE_ON:
  289. sh_rtc_setaie(dev, cmd == RTC_AIE_ON);
  290. break;
  291. case RTC_UIE_OFF:
  292. rtc->periodic_freq &= ~PF_OXS;
  293. sh_rtc_setcie(dev, 0);
  294. break;
  295. case RTC_UIE_ON:
  296. rtc->periodic_freq |= PF_OXS;
  297. sh_rtc_setcie(dev, 1);
  298. break;
  299. case RTC_IRQP_READ:
  300. ret = put_user(rtc->rtc_dev->irq_freq,
  301. (unsigned long __user *)arg);
  302. break;
  303. case RTC_IRQP_SET:
  304. ret = sh_rtc_setfreq(dev, arg);
  305. break;
  306. default:
  307. ret = -ENOIOCTLCMD;
  308. }
  309. return ret;
  310. }
  311. static int sh_rtc_read_time(struct device *dev, struct rtc_time *tm)
  312. {
  313. struct platform_device *pdev = to_platform_device(dev);
  314. struct sh_rtc *rtc = platform_get_drvdata(pdev);
  315. unsigned int sec128, sec2, yr, yr100, cf_bit;
  316. do {
  317. unsigned int tmp;
  318. spin_lock_irq(&rtc->lock);
  319. tmp = readb(rtc->regbase + RCR1);
  320. tmp &= ~RCR1_CF; /* Clear CF-bit */
  321. tmp |= RCR1_CIE;
  322. writeb(tmp, rtc->regbase + RCR1);
  323. sec128 = readb(rtc->regbase + R64CNT);
  324. tm->tm_sec = bcd2bin(readb(rtc->regbase + RSECCNT));
  325. tm->tm_min = bcd2bin(readb(rtc->regbase + RMINCNT));
  326. tm->tm_hour = bcd2bin(readb(rtc->regbase + RHRCNT));
  327. tm->tm_wday = bcd2bin(readb(rtc->regbase + RWKCNT));
  328. tm->tm_mday = bcd2bin(readb(rtc->regbase + RDAYCNT));
  329. tm->tm_mon = bcd2bin(readb(rtc->regbase + RMONCNT)) - 1;
  330. if (rtc->capabilities & RTC_CAP_4_DIGIT_YEAR) {
  331. yr = readw(rtc->regbase + RYRCNT);
  332. yr100 = bcd2bin(yr >> 8);
  333. yr &= 0xff;
  334. } else {
  335. yr = readb(rtc->regbase + RYRCNT);
  336. yr100 = bcd2bin((yr == 0x99) ? 0x19 : 0x20);
  337. }
  338. tm->tm_year = (yr100 * 100 + bcd2bin(yr)) - 1900;
  339. sec2 = readb(rtc->regbase + R64CNT);
  340. cf_bit = readb(rtc->regbase + RCR1) & RCR1_CF;
  341. spin_unlock_irq(&rtc->lock);
  342. } while (cf_bit != 0 || ((sec128 ^ sec2) & RTC_BIT_INVERTED) != 0);
  343. #if RTC_BIT_INVERTED != 0
  344. if ((sec128 & RTC_BIT_INVERTED))
  345. tm->tm_sec--;
  346. #endif
  347. /* only keep the carry interrupt enabled if UIE is on */
  348. if (!(rtc->periodic_freq & PF_OXS))
  349. sh_rtc_setcie(dev, 0);
  350. dev_dbg(dev, "%s: tm is secs=%d, mins=%d, hours=%d, "
  351. "mday=%d, mon=%d, year=%d, wday=%d\n",
  352. __func__,
  353. tm->tm_sec, tm->tm_min, tm->tm_hour,
  354. tm->tm_mday, tm->tm_mon + 1, tm->tm_year, tm->tm_wday);
  355. return rtc_valid_tm(tm);
  356. }
  357. static int sh_rtc_set_time(struct device *dev, struct rtc_time *tm)
  358. {
  359. struct platform_device *pdev = to_platform_device(dev);
  360. struct sh_rtc *rtc = platform_get_drvdata(pdev);
  361. unsigned int tmp;
  362. int year;
  363. spin_lock_irq(&rtc->lock);
  364. /* Reset pre-scaler & stop RTC */
  365. tmp = readb(rtc->regbase + RCR2);
  366. tmp |= RCR2_RESET;
  367. tmp &= ~RCR2_START;
  368. writeb(tmp, rtc->regbase + RCR2);
  369. writeb(bin2bcd(tm->tm_sec), rtc->regbase + RSECCNT);
  370. writeb(bin2bcd(tm->tm_min), rtc->regbase + RMINCNT);
  371. writeb(bin2bcd(tm->tm_hour), rtc->regbase + RHRCNT);
  372. writeb(bin2bcd(tm->tm_wday), rtc->regbase + RWKCNT);
  373. writeb(bin2bcd(tm->tm_mday), rtc->regbase + RDAYCNT);
  374. writeb(bin2bcd(tm->tm_mon + 1), rtc->regbase + RMONCNT);
  375. if (rtc->capabilities & RTC_CAP_4_DIGIT_YEAR) {
  376. year = (bin2bcd((tm->tm_year + 1900) / 100) << 8) |
  377. bin2bcd(tm->tm_year % 100);
  378. writew(year, rtc->regbase + RYRCNT);
  379. } else {
  380. year = tm->tm_year % 100;
  381. writeb(bin2bcd(year), rtc->regbase + RYRCNT);
  382. }
  383. /* Start RTC */
  384. tmp = readb(rtc->regbase + RCR2);
  385. tmp &= ~RCR2_RESET;
  386. tmp |= RCR2_RTCEN | RCR2_START;
  387. writeb(tmp, rtc->regbase + RCR2);
  388. spin_unlock_irq(&rtc->lock);
  389. return 0;
  390. }
  391. static inline int sh_rtc_read_alarm_value(struct sh_rtc *rtc, int reg_off)
  392. {
  393. unsigned int byte;
  394. int value = 0xff; /* return 0xff for ignored values */
  395. byte = readb(rtc->regbase + reg_off);
  396. if (byte & AR_ENB) {
  397. byte &= ~AR_ENB; /* strip the enable bit */
  398. value = bcd2bin(byte);
  399. }
  400. return value;
  401. }
  402. static int sh_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *wkalrm)
  403. {
  404. struct platform_device *pdev = to_platform_device(dev);
  405. struct sh_rtc *rtc = platform_get_drvdata(pdev);
  406. struct rtc_time *tm = &wkalrm->time;
  407. spin_lock_irq(&rtc->lock);
  408. tm->tm_sec = sh_rtc_read_alarm_value(rtc, RSECAR);
  409. tm->tm_min = sh_rtc_read_alarm_value(rtc, RMINAR);
  410. tm->tm_hour = sh_rtc_read_alarm_value(rtc, RHRAR);
  411. tm->tm_wday = sh_rtc_read_alarm_value(rtc, RWKAR);
  412. tm->tm_mday = sh_rtc_read_alarm_value(rtc, RDAYAR);
  413. tm->tm_mon = sh_rtc_read_alarm_value(rtc, RMONAR);
  414. if (tm->tm_mon > 0)
  415. tm->tm_mon -= 1; /* RTC is 1-12, tm_mon is 0-11 */
  416. tm->tm_year = 0xffff;
  417. wkalrm->enabled = (readb(rtc->regbase + RCR1) & RCR1_AIE) ? 1 : 0;
  418. spin_unlock_irq(&rtc->lock);
  419. return 0;
  420. }
  421. static inline void sh_rtc_write_alarm_value(struct sh_rtc *rtc,
  422. int value, int reg_off)
  423. {
  424. /* < 0 for a value that is ignored */
  425. if (value < 0)
  426. writeb(0, rtc->regbase + reg_off);
  427. else
  428. writeb(bin2bcd(value) | AR_ENB, rtc->regbase + reg_off);
  429. }
  430. static int sh_rtc_check_alarm(struct rtc_time *tm)
  431. {
  432. /*
  433. * The original rtc says anything > 0xc0 is "don't care" or "match
  434. * all" - most users use 0xff but rtc-dev uses -1 for the same thing.
  435. * The original rtc doesn't support years - some things use -1 and
  436. * some 0xffff. We use -1 to make out tests easier.
  437. */
  438. if (tm->tm_year == 0xffff)
  439. tm->tm_year = -1;
  440. if (tm->tm_mon >= 0xff)
  441. tm->tm_mon = -1;
  442. if (tm->tm_mday >= 0xff)
  443. tm->tm_mday = -1;
  444. if (tm->tm_wday >= 0xff)
  445. tm->tm_wday = -1;
  446. if (tm->tm_hour >= 0xff)
  447. tm->tm_hour = -1;
  448. if (tm->tm_min >= 0xff)
  449. tm->tm_min = -1;
  450. if (tm->tm_sec >= 0xff)
  451. tm->tm_sec = -1;
  452. if (tm->tm_year > 9999 ||
  453. tm->tm_mon >= 12 ||
  454. tm->tm_mday == 0 || tm->tm_mday >= 32 ||
  455. tm->tm_wday >= 7 ||
  456. tm->tm_hour >= 24 ||
  457. tm->tm_min >= 60 ||
  458. tm->tm_sec >= 60)
  459. return -EINVAL;
  460. return 0;
  461. }
  462. static int sh_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *wkalrm)
  463. {
  464. struct platform_device *pdev = to_platform_device(dev);
  465. struct sh_rtc *rtc = platform_get_drvdata(pdev);
  466. unsigned int rcr1;
  467. struct rtc_time *tm = &wkalrm->time;
  468. int mon, err;
  469. err = sh_rtc_check_alarm(tm);
  470. if (unlikely(err < 0))
  471. return err;
  472. spin_lock_irq(&rtc->lock);
  473. /* disable alarm interrupt and clear the alarm flag */
  474. rcr1 = readb(rtc->regbase + RCR1);
  475. rcr1 &= ~(RCR1_AF | RCR1_AIE);
  476. writeb(rcr1, rtc->regbase + RCR1);
  477. /* set alarm time */
  478. sh_rtc_write_alarm_value(rtc, tm->tm_sec, RSECAR);
  479. sh_rtc_write_alarm_value(rtc, tm->tm_min, RMINAR);
  480. sh_rtc_write_alarm_value(rtc, tm->tm_hour, RHRAR);
  481. sh_rtc_write_alarm_value(rtc, tm->tm_wday, RWKAR);
  482. sh_rtc_write_alarm_value(rtc, tm->tm_mday, RDAYAR);
  483. mon = tm->tm_mon;
  484. if (mon >= 0)
  485. mon += 1;
  486. sh_rtc_write_alarm_value(rtc, mon, RMONAR);
  487. if (wkalrm->enabled) {
  488. rcr1 |= RCR1_AIE;
  489. writeb(rcr1, rtc->regbase + RCR1);
  490. }
  491. spin_unlock_irq(&rtc->lock);
  492. return 0;
  493. }
  494. static int sh_rtc_irq_set_state(struct device *dev, int enabled)
  495. {
  496. struct platform_device *pdev = to_platform_device(dev);
  497. struct sh_rtc *rtc = platform_get_drvdata(pdev);
  498. if (enabled) {
  499. rtc->periodic_freq |= PF_KOU;
  500. return sh_rtc_ioctl(dev, RTC_PIE_ON, 0);
  501. } else {
  502. rtc->periodic_freq &= ~PF_KOU;
  503. return sh_rtc_ioctl(dev, RTC_PIE_OFF, 0);
  504. }
  505. }
  506. static int sh_rtc_irq_set_freq(struct device *dev, int freq)
  507. {
  508. if (!is_power_of_2(freq))
  509. return -EINVAL;
  510. return sh_rtc_ioctl(dev, RTC_IRQP_SET, freq);
  511. }
  512. static struct rtc_class_ops sh_rtc_ops = {
  513. .ioctl = sh_rtc_ioctl,
  514. .read_time = sh_rtc_read_time,
  515. .set_time = sh_rtc_set_time,
  516. .read_alarm = sh_rtc_read_alarm,
  517. .set_alarm = sh_rtc_set_alarm,
  518. .irq_set_state = sh_rtc_irq_set_state,
  519. .irq_set_freq = sh_rtc_irq_set_freq,
  520. .proc = sh_rtc_proc,
  521. };
  522. static int __devinit sh_rtc_probe(struct platform_device *pdev)
  523. {
  524. struct sh_rtc *rtc;
  525. struct resource *res;
  526. struct rtc_time r;
  527. int ret;
  528. rtc = kzalloc(sizeof(struct sh_rtc), GFP_KERNEL);
  529. if (unlikely(!rtc))
  530. return -ENOMEM;
  531. spin_lock_init(&rtc->lock);
  532. /* get periodic/carry/alarm irqs */
  533. ret = platform_get_irq(pdev, 0);
  534. if (unlikely(ret <= 0)) {
  535. ret = -ENOENT;
  536. dev_err(&pdev->dev, "No IRQ resource\n");
  537. goto err_badres;
  538. }
  539. rtc->periodic_irq = ret;
  540. rtc->carry_irq = platform_get_irq(pdev, 1);
  541. rtc->alarm_irq = platform_get_irq(pdev, 2);
  542. res = platform_get_resource(pdev, IORESOURCE_IO, 0);
  543. if (unlikely(res == NULL)) {
  544. ret = -ENOENT;
  545. dev_err(&pdev->dev, "No IO resource\n");
  546. goto err_badres;
  547. }
  548. rtc->regsize = res->end - res->start + 1;
  549. rtc->res = request_mem_region(res->start, rtc->regsize, pdev->name);
  550. if (unlikely(!rtc->res)) {
  551. ret = -EBUSY;
  552. goto err_badres;
  553. }
  554. rtc->regbase = ioremap_nocache(rtc->res->start, rtc->regsize);
  555. if (unlikely(!rtc->regbase)) {
  556. ret = -EINVAL;
  557. goto err_badmap;
  558. }
  559. rtc->rtc_dev = rtc_device_register("sh", &pdev->dev,
  560. &sh_rtc_ops, THIS_MODULE);
  561. if (IS_ERR(rtc->rtc_dev)) {
  562. ret = PTR_ERR(rtc->rtc_dev);
  563. goto err_unmap;
  564. }
  565. rtc->capabilities = RTC_DEF_CAPABILITIES;
  566. if (pdev->dev.platform_data) {
  567. struct sh_rtc_platform_info *pinfo = pdev->dev.platform_data;
  568. /*
  569. * Some CPUs have special capabilities in addition to the
  570. * default set. Add those in here.
  571. */
  572. rtc->capabilities |= pinfo->capabilities;
  573. }
  574. rtc->rtc_dev->max_user_freq = 256;
  575. platform_set_drvdata(pdev, rtc);
  576. if (rtc->carry_irq <= 0) {
  577. /* register shared periodic/carry/alarm irq */
  578. ret = request_irq(rtc->periodic_irq, sh_rtc_shared,
  579. IRQF_DISABLED, "sh-rtc", rtc);
  580. if (unlikely(ret)) {
  581. dev_err(&pdev->dev,
  582. "request IRQ failed with %d, IRQ %d\n", ret,
  583. rtc->periodic_irq);
  584. goto err_unmap;
  585. }
  586. } else {
  587. /* register periodic/carry/alarm irqs */
  588. ret = request_irq(rtc->periodic_irq, sh_rtc_periodic,
  589. IRQF_DISABLED, "sh-rtc period", rtc);
  590. if (unlikely(ret)) {
  591. dev_err(&pdev->dev,
  592. "request period IRQ failed with %d, IRQ %d\n",
  593. ret, rtc->periodic_irq);
  594. goto err_unmap;
  595. }
  596. ret = request_irq(rtc->carry_irq, sh_rtc_interrupt,
  597. IRQF_DISABLED, "sh-rtc carry", rtc);
  598. if (unlikely(ret)) {
  599. dev_err(&pdev->dev,
  600. "request carry IRQ failed with %d, IRQ %d\n",
  601. ret, rtc->carry_irq);
  602. free_irq(rtc->periodic_irq, rtc);
  603. goto err_unmap;
  604. }
  605. ret = request_irq(rtc->alarm_irq, sh_rtc_alarm,
  606. IRQF_DISABLED, "sh-rtc alarm", rtc);
  607. if (unlikely(ret)) {
  608. dev_err(&pdev->dev,
  609. "request alarm IRQ failed with %d, IRQ %d\n",
  610. ret, rtc->alarm_irq);
  611. free_irq(rtc->carry_irq, rtc);
  612. free_irq(rtc->periodic_irq, rtc);
  613. goto err_unmap;
  614. }
  615. }
  616. /* everything disabled by default */
  617. rtc->periodic_freq = 0;
  618. rtc->rtc_dev->irq_freq = 0;
  619. sh_rtc_setpie(&pdev->dev, 0);
  620. sh_rtc_setaie(&pdev->dev, 0);
  621. sh_rtc_setcie(&pdev->dev, 0);
  622. /* reset rtc to epoch 0 if time is invalid */
  623. if (rtc_read_time(rtc->rtc_dev, &r) < 0) {
  624. rtc_time_to_tm(0, &r);
  625. rtc_set_time(rtc->rtc_dev, &r);
  626. }
  627. device_init_wakeup(&pdev->dev, 1);
  628. return 0;
  629. err_unmap:
  630. iounmap(rtc->regbase);
  631. err_badmap:
  632. release_resource(rtc->res);
  633. err_badres:
  634. kfree(rtc);
  635. return ret;
  636. }
  637. static int __devexit sh_rtc_remove(struct platform_device *pdev)
  638. {
  639. struct sh_rtc *rtc = platform_get_drvdata(pdev);
  640. if (likely(rtc->rtc_dev))
  641. rtc_device_unregister(rtc->rtc_dev);
  642. sh_rtc_setpie(&pdev->dev, 0);
  643. sh_rtc_setaie(&pdev->dev, 0);
  644. sh_rtc_setcie(&pdev->dev, 0);
  645. free_irq(rtc->periodic_irq, rtc);
  646. if (rtc->carry_irq > 0) {
  647. free_irq(rtc->carry_irq, rtc);
  648. free_irq(rtc->alarm_irq, rtc);
  649. }
  650. release_resource(rtc->res);
  651. iounmap(rtc->regbase);
  652. platform_set_drvdata(pdev, NULL);
  653. kfree(rtc);
  654. return 0;
  655. }
  656. static void sh_rtc_set_irq_wake(struct device *dev, int enabled)
  657. {
  658. struct platform_device *pdev = to_platform_device(dev);
  659. struct sh_rtc *rtc = platform_get_drvdata(pdev);
  660. set_irq_wake(rtc->periodic_irq, enabled);
  661. if (rtc->carry_irq > 0) {
  662. set_irq_wake(rtc->carry_irq, enabled);
  663. set_irq_wake(rtc->alarm_irq, enabled);
  664. }
  665. }
  666. static int sh_rtc_suspend(struct device *dev)
  667. {
  668. if (device_may_wakeup(dev))
  669. sh_rtc_set_irq_wake(dev, 1);
  670. return 0;
  671. }
  672. static int sh_rtc_resume(struct device *dev)
  673. {
  674. if (device_may_wakeup(dev))
  675. sh_rtc_set_irq_wake(dev, 0);
  676. return 0;
  677. }
  678. static struct dev_pm_ops sh_rtc_dev_pm_ops = {
  679. .suspend = sh_rtc_suspend,
  680. .resume = sh_rtc_resume,
  681. };
  682. static struct platform_driver sh_rtc_platform_driver = {
  683. .driver = {
  684. .name = DRV_NAME,
  685. .owner = THIS_MODULE,
  686. .pm = &sh_rtc_dev_pm_ops,
  687. },
  688. .probe = sh_rtc_probe,
  689. .remove = __devexit_p(sh_rtc_remove),
  690. };
  691. static int __init sh_rtc_init(void)
  692. {
  693. return platform_driver_register(&sh_rtc_platform_driver);
  694. }
  695. static void __exit sh_rtc_exit(void)
  696. {
  697. platform_driver_unregister(&sh_rtc_platform_driver);
  698. }
  699. module_init(sh_rtc_init);
  700. module_exit(sh_rtc_exit);
  701. MODULE_DESCRIPTION("SuperH on-chip RTC driver");
  702. MODULE_VERSION(DRV_VERSION);
  703. MODULE_AUTHOR("Paul Mundt <lethal@linux-sh.org>, "
  704. "Jamie Lenehan <lenehan@twibble.org>, "
  705. "Angelo Castello <angelo.castello@st.com>");
  706. MODULE_LICENSE("GPL");
  707. MODULE_ALIAS("platform:" DRV_NAME);