rtc-ds1307.c 24 KB

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  1. /*
  2. * rtc-ds1307.c - RTC driver for some mostly-compatible I2C chips.
  3. *
  4. * Copyright (C) 2005 James Chapman (ds1337 core)
  5. * Copyright (C) 2006 David Brownell
  6. * Copyright (C) 2009 Matthias Fuchs (rx8025 support)
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License version 2 as
  10. * published by the Free Software Foundation.
  11. */
  12. #include <linux/module.h>
  13. #include <linux/init.h>
  14. #include <linux/slab.h>
  15. #include <linux/i2c.h>
  16. #include <linux/string.h>
  17. #include <linux/rtc.h>
  18. #include <linux/bcd.h>
  19. /* We can't determine type by probing, but if we expect pre-Linux code
  20. * to have set the chip up as a clock (turning on the oscillator and
  21. * setting the date and time), Linux can ignore the non-clock features.
  22. * That's a natural job for a factory or repair bench.
  23. */
  24. enum ds_type {
  25. ds_1307,
  26. ds_1337,
  27. ds_1338,
  28. ds_1339,
  29. ds_1340,
  30. m41t00,
  31. rx_8025,
  32. // rs5c372 too? different address...
  33. };
  34. /* RTC registers don't differ much, except for the century flag */
  35. #define DS1307_REG_SECS 0x00 /* 00-59 */
  36. # define DS1307_BIT_CH 0x80
  37. # define DS1340_BIT_nEOSC 0x80
  38. #define DS1307_REG_MIN 0x01 /* 00-59 */
  39. #define DS1307_REG_HOUR 0x02 /* 00-23, or 1-12{am,pm} */
  40. # define DS1307_BIT_12HR 0x40 /* in REG_HOUR */
  41. # define DS1307_BIT_PM 0x20 /* in REG_HOUR */
  42. # define DS1340_BIT_CENTURY_EN 0x80 /* in REG_HOUR */
  43. # define DS1340_BIT_CENTURY 0x40 /* in REG_HOUR */
  44. #define DS1307_REG_WDAY 0x03 /* 01-07 */
  45. #define DS1307_REG_MDAY 0x04 /* 01-31 */
  46. #define DS1307_REG_MONTH 0x05 /* 01-12 */
  47. # define DS1337_BIT_CENTURY 0x80 /* in REG_MONTH */
  48. #define DS1307_REG_YEAR 0x06 /* 00-99 */
  49. /* Other registers (control, status, alarms, trickle charge, NVRAM, etc)
  50. * start at 7, and they differ a LOT. Only control and status matter for
  51. * basic RTC date and time functionality; be careful using them.
  52. */
  53. #define DS1307_REG_CONTROL 0x07 /* or ds1338 */
  54. # define DS1307_BIT_OUT 0x80
  55. # define DS1338_BIT_OSF 0x20
  56. # define DS1307_BIT_SQWE 0x10
  57. # define DS1307_BIT_RS1 0x02
  58. # define DS1307_BIT_RS0 0x01
  59. #define DS1337_REG_CONTROL 0x0e
  60. # define DS1337_BIT_nEOSC 0x80
  61. # define DS1339_BIT_BBSQI 0x20
  62. # define DS1337_BIT_RS2 0x10
  63. # define DS1337_BIT_RS1 0x08
  64. # define DS1337_BIT_INTCN 0x04
  65. # define DS1337_BIT_A2IE 0x02
  66. # define DS1337_BIT_A1IE 0x01
  67. #define DS1340_REG_CONTROL 0x07
  68. # define DS1340_BIT_OUT 0x80
  69. # define DS1340_BIT_FT 0x40
  70. # define DS1340_BIT_CALIB_SIGN 0x20
  71. # define DS1340_M_CALIBRATION 0x1f
  72. #define DS1340_REG_FLAG 0x09
  73. # define DS1340_BIT_OSF 0x80
  74. #define DS1337_REG_STATUS 0x0f
  75. # define DS1337_BIT_OSF 0x80
  76. # define DS1337_BIT_A2I 0x02
  77. # define DS1337_BIT_A1I 0x01
  78. #define DS1339_REG_ALARM1_SECS 0x07
  79. #define DS1339_REG_TRICKLE 0x10
  80. #define RX8025_REG_CTRL1 0x0e
  81. # define RX8025_BIT_2412 0x20
  82. #define RX8025_REG_CTRL2 0x0f
  83. # define RX8025_BIT_PON 0x10
  84. # define RX8025_BIT_VDET 0x40
  85. # define RX8025_BIT_XST 0x20
  86. struct ds1307 {
  87. u8 regs[11];
  88. enum ds_type type;
  89. unsigned long flags;
  90. #define HAS_NVRAM 0 /* bit 0 == sysfs file active */
  91. #define HAS_ALARM 1 /* bit 1 == irq claimed */
  92. struct i2c_client *client;
  93. struct rtc_device *rtc;
  94. struct work_struct work;
  95. s32 (*read_block_data)(struct i2c_client *client, u8 command,
  96. u8 length, u8 *values);
  97. s32 (*write_block_data)(struct i2c_client *client, u8 command,
  98. u8 length, const u8 *values);
  99. };
  100. struct chip_desc {
  101. unsigned nvram56:1;
  102. unsigned alarm:1;
  103. };
  104. static const struct chip_desc chips[] = {
  105. [ds_1307] = {
  106. .nvram56 = 1,
  107. },
  108. [ds_1337] = {
  109. .alarm = 1,
  110. },
  111. [ds_1338] = {
  112. .nvram56 = 1,
  113. },
  114. [ds_1339] = {
  115. .alarm = 1,
  116. },
  117. [ds_1340] = {
  118. },
  119. [m41t00] = {
  120. },
  121. [rx_8025] = {
  122. }, };
  123. static const struct i2c_device_id ds1307_id[] = {
  124. { "ds1307", ds_1307 },
  125. { "ds1337", ds_1337 },
  126. { "ds1338", ds_1338 },
  127. { "ds1339", ds_1339 },
  128. { "ds1340", ds_1340 },
  129. { "m41t00", m41t00 },
  130. { "rx8025", rx_8025 },
  131. { }
  132. };
  133. MODULE_DEVICE_TABLE(i2c, ds1307_id);
  134. /*----------------------------------------------------------------------*/
  135. #define BLOCK_DATA_MAX_TRIES 10
  136. static s32 ds1307_read_block_data_once(struct i2c_client *client, u8 command,
  137. u8 length, u8 *values)
  138. {
  139. s32 i, data;
  140. for (i = 0; i < length; i++) {
  141. data = i2c_smbus_read_byte_data(client, command + i);
  142. if (data < 0)
  143. return data;
  144. values[i] = data;
  145. }
  146. return i;
  147. }
  148. static s32 ds1307_read_block_data(struct i2c_client *client, u8 command,
  149. u8 length, u8 *values)
  150. {
  151. u8 oldvalues[I2C_SMBUS_BLOCK_MAX];
  152. s32 ret;
  153. int tries = 0;
  154. dev_dbg(&client->dev, "ds1307_read_block_data (length=%d)\n", length);
  155. ret = ds1307_read_block_data_once(client, command, length, values);
  156. if (ret < 0)
  157. return ret;
  158. do {
  159. if (++tries > BLOCK_DATA_MAX_TRIES) {
  160. dev_err(&client->dev,
  161. "ds1307_read_block_data failed\n");
  162. return -EIO;
  163. }
  164. memcpy(oldvalues, values, length);
  165. ret = ds1307_read_block_data_once(client, command, length,
  166. values);
  167. if (ret < 0)
  168. return ret;
  169. } while (memcmp(oldvalues, values, length));
  170. return length;
  171. }
  172. static s32 ds1307_write_block_data(struct i2c_client *client, u8 command,
  173. u8 length, const u8 *values)
  174. {
  175. u8 currvalues[I2C_SMBUS_BLOCK_MAX];
  176. int tries = 0;
  177. dev_dbg(&client->dev, "ds1307_write_block_data (length=%d)\n", length);
  178. do {
  179. s32 i, ret;
  180. if (++tries > BLOCK_DATA_MAX_TRIES) {
  181. dev_err(&client->dev,
  182. "ds1307_write_block_data failed\n");
  183. return -EIO;
  184. }
  185. for (i = 0; i < length; i++) {
  186. ret = i2c_smbus_write_byte_data(client, command + i,
  187. values[i]);
  188. if (ret < 0)
  189. return ret;
  190. }
  191. ret = ds1307_read_block_data_once(client, command, length,
  192. currvalues);
  193. if (ret < 0)
  194. return ret;
  195. } while (memcmp(currvalues, values, length));
  196. return length;
  197. }
  198. /*----------------------------------------------------------------------*/
  199. /*
  200. * The IRQ logic includes a "real" handler running in IRQ context just
  201. * long enough to schedule this workqueue entry. We need a task context
  202. * to talk to the RTC, since I2C I/O calls require that; and disable the
  203. * IRQ until we clear its status on the chip, so that this handler can
  204. * work with any type of triggering (not just falling edge).
  205. *
  206. * The ds1337 and ds1339 both have two alarms, but we only use the first
  207. * one (with a "seconds" field). For ds1337 we expect nINTA is our alarm
  208. * signal; ds1339 chips have only one alarm signal.
  209. */
  210. static void ds1307_work(struct work_struct *work)
  211. {
  212. struct ds1307 *ds1307;
  213. struct i2c_client *client;
  214. struct mutex *lock;
  215. int stat, control;
  216. ds1307 = container_of(work, struct ds1307, work);
  217. client = ds1307->client;
  218. lock = &ds1307->rtc->ops_lock;
  219. mutex_lock(lock);
  220. stat = i2c_smbus_read_byte_data(client, DS1337_REG_STATUS);
  221. if (stat < 0)
  222. goto out;
  223. if (stat & DS1337_BIT_A1I) {
  224. stat &= ~DS1337_BIT_A1I;
  225. i2c_smbus_write_byte_data(client, DS1337_REG_STATUS, stat);
  226. control = i2c_smbus_read_byte_data(client, DS1337_REG_CONTROL);
  227. if (control < 0)
  228. goto out;
  229. control &= ~DS1337_BIT_A1IE;
  230. i2c_smbus_write_byte_data(client, DS1337_REG_CONTROL, control);
  231. /* rtc_update_irq() assumes that it is called
  232. * from IRQ-disabled context.
  233. */
  234. local_irq_disable();
  235. rtc_update_irq(ds1307->rtc, 1, RTC_AF | RTC_IRQF);
  236. local_irq_enable();
  237. }
  238. out:
  239. if (test_bit(HAS_ALARM, &ds1307->flags))
  240. enable_irq(client->irq);
  241. mutex_unlock(lock);
  242. }
  243. static irqreturn_t ds1307_irq(int irq, void *dev_id)
  244. {
  245. struct i2c_client *client = dev_id;
  246. struct ds1307 *ds1307 = i2c_get_clientdata(client);
  247. disable_irq_nosync(irq);
  248. schedule_work(&ds1307->work);
  249. return IRQ_HANDLED;
  250. }
  251. /*----------------------------------------------------------------------*/
  252. static int ds1307_get_time(struct device *dev, struct rtc_time *t)
  253. {
  254. struct ds1307 *ds1307 = dev_get_drvdata(dev);
  255. int tmp;
  256. /* read the RTC date and time registers all at once */
  257. tmp = ds1307->read_block_data(ds1307->client,
  258. DS1307_REG_SECS, 7, ds1307->regs);
  259. if (tmp != 7) {
  260. dev_err(dev, "%s error %d\n", "read", tmp);
  261. return -EIO;
  262. }
  263. dev_dbg(dev, "%s: %02x %02x %02x %02x %02x %02x %02x\n",
  264. "read",
  265. ds1307->regs[0], ds1307->regs[1],
  266. ds1307->regs[2], ds1307->regs[3],
  267. ds1307->regs[4], ds1307->regs[5],
  268. ds1307->regs[6]);
  269. t->tm_sec = bcd2bin(ds1307->regs[DS1307_REG_SECS] & 0x7f);
  270. t->tm_min = bcd2bin(ds1307->regs[DS1307_REG_MIN] & 0x7f);
  271. tmp = ds1307->regs[DS1307_REG_HOUR] & 0x3f;
  272. t->tm_hour = bcd2bin(tmp);
  273. t->tm_wday = bcd2bin(ds1307->regs[DS1307_REG_WDAY] & 0x07) - 1;
  274. t->tm_mday = bcd2bin(ds1307->regs[DS1307_REG_MDAY] & 0x3f);
  275. tmp = ds1307->regs[DS1307_REG_MONTH] & 0x1f;
  276. t->tm_mon = bcd2bin(tmp) - 1;
  277. /* assume 20YY not 19YY, and ignore DS1337_BIT_CENTURY */
  278. t->tm_year = bcd2bin(ds1307->regs[DS1307_REG_YEAR]) + 100;
  279. dev_dbg(dev, "%s secs=%d, mins=%d, "
  280. "hours=%d, mday=%d, mon=%d, year=%d, wday=%d\n",
  281. "read", t->tm_sec, t->tm_min,
  282. t->tm_hour, t->tm_mday,
  283. t->tm_mon, t->tm_year, t->tm_wday);
  284. /* initial clock setting can be undefined */
  285. return rtc_valid_tm(t);
  286. }
  287. static int ds1307_set_time(struct device *dev, struct rtc_time *t)
  288. {
  289. struct ds1307 *ds1307 = dev_get_drvdata(dev);
  290. int result;
  291. int tmp;
  292. u8 *buf = ds1307->regs;
  293. dev_dbg(dev, "%s secs=%d, mins=%d, "
  294. "hours=%d, mday=%d, mon=%d, year=%d, wday=%d\n",
  295. "write", t->tm_sec, t->tm_min,
  296. t->tm_hour, t->tm_mday,
  297. t->tm_mon, t->tm_year, t->tm_wday);
  298. buf[DS1307_REG_SECS] = bin2bcd(t->tm_sec);
  299. buf[DS1307_REG_MIN] = bin2bcd(t->tm_min);
  300. buf[DS1307_REG_HOUR] = bin2bcd(t->tm_hour);
  301. buf[DS1307_REG_WDAY] = bin2bcd(t->tm_wday + 1);
  302. buf[DS1307_REG_MDAY] = bin2bcd(t->tm_mday);
  303. buf[DS1307_REG_MONTH] = bin2bcd(t->tm_mon + 1);
  304. /* assume 20YY not 19YY */
  305. tmp = t->tm_year - 100;
  306. buf[DS1307_REG_YEAR] = bin2bcd(tmp);
  307. switch (ds1307->type) {
  308. case ds_1337:
  309. case ds_1339:
  310. buf[DS1307_REG_MONTH] |= DS1337_BIT_CENTURY;
  311. break;
  312. case ds_1340:
  313. buf[DS1307_REG_HOUR] |= DS1340_BIT_CENTURY_EN
  314. | DS1340_BIT_CENTURY;
  315. break;
  316. default:
  317. break;
  318. }
  319. dev_dbg(dev, "%s: %02x %02x %02x %02x %02x %02x %02x\n",
  320. "write", buf[0], buf[1], buf[2], buf[3],
  321. buf[4], buf[5], buf[6]);
  322. result = ds1307->write_block_data(ds1307->client, 0, 7, buf);
  323. if (result < 0) {
  324. dev_err(dev, "%s error %d\n", "write", result);
  325. return result;
  326. }
  327. return 0;
  328. }
  329. static int ds1337_read_alarm(struct device *dev, struct rtc_wkalrm *t)
  330. {
  331. struct i2c_client *client = to_i2c_client(dev);
  332. struct ds1307 *ds1307 = i2c_get_clientdata(client);
  333. int ret;
  334. if (!test_bit(HAS_ALARM, &ds1307->flags))
  335. return -EINVAL;
  336. /* read all ALARM1, ALARM2, and status registers at once */
  337. ret = ds1307->read_block_data(client,
  338. DS1339_REG_ALARM1_SECS, 9, ds1307->regs);
  339. if (ret != 9) {
  340. dev_err(dev, "%s error %d\n", "alarm read", ret);
  341. return -EIO;
  342. }
  343. dev_dbg(dev, "%s: %02x %02x %02x %02x, %02x %02x %02x, %02x %02x\n",
  344. "alarm read",
  345. ds1307->regs[0], ds1307->regs[1],
  346. ds1307->regs[2], ds1307->regs[3],
  347. ds1307->regs[4], ds1307->regs[5],
  348. ds1307->regs[6], ds1307->regs[7],
  349. ds1307->regs[8]);
  350. /* report alarm time (ALARM1); assume 24 hour and day-of-month modes,
  351. * and that all four fields are checked matches
  352. */
  353. t->time.tm_sec = bcd2bin(ds1307->regs[0] & 0x7f);
  354. t->time.tm_min = bcd2bin(ds1307->regs[1] & 0x7f);
  355. t->time.tm_hour = bcd2bin(ds1307->regs[2] & 0x3f);
  356. t->time.tm_mday = bcd2bin(ds1307->regs[3] & 0x3f);
  357. t->time.tm_mon = -1;
  358. t->time.tm_year = -1;
  359. t->time.tm_wday = -1;
  360. t->time.tm_yday = -1;
  361. t->time.tm_isdst = -1;
  362. /* ... and status */
  363. t->enabled = !!(ds1307->regs[7] & DS1337_BIT_A1IE);
  364. t->pending = !!(ds1307->regs[8] & DS1337_BIT_A1I);
  365. dev_dbg(dev, "%s secs=%d, mins=%d, "
  366. "hours=%d, mday=%d, enabled=%d, pending=%d\n",
  367. "alarm read", t->time.tm_sec, t->time.tm_min,
  368. t->time.tm_hour, t->time.tm_mday,
  369. t->enabled, t->pending);
  370. return 0;
  371. }
  372. static int ds1337_set_alarm(struct device *dev, struct rtc_wkalrm *t)
  373. {
  374. struct i2c_client *client = to_i2c_client(dev);
  375. struct ds1307 *ds1307 = i2c_get_clientdata(client);
  376. unsigned char *buf = ds1307->regs;
  377. u8 control, status;
  378. int ret;
  379. if (!test_bit(HAS_ALARM, &ds1307->flags))
  380. return -EINVAL;
  381. dev_dbg(dev, "%s secs=%d, mins=%d, "
  382. "hours=%d, mday=%d, enabled=%d, pending=%d\n",
  383. "alarm set", t->time.tm_sec, t->time.tm_min,
  384. t->time.tm_hour, t->time.tm_mday,
  385. t->enabled, t->pending);
  386. /* read current status of both alarms and the chip */
  387. ret = ds1307->read_block_data(client,
  388. DS1339_REG_ALARM1_SECS, 9, buf);
  389. if (ret != 9) {
  390. dev_err(dev, "%s error %d\n", "alarm write", ret);
  391. return -EIO;
  392. }
  393. control = ds1307->regs[7];
  394. status = ds1307->regs[8];
  395. dev_dbg(dev, "%s: %02x %02x %02x %02x, %02x %02x %02x, %02x %02x\n",
  396. "alarm set (old status)",
  397. ds1307->regs[0], ds1307->regs[1],
  398. ds1307->regs[2], ds1307->regs[3],
  399. ds1307->regs[4], ds1307->regs[5],
  400. ds1307->regs[6], control, status);
  401. /* set ALARM1, using 24 hour and day-of-month modes */
  402. buf[0] = bin2bcd(t->time.tm_sec);
  403. buf[1] = bin2bcd(t->time.tm_min);
  404. buf[2] = bin2bcd(t->time.tm_hour);
  405. buf[3] = bin2bcd(t->time.tm_mday);
  406. /* set ALARM2 to non-garbage */
  407. buf[4] = 0;
  408. buf[5] = 0;
  409. buf[6] = 0;
  410. /* optionally enable ALARM1 */
  411. buf[7] = control & ~(DS1337_BIT_A1IE | DS1337_BIT_A2IE);
  412. if (t->enabled) {
  413. dev_dbg(dev, "alarm IRQ armed\n");
  414. buf[7] |= DS1337_BIT_A1IE; /* only ALARM1 is used */
  415. }
  416. buf[8] = status & ~(DS1337_BIT_A1I | DS1337_BIT_A2I);
  417. ret = ds1307->write_block_data(client,
  418. DS1339_REG_ALARM1_SECS, 9, buf);
  419. if (ret < 0) {
  420. dev_err(dev, "can't set alarm time\n");
  421. return ret;
  422. }
  423. return 0;
  424. }
  425. static int ds1307_ioctl(struct device *dev, unsigned int cmd, unsigned long arg)
  426. {
  427. struct i2c_client *client = to_i2c_client(dev);
  428. struct ds1307 *ds1307 = i2c_get_clientdata(client);
  429. int ret;
  430. switch (cmd) {
  431. case RTC_AIE_OFF:
  432. if (!test_bit(HAS_ALARM, &ds1307->flags))
  433. return -ENOTTY;
  434. ret = i2c_smbus_read_byte_data(client, DS1337_REG_CONTROL);
  435. if (ret < 0)
  436. return ret;
  437. ret &= ~DS1337_BIT_A1IE;
  438. ret = i2c_smbus_write_byte_data(client,
  439. DS1337_REG_CONTROL, ret);
  440. if (ret < 0)
  441. return ret;
  442. break;
  443. case RTC_AIE_ON:
  444. if (!test_bit(HAS_ALARM, &ds1307->flags))
  445. return -ENOTTY;
  446. ret = i2c_smbus_read_byte_data(client, DS1337_REG_CONTROL);
  447. if (ret < 0)
  448. return ret;
  449. ret |= DS1337_BIT_A1IE;
  450. ret = i2c_smbus_write_byte_data(client,
  451. DS1337_REG_CONTROL, ret);
  452. if (ret < 0)
  453. return ret;
  454. break;
  455. default:
  456. return -ENOIOCTLCMD;
  457. }
  458. return 0;
  459. }
  460. static const struct rtc_class_ops ds13xx_rtc_ops = {
  461. .read_time = ds1307_get_time,
  462. .set_time = ds1307_set_time,
  463. .read_alarm = ds1337_read_alarm,
  464. .set_alarm = ds1337_set_alarm,
  465. .ioctl = ds1307_ioctl,
  466. };
  467. /*----------------------------------------------------------------------*/
  468. #define NVRAM_SIZE 56
  469. static ssize_t
  470. ds1307_nvram_read(struct kobject *kobj, struct bin_attribute *attr,
  471. char *buf, loff_t off, size_t count)
  472. {
  473. struct i2c_client *client;
  474. struct ds1307 *ds1307;
  475. int result;
  476. client = kobj_to_i2c_client(kobj);
  477. ds1307 = i2c_get_clientdata(client);
  478. if (unlikely(off >= NVRAM_SIZE))
  479. return 0;
  480. if ((off + count) > NVRAM_SIZE)
  481. count = NVRAM_SIZE - off;
  482. if (unlikely(!count))
  483. return count;
  484. result = ds1307->read_block_data(client, 8 + off, count, buf);
  485. if (result < 0)
  486. dev_err(&client->dev, "%s error %d\n", "nvram read", result);
  487. return result;
  488. }
  489. static ssize_t
  490. ds1307_nvram_write(struct kobject *kobj, struct bin_attribute *attr,
  491. char *buf, loff_t off, size_t count)
  492. {
  493. struct i2c_client *client;
  494. struct ds1307 *ds1307;
  495. int result;
  496. client = kobj_to_i2c_client(kobj);
  497. ds1307 = i2c_get_clientdata(client);
  498. if (unlikely(off >= NVRAM_SIZE))
  499. return -EFBIG;
  500. if ((off + count) > NVRAM_SIZE)
  501. count = NVRAM_SIZE - off;
  502. if (unlikely(!count))
  503. return count;
  504. result = ds1307->write_block_data(client, 8 + off, count, buf);
  505. if (result < 0) {
  506. dev_err(&client->dev, "%s error %d\n", "nvram write", result);
  507. return result;
  508. }
  509. return count;
  510. }
  511. static struct bin_attribute nvram = {
  512. .attr = {
  513. .name = "nvram",
  514. .mode = S_IRUGO | S_IWUSR,
  515. },
  516. .read = ds1307_nvram_read,
  517. .write = ds1307_nvram_write,
  518. .size = NVRAM_SIZE,
  519. };
  520. /*----------------------------------------------------------------------*/
  521. static struct i2c_driver ds1307_driver;
  522. static int __devinit ds1307_probe(struct i2c_client *client,
  523. const struct i2c_device_id *id)
  524. {
  525. struct ds1307 *ds1307;
  526. int err = -ENODEV;
  527. int tmp;
  528. const struct chip_desc *chip = &chips[id->driver_data];
  529. struct i2c_adapter *adapter = to_i2c_adapter(client->dev.parent);
  530. int want_irq = false;
  531. unsigned char *buf;
  532. if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA)
  533. && !i2c_check_functionality(adapter, I2C_FUNC_SMBUS_I2C_BLOCK))
  534. return -EIO;
  535. if (!(ds1307 = kzalloc(sizeof(struct ds1307), GFP_KERNEL)))
  536. return -ENOMEM;
  537. ds1307->client = client;
  538. i2c_set_clientdata(client, ds1307);
  539. ds1307->type = id->driver_data;
  540. buf = ds1307->regs;
  541. if (i2c_check_functionality(adapter, I2C_FUNC_SMBUS_I2C_BLOCK)) {
  542. ds1307->read_block_data = i2c_smbus_read_i2c_block_data;
  543. ds1307->write_block_data = i2c_smbus_write_i2c_block_data;
  544. } else {
  545. ds1307->read_block_data = ds1307_read_block_data;
  546. ds1307->write_block_data = ds1307_write_block_data;
  547. }
  548. switch (ds1307->type) {
  549. case ds_1337:
  550. case ds_1339:
  551. /* has IRQ? */
  552. if (ds1307->client->irq > 0 && chip->alarm) {
  553. INIT_WORK(&ds1307->work, ds1307_work);
  554. want_irq = true;
  555. }
  556. /* get registers that the "rtc" read below won't read... */
  557. tmp = ds1307->read_block_data(ds1307->client,
  558. DS1337_REG_CONTROL, 2, buf);
  559. if (tmp != 2) {
  560. pr_debug("read error %d\n", tmp);
  561. err = -EIO;
  562. goto exit_free;
  563. }
  564. /* oscillator off? turn it on, so clock can tick. */
  565. if (ds1307->regs[0] & DS1337_BIT_nEOSC)
  566. ds1307->regs[0] &= ~DS1337_BIT_nEOSC;
  567. /* Using IRQ? Disable the square wave and both alarms.
  568. * For ds1339, be sure alarms can trigger when we're
  569. * running on Vbackup (BBSQI); we assume ds1337 will
  570. * ignore that bit
  571. */
  572. if (want_irq) {
  573. ds1307->regs[0] |= DS1337_BIT_INTCN | DS1339_BIT_BBSQI;
  574. ds1307->regs[0] &= ~(DS1337_BIT_A2IE | DS1337_BIT_A1IE);
  575. }
  576. i2c_smbus_write_byte_data(client, DS1337_REG_CONTROL,
  577. ds1307->regs[0]);
  578. /* oscillator fault? clear flag, and warn */
  579. if (ds1307->regs[1] & DS1337_BIT_OSF) {
  580. i2c_smbus_write_byte_data(client, DS1337_REG_STATUS,
  581. ds1307->regs[1] & ~DS1337_BIT_OSF);
  582. dev_warn(&client->dev, "SET TIME!\n");
  583. }
  584. break;
  585. case rx_8025:
  586. tmp = i2c_smbus_read_i2c_block_data(ds1307->client,
  587. RX8025_REG_CTRL1 << 4 | 0x08, 2, buf);
  588. if (tmp != 2) {
  589. pr_debug("read error %d\n", tmp);
  590. err = -EIO;
  591. goto exit_free;
  592. }
  593. /* oscillator off? turn it on, so clock can tick. */
  594. if (!(ds1307->regs[1] & RX8025_BIT_XST)) {
  595. ds1307->regs[1] |= RX8025_BIT_XST;
  596. i2c_smbus_write_byte_data(client,
  597. RX8025_REG_CTRL2 << 4 | 0x08,
  598. ds1307->regs[1]);
  599. dev_warn(&client->dev,
  600. "oscillator stop detected - SET TIME!\n");
  601. }
  602. if (ds1307->regs[1] & RX8025_BIT_PON) {
  603. ds1307->regs[1] &= ~RX8025_BIT_PON;
  604. i2c_smbus_write_byte_data(client,
  605. RX8025_REG_CTRL2 << 4 | 0x08,
  606. ds1307->regs[1]);
  607. dev_warn(&client->dev, "power-on detected\n");
  608. }
  609. if (ds1307->regs[1] & RX8025_BIT_VDET) {
  610. ds1307->regs[1] &= ~RX8025_BIT_VDET;
  611. i2c_smbus_write_byte_data(client,
  612. RX8025_REG_CTRL2 << 4 | 0x08,
  613. ds1307->regs[1]);
  614. dev_warn(&client->dev, "voltage drop detected\n");
  615. }
  616. /* make sure we are running in 24hour mode */
  617. if (!(ds1307->regs[0] & RX8025_BIT_2412)) {
  618. u8 hour;
  619. /* switch to 24 hour mode */
  620. i2c_smbus_write_byte_data(client,
  621. RX8025_REG_CTRL1 << 4 | 0x08,
  622. ds1307->regs[0] |
  623. RX8025_BIT_2412);
  624. tmp = i2c_smbus_read_i2c_block_data(ds1307->client,
  625. RX8025_REG_CTRL1 << 4 | 0x08, 2, buf);
  626. if (tmp != 2) {
  627. pr_debug("read error %d\n", tmp);
  628. err = -EIO;
  629. goto exit_free;
  630. }
  631. /* correct hour */
  632. hour = bcd2bin(ds1307->regs[DS1307_REG_HOUR]);
  633. if (hour == 12)
  634. hour = 0;
  635. if (ds1307->regs[DS1307_REG_HOUR] & DS1307_BIT_PM)
  636. hour += 12;
  637. i2c_smbus_write_byte_data(client,
  638. DS1307_REG_HOUR << 4 | 0x08,
  639. hour);
  640. }
  641. break;
  642. default:
  643. break;
  644. }
  645. read_rtc:
  646. /* read RTC registers */
  647. tmp = ds1307->read_block_data(ds1307->client, 0, 8, buf);
  648. if (tmp != 8) {
  649. pr_debug("read error %d\n", tmp);
  650. err = -EIO;
  651. goto exit_free;
  652. }
  653. /* minimal sanity checking; some chips (like DS1340) don't
  654. * specify the extra bits as must-be-zero, but there are
  655. * still a few values that are clearly out-of-range.
  656. */
  657. tmp = ds1307->regs[DS1307_REG_SECS];
  658. switch (ds1307->type) {
  659. case ds_1307:
  660. case m41t00:
  661. /* clock halted? turn it on, so clock can tick. */
  662. if (tmp & DS1307_BIT_CH) {
  663. i2c_smbus_write_byte_data(client, DS1307_REG_SECS, 0);
  664. dev_warn(&client->dev, "SET TIME!\n");
  665. goto read_rtc;
  666. }
  667. break;
  668. case ds_1338:
  669. /* clock halted? turn it on, so clock can tick. */
  670. if (tmp & DS1307_BIT_CH)
  671. i2c_smbus_write_byte_data(client, DS1307_REG_SECS, 0);
  672. /* oscillator fault? clear flag, and warn */
  673. if (ds1307->regs[DS1307_REG_CONTROL] & DS1338_BIT_OSF) {
  674. i2c_smbus_write_byte_data(client, DS1307_REG_CONTROL,
  675. ds1307->regs[DS1307_REG_CONTROL]
  676. & ~DS1338_BIT_OSF);
  677. dev_warn(&client->dev, "SET TIME!\n");
  678. goto read_rtc;
  679. }
  680. break;
  681. case ds_1340:
  682. /* clock halted? turn it on, so clock can tick. */
  683. if (tmp & DS1340_BIT_nEOSC)
  684. i2c_smbus_write_byte_data(client, DS1307_REG_SECS, 0);
  685. tmp = i2c_smbus_read_byte_data(client, DS1340_REG_FLAG);
  686. if (tmp < 0) {
  687. pr_debug("read error %d\n", tmp);
  688. err = -EIO;
  689. goto exit_free;
  690. }
  691. /* oscillator fault? clear flag, and warn */
  692. if (tmp & DS1340_BIT_OSF) {
  693. i2c_smbus_write_byte_data(client, DS1340_REG_FLAG, 0);
  694. dev_warn(&client->dev, "SET TIME!\n");
  695. }
  696. break;
  697. case rx_8025:
  698. case ds_1337:
  699. case ds_1339:
  700. break;
  701. }
  702. tmp = ds1307->regs[DS1307_REG_HOUR];
  703. switch (ds1307->type) {
  704. case ds_1340:
  705. case m41t00:
  706. /* NOTE: ignores century bits; fix before deploying
  707. * systems that will run through year 2100.
  708. */
  709. break;
  710. case rx_8025:
  711. break;
  712. default:
  713. if (!(tmp & DS1307_BIT_12HR))
  714. break;
  715. /* Be sure we're in 24 hour mode. Multi-master systems
  716. * take note...
  717. */
  718. tmp = bcd2bin(tmp & 0x1f);
  719. if (tmp == 12)
  720. tmp = 0;
  721. if (ds1307->regs[DS1307_REG_HOUR] & DS1307_BIT_PM)
  722. tmp += 12;
  723. i2c_smbus_write_byte_data(client,
  724. DS1307_REG_HOUR,
  725. bin2bcd(tmp));
  726. }
  727. ds1307->rtc = rtc_device_register(client->name, &client->dev,
  728. &ds13xx_rtc_ops, THIS_MODULE);
  729. if (IS_ERR(ds1307->rtc)) {
  730. err = PTR_ERR(ds1307->rtc);
  731. dev_err(&client->dev,
  732. "unable to register the class device\n");
  733. goto exit_free;
  734. }
  735. if (want_irq) {
  736. err = request_irq(client->irq, ds1307_irq, 0,
  737. ds1307->rtc->name, client);
  738. if (err) {
  739. dev_err(&client->dev,
  740. "unable to request IRQ!\n");
  741. goto exit_irq;
  742. }
  743. set_bit(HAS_ALARM, &ds1307->flags);
  744. dev_dbg(&client->dev, "got IRQ %d\n", client->irq);
  745. }
  746. if (chip->nvram56) {
  747. err = sysfs_create_bin_file(&client->dev.kobj, &nvram);
  748. if (err == 0) {
  749. set_bit(HAS_NVRAM, &ds1307->flags);
  750. dev_info(&client->dev, "56 bytes nvram\n");
  751. }
  752. }
  753. return 0;
  754. exit_irq:
  755. if (ds1307->rtc)
  756. rtc_device_unregister(ds1307->rtc);
  757. exit_free:
  758. kfree(ds1307);
  759. return err;
  760. }
  761. static int __devexit ds1307_remove(struct i2c_client *client)
  762. {
  763. struct ds1307 *ds1307 = i2c_get_clientdata(client);
  764. if (test_and_clear_bit(HAS_ALARM, &ds1307->flags)) {
  765. free_irq(client->irq, client);
  766. cancel_work_sync(&ds1307->work);
  767. }
  768. if (test_and_clear_bit(HAS_NVRAM, &ds1307->flags))
  769. sysfs_remove_bin_file(&client->dev.kobj, &nvram);
  770. rtc_device_unregister(ds1307->rtc);
  771. kfree(ds1307);
  772. return 0;
  773. }
  774. static struct i2c_driver ds1307_driver = {
  775. .driver = {
  776. .name = "rtc-ds1307",
  777. .owner = THIS_MODULE,
  778. },
  779. .probe = ds1307_probe,
  780. .remove = __devexit_p(ds1307_remove),
  781. .id_table = ds1307_id,
  782. };
  783. static int __init ds1307_init(void)
  784. {
  785. return i2c_add_driver(&ds1307_driver);
  786. }
  787. module_init(ds1307_init);
  788. static void __exit ds1307_exit(void)
  789. {
  790. i2c_del_driver(&ds1307_driver);
  791. }
  792. module_exit(ds1307_exit);
  793. MODULE_DESCRIPTION("RTC driver for DS1307 and similar chips");
  794. MODULE_LICENSE("GPL");