aerdrv_core.c 20 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768
  1. /*
  2. * drivers/pci/pcie/aer/aerdrv_core.c
  3. *
  4. * This file is subject to the terms and conditions of the GNU General Public
  5. * License. See the file "COPYING" in the main directory of this archive
  6. * for more details.
  7. *
  8. * This file implements the core part of PCI-Express AER. When an pci-express
  9. * error is delivered, an error message will be collected and printed to
  10. * console, then, an error recovery procedure will be executed by following
  11. * the pci error recovery rules.
  12. *
  13. * Copyright (C) 2006 Intel Corp.
  14. * Tom Long Nguyen (tom.l.nguyen@intel.com)
  15. * Zhang Yanmin (yanmin.zhang@intel.com)
  16. *
  17. */
  18. #include <linux/module.h>
  19. #include <linux/pci.h>
  20. #include <linux/kernel.h>
  21. #include <linux/errno.h>
  22. #include <linux/pm.h>
  23. #include <linux/suspend.h>
  24. #include <linux/delay.h>
  25. #include "aerdrv.h"
  26. static int forceload;
  27. module_param(forceload, bool, 0);
  28. int pci_enable_pcie_error_reporting(struct pci_dev *dev)
  29. {
  30. u16 reg16 = 0;
  31. int pos;
  32. pos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_ERR);
  33. if (!pos)
  34. return -EIO;
  35. pos = pci_find_capability(dev, PCI_CAP_ID_EXP);
  36. if (!pos)
  37. return -EIO;
  38. pci_read_config_word(dev, pos+PCI_EXP_DEVCTL, &reg16);
  39. reg16 = reg16 |
  40. PCI_EXP_DEVCTL_CERE |
  41. PCI_EXP_DEVCTL_NFERE |
  42. PCI_EXP_DEVCTL_FERE |
  43. PCI_EXP_DEVCTL_URRE;
  44. pci_write_config_word(dev, pos+PCI_EXP_DEVCTL,
  45. reg16);
  46. return 0;
  47. }
  48. int pci_disable_pcie_error_reporting(struct pci_dev *dev)
  49. {
  50. u16 reg16 = 0;
  51. int pos;
  52. pos = pci_find_capability(dev, PCI_CAP_ID_EXP);
  53. if (!pos)
  54. return -EIO;
  55. pci_read_config_word(dev, pos+PCI_EXP_DEVCTL, &reg16);
  56. reg16 = reg16 & ~(PCI_EXP_DEVCTL_CERE |
  57. PCI_EXP_DEVCTL_NFERE |
  58. PCI_EXP_DEVCTL_FERE |
  59. PCI_EXP_DEVCTL_URRE);
  60. pci_write_config_word(dev, pos+PCI_EXP_DEVCTL,
  61. reg16);
  62. return 0;
  63. }
  64. int pci_cleanup_aer_uncorrect_error_status(struct pci_dev *dev)
  65. {
  66. int pos;
  67. u32 status, mask;
  68. pos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_ERR);
  69. if (!pos)
  70. return -EIO;
  71. pci_read_config_dword(dev, pos + PCI_ERR_UNCOR_STATUS, &status);
  72. pci_read_config_dword(dev, pos + PCI_ERR_UNCOR_SEVER, &mask);
  73. if (dev->error_state == pci_channel_io_normal)
  74. status &= ~mask; /* Clear corresponding nonfatal bits */
  75. else
  76. status &= mask; /* Clear corresponding fatal bits */
  77. pci_write_config_dword(dev, pos + PCI_ERR_UNCOR_STATUS, status);
  78. return 0;
  79. }
  80. #if 0
  81. int pci_cleanup_aer_correct_error_status(struct pci_dev *dev)
  82. {
  83. int pos;
  84. u32 status;
  85. pos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_ERR);
  86. if (!pos)
  87. return -EIO;
  88. pci_read_config_dword(dev, pos + PCI_ERR_COR_STATUS, &status);
  89. pci_write_config_dword(dev, pos + PCI_ERR_COR_STATUS, status);
  90. return 0;
  91. }
  92. #endif /* 0 */
  93. static void set_device_error_reporting(struct pci_dev *dev, void *data)
  94. {
  95. bool enable = *((bool *)data);
  96. if (dev->pcie_type != PCIE_RC_PORT &&
  97. dev->pcie_type != PCIE_SW_UPSTREAM_PORT &&
  98. dev->pcie_type != PCIE_SW_DOWNSTREAM_PORT)
  99. return;
  100. if (enable)
  101. pci_enable_pcie_error_reporting(dev);
  102. else
  103. pci_disable_pcie_error_reporting(dev);
  104. }
  105. /**
  106. * set_downstream_devices_error_reporting - enable/disable the error reporting bits on the root port and its downstream ports.
  107. * @dev: pointer to root port's pci_dev data structure
  108. * @enable: true = enable error reporting, false = disable error reporting.
  109. */
  110. static void set_downstream_devices_error_reporting(struct pci_dev *dev,
  111. bool enable)
  112. {
  113. set_device_error_reporting(dev, &enable);
  114. if (!dev->subordinate)
  115. return;
  116. pci_walk_bus(dev->subordinate, set_device_error_reporting, &enable);
  117. }
  118. static int find_device_iter(struct device *device, void *data)
  119. {
  120. struct pci_dev *dev;
  121. u16 id = *(unsigned long *)data;
  122. u8 secondary, subordinate, d_bus = id >> 8;
  123. if (device->bus == &pci_bus_type) {
  124. dev = to_pci_dev(device);
  125. if (id == ((dev->bus->number << 8) | dev->devfn)) {
  126. /*
  127. * Device ID match
  128. */
  129. *(unsigned long*)data = (unsigned long)device;
  130. return 1;
  131. }
  132. /*
  133. * If device is P2P, check if it is an upstream?
  134. */
  135. if (dev->hdr_type & PCI_HEADER_TYPE_BRIDGE) {
  136. pci_read_config_byte(dev, PCI_SECONDARY_BUS,
  137. &secondary);
  138. pci_read_config_byte(dev, PCI_SUBORDINATE_BUS,
  139. &subordinate);
  140. if (d_bus >= secondary && d_bus <= subordinate) {
  141. *(unsigned long*)data = (unsigned long)device;
  142. return 1;
  143. }
  144. }
  145. }
  146. return 0;
  147. }
  148. /**
  149. * find_source_device - search through device hierarchy for source device
  150. * @parent: pointer to Root Port pci_dev data structure
  151. * @id: device ID of agent who sends an error message to this Root Port
  152. *
  153. * Invoked when error is detected at the Root Port.
  154. */
  155. static struct device* find_source_device(struct pci_dev *parent, u16 id)
  156. {
  157. struct pci_dev *dev = parent;
  158. struct device *device;
  159. unsigned long device_addr;
  160. int status;
  161. /* Is Root Port an agent that sends error message? */
  162. if (id == ((dev->bus->number << 8) | dev->devfn))
  163. return &dev->dev;
  164. do {
  165. device_addr = id;
  166. if ((status = device_for_each_child(&dev->dev,
  167. &device_addr, find_device_iter))) {
  168. device = (struct device*)device_addr;
  169. dev = to_pci_dev(device);
  170. if (id == ((dev->bus->number << 8) | dev->devfn))
  171. return device;
  172. }
  173. }while (status);
  174. return NULL;
  175. }
  176. static void report_error_detected(struct pci_dev *dev, void *data)
  177. {
  178. pci_ers_result_t vote;
  179. struct pci_error_handlers *err_handler;
  180. struct aer_broadcast_data *result_data;
  181. result_data = (struct aer_broadcast_data *) data;
  182. dev->error_state = result_data->state;
  183. if (!dev->driver ||
  184. !dev->driver->err_handler ||
  185. !dev->driver->err_handler->error_detected) {
  186. if (result_data->state == pci_channel_io_frozen &&
  187. !(dev->hdr_type & PCI_HEADER_TYPE_BRIDGE)) {
  188. /*
  189. * In case of fatal recovery, if one of down-
  190. * stream device has no driver. We might be
  191. * unable to recover because a later insmod
  192. * of a driver for this device is unaware of
  193. * its hw state.
  194. */
  195. dev_printk(KERN_DEBUG, &dev->dev, "device has %s\n",
  196. dev->driver ?
  197. "no AER-aware driver" : "no driver");
  198. }
  199. return;
  200. }
  201. err_handler = dev->driver->err_handler;
  202. vote = err_handler->error_detected(dev, result_data->state);
  203. result_data->result = merge_result(result_data->result, vote);
  204. return;
  205. }
  206. static void report_mmio_enabled(struct pci_dev *dev, void *data)
  207. {
  208. pci_ers_result_t vote;
  209. struct pci_error_handlers *err_handler;
  210. struct aer_broadcast_data *result_data;
  211. result_data = (struct aer_broadcast_data *) data;
  212. if (!dev->driver ||
  213. !dev->driver->err_handler ||
  214. !dev->driver->err_handler->mmio_enabled)
  215. return;
  216. err_handler = dev->driver->err_handler;
  217. vote = err_handler->mmio_enabled(dev);
  218. result_data->result = merge_result(result_data->result, vote);
  219. return;
  220. }
  221. static void report_slot_reset(struct pci_dev *dev, void *data)
  222. {
  223. pci_ers_result_t vote;
  224. struct pci_error_handlers *err_handler;
  225. struct aer_broadcast_data *result_data;
  226. result_data = (struct aer_broadcast_data *) data;
  227. if (!dev->driver ||
  228. !dev->driver->err_handler ||
  229. !dev->driver->err_handler->slot_reset)
  230. return;
  231. err_handler = dev->driver->err_handler;
  232. vote = err_handler->slot_reset(dev);
  233. result_data->result = merge_result(result_data->result, vote);
  234. return;
  235. }
  236. static void report_resume(struct pci_dev *dev, void *data)
  237. {
  238. struct pci_error_handlers *err_handler;
  239. dev->error_state = pci_channel_io_normal;
  240. if (!dev->driver ||
  241. !dev->driver->err_handler ||
  242. !dev->driver->err_handler->resume)
  243. return;
  244. err_handler = dev->driver->err_handler;
  245. err_handler->resume(dev);
  246. return;
  247. }
  248. /**
  249. * broadcast_error_message - handle message broadcast to downstream drivers
  250. * @dev: pointer to from where in a hierarchy message is broadcasted down
  251. * @state: error state
  252. * @error_mesg: message to print
  253. * @cb: callback to be broadcasted
  254. *
  255. * Invoked during error recovery process. Once being invoked, the content
  256. * of error severity will be broadcasted to all downstream drivers in a
  257. * hierarchy in question.
  258. */
  259. static pci_ers_result_t broadcast_error_message(struct pci_dev *dev,
  260. enum pci_channel_state state,
  261. char *error_mesg,
  262. void (*cb)(struct pci_dev *, void *))
  263. {
  264. struct aer_broadcast_data result_data;
  265. dev_printk(KERN_DEBUG, &dev->dev, "broadcast %s message\n", error_mesg);
  266. result_data.state = state;
  267. if (cb == report_error_detected)
  268. result_data.result = PCI_ERS_RESULT_CAN_RECOVER;
  269. else
  270. result_data.result = PCI_ERS_RESULT_RECOVERED;
  271. if (dev->hdr_type & PCI_HEADER_TYPE_BRIDGE) {
  272. /*
  273. * If the error is reported by a bridge, we think this error
  274. * is related to the downstream link of the bridge, so we
  275. * do error recovery on all subordinates of the bridge instead
  276. * of the bridge and clear the error status of the bridge.
  277. */
  278. if (cb == report_error_detected)
  279. dev->error_state = state;
  280. pci_walk_bus(dev->subordinate, cb, &result_data);
  281. if (cb == report_resume) {
  282. pci_cleanup_aer_uncorrect_error_status(dev);
  283. dev->error_state = pci_channel_io_normal;
  284. }
  285. }
  286. else {
  287. /*
  288. * If the error is reported by an end point, we think this
  289. * error is related to the upstream link of the end point.
  290. */
  291. pci_walk_bus(dev->bus, cb, &result_data);
  292. }
  293. return result_data.result;
  294. }
  295. struct find_aer_service_data {
  296. struct pcie_port_service_driver *aer_driver;
  297. int is_downstream;
  298. };
  299. static int find_aer_service_iter(struct device *device, void *data)
  300. {
  301. struct device_driver *driver;
  302. struct pcie_port_service_driver *service_driver;
  303. struct find_aer_service_data *result;
  304. result = (struct find_aer_service_data *) data;
  305. if (device->bus == &pcie_port_bus_type) {
  306. struct pcie_port_data *port_data;
  307. port_data = pci_get_drvdata(to_pcie_device(device)->port);
  308. if (port_data->port_type == PCIE_SW_DOWNSTREAM_PORT)
  309. result->is_downstream = 1;
  310. driver = device->driver;
  311. if (driver) {
  312. service_driver = to_service_driver(driver);
  313. if (service_driver->service == PCIE_PORT_SERVICE_AER) {
  314. result->aer_driver = service_driver;
  315. return 1;
  316. }
  317. }
  318. }
  319. return 0;
  320. }
  321. static void find_aer_service(struct pci_dev *dev,
  322. struct find_aer_service_data *data)
  323. {
  324. int retval;
  325. retval = device_for_each_child(&dev->dev, data, find_aer_service_iter);
  326. }
  327. static pci_ers_result_t reset_link(struct pcie_device *aerdev,
  328. struct pci_dev *dev)
  329. {
  330. struct pci_dev *udev;
  331. pci_ers_result_t status;
  332. struct find_aer_service_data data;
  333. if (dev->hdr_type & PCI_HEADER_TYPE_BRIDGE)
  334. udev = dev;
  335. else
  336. udev= dev->bus->self;
  337. data.is_downstream = 0;
  338. data.aer_driver = NULL;
  339. find_aer_service(udev, &data);
  340. /*
  341. * Use the aer driver of the error agent firstly.
  342. * If it hasn't the aer driver, use the root port's
  343. */
  344. if (!data.aer_driver || !data.aer_driver->reset_link) {
  345. if (data.is_downstream &&
  346. aerdev->device.driver &&
  347. to_service_driver(aerdev->device.driver)->reset_link) {
  348. data.aer_driver =
  349. to_service_driver(aerdev->device.driver);
  350. } else {
  351. dev_printk(KERN_DEBUG, &dev->dev, "no link-reset "
  352. "support\n");
  353. return PCI_ERS_RESULT_DISCONNECT;
  354. }
  355. }
  356. status = data.aer_driver->reset_link(udev);
  357. if (status != PCI_ERS_RESULT_RECOVERED) {
  358. dev_printk(KERN_DEBUG, &dev->dev, "link reset at upstream "
  359. "device %s failed\n", pci_name(udev));
  360. return PCI_ERS_RESULT_DISCONNECT;
  361. }
  362. return status;
  363. }
  364. /**
  365. * do_recovery - handle nonfatal/fatal error recovery process
  366. * @aerdev: pointer to a pcie_device data structure of root port
  367. * @dev: pointer to a pci_dev data structure of agent detecting an error
  368. * @severity: error severity type
  369. *
  370. * Invoked when an error is nonfatal/fatal. Once being invoked, broadcast
  371. * error detected message to all downstream drivers within a hierarchy in
  372. * question and return the returned code.
  373. */
  374. static pci_ers_result_t do_recovery(struct pcie_device *aerdev,
  375. struct pci_dev *dev,
  376. int severity)
  377. {
  378. pci_ers_result_t status, result = PCI_ERS_RESULT_RECOVERED;
  379. enum pci_channel_state state;
  380. if (severity == AER_FATAL)
  381. state = pci_channel_io_frozen;
  382. else
  383. state = pci_channel_io_normal;
  384. status = broadcast_error_message(dev,
  385. state,
  386. "error_detected",
  387. report_error_detected);
  388. if (severity == AER_FATAL) {
  389. result = reset_link(aerdev, dev);
  390. if (result != PCI_ERS_RESULT_RECOVERED) {
  391. /* TODO: Should panic here? */
  392. return result;
  393. }
  394. }
  395. if (status == PCI_ERS_RESULT_CAN_RECOVER)
  396. status = broadcast_error_message(dev,
  397. state,
  398. "mmio_enabled",
  399. report_mmio_enabled);
  400. if (status == PCI_ERS_RESULT_NEED_RESET) {
  401. /*
  402. * TODO: Should call platform-specific
  403. * functions to reset slot before calling
  404. * drivers' slot_reset callbacks?
  405. */
  406. status = broadcast_error_message(dev,
  407. state,
  408. "slot_reset",
  409. report_slot_reset);
  410. }
  411. if (status == PCI_ERS_RESULT_RECOVERED)
  412. broadcast_error_message(dev,
  413. state,
  414. "resume",
  415. report_resume);
  416. return status;
  417. }
  418. /**
  419. * handle_error_source - handle logging error into an event log
  420. * @aerdev: pointer to pcie_device data structure of the root port
  421. * @dev: pointer to pci_dev data structure of error source device
  422. * @info: comprehensive error information
  423. *
  424. * Invoked when an error being detected by Root Port.
  425. */
  426. static void handle_error_source(struct pcie_device * aerdev,
  427. struct pci_dev *dev,
  428. struct aer_err_info info)
  429. {
  430. pci_ers_result_t status = 0;
  431. int pos;
  432. if (info.severity == AER_CORRECTABLE) {
  433. /*
  434. * Correctable error does not need software intevention.
  435. * No need to go through error recovery process.
  436. */
  437. pos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_ERR);
  438. if (pos)
  439. pci_write_config_dword(dev, pos + PCI_ERR_COR_STATUS,
  440. info.status);
  441. } else {
  442. status = do_recovery(aerdev, dev, info.severity);
  443. if (status == PCI_ERS_RESULT_RECOVERED) {
  444. dev_printk(KERN_DEBUG, &dev->dev, "AER driver "
  445. "successfully recovered\n");
  446. } else {
  447. /* TODO: Should kernel panic here? */
  448. dev_printk(KERN_DEBUG, &dev->dev, "AER driver didn't "
  449. "recover\n");
  450. }
  451. }
  452. }
  453. /**
  454. * aer_enable_rootport - enable Root Port's interrupts when receiving messages
  455. * @rpc: pointer to a Root Port data structure
  456. *
  457. * Invoked when PCIE bus loads AER service driver.
  458. */
  459. void aer_enable_rootport(struct aer_rpc *rpc)
  460. {
  461. struct pci_dev *pdev = rpc->rpd->port;
  462. int pos, aer_pos;
  463. u16 reg16;
  464. u32 reg32;
  465. pos = pci_find_capability(pdev, PCI_CAP_ID_EXP);
  466. /* Clear PCIE Capability's Device Status */
  467. pci_read_config_word(pdev, pos+PCI_EXP_DEVSTA, &reg16);
  468. pci_write_config_word(pdev, pos+PCI_EXP_DEVSTA, reg16);
  469. /* Disable system error generation in response to error messages */
  470. pci_read_config_word(pdev, pos + PCI_EXP_RTCTL, &reg16);
  471. reg16 &= ~(SYSTEM_ERROR_INTR_ON_MESG_MASK);
  472. pci_write_config_word(pdev, pos + PCI_EXP_RTCTL, reg16);
  473. aer_pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_ERR);
  474. /* Clear error status */
  475. pci_read_config_dword(pdev, aer_pos + PCI_ERR_ROOT_STATUS, &reg32);
  476. pci_write_config_dword(pdev, aer_pos + PCI_ERR_ROOT_STATUS, reg32);
  477. pci_read_config_dword(pdev, aer_pos + PCI_ERR_COR_STATUS, &reg32);
  478. pci_write_config_dword(pdev, aer_pos + PCI_ERR_COR_STATUS, reg32);
  479. pci_read_config_dword(pdev, aer_pos + PCI_ERR_UNCOR_STATUS, &reg32);
  480. pci_write_config_dword(pdev, aer_pos + PCI_ERR_UNCOR_STATUS, reg32);
  481. /*
  482. * Enable error reporting for the root port device and downstream port
  483. * devices.
  484. */
  485. set_downstream_devices_error_reporting(pdev, true);
  486. /* Enable Root Port's interrupt in response to error messages */
  487. pci_write_config_dword(pdev,
  488. aer_pos + PCI_ERR_ROOT_COMMAND,
  489. ROOT_PORT_INTR_ON_MESG_MASK);
  490. }
  491. /**
  492. * disable_root_aer - disable Root Port's interrupts when receiving messages
  493. * @rpc: pointer to a Root Port data structure
  494. *
  495. * Invoked when PCIE bus unloads AER service driver.
  496. */
  497. static void disable_root_aer(struct aer_rpc *rpc)
  498. {
  499. struct pci_dev *pdev = rpc->rpd->port;
  500. u32 reg32;
  501. int pos;
  502. /*
  503. * Disable error reporting for the root port device and downstream port
  504. * devices.
  505. */
  506. set_downstream_devices_error_reporting(pdev, false);
  507. pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_ERR);
  508. /* Disable Root's interrupt in response to error messages */
  509. pci_write_config_dword(pdev, pos + PCI_ERR_ROOT_COMMAND, 0);
  510. /* Clear Root's error status reg */
  511. pci_read_config_dword(pdev, pos + PCI_ERR_ROOT_STATUS, &reg32);
  512. pci_write_config_dword(pdev, pos + PCI_ERR_ROOT_STATUS, reg32);
  513. }
  514. /**
  515. * get_e_source - retrieve an error source
  516. * @rpc: pointer to the root port which holds an error
  517. *
  518. * Invoked by DPC handler to consume an error.
  519. */
  520. static struct aer_err_source* get_e_source(struct aer_rpc *rpc)
  521. {
  522. struct aer_err_source *e_source;
  523. unsigned long flags;
  524. /* Lock access to Root error producer/consumer index */
  525. spin_lock_irqsave(&rpc->e_lock, flags);
  526. if (rpc->prod_idx == rpc->cons_idx) {
  527. spin_unlock_irqrestore(&rpc->e_lock, flags);
  528. return NULL;
  529. }
  530. e_source = &rpc->e_sources[rpc->cons_idx];
  531. rpc->cons_idx++;
  532. if (rpc->cons_idx == AER_ERROR_SOURCES_MAX)
  533. rpc->cons_idx = 0;
  534. spin_unlock_irqrestore(&rpc->e_lock, flags);
  535. return e_source;
  536. }
  537. static int get_device_error_info(struct pci_dev *dev, struct aer_err_info *info)
  538. {
  539. int pos;
  540. pos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_ERR);
  541. /* The device might not support AER */
  542. if (!pos)
  543. return AER_SUCCESS;
  544. if (info->severity == AER_CORRECTABLE) {
  545. pci_read_config_dword(dev, pos + PCI_ERR_COR_STATUS,
  546. &info->status);
  547. if (!(info->status & ERR_CORRECTABLE_ERROR_MASK))
  548. return AER_UNSUCCESS;
  549. } else if (dev->hdr_type & PCI_HEADER_TYPE_BRIDGE ||
  550. info->severity == AER_NONFATAL) {
  551. /* Link is still healthy for IO reads */
  552. pci_read_config_dword(dev, pos + PCI_ERR_UNCOR_STATUS,
  553. &info->status);
  554. if (!(info->status & ERR_UNCORRECTABLE_ERROR_MASK))
  555. return AER_UNSUCCESS;
  556. if (info->status & AER_LOG_TLP_MASKS) {
  557. info->flags |= AER_TLP_HEADER_VALID_FLAG;
  558. pci_read_config_dword(dev,
  559. pos + PCI_ERR_HEADER_LOG, &info->tlp.dw0);
  560. pci_read_config_dword(dev,
  561. pos + PCI_ERR_HEADER_LOG + 4, &info->tlp.dw1);
  562. pci_read_config_dword(dev,
  563. pos + PCI_ERR_HEADER_LOG + 8, &info->tlp.dw2);
  564. pci_read_config_dword(dev,
  565. pos + PCI_ERR_HEADER_LOG + 12, &info->tlp.dw3);
  566. }
  567. }
  568. return AER_SUCCESS;
  569. }
  570. /**
  571. * aer_isr_one_error - consume an error detected by root port
  572. * @p_device: pointer to error root port service device
  573. * @e_src: pointer to an error source
  574. */
  575. static void aer_isr_one_error(struct pcie_device *p_device,
  576. struct aer_err_source *e_src)
  577. {
  578. struct device *s_device;
  579. struct aer_err_info e_info = {0, 0, 0,};
  580. int i;
  581. u16 id;
  582. /*
  583. * There is a possibility that both correctable error and
  584. * uncorrectable error being logged. Report correctable error first.
  585. */
  586. for (i = 1; i & ROOT_ERR_STATUS_MASKS ; i <<= 2) {
  587. if (i > 4)
  588. break;
  589. if (!(e_src->status & i))
  590. continue;
  591. /* Init comprehensive error information */
  592. if (i & PCI_ERR_ROOT_COR_RCV) {
  593. id = ERR_COR_ID(e_src->id);
  594. e_info.severity = AER_CORRECTABLE;
  595. } else {
  596. id = ERR_UNCOR_ID(e_src->id);
  597. e_info.severity = ((e_src->status >> 6) & 1);
  598. }
  599. if (e_src->status &
  600. (PCI_ERR_ROOT_MULTI_COR_RCV |
  601. PCI_ERR_ROOT_MULTI_UNCOR_RCV))
  602. e_info.flags |= AER_MULTI_ERROR_VALID_FLAG;
  603. if (!(s_device = find_source_device(p_device->port, id))) {
  604. printk(KERN_DEBUG "%s->can't find device of ID%04x\n",
  605. __func__, id);
  606. continue;
  607. }
  608. if (get_device_error_info(to_pci_dev(s_device), &e_info) ==
  609. AER_SUCCESS) {
  610. aer_print_error(to_pci_dev(s_device), &e_info);
  611. handle_error_source(p_device,
  612. to_pci_dev(s_device),
  613. e_info);
  614. }
  615. }
  616. }
  617. /**
  618. * aer_isr - consume errors detected by root port
  619. * @work: definition of this work item
  620. *
  621. * Invoked, as DPC, when root port records new detected error
  622. */
  623. void aer_isr(struct work_struct *work)
  624. {
  625. struct aer_rpc *rpc = container_of(work, struct aer_rpc, dpc_handler);
  626. struct pcie_device *p_device = rpc->rpd;
  627. struct aer_err_source *e_src;
  628. mutex_lock(&rpc->rpc_mutex);
  629. e_src = get_e_source(rpc);
  630. while (e_src) {
  631. aer_isr_one_error(p_device, e_src);
  632. e_src = get_e_source(rpc);
  633. }
  634. mutex_unlock(&rpc->rpc_mutex);
  635. wake_up(&rpc->wait_release);
  636. }
  637. /**
  638. * aer_delete_rootport - disable root port aer and delete service data
  639. * @rpc: pointer to a root port device being deleted
  640. *
  641. * Invoked when AER service unloaded on a specific Root Port
  642. */
  643. void aer_delete_rootport(struct aer_rpc *rpc)
  644. {
  645. /* Disable root port AER itself */
  646. disable_root_aer(rpc);
  647. kfree(rpc);
  648. }
  649. /**
  650. * aer_init - provide AER initialization
  651. * @dev: pointer to AER pcie device
  652. *
  653. * Invoked when AER service driver is loaded.
  654. */
  655. int aer_init(struct pcie_device *dev)
  656. {
  657. if (aer_osc_setup(dev) && !forceload)
  658. return -ENXIO;
  659. return AER_SUCCESS;
  660. }
  661. EXPORT_SYMBOL_GPL(pci_enable_pcie_error_reporting);
  662. EXPORT_SYMBOL_GPL(pci_disable_pcie_error_reporting);
  663. EXPORT_SYMBOL_GPL(pci_cleanup_aer_uncorrect_error_status);