pio.c 20 KB

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  1. /*
  2. Broadcom B43 wireless driver
  3. PIO data transfer
  4. Copyright (c) 2005-2008 Michael Buesch <mb@bu3sch.de>
  5. This program is free software; you can redistribute it and/or modify
  6. it under the terms of the GNU General Public License as published by
  7. the Free Software Foundation; either version 2 of the License, or
  8. (at your option) any later version.
  9. This program is distributed in the hope that it will be useful,
  10. but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  12. GNU General Public License for more details.
  13. You should have received a copy of the GNU General Public License
  14. along with this program; see the file COPYING. If not, write to
  15. the Free Software Foundation, Inc., 51 Franklin Steet, Fifth Floor,
  16. Boston, MA 02110-1301, USA.
  17. */
  18. #include "b43.h"
  19. #include "pio.h"
  20. #include "dma.h"
  21. #include "main.h"
  22. #include "xmit.h"
  23. #include <linux/delay.h>
  24. static void b43_pio_rx_work(struct work_struct *work);
  25. static u16 generate_cookie(struct b43_pio_txqueue *q,
  26. struct b43_pio_txpacket *pack)
  27. {
  28. u16 cookie;
  29. /* Use the upper 4 bits of the cookie as
  30. * PIO controller ID and store the packet index number
  31. * in the lower 12 bits.
  32. * Note that the cookie must never be 0, as this
  33. * is a special value used in RX path.
  34. * It can also not be 0xFFFF because that is special
  35. * for multicast frames.
  36. */
  37. cookie = (((u16)q->index + 1) << 12);
  38. cookie |= pack->index;
  39. return cookie;
  40. }
  41. static
  42. struct b43_pio_txqueue *parse_cookie(struct b43_wldev *dev,
  43. u16 cookie,
  44. struct b43_pio_txpacket **pack)
  45. {
  46. struct b43_pio *pio = &dev->pio;
  47. struct b43_pio_txqueue *q = NULL;
  48. unsigned int pack_index;
  49. switch (cookie & 0xF000) {
  50. case 0x1000:
  51. q = pio->tx_queue_AC_BK;
  52. break;
  53. case 0x2000:
  54. q = pio->tx_queue_AC_BE;
  55. break;
  56. case 0x3000:
  57. q = pio->tx_queue_AC_VI;
  58. break;
  59. case 0x4000:
  60. q = pio->tx_queue_AC_VO;
  61. break;
  62. case 0x5000:
  63. q = pio->tx_queue_mcast;
  64. break;
  65. }
  66. if (B43_WARN_ON(!q))
  67. return NULL;
  68. pack_index = (cookie & 0x0FFF);
  69. if (B43_WARN_ON(pack_index >= ARRAY_SIZE(q->packets)))
  70. return NULL;
  71. *pack = &q->packets[pack_index];
  72. return q;
  73. }
  74. static u16 index_to_pioqueue_base(struct b43_wldev *dev,
  75. unsigned int index)
  76. {
  77. static const u16 bases[] = {
  78. B43_MMIO_PIO_BASE0,
  79. B43_MMIO_PIO_BASE1,
  80. B43_MMIO_PIO_BASE2,
  81. B43_MMIO_PIO_BASE3,
  82. B43_MMIO_PIO_BASE4,
  83. B43_MMIO_PIO_BASE5,
  84. B43_MMIO_PIO_BASE6,
  85. B43_MMIO_PIO_BASE7,
  86. };
  87. static const u16 bases_rev11[] = {
  88. B43_MMIO_PIO11_BASE0,
  89. B43_MMIO_PIO11_BASE1,
  90. B43_MMIO_PIO11_BASE2,
  91. B43_MMIO_PIO11_BASE3,
  92. B43_MMIO_PIO11_BASE4,
  93. B43_MMIO_PIO11_BASE5,
  94. };
  95. if (dev->dev->id.revision >= 11) {
  96. B43_WARN_ON(index >= ARRAY_SIZE(bases_rev11));
  97. return bases_rev11[index];
  98. }
  99. B43_WARN_ON(index >= ARRAY_SIZE(bases));
  100. return bases[index];
  101. }
  102. static u16 pio_txqueue_offset(struct b43_wldev *dev)
  103. {
  104. if (dev->dev->id.revision >= 11)
  105. return 0x18;
  106. return 0;
  107. }
  108. static u16 pio_rxqueue_offset(struct b43_wldev *dev)
  109. {
  110. if (dev->dev->id.revision >= 11)
  111. return 0x38;
  112. return 8;
  113. }
  114. static struct b43_pio_txqueue *b43_setup_pioqueue_tx(struct b43_wldev *dev,
  115. unsigned int index)
  116. {
  117. struct b43_pio_txqueue *q;
  118. struct b43_pio_txpacket *p;
  119. unsigned int i;
  120. q = kzalloc(sizeof(*q), GFP_KERNEL);
  121. if (!q)
  122. return NULL;
  123. spin_lock_init(&q->lock);
  124. q->dev = dev;
  125. q->rev = dev->dev->id.revision;
  126. q->mmio_base = index_to_pioqueue_base(dev, index) +
  127. pio_txqueue_offset(dev);
  128. q->index = index;
  129. q->free_packet_slots = B43_PIO_MAX_NR_TXPACKETS;
  130. if (q->rev >= 8) {
  131. q->buffer_size = 1920; //FIXME this constant is wrong.
  132. } else {
  133. q->buffer_size = b43_piotx_read16(q, B43_PIO_TXQBUFSIZE);
  134. q->buffer_size -= 80;
  135. }
  136. INIT_LIST_HEAD(&q->packets_list);
  137. for (i = 0; i < ARRAY_SIZE(q->packets); i++) {
  138. p = &(q->packets[i]);
  139. INIT_LIST_HEAD(&p->list);
  140. p->index = i;
  141. p->queue = q;
  142. list_add(&p->list, &q->packets_list);
  143. }
  144. return q;
  145. }
  146. static struct b43_pio_rxqueue *b43_setup_pioqueue_rx(struct b43_wldev *dev,
  147. unsigned int index)
  148. {
  149. struct b43_pio_rxqueue *q;
  150. q = kzalloc(sizeof(*q), GFP_KERNEL);
  151. if (!q)
  152. return NULL;
  153. spin_lock_init(&q->lock);
  154. q->dev = dev;
  155. q->rev = dev->dev->id.revision;
  156. q->mmio_base = index_to_pioqueue_base(dev, index) +
  157. pio_rxqueue_offset(dev);
  158. INIT_WORK(&q->rx_work, b43_pio_rx_work);
  159. /* Enable Direct FIFO RX (PIO) on the engine. */
  160. b43_dma_direct_fifo_rx(dev, index, 1);
  161. return q;
  162. }
  163. static void b43_pio_cancel_tx_packets(struct b43_pio_txqueue *q)
  164. {
  165. struct b43_pio_txpacket *pack;
  166. unsigned int i;
  167. for (i = 0; i < ARRAY_SIZE(q->packets); i++) {
  168. pack = &(q->packets[i]);
  169. if (pack->skb) {
  170. dev_kfree_skb_any(pack->skb);
  171. pack->skb = NULL;
  172. }
  173. }
  174. }
  175. static void b43_destroy_pioqueue_tx(struct b43_pio_txqueue *q,
  176. const char *name)
  177. {
  178. if (!q)
  179. return;
  180. b43_pio_cancel_tx_packets(q);
  181. kfree(q);
  182. }
  183. static void b43_destroy_pioqueue_rx(struct b43_pio_rxqueue *q,
  184. const char *name)
  185. {
  186. if (!q)
  187. return;
  188. kfree(q);
  189. }
  190. #define destroy_queue_tx(pio, queue) do { \
  191. b43_destroy_pioqueue_tx((pio)->queue, __stringify(queue)); \
  192. (pio)->queue = NULL; \
  193. } while (0)
  194. #define destroy_queue_rx(pio, queue) do { \
  195. b43_destroy_pioqueue_rx((pio)->queue, __stringify(queue)); \
  196. (pio)->queue = NULL; \
  197. } while (0)
  198. void b43_pio_free(struct b43_wldev *dev)
  199. {
  200. struct b43_pio *pio;
  201. if (!b43_using_pio_transfers(dev))
  202. return;
  203. pio = &dev->pio;
  204. destroy_queue_rx(pio, rx_queue);
  205. destroy_queue_tx(pio, tx_queue_mcast);
  206. destroy_queue_tx(pio, tx_queue_AC_VO);
  207. destroy_queue_tx(pio, tx_queue_AC_VI);
  208. destroy_queue_tx(pio, tx_queue_AC_BE);
  209. destroy_queue_tx(pio, tx_queue_AC_BK);
  210. }
  211. void b43_pio_stop(struct b43_wldev *dev)
  212. {
  213. if (!b43_using_pio_transfers(dev))
  214. return;
  215. cancel_work_sync(&dev->pio.rx_queue->rx_work);
  216. }
  217. int b43_pio_init(struct b43_wldev *dev)
  218. {
  219. struct b43_pio *pio = &dev->pio;
  220. int err = -ENOMEM;
  221. b43_write32(dev, B43_MMIO_MACCTL, b43_read32(dev, B43_MMIO_MACCTL)
  222. & ~B43_MACCTL_BE);
  223. b43_shm_write16(dev, B43_SHM_SHARED, B43_SHM_SH_RXPADOFF, 0);
  224. pio->tx_queue_AC_BK = b43_setup_pioqueue_tx(dev, 0);
  225. if (!pio->tx_queue_AC_BK)
  226. goto out;
  227. pio->tx_queue_AC_BE = b43_setup_pioqueue_tx(dev, 1);
  228. if (!pio->tx_queue_AC_BE)
  229. goto err_destroy_bk;
  230. pio->tx_queue_AC_VI = b43_setup_pioqueue_tx(dev, 2);
  231. if (!pio->tx_queue_AC_VI)
  232. goto err_destroy_be;
  233. pio->tx_queue_AC_VO = b43_setup_pioqueue_tx(dev, 3);
  234. if (!pio->tx_queue_AC_VO)
  235. goto err_destroy_vi;
  236. pio->tx_queue_mcast = b43_setup_pioqueue_tx(dev, 4);
  237. if (!pio->tx_queue_mcast)
  238. goto err_destroy_vo;
  239. pio->rx_queue = b43_setup_pioqueue_rx(dev, 0);
  240. if (!pio->rx_queue)
  241. goto err_destroy_mcast;
  242. b43dbg(dev->wl, "PIO initialized\n");
  243. err = 0;
  244. out:
  245. return err;
  246. err_destroy_mcast:
  247. destroy_queue_tx(pio, tx_queue_mcast);
  248. err_destroy_vo:
  249. destroy_queue_tx(pio, tx_queue_AC_VO);
  250. err_destroy_vi:
  251. destroy_queue_tx(pio, tx_queue_AC_VI);
  252. err_destroy_be:
  253. destroy_queue_tx(pio, tx_queue_AC_BE);
  254. err_destroy_bk:
  255. destroy_queue_tx(pio, tx_queue_AC_BK);
  256. return err;
  257. }
  258. /* Static mapping of mac80211's queues (priorities) to b43 PIO queues. */
  259. static struct b43_pio_txqueue *select_queue_by_priority(struct b43_wldev *dev,
  260. u8 queue_prio)
  261. {
  262. struct b43_pio_txqueue *q;
  263. if (b43_modparam_qos) {
  264. /* 0 = highest priority */
  265. switch (queue_prio) {
  266. default:
  267. B43_WARN_ON(1);
  268. /* fallthrough */
  269. case 0:
  270. q = dev->pio.tx_queue_AC_VO;
  271. break;
  272. case 1:
  273. q = dev->pio.tx_queue_AC_VI;
  274. break;
  275. case 2:
  276. q = dev->pio.tx_queue_AC_BE;
  277. break;
  278. case 3:
  279. q = dev->pio.tx_queue_AC_BK;
  280. break;
  281. }
  282. } else
  283. q = dev->pio.tx_queue_AC_BE;
  284. return q;
  285. }
  286. static u16 tx_write_2byte_queue(struct b43_pio_txqueue *q,
  287. u16 ctl,
  288. const void *_data,
  289. unsigned int data_len)
  290. {
  291. struct b43_wldev *dev = q->dev;
  292. const u8 *data = _data;
  293. ctl |= B43_PIO_TXCTL_WRITELO | B43_PIO_TXCTL_WRITEHI;
  294. b43_piotx_write16(q, B43_PIO_TXCTL, ctl);
  295. ssb_block_write(dev->dev, data, (data_len & ~1),
  296. q->mmio_base + B43_PIO_TXDATA,
  297. sizeof(u16));
  298. if (data_len & 1) {
  299. /* Write the last byte. */
  300. ctl &= ~B43_PIO_TXCTL_WRITEHI;
  301. b43_piotx_write16(q, B43_PIO_TXCTL, ctl);
  302. b43_piotx_write16(q, B43_PIO_TXDATA, data[data_len - 1]);
  303. }
  304. return ctl;
  305. }
  306. static void pio_tx_frame_2byte_queue(struct b43_pio_txpacket *pack,
  307. const u8 *hdr, unsigned int hdrlen)
  308. {
  309. struct b43_pio_txqueue *q = pack->queue;
  310. const char *frame = pack->skb->data;
  311. unsigned int frame_len = pack->skb->len;
  312. u16 ctl;
  313. ctl = b43_piotx_read16(q, B43_PIO_TXCTL);
  314. ctl |= B43_PIO_TXCTL_FREADY;
  315. ctl &= ~B43_PIO_TXCTL_EOF;
  316. /* Transfer the header data. */
  317. ctl = tx_write_2byte_queue(q, ctl, hdr, hdrlen);
  318. /* Transfer the frame data. */
  319. ctl = tx_write_2byte_queue(q, ctl, frame, frame_len);
  320. ctl |= B43_PIO_TXCTL_EOF;
  321. b43_piotx_write16(q, B43_PIO_TXCTL, ctl);
  322. }
  323. static u32 tx_write_4byte_queue(struct b43_pio_txqueue *q,
  324. u32 ctl,
  325. const void *_data,
  326. unsigned int data_len)
  327. {
  328. struct b43_wldev *dev = q->dev;
  329. const u8 *data = _data;
  330. ctl |= B43_PIO8_TXCTL_0_7 | B43_PIO8_TXCTL_8_15 |
  331. B43_PIO8_TXCTL_16_23 | B43_PIO8_TXCTL_24_31;
  332. b43_piotx_write32(q, B43_PIO8_TXCTL, ctl);
  333. ssb_block_write(dev->dev, data, (data_len & ~3),
  334. q->mmio_base + B43_PIO8_TXDATA,
  335. sizeof(u32));
  336. if (data_len & 3) {
  337. u32 value = 0;
  338. /* Write the last few bytes. */
  339. ctl &= ~(B43_PIO8_TXCTL_8_15 | B43_PIO8_TXCTL_16_23 |
  340. B43_PIO8_TXCTL_24_31);
  341. data = &(data[data_len - 1]);
  342. switch (data_len & 3) {
  343. case 3:
  344. ctl |= B43_PIO8_TXCTL_16_23;
  345. value |= (u32)(*data) << 16;
  346. data--;
  347. case 2:
  348. ctl |= B43_PIO8_TXCTL_8_15;
  349. value |= (u32)(*data) << 8;
  350. data--;
  351. case 1:
  352. value |= (u32)(*data);
  353. }
  354. b43_piotx_write32(q, B43_PIO8_TXCTL, ctl);
  355. b43_piotx_write32(q, B43_PIO8_TXDATA, value);
  356. }
  357. return ctl;
  358. }
  359. static void pio_tx_frame_4byte_queue(struct b43_pio_txpacket *pack,
  360. const u8 *hdr, unsigned int hdrlen)
  361. {
  362. struct b43_pio_txqueue *q = pack->queue;
  363. const char *frame = pack->skb->data;
  364. unsigned int frame_len = pack->skb->len;
  365. u32 ctl;
  366. ctl = b43_piotx_read32(q, B43_PIO8_TXCTL);
  367. ctl |= B43_PIO8_TXCTL_FREADY;
  368. ctl &= ~B43_PIO8_TXCTL_EOF;
  369. /* Transfer the header data. */
  370. ctl = tx_write_4byte_queue(q, ctl, hdr, hdrlen);
  371. /* Transfer the frame data. */
  372. ctl = tx_write_4byte_queue(q, ctl, frame, frame_len);
  373. ctl |= B43_PIO8_TXCTL_EOF;
  374. b43_piotx_write32(q, B43_PIO_TXCTL, ctl);
  375. }
  376. static int pio_tx_frame(struct b43_pio_txqueue *q,
  377. struct sk_buff *skb)
  378. {
  379. struct b43_pio_txpacket *pack;
  380. struct b43_txhdr txhdr;
  381. u16 cookie;
  382. int err;
  383. unsigned int hdrlen;
  384. struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
  385. B43_WARN_ON(list_empty(&q->packets_list));
  386. pack = list_entry(q->packets_list.next,
  387. struct b43_pio_txpacket, list);
  388. cookie = generate_cookie(q, pack);
  389. hdrlen = b43_txhdr_size(q->dev);
  390. err = b43_generate_txhdr(q->dev, (u8 *)&txhdr, skb->data,
  391. skb->len, info, cookie);
  392. if (err)
  393. return err;
  394. if (info->flags & IEEE80211_TX_CTL_SEND_AFTER_DTIM) {
  395. /* Tell the firmware about the cookie of the last
  396. * mcast frame, so it can clear the more-data bit in it. */
  397. b43_shm_write16(q->dev, B43_SHM_SHARED,
  398. B43_SHM_SH_MCASTCOOKIE, cookie);
  399. }
  400. pack->skb = skb;
  401. if (q->rev >= 8)
  402. pio_tx_frame_4byte_queue(pack, (const u8 *)&txhdr, hdrlen);
  403. else
  404. pio_tx_frame_2byte_queue(pack, (const u8 *)&txhdr, hdrlen);
  405. /* Remove it from the list of available packet slots.
  406. * It will be put back when we receive the status report. */
  407. list_del(&pack->list);
  408. /* Update the queue statistics. */
  409. q->buffer_used += roundup(skb->len + hdrlen, 4);
  410. q->free_packet_slots -= 1;
  411. return 0;
  412. }
  413. int b43_pio_tx(struct b43_wldev *dev, struct sk_buff *skb)
  414. {
  415. struct b43_pio_txqueue *q;
  416. struct ieee80211_hdr *hdr;
  417. unsigned long flags;
  418. unsigned int hdrlen, total_len;
  419. int err = 0;
  420. struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
  421. hdr = (struct ieee80211_hdr *)skb->data;
  422. if (info->flags & IEEE80211_TX_CTL_SEND_AFTER_DTIM) {
  423. /* The multicast queue will be sent after the DTIM. */
  424. q = dev->pio.tx_queue_mcast;
  425. /* Set the frame More-Data bit. Ucode will clear it
  426. * for us on the last frame. */
  427. hdr->frame_control |= cpu_to_le16(IEEE80211_FCTL_MOREDATA);
  428. } else {
  429. /* Decide by priority where to put this frame. */
  430. q = select_queue_by_priority(dev, skb_get_queue_mapping(skb));
  431. }
  432. spin_lock_irqsave(&q->lock, flags);
  433. hdrlen = b43_txhdr_size(dev);
  434. total_len = roundup(skb->len + hdrlen, 4);
  435. if (unlikely(total_len > q->buffer_size)) {
  436. err = -ENOBUFS;
  437. b43dbg(dev->wl, "PIO: TX packet longer than queue.\n");
  438. goto out_unlock;
  439. }
  440. if (unlikely(q->free_packet_slots == 0)) {
  441. err = -ENOBUFS;
  442. b43warn(dev->wl, "PIO: TX packet overflow.\n");
  443. goto out_unlock;
  444. }
  445. B43_WARN_ON(q->buffer_used > q->buffer_size);
  446. if (total_len > (q->buffer_size - q->buffer_used)) {
  447. /* Not enough memory on the queue. */
  448. err = -EBUSY;
  449. ieee80211_stop_queue(dev->wl->hw, skb_get_queue_mapping(skb));
  450. q->stopped = 1;
  451. goto out_unlock;
  452. }
  453. /* Assign the queue number to the ring (if not already done before)
  454. * so TX status handling can use it. The mac80211-queue to b43-queue
  455. * mapping is static, so we don't need to store it per frame. */
  456. q->queue_prio = skb_get_queue_mapping(skb);
  457. err = pio_tx_frame(q, skb);
  458. if (unlikely(err == -ENOKEY)) {
  459. /* Drop this packet, as we don't have the encryption key
  460. * anymore and must not transmit it unencrypted. */
  461. dev_kfree_skb_any(skb);
  462. err = 0;
  463. goto out_unlock;
  464. }
  465. if (unlikely(err)) {
  466. b43err(dev->wl, "PIO transmission failure\n");
  467. goto out_unlock;
  468. }
  469. q->nr_tx_packets++;
  470. B43_WARN_ON(q->buffer_used > q->buffer_size);
  471. if (((q->buffer_size - q->buffer_used) < roundup(2 + 2 + 6, 4)) ||
  472. (q->free_packet_slots == 0)) {
  473. /* The queue is full. */
  474. ieee80211_stop_queue(dev->wl->hw, skb_get_queue_mapping(skb));
  475. q->stopped = 1;
  476. }
  477. out_unlock:
  478. spin_unlock_irqrestore(&q->lock, flags);
  479. return err;
  480. }
  481. /* Called with IRQs disabled. */
  482. void b43_pio_handle_txstatus(struct b43_wldev *dev,
  483. const struct b43_txstatus *status)
  484. {
  485. struct b43_pio_txqueue *q;
  486. struct b43_pio_txpacket *pack = NULL;
  487. unsigned int total_len;
  488. struct ieee80211_tx_info *info;
  489. q = parse_cookie(dev, status->cookie, &pack);
  490. if (unlikely(!q))
  491. return;
  492. B43_WARN_ON(!pack);
  493. spin_lock(&q->lock); /* IRQs are already disabled. */
  494. info = IEEE80211_SKB_CB(pack->skb);
  495. b43_fill_txstatus_report(dev, info, status);
  496. total_len = pack->skb->len + b43_txhdr_size(dev);
  497. total_len = roundup(total_len, 4);
  498. q->buffer_used -= total_len;
  499. q->free_packet_slots += 1;
  500. ieee80211_tx_status_irqsafe(dev->wl->hw, pack->skb);
  501. pack->skb = NULL;
  502. list_add(&pack->list, &q->packets_list);
  503. if (q->stopped) {
  504. ieee80211_wake_queue(dev->wl->hw, q->queue_prio);
  505. q->stopped = 0;
  506. }
  507. spin_unlock(&q->lock);
  508. }
  509. void b43_pio_get_tx_stats(struct b43_wldev *dev,
  510. struct ieee80211_tx_queue_stats *stats)
  511. {
  512. const int nr_queues = dev->wl->hw->queues;
  513. struct b43_pio_txqueue *q;
  514. unsigned long flags;
  515. int i;
  516. for (i = 0; i < nr_queues; i++) {
  517. q = select_queue_by_priority(dev, i);
  518. spin_lock_irqsave(&q->lock, flags);
  519. stats[i].len = B43_PIO_MAX_NR_TXPACKETS - q->free_packet_slots;
  520. stats[i].limit = B43_PIO_MAX_NR_TXPACKETS;
  521. stats[i].count = q->nr_tx_packets;
  522. spin_unlock_irqrestore(&q->lock, flags);
  523. }
  524. }
  525. /* Returns whether we should fetch another frame. */
  526. static bool pio_rx_frame(struct b43_pio_rxqueue *q)
  527. {
  528. struct b43_wldev *dev = q->dev;
  529. struct b43_rxhdr_fw4 rxhdr;
  530. u16 len;
  531. u32 macstat;
  532. unsigned int i, padding;
  533. struct sk_buff *skb;
  534. const char *err_msg = NULL;
  535. memset(&rxhdr, 0, sizeof(rxhdr));
  536. /* Check if we have data and wait for it to get ready. */
  537. if (q->rev >= 8) {
  538. u32 ctl;
  539. ctl = b43_piorx_read32(q, B43_PIO8_RXCTL);
  540. if (!(ctl & B43_PIO8_RXCTL_FRAMERDY))
  541. return 0;
  542. b43_piorx_write32(q, B43_PIO8_RXCTL,
  543. B43_PIO8_RXCTL_FRAMERDY);
  544. for (i = 0; i < 10; i++) {
  545. ctl = b43_piorx_read32(q, B43_PIO8_RXCTL);
  546. if (ctl & B43_PIO8_RXCTL_DATARDY)
  547. goto data_ready;
  548. udelay(10);
  549. }
  550. } else {
  551. u16 ctl;
  552. ctl = b43_piorx_read16(q, B43_PIO_RXCTL);
  553. if (!(ctl & B43_PIO_RXCTL_FRAMERDY))
  554. return 0;
  555. b43_piorx_write16(q, B43_PIO_RXCTL,
  556. B43_PIO_RXCTL_FRAMERDY);
  557. for (i = 0; i < 10; i++) {
  558. ctl = b43_piorx_read16(q, B43_PIO_RXCTL);
  559. if (ctl & B43_PIO_RXCTL_DATARDY)
  560. goto data_ready;
  561. udelay(10);
  562. }
  563. }
  564. b43dbg(q->dev->wl, "PIO RX timed out\n");
  565. return 1;
  566. data_ready:
  567. /* Get the preamble (RX header) */
  568. if (q->rev >= 8) {
  569. ssb_block_read(dev->dev, &rxhdr, sizeof(rxhdr),
  570. q->mmio_base + B43_PIO8_RXDATA,
  571. sizeof(u32));
  572. } else {
  573. ssb_block_read(dev->dev, &rxhdr, sizeof(rxhdr),
  574. q->mmio_base + B43_PIO_RXDATA,
  575. sizeof(u16));
  576. }
  577. /* Sanity checks. */
  578. len = le16_to_cpu(rxhdr.frame_len);
  579. if (unlikely(len > 0x700)) {
  580. err_msg = "len > 0x700";
  581. goto rx_error;
  582. }
  583. if (unlikely(len == 0)) {
  584. err_msg = "len == 0";
  585. goto rx_error;
  586. }
  587. macstat = le32_to_cpu(rxhdr.mac_status);
  588. if (macstat & B43_RX_MAC_FCSERR) {
  589. if (!(q->dev->wl->filter_flags & FIF_FCSFAIL)) {
  590. /* Drop frames with failed FCS. */
  591. err_msg = "Frame FCS error";
  592. goto rx_error;
  593. }
  594. }
  595. /* We always pad 2 bytes, as that's what upstream code expects
  596. * due to the RX-header being 30 bytes. In case the frame is
  597. * unaligned, we pad another 2 bytes. */
  598. padding = (macstat & B43_RX_MAC_PADDING) ? 2 : 0;
  599. skb = dev_alloc_skb(len + padding + 2);
  600. if (unlikely(!skb)) {
  601. err_msg = "Out of memory";
  602. goto rx_error;
  603. }
  604. skb_reserve(skb, 2);
  605. skb_put(skb, len + padding);
  606. if (q->rev >= 8) {
  607. ssb_block_read(dev->dev, skb->data + padding, (len & ~3),
  608. q->mmio_base + B43_PIO8_RXDATA,
  609. sizeof(u32));
  610. if (len & 3) {
  611. u32 value;
  612. char *data;
  613. /* Read the last few bytes. */
  614. value = b43_piorx_read32(q, B43_PIO8_RXDATA);
  615. data = &(skb->data[len + padding - 1]);
  616. switch (len & 3) {
  617. case 3:
  618. *data = (value >> 16);
  619. data--;
  620. case 2:
  621. *data = (value >> 8);
  622. data--;
  623. case 1:
  624. *data = value;
  625. }
  626. }
  627. } else {
  628. ssb_block_read(dev->dev, skb->data + padding, (len & ~1),
  629. q->mmio_base + B43_PIO_RXDATA,
  630. sizeof(u16));
  631. if (len & 1) {
  632. u16 value;
  633. /* Read the last byte. */
  634. value = b43_piorx_read16(q, B43_PIO_RXDATA);
  635. skb->data[len + padding - 1] = value;
  636. }
  637. }
  638. b43_rx(q->dev, skb, &rxhdr);
  639. return 1;
  640. rx_error:
  641. if (err_msg)
  642. b43dbg(q->dev->wl, "PIO RX error: %s\n", err_msg);
  643. b43_piorx_write16(q, B43_PIO_RXCTL, B43_PIO_RXCTL_DATARDY);
  644. return 1;
  645. }
  646. /* RX workqueue. We can sleep, yay! */
  647. static void b43_pio_rx_work(struct work_struct *work)
  648. {
  649. struct b43_pio_rxqueue *q = container_of(work, struct b43_pio_rxqueue,
  650. rx_work);
  651. unsigned int budget = 50;
  652. bool stop;
  653. do {
  654. spin_lock_irq(&q->lock);
  655. stop = (pio_rx_frame(q) == 0);
  656. spin_unlock_irq(&q->lock);
  657. cond_resched();
  658. if (stop)
  659. break;
  660. } while (--budget);
  661. }
  662. /* Called with IRQs disabled. */
  663. void b43_pio_rx(struct b43_pio_rxqueue *q)
  664. {
  665. /* Due to latency issues we must run the RX path in
  666. * a workqueue to be able to schedule between packets. */
  667. queue_work(q->dev->wl->hw->workqueue, &q->rx_work);
  668. }
  669. static void b43_pio_tx_suspend_queue(struct b43_pio_txqueue *q)
  670. {
  671. unsigned long flags;
  672. spin_lock_irqsave(&q->lock, flags);
  673. if (q->rev >= 8) {
  674. b43_piotx_write32(q, B43_PIO8_TXCTL,
  675. b43_piotx_read32(q, B43_PIO8_TXCTL)
  676. | B43_PIO8_TXCTL_SUSPREQ);
  677. } else {
  678. b43_piotx_write16(q, B43_PIO_TXCTL,
  679. b43_piotx_read16(q, B43_PIO_TXCTL)
  680. | B43_PIO_TXCTL_SUSPREQ);
  681. }
  682. spin_unlock_irqrestore(&q->lock, flags);
  683. }
  684. static void b43_pio_tx_resume_queue(struct b43_pio_txqueue *q)
  685. {
  686. unsigned long flags;
  687. spin_lock_irqsave(&q->lock, flags);
  688. if (q->rev >= 8) {
  689. b43_piotx_write32(q, B43_PIO8_TXCTL,
  690. b43_piotx_read32(q, B43_PIO8_TXCTL)
  691. & ~B43_PIO8_TXCTL_SUSPREQ);
  692. } else {
  693. b43_piotx_write16(q, B43_PIO_TXCTL,
  694. b43_piotx_read16(q, B43_PIO_TXCTL)
  695. & ~B43_PIO_TXCTL_SUSPREQ);
  696. }
  697. spin_unlock_irqrestore(&q->lock, flags);
  698. }
  699. void b43_pio_tx_suspend(struct b43_wldev *dev)
  700. {
  701. b43_power_saving_ctl_bits(dev, B43_PS_AWAKE);
  702. b43_pio_tx_suspend_queue(dev->pio.tx_queue_AC_BK);
  703. b43_pio_tx_suspend_queue(dev->pio.tx_queue_AC_BE);
  704. b43_pio_tx_suspend_queue(dev->pio.tx_queue_AC_VI);
  705. b43_pio_tx_suspend_queue(dev->pio.tx_queue_AC_VO);
  706. b43_pio_tx_suspend_queue(dev->pio.tx_queue_mcast);
  707. }
  708. void b43_pio_tx_resume(struct b43_wldev *dev)
  709. {
  710. b43_pio_tx_resume_queue(dev->pio.tx_queue_mcast);
  711. b43_pio_tx_resume_queue(dev->pio.tx_queue_AC_VO);
  712. b43_pio_tx_resume_queue(dev->pio.tx_queue_AC_VI);
  713. b43_pio_tx_resume_queue(dev->pio.tx_queue_AC_BE);
  714. b43_pio_tx_resume_queue(dev->pio.tx_queue_AC_BK);
  715. b43_power_saving_ctl_bits(dev, 0);
  716. }