n2.c 13 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567
  1. /*
  2. * SDL Inc. RISCom/N2 synchronous serial card driver for Linux
  3. *
  4. * Copyright (C) 1998-2003 Krzysztof Halasa <khc@pm.waw.pl>
  5. *
  6. * This program is free software; you can redistribute it and/or modify it
  7. * under the terms of version 2 of the GNU General Public License
  8. * as published by the Free Software Foundation.
  9. *
  10. * For information see <http://www.kernel.org/pub/linux/utils/net/hdlc/>
  11. *
  12. * Note: integrated CSU/DSU/DDS are not supported by this driver
  13. *
  14. * Sources of information:
  15. * Hitachi HD64570 SCA User's Manual
  16. * SDL Inc. PPP/HDLC/CISCO driver
  17. */
  18. #include <linux/module.h>
  19. #include <linux/kernel.h>
  20. #include <linux/slab.h>
  21. #include <linux/types.h>
  22. #include <linux/fcntl.h>
  23. #include <linux/in.h>
  24. #include <linux/string.h>
  25. #include <linux/errno.h>
  26. #include <linux/init.h>
  27. #include <linux/ioport.h>
  28. #include <linux/moduleparam.h>
  29. #include <linux/netdevice.h>
  30. #include <linux/hdlc.h>
  31. #include <asm/io.h>
  32. #include "hd64570.h"
  33. static const char* version = "SDL RISCom/N2 driver version: 1.15";
  34. static const char* devname = "RISCom/N2";
  35. #undef DEBUG_PKT
  36. #define DEBUG_RINGS
  37. #define USE_WINDOWSIZE 16384
  38. #define USE_BUS16BITS 1
  39. #define CLOCK_BASE 9830400 /* 9.8304 MHz */
  40. #define MAX_PAGES 16 /* 16 RAM pages at max */
  41. #define MAX_RAM_SIZE 0x80000 /* 512 KB */
  42. #if MAX_RAM_SIZE > MAX_PAGES * USE_WINDOWSIZE
  43. #undef MAX_RAM_SIZE
  44. #define MAX_RAM_SIZE (MAX_PAGES * USE_WINDOWSIZE)
  45. #endif
  46. #define N2_IOPORTS 0x10
  47. #define NEED_DETECT_RAM
  48. #define NEED_SCA_MSCI_INTR
  49. #define MAX_TX_BUFFERS 10
  50. static char *hw; /* pointer to hw=xxx command line string */
  51. /* RISCom/N2 Board Registers */
  52. /* PC Control Register */
  53. #define N2_PCR 0
  54. #define PCR_RUNSCA 1 /* Run 64570 */
  55. #define PCR_VPM 2 /* Enable VPM - needed if using RAM above 1 MB */
  56. #define PCR_ENWIN 4 /* Open window */
  57. #define PCR_BUS16 8 /* 16-bit bus */
  58. /* Memory Base Address Register */
  59. #define N2_BAR 2
  60. /* Page Scan Register */
  61. #define N2_PSR 4
  62. #define WIN16K 0x00
  63. #define WIN32K 0x20
  64. #define WIN64K 0x40
  65. #define PSR_WINBITS 0x60
  66. #define PSR_DMAEN 0x80
  67. #define PSR_PAGEBITS 0x0F
  68. /* Modem Control Reg */
  69. #define N2_MCR 6
  70. #define CLOCK_OUT_PORT1 0x80
  71. #define CLOCK_OUT_PORT0 0x40
  72. #define TX422_PORT1 0x20
  73. #define TX422_PORT0 0x10
  74. #define DSR_PORT1 0x08
  75. #define DSR_PORT0 0x04
  76. #define DTR_PORT1 0x02
  77. #define DTR_PORT0 0x01
  78. typedef struct port_s {
  79. struct net_device *dev;
  80. struct card_s *card;
  81. spinlock_t lock; /* TX lock */
  82. sync_serial_settings settings;
  83. int valid; /* port enabled */
  84. int rxpart; /* partial frame received, next frame invalid*/
  85. unsigned short encoding;
  86. unsigned short parity;
  87. u16 rxin; /* rx ring buffer 'in' pointer */
  88. u16 txin; /* tx ring buffer 'in' and 'last' pointers */
  89. u16 txlast;
  90. u8 rxs, txs, tmc; /* SCA registers */
  91. u8 phy_node; /* physical port # - 0 or 1 */
  92. u8 log_node; /* logical port # */
  93. }port_t;
  94. typedef struct card_s {
  95. u8 __iomem *winbase; /* ISA window base address */
  96. u32 phy_winbase; /* ISA physical base address */
  97. u32 ram_size; /* number of bytes */
  98. u16 io; /* IO Base address */
  99. u16 buff_offset; /* offset of first buffer of first channel */
  100. u16 rx_ring_buffers; /* number of buffers in a ring */
  101. u16 tx_ring_buffers;
  102. u8 irq; /* IRQ (3-15) */
  103. port_t ports[2];
  104. struct card_s *next_card;
  105. }card_t;
  106. static card_t *first_card;
  107. static card_t **new_card = &first_card;
  108. #define sca_reg(reg, card) (0x8000 | (card)->io | \
  109. ((reg) & 0x0F) | (((reg) & 0xF0) << 6))
  110. #define sca_in(reg, card) inb(sca_reg(reg, card))
  111. #define sca_out(value, reg, card) outb(value, sca_reg(reg, card))
  112. #define sca_inw(reg, card) inw(sca_reg(reg, card))
  113. #define sca_outw(value, reg, card) outw(value, sca_reg(reg, card))
  114. #define port_to_card(port) ((port)->card)
  115. #define log_node(port) ((port)->log_node)
  116. #define phy_node(port) ((port)->phy_node)
  117. #define winsize(card) (USE_WINDOWSIZE)
  118. #define winbase(card) ((card)->winbase)
  119. #define get_port(card, port) ((card)->ports[port].valid ? \
  120. &(card)->ports[port] : NULL)
  121. static __inline__ u8 sca_get_page(card_t *card)
  122. {
  123. return inb(card->io + N2_PSR) & PSR_PAGEBITS;
  124. }
  125. static __inline__ void openwin(card_t *card, u8 page)
  126. {
  127. u8 psr = inb(card->io + N2_PSR);
  128. outb((psr & ~PSR_PAGEBITS) | page, card->io + N2_PSR);
  129. }
  130. #include "hd64570.c"
  131. static void n2_set_iface(port_t *port)
  132. {
  133. card_t *card = port->card;
  134. int io = card->io;
  135. u8 mcr = inb(io + N2_MCR);
  136. u8 msci = get_msci(port);
  137. u8 rxs = port->rxs & CLK_BRG_MASK;
  138. u8 txs = port->txs & CLK_BRG_MASK;
  139. switch(port->settings.clock_type) {
  140. case CLOCK_INT:
  141. mcr |= port->phy_node ? CLOCK_OUT_PORT1 : CLOCK_OUT_PORT0;
  142. rxs |= CLK_BRG_RX; /* BRG output */
  143. txs |= CLK_RXCLK_TX; /* RX clock */
  144. break;
  145. case CLOCK_TXINT:
  146. mcr |= port->phy_node ? CLOCK_OUT_PORT1 : CLOCK_OUT_PORT0;
  147. rxs |= CLK_LINE_RX; /* RXC input */
  148. txs |= CLK_BRG_TX; /* BRG output */
  149. break;
  150. case CLOCK_TXFROMRX:
  151. mcr |= port->phy_node ? CLOCK_OUT_PORT1 : CLOCK_OUT_PORT0;
  152. rxs |= CLK_LINE_RX; /* RXC input */
  153. txs |= CLK_RXCLK_TX; /* RX clock */
  154. break;
  155. default: /* Clock EXTernal */
  156. mcr &= port->phy_node ? ~CLOCK_OUT_PORT1 : ~CLOCK_OUT_PORT0;
  157. rxs |= CLK_LINE_RX; /* RXC input */
  158. txs |= CLK_LINE_TX; /* TXC input */
  159. }
  160. outb(mcr, io + N2_MCR);
  161. port->rxs = rxs;
  162. port->txs = txs;
  163. sca_out(rxs, msci + RXS, card);
  164. sca_out(txs, msci + TXS, card);
  165. sca_set_port(port);
  166. }
  167. static int n2_open(struct net_device *dev)
  168. {
  169. port_t *port = dev_to_port(dev);
  170. int io = port->card->io;
  171. u8 mcr = inb(io + N2_MCR) | (port->phy_node ? TX422_PORT1:TX422_PORT0);
  172. int result;
  173. result = hdlc_open(dev);
  174. if (result)
  175. return result;
  176. mcr &= port->phy_node ? ~DTR_PORT1 : ~DTR_PORT0; /* set DTR ON */
  177. outb(mcr, io + N2_MCR);
  178. outb(inb(io + N2_PCR) | PCR_ENWIN, io + N2_PCR); /* open window */
  179. outb(inb(io + N2_PSR) | PSR_DMAEN, io + N2_PSR); /* enable dma */
  180. sca_open(dev);
  181. n2_set_iface(port);
  182. return 0;
  183. }
  184. static int n2_close(struct net_device *dev)
  185. {
  186. port_t *port = dev_to_port(dev);
  187. int io = port->card->io;
  188. u8 mcr = inb(io+N2_MCR) | (port->phy_node ? TX422_PORT1 : TX422_PORT0);
  189. sca_close(dev);
  190. mcr |= port->phy_node ? DTR_PORT1 : DTR_PORT0; /* set DTR OFF */
  191. outb(mcr, io + N2_MCR);
  192. hdlc_close(dev);
  193. return 0;
  194. }
  195. static int n2_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
  196. {
  197. const size_t size = sizeof(sync_serial_settings);
  198. sync_serial_settings new_line;
  199. sync_serial_settings __user *line = ifr->ifr_settings.ifs_ifsu.sync;
  200. port_t *port = dev_to_port(dev);
  201. #ifdef DEBUG_RINGS
  202. if (cmd == SIOCDEVPRIVATE) {
  203. sca_dump_rings(dev);
  204. return 0;
  205. }
  206. #endif
  207. if (cmd != SIOCWANDEV)
  208. return hdlc_ioctl(dev, ifr, cmd);
  209. switch(ifr->ifr_settings.type) {
  210. case IF_GET_IFACE:
  211. ifr->ifr_settings.type = IF_IFACE_SYNC_SERIAL;
  212. if (ifr->ifr_settings.size < size) {
  213. ifr->ifr_settings.size = size; /* data size wanted */
  214. return -ENOBUFS;
  215. }
  216. if (copy_to_user(line, &port->settings, size))
  217. return -EFAULT;
  218. return 0;
  219. case IF_IFACE_SYNC_SERIAL:
  220. if(!capable(CAP_NET_ADMIN))
  221. return -EPERM;
  222. if (copy_from_user(&new_line, line, size))
  223. return -EFAULT;
  224. if (new_line.clock_type != CLOCK_EXT &&
  225. new_line.clock_type != CLOCK_TXFROMRX &&
  226. new_line.clock_type != CLOCK_INT &&
  227. new_line.clock_type != CLOCK_TXINT)
  228. return -EINVAL; /* No such clock setting */
  229. if (new_line.loopback != 0 && new_line.loopback != 1)
  230. return -EINVAL;
  231. memcpy(&port->settings, &new_line, size); /* Update settings */
  232. n2_set_iface(port);
  233. return 0;
  234. default:
  235. return hdlc_ioctl(dev, ifr, cmd);
  236. }
  237. }
  238. static void n2_destroy_card(card_t *card)
  239. {
  240. int cnt;
  241. for (cnt = 0; cnt < 2; cnt++)
  242. if (card->ports[cnt].card) {
  243. struct net_device *dev = port_to_dev(&card->ports[cnt]);
  244. unregister_hdlc_device(dev);
  245. }
  246. if (card->irq)
  247. free_irq(card->irq, card);
  248. if (card->winbase) {
  249. iounmap(card->winbase);
  250. release_mem_region(card->phy_winbase, USE_WINDOWSIZE);
  251. }
  252. if (card->io)
  253. release_region(card->io, N2_IOPORTS);
  254. if (card->ports[0].dev)
  255. free_netdev(card->ports[0].dev);
  256. if (card->ports[1].dev)
  257. free_netdev(card->ports[1].dev);
  258. kfree(card);
  259. }
  260. static const struct net_device_ops n2_ops = {
  261. .ndo_open = n2_open,
  262. .ndo_stop = n2_close,
  263. .ndo_change_mtu = hdlc_change_mtu,
  264. .ndo_start_xmit = hdlc_start_xmit,
  265. .ndo_do_ioctl = n2_ioctl,
  266. };
  267. static int __init n2_run(unsigned long io, unsigned long irq,
  268. unsigned long winbase, long valid0, long valid1)
  269. {
  270. card_t *card;
  271. u8 cnt, pcr;
  272. int i;
  273. if (io < 0x200 || io > 0x3FF || (io % N2_IOPORTS) != 0) {
  274. printk(KERN_ERR "n2: invalid I/O port value\n");
  275. return -ENODEV;
  276. }
  277. if (irq < 3 || irq > 15 || irq == 6) /* FIXME */ {
  278. printk(KERN_ERR "n2: invalid IRQ value\n");
  279. return -ENODEV;
  280. }
  281. if (winbase < 0xA0000 || winbase > 0xFFFFF || (winbase & 0xFFF) != 0) {
  282. printk(KERN_ERR "n2: invalid RAM value\n");
  283. return -ENODEV;
  284. }
  285. card = kzalloc(sizeof(card_t), GFP_KERNEL);
  286. if (card == NULL) {
  287. printk(KERN_ERR "n2: unable to allocate memory\n");
  288. return -ENOBUFS;
  289. }
  290. card->ports[0].dev = alloc_hdlcdev(&card->ports[0]);
  291. card->ports[1].dev = alloc_hdlcdev(&card->ports[1]);
  292. if (!card->ports[0].dev || !card->ports[1].dev) {
  293. printk(KERN_ERR "n2: unable to allocate memory\n");
  294. n2_destroy_card(card);
  295. return -ENOMEM;
  296. }
  297. if (!request_region(io, N2_IOPORTS, devname)) {
  298. printk(KERN_ERR "n2: I/O port region in use\n");
  299. n2_destroy_card(card);
  300. return -EBUSY;
  301. }
  302. card->io = io;
  303. if (request_irq(irq, &sca_intr, 0, devname, card)) {
  304. printk(KERN_ERR "n2: could not allocate IRQ\n");
  305. n2_destroy_card(card);
  306. return(-EBUSY);
  307. }
  308. card->irq = irq;
  309. if (!request_mem_region(winbase, USE_WINDOWSIZE, devname)) {
  310. printk(KERN_ERR "n2: could not request RAM window\n");
  311. n2_destroy_card(card);
  312. return(-EBUSY);
  313. }
  314. card->phy_winbase = winbase;
  315. card->winbase = ioremap(winbase, USE_WINDOWSIZE);
  316. if (!card->winbase) {
  317. printk(KERN_ERR "n2: ioremap() failed\n");
  318. n2_destroy_card(card);
  319. return -EFAULT;
  320. }
  321. outb(0, io + N2_PCR);
  322. outb(winbase >> 12, io + N2_BAR);
  323. switch (USE_WINDOWSIZE) {
  324. case 16384:
  325. outb(WIN16K, io + N2_PSR);
  326. break;
  327. case 32768:
  328. outb(WIN32K, io + N2_PSR);
  329. break;
  330. case 65536:
  331. outb(WIN64K, io + N2_PSR);
  332. break;
  333. default:
  334. printk(KERN_ERR "n2: invalid window size\n");
  335. n2_destroy_card(card);
  336. return -ENODEV;
  337. }
  338. pcr = PCR_ENWIN | PCR_VPM | (USE_BUS16BITS ? PCR_BUS16 : 0);
  339. outb(pcr, io + N2_PCR);
  340. card->ram_size = sca_detect_ram(card, card->winbase, MAX_RAM_SIZE);
  341. /* number of TX + RX buffers for one port */
  342. i = card->ram_size / ((valid0 + valid1) * (sizeof(pkt_desc) +
  343. HDLC_MAX_MRU));
  344. card->tx_ring_buffers = min(i / 2, MAX_TX_BUFFERS);
  345. card->rx_ring_buffers = i - card->tx_ring_buffers;
  346. card->buff_offset = (valid0 + valid1) * sizeof(pkt_desc) *
  347. (card->tx_ring_buffers + card->rx_ring_buffers);
  348. printk(KERN_INFO "n2: RISCom/N2 %u KB RAM, IRQ%u, "
  349. "using %u TX + %u RX packets rings\n", card->ram_size / 1024,
  350. card->irq, card->tx_ring_buffers, card->rx_ring_buffers);
  351. if (card->tx_ring_buffers < 1) {
  352. printk(KERN_ERR "n2: RAM test failed\n");
  353. n2_destroy_card(card);
  354. return -EIO;
  355. }
  356. pcr |= PCR_RUNSCA; /* run SCA */
  357. outb(pcr, io + N2_PCR);
  358. outb(0, io + N2_MCR);
  359. sca_init(card, 0);
  360. for (cnt = 0; cnt < 2; cnt++) {
  361. port_t *port = &card->ports[cnt];
  362. struct net_device *dev = port_to_dev(port);
  363. hdlc_device *hdlc = dev_to_hdlc(dev);
  364. if ((cnt == 0 && !valid0) || (cnt == 1 && !valid1))
  365. continue;
  366. port->phy_node = cnt;
  367. port->valid = 1;
  368. if ((cnt == 1) && valid0)
  369. port->log_node = 1;
  370. spin_lock_init(&port->lock);
  371. dev->irq = irq;
  372. dev->mem_start = winbase;
  373. dev->mem_end = winbase + USE_WINDOWSIZE - 1;
  374. dev->tx_queue_len = 50;
  375. dev->netdev_ops = &n2_ops;
  376. hdlc->attach = sca_attach;
  377. hdlc->xmit = sca_xmit;
  378. port->settings.clock_type = CLOCK_EXT;
  379. port->card = card;
  380. if (register_hdlc_device(dev)) {
  381. printk(KERN_WARNING "n2: unable to register hdlc "
  382. "device\n");
  383. port->card = NULL;
  384. n2_destroy_card(card);
  385. return -ENOBUFS;
  386. }
  387. sca_init_port(port); /* Set up SCA memory */
  388. printk(KERN_INFO "%s: RISCom/N2 node %d\n",
  389. dev->name, port->phy_node);
  390. }
  391. *new_card = card;
  392. new_card = &card->next_card;
  393. return 0;
  394. }
  395. static int __init n2_init(void)
  396. {
  397. if (hw==NULL) {
  398. #ifdef MODULE
  399. printk(KERN_INFO "n2: no card initialized\n");
  400. #endif
  401. return -EINVAL; /* no parameters specified, abort */
  402. }
  403. printk(KERN_INFO "%s\n", version);
  404. do {
  405. unsigned long io, irq, ram;
  406. long valid[2] = { 0, 0 }; /* Default = both ports disabled */
  407. io = simple_strtoul(hw, &hw, 0);
  408. if (*hw++ != ',')
  409. break;
  410. irq = simple_strtoul(hw, &hw, 0);
  411. if (*hw++ != ',')
  412. break;
  413. ram = simple_strtoul(hw, &hw, 0);
  414. if (*hw++ != ',')
  415. break;
  416. while(1) {
  417. if (*hw == '0' && !valid[0])
  418. valid[0] = 1; /* Port 0 enabled */
  419. else if (*hw == '1' && !valid[1])
  420. valid[1] = 1; /* Port 1 enabled */
  421. else
  422. break;
  423. hw++;
  424. }
  425. if (!valid[0] && !valid[1])
  426. break; /* at least one port must be used */
  427. if (*hw == ':' || *hw == '\x0')
  428. n2_run(io, irq, ram, valid[0], valid[1]);
  429. if (*hw == '\x0')
  430. return first_card ? 0 : -EINVAL;
  431. }while(*hw++ == ':');
  432. printk(KERN_ERR "n2: invalid hardware parameters\n");
  433. return first_card ? 0 : -EINVAL;
  434. }
  435. static void __exit n2_cleanup(void)
  436. {
  437. card_t *card = first_card;
  438. while (card) {
  439. card_t *ptr = card;
  440. card = card->next_card;
  441. n2_destroy_card(ptr);
  442. }
  443. }
  444. module_init(n2_init);
  445. module_exit(n2_cleanup);
  446. MODULE_AUTHOR("Krzysztof Halasa <khc@pm.waw.pl>");
  447. MODULE_DESCRIPTION("RISCom/N2 serial port driver");
  448. MODULE_LICENSE("GPL v2");
  449. module_param(hw, charp, 0444);
  450. MODULE_PARM_DESC(hw, "io,irq,ram,ports:io,irq,...");