vxge-main.c 118 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800801802803804805806807808809810811812813814815816817818819820821822823824825826827828829830831832833834835836837838839840841842843844845846847848849850851852853854855856857858859860861862863864865866867868869870871872873874875876877878879880881882883884885886887888889890891892893894895896897898899900901902903904905906907908909910911912913914915916917918919920921922923924925926927928929930931932933934935936937938939940941942943944945946947948949950951952953954955956957958959960961962963964965966967968969970971972973974975976977978979980981982983984985986987988989990991992993994995996997998999100010011002100310041005100610071008100910101011101210131014101510161017101810191020102110221023102410251026102710281029103010311032103310341035103610371038103910401041104210431044104510461047104810491050105110521053105410551056105710581059106010611062106310641065106610671068106910701071107210731074107510761077107810791080108110821083108410851086108710881089109010911092109310941095109610971098109911001101110211031104110511061107110811091110111111121113111411151116111711181119112011211122112311241125112611271128112911301131113211331134113511361137113811391140114111421143114411451146114711481149115011511152115311541155115611571158115911601161116211631164116511661167116811691170117111721173117411751176117711781179118011811182118311841185118611871188118911901191119211931194119511961197119811991200120112021203120412051206120712081209121012111212121312141215121612171218121912201221122212231224122512261227122812291230123112321233123412351236123712381239124012411242124312441245124612471248124912501251125212531254125512561257125812591260126112621263126412651266126712681269127012711272127312741275127612771278127912801281128212831284128512861287128812891290129112921293129412951296129712981299130013011302130313041305130613071308130913101311131213131314131513161317131813191320132113221323132413251326132713281329133013311332133313341335133613371338133913401341134213431344134513461347134813491350135113521353135413551356135713581359136013611362136313641365136613671368136913701371137213731374137513761377137813791380138113821383138413851386138713881389139013911392139313941395139613971398139914001401140214031404140514061407140814091410141114121413141414151416141714181419142014211422142314241425142614271428142914301431143214331434143514361437143814391440144114421443144414451446144714481449145014511452145314541455145614571458145914601461146214631464146514661467146814691470147114721473147414751476147714781479148014811482148314841485148614871488148914901491149214931494149514961497149814991500150115021503150415051506150715081509151015111512151315141515151615171518151915201521152215231524152515261527152815291530153115321533153415351536153715381539154015411542154315441545154615471548154915501551155215531554155515561557155815591560156115621563156415651566156715681569157015711572157315741575157615771578157915801581158215831584158515861587158815891590159115921593159415951596159715981599160016011602160316041605160616071608160916101611161216131614161516161617161816191620162116221623162416251626162716281629163016311632163316341635163616371638163916401641164216431644164516461647164816491650165116521653165416551656165716581659166016611662166316641665166616671668166916701671167216731674167516761677167816791680168116821683168416851686168716881689169016911692169316941695169616971698169917001701170217031704170517061707170817091710171117121713171417151716171717181719172017211722172317241725172617271728172917301731173217331734173517361737173817391740174117421743174417451746174717481749175017511752175317541755175617571758175917601761176217631764176517661767176817691770177117721773177417751776177717781779178017811782178317841785178617871788178917901791179217931794179517961797179817991800180118021803180418051806180718081809181018111812181318141815181618171818181918201821182218231824182518261827182818291830183118321833183418351836183718381839184018411842184318441845184618471848184918501851185218531854185518561857185818591860186118621863186418651866186718681869187018711872187318741875187618771878187918801881188218831884188518861887188818891890189118921893189418951896189718981899190019011902190319041905190619071908190919101911191219131914191519161917191819191920192119221923192419251926192719281929193019311932193319341935193619371938193919401941194219431944194519461947194819491950195119521953195419551956195719581959196019611962196319641965196619671968196919701971197219731974197519761977197819791980198119821983198419851986198719881989199019911992199319941995199619971998199920002001200220032004200520062007200820092010201120122013201420152016201720182019202020212022202320242025202620272028202920302031203220332034203520362037203820392040204120422043204420452046204720482049205020512052205320542055205620572058205920602061206220632064206520662067206820692070207120722073207420752076207720782079208020812082208320842085208620872088208920902091209220932094209520962097209820992100210121022103210421052106210721082109211021112112211321142115211621172118211921202121212221232124212521262127212821292130213121322133213421352136213721382139214021412142214321442145214621472148214921502151215221532154215521562157215821592160216121622163216421652166216721682169217021712172217321742175217621772178217921802181218221832184218521862187218821892190219121922193219421952196219721982199220022012202220322042205220622072208220922102211221222132214221522162217221822192220222122222223222422252226222722282229223022312232223322342235223622372238223922402241224222432244224522462247224822492250225122522253225422552256225722582259226022612262226322642265226622672268226922702271227222732274227522762277227822792280228122822283228422852286228722882289229022912292229322942295229622972298229923002301230223032304230523062307230823092310231123122313231423152316231723182319232023212322232323242325232623272328232923302331233223332334233523362337233823392340234123422343234423452346234723482349235023512352235323542355235623572358235923602361236223632364236523662367236823692370237123722373237423752376237723782379238023812382238323842385238623872388238923902391239223932394239523962397239823992400240124022403240424052406240724082409241024112412241324142415241624172418241924202421242224232424242524262427242824292430243124322433243424352436243724382439244024412442244324442445244624472448244924502451245224532454245524562457245824592460246124622463246424652466246724682469247024712472247324742475247624772478247924802481248224832484248524862487248824892490249124922493249424952496249724982499250025012502250325042505250625072508250925102511251225132514251525162517251825192520252125222523252425252526252725282529253025312532253325342535253625372538253925402541254225432544254525462547254825492550255125522553255425552556255725582559256025612562256325642565256625672568256925702571257225732574257525762577257825792580258125822583258425852586258725882589259025912592259325942595259625972598259926002601260226032604260526062607260826092610261126122613261426152616261726182619262026212622262326242625262626272628262926302631263226332634263526362637263826392640264126422643264426452646264726482649265026512652265326542655265626572658265926602661266226632664266526662667266826692670267126722673267426752676267726782679268026812682268326842685268626872688268926902691269226932694269526962697269826992700270127022703270427052706270727082709271027112712271327142715271627172718271927202721272227232724272527262727272827292730273127322733273427352736273727382739274027412742274327442745274627472748274927502751275227532754275527562757275827592760276127622763276427652766276727682769277027712772277327742775277627772778277927802781278227832784278527862787278827892790279127922793279427952796279727982799280028012802280328042805280628072808280928102811281228132814281528162817281828192820282128222823282428252826282728282829283028312832283328342835283628372838283928402841284228432844284528462847284828492850285128522853285428552856285728582859286028612862286328642865286628672868286928702871287228732874287528762877287828792880288128822883288428852886288728882889289028912892289328942895289628972898289929002901290229032904290529062907290829092910291129122913291429152916291729182919292029212922292329242925292629272928292929302931293229332934293529362937293829392940294129422943294429452946294729482949295029512952295329542955295629572958295929602961296229632964296529662967296829692970297129722973297429752976297729782979298029812982298329842985298629872988298929902991299229932994299529962997299829993000300130023003300430053006300730083009301030113012301330143015301630173018301930203021302230233024302530263027302830293030303130323033303430353036303730383039304030413042304330443045304630473048304930503051305230533054305530563057305830593060306130623063306430653066306730683069307030713072307330743075307630773078307930803081308230833084308530863087308830893090309130923093309430953096309730983099310031013102310331043105310631073108310931103111311231133114311531163117311831193120312131223123312431253126312731283129313031313132313331343135313631373138313931403141314231433144314531463147314831493150315131523153315431553156315731583159316031613162316331643165316631673168316931703171317231733174317531763177317831793180318131823183318431853186318731883189319031913192319331943195319631973198319932003201320232033204320532063207320832093210321132123213321432153216321732183219322032213222322332243225322632273228322932303231323232333234323532363237323832393240324132423243324432453246324732483249325032513252325332543255325632573258325932603261326232633264326532663267326832693270327132723273327432753276327732783279328032813282328332843285328632873288328932903291329232933294329532963297329832993300330133023303330433053306330733083309331033113312331333143315331633173318331933203321332233233324332533263327332833293330333133323333333433353336333733383339334033413342334333443345334633473348334933503351335233533354335533563357335833593360336133623363336433653366336733683369337033713372337333743375337633773378337933803381338233833384338533863387338833893390339133923393339433953396339733983399340034013402340334043405340634073408340934103411341234133414341534163417341834193420342134223423342434253426342734283429343034313432343334343435343634373438343934403441344234433444344534463447344834493450345134523453345434553456345734583459346034613462346334643465346634673468346934703471347234733474347534763477347834793480348134823483348434853486348734883489349034913492349334943495349634973498349935003501350235033504350535063507350835093510351135123513351435153516351735183519352035213522352335243525352635273528352935303531353235333534353535363537353835393540354135423543354435453546354735483549355035513552355335543555355635573558355935603561356235633564356535663567356835693570357135723573357435753576357735783579358035813582358335843585358635873588358935903591359235933594359535963597359835993600360136023603360436053606360736083609361036113612361336143615361636173618361936203621362236233624362536263627362836293630363136323633363436353636363736383639364036413642364336443645364636473648364936503651365236533654365536563657365836593660366136623663366436653666366736683669367036713672367336743675367636773678367936803681368236833684368536863687368836893690369136923693369436953696369736983699370037013702370337043705370637073708370937103711371237133714371537163717371837193720372137223723372437253726372737283729373037313732373337343735373637373738373937403741374237433744374537463747374837493750375137523753375437553756375737583759376037613762376337643765376637673768376937703771377237733774377537763777377837793780378137823783378437853786378737883789379037913792379337943795379637973798379938003801380238033804380538063807380838093810381138123813381438153816381738183819382038213822382338243825382638273828382938303831383238333834383538363837383838393840384138423843384438453846384738483849385038513852385338543855385638573858385938603861386238633864386538663867386838693870387138723873387438753876387738783879388038813882388338843885388638873888388938903891389238933894389538963897389838993900390139023903390439053906390739083909391039113912391339143915391639173918391939203921392239233924392539263927392839293930393139323933393439353936393739383939394039413942394339443945394639473948394939503951395239533954395539563957395839593960396139623963396439653966396739683969397039713972397339743975397639773978397939803981398239833984398539863987398839893990399139923993399439953996399739983999400040014002400340044005400640074008400940104011401240134014401540164017401840194020402140224023402440254026402740284029403040314032403340344035403640374038403940404041404240434044404540464047404840494050405140524053405440554056405740584059406040614062406340644065406640674068406940704071407240734074407540764077407840794080408140824083408440854086408740884089409040914092409340944095409640974098409941004101410241034104410541064107410841094110411141124113411441154116411741184119412041214122412341244125412641274128412941304131413241334134413541364137413841394140414141424143414441454146414741484149415041514152415341544155415641574158415941604161416241634164416541664167416841694170417141724173417441754176417741784179418041814182418341844185418641874188418941904191419241934194419541964197419841994200420142024203420442054206420742084209421042114212421342144215421642174218421942204221422242234224422542264227422842294230423142324233423442354236423742384239424042414242424342444245424642474248424942504251425242534254425542564257425842594260426142624263426442654266426742684269427042714272427342744275427642774278427942804281428242834284428542864287428842894290429142924293429442954296429742984299430043014302430343044305430643074308430943104311431243134314431543164317431843194320432143224323432443254326432743284329433043314332433343344335433643374338433943404341434243434344434543464347434843494350435143524353435443554356435743584359436043614362436343644365436643674368436943704371437243734374437543764377437843794380438143824383438443854386438743884389439043914392439343944395439643974398439944004401440244034404440544064407440844094410441144124413441444154416441744184419442044214422442344244425442644274428442944304431443244334434443544364437443844394440444144424443444444454446444744484449445044514452445344544455445644574458445944604461446244634464446544664467446844694470447144724473447444754476447744784479448044814482448344844485448644874488448944904491449244934494449544964497449844994500450145024503
  1. /******************************************************************************
  2. * This software may be used and distributed according to the terms of
  3. * the GNU General Public License (GPL), incorporated herein by reference.
  4. * Drivers based on or derived from this code fall under the GPL and must
  5. * retain the authorship, copyright and license notice. This file is not
  6. * a complete program and may only be used when the entire operating
  7. * system is licensed under the GPL.
  8. * See the file COPYING in this distribution for more information.
  9. *
  10. * vxge-main.c: Driver for Neterion Inc's X3100 Series 10GbE PCIe I/O
  11. * Virtualized Server Adapter.
  12. * Copyright(c) 2002-2009 Neterion Inc.
  13. *
  14. * The module loadable parameters that are supported by the driver and a brief
  15. * explanation of all the variables:
  16. * vlan_tag_strip:
  17. * Strip VLAN Tag enable/disable. Instructs the device to remove
  18. * the VLAN tag from all received tagged frames that are not
  19. * replicated at the internal L2 switch.
  20. * 0 - Do not strip the VLAN tag.
  21. * 1 - Strip the VLAN tag.
  22. *
  23. * addr_learn_en:
  24. * Enable learning the mac address of the guest OS interface in
  25. * a virtualization environment.
  26. * 0 - DISABLE
  27. * 1 - ENABLE
  28. *
  29. * max_config_port:
  30. * Maximum number of port to be supported.
  31. * MIN -1 and MAX - 2
  32. *
  33. * max_config_vpath:
  34. * This configures the maximum no of VPATH configures for each
  35. * device function.
  36. * MIN - 1 and MAX - 17
  37. *
  38. * max_config_dev:
  39. * This configures maximum no of Device function to be enabled.
  40. * MIN - 1 and MAX - 17
  41. *
  42. ******************************************************************************/
  43. #include <linux/if_vlan.h>
  44. #include <linux/pci.h>
  45. #include <linux/tcp.h>
  46. #include <net/ip.h>
  47. #include <linux/netdevice.h>
  48. #include <linux/etherdevice.h>
  49. #include "vxge-main.h"
  50. #include "vxge-reg.h"
  51. MODULE_LICENSE("Dual BSD/GPL");
  52. MODULE_DESCRIPTION("Neterion's X3100 Series 10GbE PCIe I/O"
  53. "Virtualized Server Adapter");
  54. static struct pci_device_id vxge_id_table[] __devinitdata = {
  55. {PCI_VENDOR_ID_S2IO, PCI_DEVICE_ID_TITAN_WIN, PCI_ANY_ID,
  56. PCI_ANY_ID},
  57. {PCI_VENDOR_ID_S2IO, PCI_DEVICE_ID_TITAN_UNI, PCI_ANY_ID,
  58. PCI_ANY_ID},
  59. {0}
  60. };
  61. MODULE_DEVICE_TABLE(pci, vxge_id_table);
  62. VXGE_MODULE_PARAM_INT(vlan_tag_strip, VXGE_HW_VPATH_RPA_STRIP_VLAN_TAG_ENABLE);
  63. VXGE_MODULE_PARAM_INT(addr_learn_en, VXGE_HW_MAC_ADDR_LEARN_DEFAULT);
  64. VXGE_MODULE_PARAM_INT(max_config_port, VXGE_MAX_CONFIG_PORT);
  65. VXGE_MODULE_PARAM_INT(max_config_vpath, VXGE_USE_DEFAULT);
  66. VXGE_MODULE_PARAM_INT(max_mac_vpath, VXGE_MAX_MAC_ADDR_COUNT);
  67. VXGE_MODULE_PARAM_INT(max_config_dev, VXGE_MAX_CONFIG_DEV);
  68. static u16 vpath_selector[VXGE_HW_MAX_VIRTUAL_PATHS] =
  69. {0, 1, 3, 3, 7, 7, 7, 7, 15, 15, 15, 15, 15, 15, 15, 15, 31};
  70. static unsigned int bw_percentage[VXGE_HW_MAX_VIRTUAL_PATHS] =
  71. {[0 ...(VXGE_HW_MAX_VIRTUAL_PATHS - 1)] = 0xFF};
  72. module_param_array(bw_percentage, uint, NULL, 0);
  73. static struct vxge_drv_config *driver_config;
  74. static inline int is_vxge_card_up(struct vxgedev *vdev)
  75. {
  76. return test_bit(__VXGE_STATE_CARD_UP, &vdev->state);
  77. }
  78. static inline void VXGE_COMPLETE_VPATH_TX(struct vxge_fifo *fifo)
  79. {
  80. unsigned long flags = 0;
  81. struct sk_buff *skb_ptr = NULL;
  82. struct sk_buff **temp, *head, *skb;
  83. if (spin_trylock_irqsave(&fifo->tx_lock, flags)) {
  84. vxge_hw_vpath_poll_tx(fifo->handle, (void **)&skb_ptr);
  85. spin_unlock_irqrestore(&fifo->tx_lock, flags);
  86. }
  87. /* free SKBs */
  88. head = skb_ptr;
  89. while (head) {
  90. skb = head;
  91. temp = (struct sk_buff **)&skb->cb;
  92. head = *temp;
  93. *temp = NULL;
  94. dev_kfree_skb_irq(skb);
  95. }
  96. }
  97. static inline void VXGE_COMPLETE_ALL_TX(struct vxgedev *vdev)
  98. {
  99. int i;
  100. /* Complete all transmits */
  101. for (i = 0; i < vdev->no_of_vpath; i++)
  102. VXGE_COMPLETE_VPATH_TX(&vdev->vpaths[i].fifo);
  103. }
  104. static inline void VXGE_COMPLETE_ALL_RX(struct vxgedev *vdev)
  105. {
  106. int i;
  107. struct vxge_ring *ring;
  108. /* Complete all receives*/
  109. for (i = 0; i < vdev->no_of_vpath; i++) {
  110. ring = &vdev->vpaths[i].ring;
  111. vxge_hw_vpath_poll_rx(ring->handle);
  112. }
  113. }
  114. /*
  115. * MultiQ manipulation helper functions
  116. */
  117. void vxge_stop_all_tx_queue(struct vxgedev *vdev)
  118. {
  119. int i;
  120. struct net_device *dev = vdev->ndev;
  121. if (vdev->config.tx_steering_type != TX_MULTIQ_STEERING) {
  122. for (i = 0; i < vdev->no_of_vpath; i++)
  123. vdev->vpaths[i].fifo.queue_state = VPATH_QUEUE_STOP;
  124. }
  125. netif_tx_stop_all_queues(dev);
  126. }
  127. void vxge_stop_tx_queue(struct vxge_fifo *fifo)
  128. {
  129. struct net_device *dev = fifo->ndev;
  130. struct netdev_queue *txq = NULL;
  131. if (fifo->tx_steering_type == TX_MULTIQ_STEERING)
  132. txq = netdev_get_tx_queue(dev, fifo->driver_id);
  133. else {
  134. txq = netdev_get_tx_queue(dev, 0);
  135. fifo->queue_state = VPATH_QUEUE_STOP;
  136. }
  137. netif_tx_stop_queue(txq);
  138. }
  139. void vxge_start_all_tx_queue(struct vxgedev *vdev)
  140. {
  141. int i;
  142. struct net_device *dev = vdev->ndev;
  143. if (vdev->config.tx_steering_type != TX_MULTIQ_STEERING) {
  144. for (i = 0; i < vdev->no_of_vpath; i++)
  145. vdev->vpaths[i].fifo.queue_state = VPATH_QUEUE_START;
  146. }
  147. netif_tx_start_all_queues(dev);
  148. }
  149. static void vxge_wake_all_tx_queue(struct vxgedev *vdev)
  150. {
  151. int i;
  152. struct net_device *dev = vdev->ndev;
  153. if (vdev->config.tx_steering_type != TX_MULTIQ_STEERING) {
  154. for (i = 0; i < vdev->no_of_vpath; i++)
  155. vdev->vpaths[i].fifo.queue_state = VPATH_QUEUE_START;
  156. }
  157. netif_tx_wake_all_queues(dev);
  158. }
  159. void vxge_wake_tx_queue(struct vxge_fifo *fifo, struct sk_buff *skb)
  160. {
  161. struct net_device *dev = fifo->ndev;
  162. int vpath_no = fifo->driver_id;
  163. struct netdev_queue *txq = NULL;
  164. if (fifo->tx_steering_type == TX_MULTIQ_STEERING) {
  165. txq = netdev_get_tx_queue(dev, vpath_no);
  166. if (netif_tx_queue_stopped(txq))
  167. netif_tx_wake_queue(txq);
  168. } else {
  169. txq = netdev_get_tx_queue(dev, 0);
  170. if (fifo->queue_state == VPATH_QUEUE_STOP)
  171. if (netif_tx_queue_stopped(txq)) {
  172. fifo->queue_state = VPATH_QUEUE_START;
  173. netif_tx_wake_queue(txq);
  174. }
  175. }
  176. }
  177. /*
  178. * vxge_callback_link_up
  179. *
  180. * This function is called during interrupt context to notify link up state
  181. * change.
  182. */
  183. void
  184. vxge_callback_link_up(struct __vxge_hw_device *hldev)
  185. {
  186. struct net_device *dev = hldev->ndev;
  187. struct vxgedev *vdev = (struct vxgedev *)netdev_priv(dev);
  188. vxge_debug_entryexit(VXGE_TRACE, "%s: %s:%d",
  189. vdev->ndev->name, __func__, __LINE__);
  190. printk(KERN_NOTICE "%s: Link Up\n", vdev->ndev->name);
  191. vdev->stats.link_up++;
  192. netif_carrier_on(vdev->ndev);
  193. vxge_wake_all_tx_queue(vdev);
  194. vxge_debug_entryexit(VXGE_TRACE,
  195. "%s: %s:%d Exiting...", vdev->ndev->name, __func__, __LINE__);
  196. }
  197. /*
  198. * vxge_callback_link_down
  199. *
  200. * This function is called during interrupt context to notify link down state
  201. * change.
  202. */
  203. void
  204. vxge_callback_link_down(struct __vxge_hw_device *hldev)
  205. {
  206. struct net_device *dev = hldev->ndev;
  207. struct vxgedev *vdev = (struct vxgedev *)netdev_priv(dev);
  208. vxge_debug_entryexit(VXGE_TRACE,
  209. "%s: %s:%d", vdev->ndev->name, __func__, __LINE__);
  210. printk(KERN_NOTICE "%s: Link Down\n", vdev->ndev->name);
  211. vdev->stats.link_down++;
  212. netif_carrier_off(vdev->ndev);
  213. vxge_stop_all_tx_queue(vdev);
  214. vxge_debug_entryexit(VXGE_TRACE,
  215. "%s: %s:%d Exiting...", vdev->ndev->name, __func__, __LINE__);
  216. }
  217. /*
  218. * vxge_rx_alloc
  219. *
  220. * Allocate SKB.
  221. */
  222. static struct sk_buff*
  223. vxge_rx_alloc(void *dtrh, struct vxge_ring *ring, const int skb_size)
  224. {
  225. struct net_device *dev;
  226. struct sk_buff *skb;
  227. struct vxge_rx_priv *rx_priv;
  228. dev = ring->ndev;
  229. vxge_debug_entryexit(VXGE_TRACE, "%s: %s:%d",
  230. ring->ndev->name, __func__, __LINE__);
  231. rx_priv = vxge_hw_ring_rxd_private_get(dtrh);
  232. /* try to allocate skb first. this one may fail */
  233. skb = netdev_alloc_skb(dev, skb_size +
  234. VXGE_HW_HEADER_ETHERNET_II_802_3_ALIGN);
  235. if (skb == NULL) {
  236. vxge_debug_mem(VXGE_ERR,
  237. "%s: out of memory to allocate SKB", dev->name);
  238. ring->stats.skb_alloc_fail++;
  239. return NULL;
  240. }
  241. vxge_debug_mem(VXGE_TRACE,
  242. "%s: %s:%d Skb : 0x%p", ring->ndev->name,
  243. __func__, __LINE__, skb);
  244. skb_reserve(skb, VXGE_HW_HEADER_ETHERNET_II_802_3_ALIGN);
  245. rx_priv->skb = skb;
  246. rx_priv->data_size = skb_size;
  247. vxge_debug_entryexit(VXGE_TRACE,
  248. "%s: %s:%d Exiting...", ring->ndev->name, __func__, __LINE__);
  249. return skb;
  250. }
  251. /*
  252. * vxge_rx_map
  253. */
  254. static int vxge_rx_map(void *dtrh, struct vxge_ring *ring)
  255. {
  256. struct vxge_rx_priv *rx_priv;
  257. dma_addr_t dma_addr;
  258. vxge_debug_entryexit(VXGE_TRACE, "%s: %s:%d",
  259. ring->ndev->name, __func__, __LINE__);
  260. rx_priv = vxge_hw_ring_rxd_private_get(dtrh);
  261. dma_addr = pci_map_single(ring->pdev, rx_priv->skb->data,
  262. rx_priv->data_size, PCI_DMA_FROMDEVICE);
  263. if (dma_addr == 0) {
  264. ring->stats.pci_map_fail++;
  265. return -EIO;
  266. }
  267. vxge_debug_mem(VXGE_TRACE,
  268. "%s: %s:%d 1 buffer mode dma_addr = 0x%llx",
  269. ring->ndev->name, __func__, __LINE__,
  270. (unsigned long long)dma_addr);
  271. vxge_hw_ring_rxd_1b_set(dtrh, dma_addr, rx_priv->data_size);
  272. rx_priv->data_dma = dma_addr;
  273. vxge_debug_entryexit(VXGE_TRACE,
  274. "%s: %s:%d Exiting...", ring->ndev->name, __func__, __LINE__);
  275. return 0;
  276. }
  277. /*
  278. * vxge_rx_initial_replenish
  279. * Allocation of RxD as an initial replenish procedure.
  280. */
  281. static enum vxge_hw_status
  282. vxge_rx_initial_replenish(void *dtrh, void *userdata)
  283. {
  284. struct vxge_ring *ring = (struct vxge_ring *)userdata;
  285. struct vxge_rx_priv *rx_priv;
  286. vxge_debug_entryexit(VXGE_TRACE, "%s: %s:%d",
  287. ring->ndev->name, __func__, __LINE__);
  288. if (vxge_rx_alloc(dtrh, ring,
  289. VXGE_LL_MAX_FRAME_SIZE(ring->ndev)) == NULL)
  290. return VXGE_HW_FAIL;
  291. if (vxge_rx_map(dtrh, ring)) {
  292. rx_priv = vxge_hw_ring_rxd_private_get(dtrh);
  293. dev_kfree_skb(rx_priv->skb);
  294. return VXGE_HW_FAIL;
  295. }
  296. vxge_debug_entryexit(VXGE_TRACE,
  297. "%s: %s:%d Exiting...", ring->ndev->name, __func__, __LINE__);
  298. return VXGE_HW_OK;
  299. }
  300. static inline void
  301. vxge_rx_complete(struct vxge_ring *ring, struct sk_buff *skb, u16 vlan,
  302. int pkt_length, struct vxge_hw_ring_rxd_info *ext_info)
  303. {
  304. vxge_debug_entryexit(VXGE_TRACE, "%s: %s:%d",
  305. ring->ndev->name, __func__, __LINE__);
  306. skb_record_rx_queue(skb, ring->driver_id);
  307. skb->protocol = eth_type_trans(skb, ring->ndev);
  308. ring->stats.rx_frms++;
  309. ring->stats.rx_bytes += pkt_length;
  310. if (skb->pkt_type == PACKET_MULTICAST)
  311. ring->stats.rx_mcast++;
  312. vxge_debug_rx(VXGE_TRACE,
  313. "%s: %s:%d skb protocol = %d",
  314. ring->ndev->name, __func__, __LINE__, skb->protocol);
  315. if (ring->gro_enable) {
  316. if (ring->vlgrp && ext_info->vlan &&
  317. (ring->vlan_tag_strip ==
  318. VXGE_HW_VPATH_RPA_STRIP_VLAN_TAG_ENABLE))
  319. vlan_gro_receive(&ring->napi, ring->vlgrp,
  320. ext_info->vlan, skb);
  321. else
  322. napi_gro_receive(&ring->napi, skb);
  323. } else {
  324. if (ring->vlgrp && vlan &&
  325. (ring->vlan_tag_strip ==
  326. VXGE_HW_VPATH_RPA_STRIP_VLAN_TAG_ENABLE))
  327. vlan_hwaccel_receive_skb(skb, ring->vlgrp, vlan);
  328. else
  329. netif_receive_skb(skb);
  330. }
  331. vxge_debug_entryexit(VXGE_TRACE,
  332. "%s: %s:%d Exiting...", ring->ndev->name, __func__, __LINE__);
  333. }
  334. static inline void vxge_re_pre_post(void *dtr, struct vxge_ring *ring,
  335. struct vxge_rx_priv *rx_priv)
  336. {
  337. pci_dma_sync_single_for_device(ring->pdev,
  338. rx_priv->data_dma, rx_priv->data_size, PCI_DMA_FROMDEVICE);
  339. vxge_hw_ring_rxd_1b_set(dtr, rx_priv->data_dma, rx_priv->data_size);
  340. vxge_hw_ring_rxd_pre_post(ring->handle, dtr);
  341. }
  342. static inline void vxge_post(int *dtr_cnt, void **first_dtr,
  343. void *post_dtr, struct __vxge_hw_ring *ringh)
  344. {
  345. int dtr_count = *dtr_cnt;
  346. if ((*dtr_cnt % VXGE_HW_RXSYNC_FREQ_CNT) == 0) {
  347. if (*first_dtr)
  348. vxge_hw_ring_rxd_post_post_wmb(ringh, *first_dtr);
  349. *first_dtr = post_dtr;
  350. } else
  351. vxge_hw_ring_rxd_post_post(ringh, post_dtr);
  352. dtr_count++;
  353. *dtr_cnt = dtr_count;
  354. }
  355. /*
  356. * vxge_rx_1b_compl
  357. *
  358. * If the interrupt is because of a received frame or if the receive ring
  359. * contains fresh as yet un-processed frames, this function is called.
  360. */
  361. enum vxge_hw_status
  362. vxge_rx_1b_compl(struct __vxge_hw_ring *ringh, void *dtr,
  363. u8 t_code, void *userdata)
  364. {
  365. struct vxge_ring *ring = (struct vxge_ring *)userdata;
  366. struct net_device *dev = ring->ndev;
  367. unsigned int dma_sizes;
  368. void *first_dtr = NULL;
  369. int dtr_cnt = 0;
  370. int data_size;
  371. dma_addr_t data_dma;
  372. int pkt_length;
  373. struct sk_buff *skb;
  374. struct vxge_rx_priv *rx_priv;
  375. struct vxge_hw_ring_rxd_info ext_info;
  376. vxge_debug_entryexit(VXGE_TRACE, "%s: %s:%d",
  377. ring->ndev->name, __func__, __LINE__);
  378. ring->pkts_processed = 0;
  379. vxge_hw_ring_replenish(ringh, 0);
  380. do {
  381. rx_priv = vxge_hw_ring_rxd_private_get(dtr);
  382. skb = rx_priv->skb;
  383. data_size = rx_priv->data_size;
  384. data_dma = rx_priv->data_dma;
  385. vxge_debug_rx(VXGE_TRACE,
  386. "%s: %s:%d skb = 0x%p",
  387. ring->ndev->name, __func__, __LINE__, skb);
  388. vxge_hw_ring_rxd_1b_get(ringh, dtr, &dma_sizes);
  389. pkt_length = dma_sizes;
  390. vxge_debug_rx(VXGE_TRACE,
  391. "%s: %s:%d Packet Length = %d",
  392. ring->ndev->name, __func__, __LINE__, pkt_length);
  393. vxge_hw_ring_rxd_1b_info_get(ringh, dtr, &ext_info);
  394. /* check skb validity */
  395. vxge_assert(skb);
  396. prefetch((char *)skb + L1_CACHE_BYTES);
  397. if (unlikely(t_code)) {
  398. if (vxge_hw_ring_handle_tcode(ringh, dtr, t_code) !=
  399. VXGE_HW_OK) {
  400. ring->stats.rx_errors++;
  401. vxge_debug_rx(VXGE_TRACE,
  402. "%s: %s :%d Rx T_code is %d",
  403. ring->ndev->name, __func__,
  404. __LINE__, t_code);
  405. /* If the t_code is not supported and if the
  406. * t_code is other than 0x5 (unparseable packet
  407. * such as unknown UPV6 header), Drop it !!!
  408. */
  409. vxge_re_pre_post(dtr, ring, rx_priv);
  410. vxge_post(&dtr_cnt, &first_dtr, dtr, ringh);
  411. ring->stats.rx_dropped++;
  412. continue;
  413. }
  414. }
  415. if (pkt_length > VXGE_LL_RX_COPY_THRESHOLD) {
  416. if (vxge_rx_alloc(dtr, ring, data_size) != NULL) {
  417. if (!vxge_rx_map(dtr, ring)) {
  418. skb_put(skb, pkt_length);
  419. pci_unmap_single(ring->pdev, data_dma,
  420. data_size, PCI_DMA_FROMDEVICE);
  421. vxge_hw_ring_rxd_pre_post(ringh, dtr);
  422. vxge_post(&dtr_cnt, &first_dtr, dtr,
  423. ringh);
  424. } else {
  425. dev_kfree_skb(rx_priv->skb);
  426. rx_priv->skb = skb;
  427. rx_priv->data_size = data_size;
  428. vxge_re_pre_post(dtr, ring, rx_priv);
  429. vxge_post(&dtr_cnt, &first_dtr, dtr,
  430. ringh);
  431. ring->stats.rx_dropped++;
  432. break;
  433. }
  434. } else {
  435. vxge_re_pre_post(dtr, ring, rx_priv);
  436. vxge_post(&dtr_cnt, &first_dtr, dtr, ringh);
  437. ring->stats.rx_dropped++;
  438. break;
  439. }
  440. } else {
  441. struct sk_buff *skb_up;
  442. skb_up = netdev_alloc_skb(dev, pkt_length +
  443. VXGE_HW_HEADER_ETHERNET_II_802_3_ALIGN);
  444. if (skb_up != NULL) {
  445. skb_reserve(skb_up,
  446. VXGE_HW_HEADER_ETHERNET_II_802_3_ALIGN);
  447. pci_dma_sync_single_for_cpu(ring->pdev,
  448. data_dma, data_size,
  449. PCI_DMA_FROMDEVICE);
  450. vxge_debug_mem(VXGE_TRACE,
  451. "%s: %s:%d skb_up = %p",
  452. ring->ndev->name, __func__,
  453. __LINE__, skb);
  454. memcpy(skb_up->data, skb->data, pkt_length);
  455. vxge_re_pre_post(dtr, ring, rx_priv);
  456. vxge_post(&dtr_cnt, &first_dtr, dtr,
  457. ringh);
  458. /* will netif_rx small SKB instead */
  459. skb = skb_up;
  460. skb_put(skb, pkt_length);
  461. } else {
  462. vxge_re_pre_post(dtr, ring, rx_priv);
  463. vxge_post(&dtr_cnt, &first_dtr, dtr, ringh);
  464. vxge_debug_rx(VXGE_ERR,
  465. "%s: vxge_rx_1b_compl: out of "
  466. "memory", dev->name);
  467. ring->stats.skb_alloc_fail++;
  468. break;
  469. }
  470. }
  471. if ((ext_info.proto & VXGE_HW_FRAME_PROTO_TCP_OR_UDP) &&
  472. !(ext_info.proto & VXGE_HW_FRAME_PROTO_IP_FRAG) &&
  473. ring->rx_csum && /* Offload Rx side CSUM */
  474. ext_info.l3_cksum == VXGE_HW_L3_CKSUM_OK &&
  475. ext_info.l4_cksum == VXGE_HW_L4_CKSUM_OK)
  476. skb->ip_summed = CHECKSUM_UNNECESSARY;
  477. else
  478. skb->ip_summed = CHECKSUM_NONE;
  479. vxge_rx_complete(ring, skb, ext_info.vlan,
  480. pkt_length, &ext_info);
  481. ring->budget--;
  482. ring->pkts_processed++;
  483. if (!ring->budget)
  484. break;
  485. } while (vxge_hw_ring_rxd_next_completed(ringh, &dtr,
  486. &t_code) == VXGE_HW_OK);
  487. if (first_dtr)
  488. vxge_hw_ring_rxd_post_post_wmb(ringh, first_dtr);
  489. dev->last_rx = jiffies;
  490. vxge_debug_entryexit(VXGE_TRACE,
  491. "%s:%d Exiting...",
  492. __func__, __LINE__);
  493. return VXGE_HW_OK;
  494. }
  495. /*
  496. * vxge_xmit_compl
  497. *
  498. * If an interrupt was raised to indicate DMA complete of the Tx packet,
  499. * this function is called. It identifies the last TxD whose buffer was
  500. * freed and frees all skbs whose data have already DMA'ed into the NICs
  501. * internal memory.
  502. */
  503. enum vxge_hw_status
  504. vxge_xmit_compl(struct __vxge_hw_fifo *fifo_hw, void *dtr,
  505. enum vxge_hw_fifo_tcode t_code, void *userdata,
  506. void **skb_ptr)
  507. {
  508. struct vxge_fifo *fifo = (struct vxge_fifo *)userdata;
  509. struct sk_buff *skb, *head = NULL;
  510. struct sk_buff **temp;
  511. int pkt_cnt = 0;
  512. vxge_debug_entryexit(VXGE_TRACE,
  513. "%s:%d Entered....", __func__, __LINE__);
  514. do {
  515. int frg_cnt;
  516. skb_frag_t *frag;
  517. int i = 0, j;
  518. struct vxge_tx_priv *txd_priv =
  519. vxge_hw_fifo_txdl_private_get(dtr);
  520. skb = txd_priv->skb;
  521. frg_cnt = skb_shinfo(skb)->nr_frags;
  522. frag = &skb_shinfo(skb)->frags[0];
  523. vxge_debug_tx(VXGE_TRACE,
  524. "%s: %s:%d fifo_hw = %p dtr = %p "
  525. "tcode = 0x%x", fifo->ndev->name, __func__,
  526. __LINE__, fifo_hw, dtr, t_code);
  527. /* check skb validity */
  528. vxge_assert(skb);
  529. vxge_debug_tx(VXGE_TRACE,
  530. "%s: %s:%d skb = %p itxd_priv = %p frg_cnt = %d",
  531. fifo->ndev->name, __func__, __LINE__,
  532. skb, txd_priv, frg_cnt);
  533. if (unlikely(t_code)) {
  534. fifo->stats.tx_errors++;
  535. vxge_debug_tx(VXGE_ERR,
  536. "%s: tx: dtr %p completed due to "
  537. "error t_code %01x", fifo->ndev->name,
  538. dtr, t_code);
  539. vxge_hw_fifo_handle_tcode(fifo_hw, dtr, t_code);
  540. }
  541. /* for unfragmented skb */
  542. pci_unmap_single(fifo->pdev, txd_priv->dma_buffers[i++],
  543. skb_headlen(skb), PCI_DMA_TODEVICE);
  544. for (j = 0; j < frg_cnt; j++) {
  545. pci_unmap_page(fifo->pdev,
  546. txd_priv->dma_buffers[i++],
  547. frag->size, PCI_DMA_TODEVICE);
  548. frag += 1;
  549. }
  550. vxge_hw_fifo_txdl_free(fifo_hw, dtr);
  551. /* Updating the statistics block */
  552. fifo->stats.tx_frms++;
  553. fifo->stats.tx_bytes += skb->len;
  554. temp = (struct sk_buff **)&skb->cb;
  555. *temp = head;
  556. head = skb;
  557. pkt_cnt++;
  558. if (pkt_cnt > fifo->indicate_max_pkts)
  559. break;
  560. } while (vxge_hw_fifo_txdl_next_completed(fifo_hw,
  561. &dtr, &t_code) == VXGE_HW_OK);
  562. vxge_wake_tx_queue(fifo, skb);
  563. if (skb_ptr)
  564. *skb_ptr = (void *) head;
  565. vxge_debug_entryexit(VXGE_TRACE,
  566. "%s: %s:%d Exiting...",
  567. fifo->ndev->name, __func__, __LINE__);
  568. return VXGE_HW_OK;
  569. }
  570. /* select a vpath to trasmit the packet */
  571. static u32 vxge_get_vpath_no(struct vxgedev *vdev, struct sk_buff *skb,
  572. int *do_lock)
  573. {
  574. u16 queue_len, counter = 0;
  575. if (skb->protocol == htons(ETH_P_IP)) {
  576. struct iphdr *ip;
  577. struct tcphdr *th;
  578. ip = ip_hdr(skb);
  579. if ((ip->frag_off & htons(IP_OFFSET|IP_MF)) == 0) {
  580. th = (struct tcphdr *)(((unsigned char *)ip) +
  581. ip->ihl*4);
  582. queue_len = vdev->no_of_vpath;
  583. counter = (ntohs(th->source) +
  584. ntohs(th->dest)) &
  585. vdev->vpath_selector[queue_len - 1];
  586. if (counter >= queue_len)
  587. counter = queue_len - 1;
  588. if (ip->protocol == IPPROTO_UDP) {
  589. #ifdef NETIF_F_LLTX
  590. *do_lock = 0;
  591. #endif
  592. }
  593. }
  594. }
  595. return counter;
  596. }
  597. static enum vxge_hw_status vxge_search_mac_addr_in_list(
  598. struct vxge_vpath *vpath, u64 del_mac)
  599. {
  600. struct list_head *entry, *next;
  601. list_for_each_safe(entry, next, &vpath->mac_addr_list) {
  602. if (((struct vxge_mac_addrs *)entry)->macaddr == del_mac)
  603. return TRUE;
  604. }
  605. return FALSE;
  606. }
  607. static int vxge_learn_mac(struct vxgedev *vdev, u8 *mac_header)
  608. {
  609. struct macInfo mac_info;
  610. u8 *mac_address = NULL;
  611. u64 mac_addr = 0, vpath_vector = 0;
  612. int vpath_idx = 0;
  613. enum vxge_hw_status status = VXGE_HW_OK;
  614. struct vxge_vpath *vpath = NULL;
  615. struct __vxge_hw_device *hldev;
  616. hldev = (struct __vxge_hw_device *) pci_get_drvdata(vdev->pdev);
  617. mac_address = (u8 *)&mac_addr;
  618. memcpy(mac_address, mac_header, ETH_ALEN);
  619. /* Is this mac address already in the list? */
  620. for (vpath_idx = 0; vpath_idx < vdev->no_of_vpath; vpath_idx++) {
  621. vpath = &vdev->vpaths[vpath_idx];
  622. if (vxge_search_mac_addr_in_list(vpath, mac_addr))
  623. return vpath_idx;
  624. }
  625. memset(&mac_info, 0, sizeof(struct macInfo));
  626. memcpy(mac_info.macaddr, mac_header, ETH_ALEN);
  627. /* Any vpath has room to add mac address to its da table? */
  628. for (vpath_idx = 0; vpath_idx < vdev->no_of_vpath; vpath_idx++) {
  629. vpath = &vdev->vpaths[vpath_idx];
  630. if (vpath->mac_addr_cnt < vpath->max_mac_addr_cnt) {
  631. /* Add this mac address to this vpath */
  632. mac_info.vpath_no = vpath_idx;
  633. mac_info.state = VXGE_LL_MAC_ADDR_IN_DA_TABLE;
  634. status = vxge_add_mac_addr(vdev, &mac_info);
  635. if (status != VXGE_HW_OK)
  636. return -EPERM;
  637. return vpath_idx;
  638. }
  639. }
  640. mac_info.state = VXGE_LL_MAC_ADDR_IN_LIST;
  641. vpath_idx = 0;
  642. mac_info.vpath_no = vpath_idx;
  643. /* Is the first vpath already selected as catch-basin ? */
  644. vpath = &vdev->vpaths[vpath_idx];
  645. if (vpath->mac_addr_cnt > vpath->max_mac_addr_cnt) {
  646. /* Add this mac address to this vpath */
  647. if (FALSE == vxge_mac_list_add(vpath, &mac_info))
  648. return -EPERM;
  649. return vpath_idx;
  650. }
  651. /* Select first vpath as catch-basin */
  652. vpath_vector = vxge_mBIT(vpath->device_id);
  653. status = vxge_hw_mgmt_reg_write(vpath->vdev->devh,
  654. vxge_hw_mgmt_reg_type_mrpcim,
  655. 0,
  656. (ulong)offsetof(
  657. struct vxge_hw_mrpcim_reg,
  658. rts_mgr_cbasin_cfg),
  659. vpath_vector);
  660. if (status != VXGE_HW_OK) {
  661. vxge_debug_tx(VXGE_ERR,
  662. "%s: Unable to set the vpath-%d in catch-basin mode",
  663. VXGE_DRIVER_NAME, vpath->device_id);
  664. return -EPERM;
  665. }
  666. if (FALSE == vxge_mac_list_add(vpath, &mac_info))
  667. return -EPERM;
  668. return vpath_idx;
  669. }
  670. /**
  671. * vxge_xmit
  672. * @skb : the socket buffer containing the Tx data.
  673. * @dev : device pointer.
  674. *
  675. * This function is the Tx entry point of the driver. Neterion NIC supports
  676. * certain protocol assist features on Tx side, namely CSO, S/G, LSO.
  677. * NOTE: when device cant queue the pkt, just the trans_start variable will
  678. * not be upadted.
  679. */
  680. static int
  681. vxge_xmit(struct sk_buff *skb, struct net_device *dev)
  682. {
  683. struct vxge_fifo *fifo = NULL;
  684. void *dtr_priv;
  685. void *dtr = NULL;
  686. struct vxgedev *vdev = NULL;
  687. enum vxge_hw_status status;
  688. int frg_cnt, first_frg_len;
  689. skb_frag_t *frag;
  690. int i = 0, j = 0, avail;
  691. u64 dma_pointer;
  692. struct vxge_tx_priv *txdl_priv = NULL;
  693. struct __vxge_hw_fifo *fifo_hw;
  694. u32 max_mss = 0x0;
  695. int offload_type;
  696. unsigned long flags = 0;
  697. int vpath_no = 0;
  698. int do_spin_tx_lock = 1;
  699. vxge_debug_entryexit(VXGE_TRACE, "%s: %s:%d",
  700. dev->name, __func__, __LINE__);
  701. /* A buffer with no data will be dropped */
  702. if (unlikely(skb->len <= 0)) {
  703. vxge_debug_tx(VXGE_ERR,
  704. "%s: Buffer has no data..", dev->name);
  705. dev_kfree_skb(skb);
  706. return NETDEV_TX_OK;
  707. }
  708. vdev = (struct vxgedev *)netdev_priv(dev);
  709. if (unlikely(!is_vxge_card_up(vdev))) {
  710. vxge_debug_tx(VXGE_ERR,
  711. "%s: vdev not initialized", dev->name);
  712. dev_kfree_skb(skb);
  713. return NETDEV_TX_OK;
  714. }
  715. if (vdev->config.addr_learn_en) {
  716. vpath_no = vxge_learn_mac(vdev, skb->data + ETH_ALEN);
  717. if (vpath_no == -EPERM) {
  718. vxge_debug_tx(VXGE_ERR,
  719. "%s: Failed to store the mac address",
  720. dev->name);
  721. dev_kfree_skb(skb);
  722. return NETDEV_TX_OK;
  723. }
  724. }
  725. if (vdev->config.tx_steering_type == TX_MULTIQ_STEERING)
  726. vpath_no = skb_get_queue_mapping(skb);
  727. else if (vdev->config.tx_steering_type == TX_PORT_STEERING)
  728. vpath_no = vxge_get_vpath_no(vdev, skb, &do_spin_tx_lock);
  729. vxge_debug_tx(VXGE_TRACE, "%s: vpath_no= %d", dev->name, vpath_no);
  730. if (vpath_no >= vdev->no_of_vpath)
  731. vpath_no = 0;
  732. fifo = &vdev->vpaths[vpath_no].fifo;
  733. fifo_hw = fifo->handle;
  734. if (do_spin_tx_lock)
  735. spin_lock_irqsave(&fifo->tx_lock, flags);
  736. else {
  737. if (unlikely(!spin_trylock_irqsave(&fifo->tx_lock, flags)))
  738. return NETDEV_TX_LOCKED;
  739. }
  740. if (vdev->config.tx_steering_type == TX_MULTIQ_STEERING) {
  741. if (netif_subqueue_stopped(dev, skb)) {
  742. spin_unlock_irqrestore(&fifo->tx_lock, flags);
  743. return NETDEV_TX_BUSY;
  744. }
  745. } else if (unlikely(fifo->queue_state == VPATH_QUEUE_STOP)) {
  746. if (netif_queue_stopped(dev)) {
  747. spin_unlock_irqrestore(&fifo->tx_lock, flags);
  748. return NETDEV_TX_BUSY;
  749. }
  750. }
  751. avail = vxge_hw_fifo_free_txdl_count_get(fifo_hw);
  752. if (avail == 0) {
  753. vxge_debug_tx(VXGE_ERR,
  754. "%s: No free TXDs available", dev->name);
  755. fifo->stats.txd_not_free++;
  756. vxge_stop_tx_queue(fifo);
  757. goto _exit2;
  758. }
  759. status = vxge_hw_fifo_txdl_reserve(fifo_hw, &dtr, &dtr_priv);
  760. if (unlikely(status != VXGE_HW_OK)) {
  761. vxge_debug_tx(VXGE_ERR,
  762. "%s: Out of descriptors .", dev->name);
  763. fifo->stats.txd_out_of_desc++;
  764. vxge_stop_tx_queue(fifo);
  765. goto _exit2;
  766. }
  767. vxge_debug_tx(VXGE_TRACE,
  768. "%s: %s:%d fifo_hw = %p dtr = %p dtr_priv = %p",
  769. dev->name, __func__, __LINE__,
  770. fifo_hw, dtr, dtr_priv);
  771. if (vdev->vlgrp && vlan_tx_tag_present(skb)) {
  772. u16 vlan_tag = vlan_tx_tag_get(skb);
  773. vxge_hw_fifo_txdl_vlan_set(dtr, vlan_tag);
  774. }
  775. first_frg_len = skb_headlen(skb);
  776. dma_pointer = pci_map_single(fifo->pdev, skb->data, first_frg_len,
  777. PCI_DMA_TODEVICE);
  778. if (unlikely(pci_dma_mapping_error(fifo->pdev, dma_pointer))) {
  779. vxge_hw_fifo_txdl_free(fifo_hw, dtr);
  780. vxge_stop_tx_queue(fifo);
  781. fifo->stats.pci_map_fail++;
  782. goto _exit2;
  783. }
  784. txdl_priv = vxge_hw_fifo_txdl_private_get(dtr);
  785. txdl_priv->skb = skb;
  786. txdl_priv->dma_buffers[j] = dma_pointer;
  787. frg_cnt = skb_shinfo(skb)->nr_frags;
  788. vxge_debug_tx(VXGE_TRACE,
  789. "%s: %s:%d skb = %p txdl_priv = %p "
  790. "frag_cnt = %d dma_pointer = 0x%llx", dev->name,
  791. __func__, __LINE__, skb, txdl_priv,
  792. frg_cnt, (unsigned long long)dma_pointer);
  793. vxge_hw_fifo_txdl_buffer_set(fifo_hw, dtr, j++, dma_pointer,
  794. first_frg_len);
  795. frag = &skb_shinfo(skb)->frags[0];
  796. for (i = 0; i < frg_cnt; i++) {
  797. /* ignore 0 length fragment */
  798. if (!frag->size)
  799. continue;
  800. dma_pointer =
  801. (u64)pci_map_page(fifo->pdev, frag->page,
  802. frag->page_offset, frag->size,
  803. PCI_DMA_TODEVICE);
  804. if (unlikely(pci_dma_mapping_error(fifo->pdev, dma_pointer)))
  805. goto _exit0;
  806. vxge_debug_tx(VXGE_TRACE,
  807. "%s: %s:%d frag = %d dma_pointer = 0x%llx",
  808. dev->name, __func__, __LINE__, i,
  809. (unsigned long long)dma_pointer);
  810. txdl_priv->dma_buffers[j] = dma_pointer;
  811. vxge_hw_fifo_txdl_buffer_set(fifo_hw, dtr, j++, dma_pointer,
  812. frag->size);
  813. frag += 1;
  814. }
  815. offload_type = vxge_offload_type(skb);
  816. if (offload_type & (SKB_GSO_TCPV4 | SKB_GSO_TCPV6)) {
  817. int mss = vxge_tcp_mss(skb);
  818. if (mss) {
  819. max_mss = dev->mtu + ETH_HLEN -
  820. VXGE_HW_TCPIP_HEADER_MAX_SIZE;
  821. if (mss > max_mss)
  822. mss = max_mss;
  823. vxge_debug_tx(VXGE_TRACE,
  824. "%s: %s:%d mss = %d",
  825. dev->name, __func__, __LINE__, mss);
  826. vxge_hw_fifo_txdl_mss_set(dtr, mss);
  827. } else {
  828. vxge_assert(skb->len <=
  829. dev->mtu + VXGE_HW_MAC_HEADER_MAX_SIZE);
  830. vxge_assert(0);
  831. goto _exit1;
  832. }
  833. }
  834. if (skb->ip_summed == CHECKSUM_PARTIAL)
  835. vxge_hw_fifo_txdl_cksum_set_bits(dtr,
  836. VXGE_HW_FIFO_TXD_TX_CKO_IPV4_EN |
  837. VXGE_HW_FIFO_TXD_TX_CKO_TCP_EN |
  838. VXGE_HW_FIFO_TXD_TX_CKO_UDP_EN);
  839. vxge_hw_fifo_txdl_post(fifo_hw, dtr);
  840. dev->trans_start = jiffies;
  841. spin_unlock_irqrestore(&fifo->tx_lock, flags);
  842. VXGE_COMPLETE_VPATH_TX(fifo);
  843. vxge_debug_entryexit(VXGE_TRACE, "%s: %s:%d Exiting...",
  844. dev->name, __func__, __LINE__);
  845. return 0;
  846. _exit0:
  847. vxge_debug_tx(VXGE_TRACE, "%s: pci_map_page failed", dev->name);
  848. _exit1:
  849. j = 0;
  850. frag = &skb_shinfo(skb)->frags[0];
  851. pci_unmap_single(fifo->pdev, txdl_priv->dma_buffers[j++],
  852. skb_headlen(skb), PCI_DMA_TODEVICE);
  853. for (; j < i; j++) {
  854. pci_unmap_page(fifo->pdev, txdl_priv->dma_buffers[j],
  855. frag->size, PCI_DMA_TODEVICE);
  856. frag += 1;
  857. }
  858. vxge_hw_fifo_txdl_free(fifo_hw, dtr);
  859. _exit2:
  860. dev_kfree_skb(skb);
  861. spin_unlock_irqrestore(&fifo->tx_lock, flags);
  862. VXGE_COMPLETE_VPATH_TX(fifo);
  863. return 0;
  864. }
  865. /*
  866. * vxge_rx_term
  867. *
  868. * Function will be called by hw function to abort all outstanding receive
  869. * descriptors.
  870. */
  871. static void
  872. vxge_rx_term(void *dtrh, enum vxge_hw_rxd_state state, void *userdata)
  873. {
  874. struct vxge_ring *ring = (struct vxge_ring *)userdata;
  875. struct vxge_rx_priv *rx_priv =
  876. vxge_hw_ring_rxd_private_get(dtrh);
  877. vxge_debug_entryexit(VXGE_TRACE, "%s: %s:%d",
  878. ring->ndev->name, __func__, __LINE__);
  879. if (state != VXGE_HW_RXD_STATE_POSTED)
  880. return;
  881. pci_unmap_single(ring->pdev, rx_priv->data_dma,
  882. rx_priv->data_size, PCI_DMA_FROMDEVICE);
  883. dev_kfree_skb(rx_priv->skb);
  884. vxge_debug_entryexit(VXGE_TRACE,
  885. "%s: %s:%d Exiting...",
  886. ring->ndev->name, __func__, __LINE__);
  887. }
  888. /*
  889. * vxge_tx_term
  890. *
  891. * Function will be called to abort all outstanding tx descriptors
  892. */
  893. static void
  894. vxge_tx_term(void *dtrh, enum vxge_hw_txdl_state state, void *userdata)
  895. {
  896. struct vxge_fifo *fifo = (struct vxge_fifo *)userdata;
  897. skb_frag_t *frag;
  898. int i = 0, j, frg_cnt;
  899. struct vxge_tx_priv *txd_priv = vxge_hw_fifo_txdl_private_get(dtrh);
  900. struct sk_buff *skb = txd_priv->skb;
  901. vxge_debug_entryexit(VXGE_TRACE, "%s:%d", __func__, __LINE__);
  902. if (state != VXGE_HW_TXDL_STATE_POSTED)
  903. return;
  904. /* check skb validity */
  905. vxge_assert(skb);
  906. frg_cnt = skb_shinfo(skb)->nr_frags;
  907. frag = &skb_shinfo(skb)->frags[0];
  908. /* for unfragmented skb */
  909. pci_unmap_single(fifo->pdev, txd_priv->dma_buffers[i++],
  910. skb_headlen(skb), PCI_DMA_TODEVICE);
  911. for (j = 0; j < frg_cnt; j++) {
  912. pci_unmap_page(fifo->pdev, txd_priv->dma_buffers[i++],
  913. frag->size, PCI_DMA_TODEVICE);
  914. frag += 1;
  915. }
  916. dev_kfree_skb(skb);
  917. vxge_debug_entryexit(VXGE_TRACE,
  918. "%s:%d Exiting...", __func__, __LINE__);
  919. }
  920. /**
  921. * vxge_set_multicast
  922. * @dev: pointer to the device structure
  923. *
  924. * Entry point for multicast address enable/disable
  925. * This function is a driver entry point which gets called by the kernel
  926. * whenever multicast addresses must be enabled/disabled. This also gets
  927. * called to set/reset promiscuous mode. Depending on the deivce flag, we
  928. * determine, if multicast address must be enabled or if promiscuous mode
  929. * is to be disabled etc.
  930. */
  931. static void vxge_set_multicast(struct net_device *dev)
  932. {
  933. struct dev_mc_list *mclist;
  934. struct vxgedev *vdev;
  935. int i, mcast_cnt = 0;
  936. struct __vxge_hw_device *hldev;
  937. enum vxge_hw_status status = VXGE_HW_OK;
  938. struct macInfo mac_info;
  939. int vpath_idx = 0;
  940. struct vxge_mac_addrs *mac_entry;
  941. struct list_head *list_head;
  942. struct list_head *entry, *next;
  943. u8 *mac_address = NULL;
  944. vxge_debug_entryexit(VXGE_TRACE,
  945. "%s:%d", __func__, __LINE__);
  946. vdev = (struct vxgedev *)netdev_priv(dev);
  947. hldev = (struct __vxge_hw_device *)vdev->devh;
  948. if (unlikely(!is_vxge_card_up(vdev)))
  949. return;
  950. if ((dev->flags & IFF_ALLMULTI) && (!vdev->all_multi_flg)) {
  951. for (i = 0; i < vdev->no_of_vpath; i++) {
  952. vxge_assert(vdev->vpaths[i].is_open);
  953. status = vxge_hw_vpath_mcast_enable(
  954. vdev->vpaths[i].handle);
  955. vdev->all_multi_flg = 1;
  956. }
  957. } else if ((dev->flags & IFF_ALLMULTI) && (vdev->all_multi_flg)) {
  958. for (i = 0; i < vdev->no_of_vpath; i++) {
  959. vxge_assert(vdev->vpaths[i].is_open);
  960. status = vxge_hw_vpath_mcast_disable(
  961. vdev->vpaths[i].handle);
  962. vdev->all_multi_flg = 1;
  963. }
  964. }
  965. if (status != VXGE_HW_OK)
  966. vxge_debug_init(VXGE_ERR,
  967. "failed to %s multicast, status %d",
  968. dev->flags & IFF_ALLMULTI ?
  969. "enable" : "disable", status);
  970. if (!vdev->config.addr_learn_en) {
  971. if (dev->flags & IFF_PROMISC) {
  972. for (i = 0; i < vdev->no_of_vpath; i++) {
  973. vxge_assert(vdev->vpaths[i].is_open);
  974. status = vxge_hw_vpath_promisc_enable(
  975. vdev->vpaths[i].handle);
  976. }
  977. } else {
  978. for (i = 0; i < vdev->no_of_vpath; i++) {
  979. vxge_assert(vdev->vpaths[i].is_open);
  980. status = vxge_hw_vpath_promisc_disable(
  981. vdev->vpaths[i].handle);
  982. }
  983. }
  984. }
  985. memset(&mac_info, 0, sizeof(struct macInfo));
  986. /* Update individual M_CAST address list */
  987. if ((!vdev->all_multi_flg) && dev->mc_count) {
  988. mcast_cnt = vdev->vpaths[0].mcast_addr_cnt;
  989. list_head = &vdev->vpaths[0].mac_addr_list;
  990. if ((dev->mc_count +
  991. (vdev->vpaths[0].mac_addr_cnt - mcast_cnt)) >
  992. vdev->vpaths[0].max_mac_addr_cnt)
  993. goto _set_all_mcast;
  994. /* Delete previous MC's */
  995. for (i = 0; i < mcast_cnt; i++) {
  996. if (!list_empty(list_head))
  997. mac_entry = (struct vxge_mac_addrs *)
  998. list_first_entry(list_head,
  999. struct vxge_mac_addrs,
  1000. item);
  1001. list_for_each_safe(entry, next, list_head) {
  1002. mac_entry = (struct vxge_mac_addrs *) entry;
  1003. /* Copy the mac address to delete */
  1004. mac_address = (u8 *)&mac_entry->macaddr;
  1005. memcpy(mac_info.macaddr, mac_address, ETH_ALEN);
  1006. /* Is this a multicast address */
  1007. if (0x01 & mac_info.macaddr[0]) {
  1008. for (vpath_idx = 0; vpath_idx <
  1009. vdev->no_of_vpath;
  1010. vpath_idx++) {
  1011. mac_info.vpath_no = vpath_idx;
  1012. status = vxge_del_mac_addr(
  1013. vdev,
  1014. &mac_info);
  1015. }
  1016. }
  1017. }
  1018. }
  1019. /* Add new ones */
  1020. for (i = 0, mclist = dev->mc_list; i < dev->mc_count;
  1021. i++, mclist = mclist->next) {
  1022. memcpy(mac_info.macaddr, mclist->dmi_addr, ETH_ALEN);
  1023. for (vpath_idx = 0; vpath_idx < vdev->no_of_vpath;
  1024. vpath_idx++) {
  1025. mac_info.vpath_no = vpath_idx;
  1026. mac_info.state = VXGE_LL_MAC_ADDR_IN_DA_TABLE;
  1027. status = vxge_add_mac_addr(vdev, &mac_info);
  1028. if (status != VXGE_HW_OK) {
  1029. vxge_debug_init(VXGE_ERR,
  1030. "%s:%d Setting individual"
  1031. "multicast address failed",
  1032. __func__, __LINE__);
  1033. goto _set_all_mcast;
  1034. }
  1035. }
  1036. }
  1037. return;
  1038. _set_all_mcast:
  1039. mcast_cnt = vdev->vpaths[0].mcast_addr_cnt;
  1040. /* Delete previous MC's */
  1041. for (i = 0; i < mcast_cnt; i++) {
  1042. list_for_each_safe(entry, next, list_head) {
  1043. mac_entry = (struct vxge_mac_addrs *) entry;
  1044. /* Copy the mac address to delete */
  1045. mac_address = (u8 *)&mac_entry->macaddr;
  1046. memcpy(mac_info.macaddr, mac_address, ETH_ALEN);
  1047. /* Is this a multicast address */
  1048. if (0x01 & mac_info.macaddr[0])
  1049. break;
  1050. }
  1051. for (vpath_idx = 0; vpath_idx < vdev->no_of_vpath;
  1052. vpath_idx++) {
  1053. mac_info.vpath_no = vpath_idx;
  1054. status = vxge_del_mac_addr(vdev, &mac_info);
  1055. }
  1056. }
  1057. /* Enable all multicast */
  1058. for (i = 0; i < vdev->no_of_vpath; i++) {
  1059. vxge_assert(vdev->vpaths[i].is_open);
  1060. status = vxge_hw_vpath_mcast_enable(
  1061. vdev->vpaths[i].handle);
  1062. if (status != VXGE_HW_OK) {
  1063. vxge_debug_init(VXGE_ERR,
  1064. "%s:%d Enabling all multicasts failed",
  1065. __func__, __LINE__);
  1066. }
  1067. vdev->all_multi_flg = 1;
  1068. }
  1069. dev->flags |= IFF_ALLMULTI;
  1070. }
  1071. vxge_debug_entryexit(VXGE_TRACE,
  1072. "%s:%d Exiting...", __func__, __LINE__);
  1073. }
  1074. /**
  1075. * vxge_set_mac_addr
  1076. * @dev: pointer to the device structure
  1077. *
  1078. * Update entry "0" (default MAC addr)
  1079. */
  1080. static int vxge_set_mac_addr(struct net_device *dev, void *p)
  1081. {
  1082. struct sockaddr *addr = p;
  1083. struct vxgedev *vdev;
  1084. struct __vxge_hw_device *hldev;
  1085. enum vxge_hw_status status = VXGE_HW_OK;
  1086. struct macInfo mac_info_new, mac_info_old;
  1087. int vpath_idx = 0;
  1088. vxge_debug_entryexit(VXGE_TRACE, "%s:%d", __func__, __LINE__);
  1089. vdev = (struct vxgedev *)netdev_priv(dev);
  1090. hldev = vdev->devh;
  1091. if (!is_valid_ether_addr(addr->sa_data))
  1092. return -EINVAL;
  1093. memset(&mac_info_new, 0, sizeof(struct macInfo));
  1094. memset(&mac_info_old, 0, sizeof(struct macInfo));
  1095. vxge_debug_entryexit(VXGE_TRACE, "%s:%d Exiting...",
  1096. __func__, __LINE__);
  1097. /* Get the old address */
  1098. memcpy(mac_info_old.macaddr, dev->dev_addr, dev->addr_len);
  1099. /* Copy the new address */
  1100. memcpy(mac_info_new.macaddr, addr->sa_data, dev->addr_len);
  1101. /* First delete the old mac address from all the vpaths
  1102. as we can't specify the index while adding new mac address */
  1103. for (vpath_idx = 0; vpath_idx < vdev->no_of_vpath; vpath_idx++) {
  1104. struct vxge_vpath *vpath = &vdev->vpaths[vpath_idx];
  1105. if (!vpath->is_open) {
  1106. /* This can happen when this interface is added/removed
  1107. to the bonding interface. Delete this station address
  1108. from the linked list */
  1109. vxge_mac_list_del(vpath, &mac_info_old);
  1110. /* Add this new address to the linked list
  1111. for later restoring */
  1112. vxge_mac_list_add(vpath, &mac_info_new);
  1113. continue;
  1114. }
  1115. /* Delete the station address */
  1116. mac_info_old.vpath_no = vpath_idx;
  1117. status = vxge_del_mac_addr(vdev, &mac_info_old);
  1118. }
  1119. if (unlikely(!is_vxge_card_up(vdev))) {
  1120. memcpy(dev->dev_addr, addr->sa_data, dev->addr_len);
  1121. return VXGE_HW_OK;
  1122. }
  1123. /* Set this mac address to all the vpaths */
  1124. for (vpath_idx = 0; vpath_idx < vdev->no_of_vpath; vpath_idx++) {
  1125. mac_info_new.vpath_no = vpath_idx;
  1126. mac_info_new.state = VXGE_LL_MAC_ADDR_IN_DA_TABLE;
  1127. status = vxge_add_mac_addr(vdev, &mac_info_new);
  1128. if (status != VXGE_HW_OK)
  1129. return -EINVAL;
  1130. }
  1131. memcpy(dev->dev_addr, addr->sa_data, dev->addr_len);
  1132. return status;
  1133. }
  1134. /*
  1135. * vxge_vpath_intr_enable
  1136. * @vdev: pointer to vdev
  1137. * @vp_id: vpath for which to enable the interrupts
  1138. *
  1139. * Enables the interrupts for the vpath
  1140. */
  1141. void vxge_vpath_intr_enable(struct vxgedev *vdev, int vp_id)
  1142. {
  1143. struct vxge_vpath *vpath = &vdev->vpaths[vp_id];
  1144. int msix_id, alarm_msix_id;
  1145. int tim_msix_id[4] = {[0 ...3] = 0};
  1146. vxge_hw_vpath_intr_enable(vpath->handle);
  1147. if (vdev->config.intr_type == INTA)
  1148. vxge_hw_vpath_inta_unmask_tx_rx(vpath->handle);
  1149. else {
  1150. msix_id = vp_id * VXGE_HW_VPATH_MSIX_ACTIVE;
  1151. alarm_msix_id =
  1152. VXGE_HW_VPATH_MSIX_ACTIVE * vdev->no_of_vpath - 2;
  1153. tim_msix_id[0] = msix_id;
  1154. tim_msix_id[1] = msix_id + 1;
  1155. vxge_hw_vpath_msix_set(vpath->handle, tim_msix_id,
  1156. alarm_msix_id);
  1157. vxge_hw_vpath_msix_unmask(vpath->handle, msix_id);
  1158. vxge_hw_vpath_msix_unmask(vpath->handle, msix_id + 1);
  1159. /* enable the alarm vector */
  1160. vxge_hw_vpath_msix_unmask(vpath->handle, alarm_msix_id);
  1161. }
  1162. }
  1163. /*
  1164. * vxge_vpath_intr_disable
  1165. * @vdev: pointer to vdev
  1166. * @vp_id: vpath for which to disable the interrupts
  1167. *
  1168. * Disables the interrupts for the vpath
  1169. */
  1170. void vxge_vpath_intr_disable(struct vxgedev *vdev, int vp_id)
  1171. {
  1172. struct vxge_vpath *vpath = &vdev->vpaths[vp_id];
  1173. int msix_id;
  1174. vxge_hw_vpath_intr_disable(vpath->handle);
  1175. if (vdev->config.intr_type == INTA)
  1176. vxge_hw_vpath_inta_mask_tx_rx(vpath->handle);
  1177. else {
  1178. msix_id = vp_id * VXGE_HW_VPATH_MSIX_ACTIVE;
  1179. vxge_hw_vpath_msix_mask(vpath->handle, msix_id);
  1180. vxge_hw_vpath_msix_mask(vpath->handle, msix_id + 1);
  1181. /* disable the alarm vector */
  1182. msix_id = VXGE_HW_VPATH_MSIX_ACTIVE * vdev->no_of_vpath - 2;
  1183. vxge_hw_vpath_msix_mask(vpath->handle, msix_id);
  1184. }
  1185. }
  1186. /*
  1187. * vxge_reset_vpath
  1188. * @vdev: pointer to vdev
  1189. * @vp_id: vpath to reset
  1190. *
  1191. * Resets the vpath
  1192. */
  1193. static int vxge_reset_vpath(struct vxgedev *vdev, int vp_id)
  1194. {
  1195. enum vxge_hw_status status = VXGE_HW_OK;
  1196. int ret = 0;
  1197. /* check if device is down already */
  1198. if (unlikely(!is_vxge_card_up(vdev)))
  1199. return 0;
  1200. /* is device reset already scheduled */
  1201. if (test_bit(__VXGE_STATE_RESET_CARD, &vdev->state))
  1202. return 0;
  1203. if (vdev->vpaths[vp_id].handle) {
  1204. if (vxge_hw_vpath_reset(vdev->vpaths[vp_id].handle)
  1205. == VXGE_HW_OK) {
  1206. if (is_vxge_card_up(vdev) &&
  1207. vxge_hw_vpath_recover_from_reset(
  1208. vdev->vpaths[vp_id].handle)
  1209. != VXGE_HW_OK) {
  1210. vxge_debug_init(VXGE_ERR,
  1211. "vxge_hw_vpath_recover_from_reset"
  1212. "failed for vpath:%d", vp_id);
  1213. return status;
  1214. }
  1215. } else {
  1216. vxge_debug_init(VXGE_ERR,
  1217. "vxge_hw_vpath_reset failed for"
  1218. "vpath:%d", vp_id);
  1219. return status;
  1220. }
  1221. } else
  1222. return VXGE_HW_FAIL;
  1223. vxge_restore_vpath_mac_addr(&vdev->vpaths[vp_id]);
  1224. vxge_restore_vpath_vid_table(&vdev->vpaths[vp_id]);
  1225. /* Enable all broadcast */
  1226. vxge_hw_vpath_bcast_enable(vdev->vpaths[vp_id].handle);
  1227. /* Enable the interrupts */
  1228. vxge_vpath_intr_enable(vdev, vp_id);
  1229. smp_wmb();
  1230. /* Enable the flow of traffic through the vpath */
  1231. vxge_hw_vpath_enable(vdev->vpaths[vp_id].handle);
  1232. smp_wmb();
  1233. vxge_hw_vpath_rx_doorbell_init(vdev->vpaths[vp_id].handle);
  1234. vdev->vpaths[vp_id].ring.last_status = VXGE_HW_OK;
  1235. /* Vpath reset done */
  1236. clear_bit(vp_id, &vdev->vp_reset);
  1237. /* Start the vpath queue */
  1238. vxge_wake_tx_queue(&vdev->vpaths[vp_id].fifo, NULL);
  1239. return ret;
  1240. }
  1241. static int do_vxge_reset(struct vxgedev *vdev, int event)
  1242. {
  1243. enum vxge_hw_status status;
  1244. int ret = 0, vp_id, i;
  1245. vxge_debug_entryexit(VXGE_TRACE, "%s:%d", __func__, __LINE__);
  1246. if ((event == VXGE_LL_FULL_RESET) || (event == VXGE_LL_START_RESET)) {
  1247. /* check if device is down already */
  1248. if (unlikely(!is_vxge_card_up(vdev)))
  1249. return 0;
  1250. /* is reset already scheduled */
  1251. if (test_and_set_bit(__VXGE_STATE_RESET_CARD, &vdev->state))
  1252. return 0;
  1253. }
  1254. if (event == VXGE_LL_FULL_RESET) {
  1255. /* wait for all the vpath reset to complete */
  1256. for (vp_id = 0; vp_id < vdev->no_of_vpath; vp_id++) {
  1257. while (test_bit(vp_id, &vdev->vp_reset))
  1258. msleep(50);
  1259. }
  1260. /* if execution mode is set to debug, don't reset the adapter */
  1261. if (unlikely(vdev->exec_mode)) {
  1262. vxge_debug_init(VXGE_ERR,
  1263. "%s: execution mode is debug, returning..",
  1264. vdev->ndev->name);
  1265. clear_bit(__VXGE_STATE_CARD_UP, &vdev->state);
  1266. vxge_stop_all_tx_queue(vdev);
  1267. return 0;
  1268. }
  1269. }
  1270. if (event == VXGE_LL_FULL_RESET) {
  1271. vxge_hw_device_intr_disable(vdev->devh);
  1272. switch (vdev->cric_err_event) {
  1273. case VXGE_HW_EVENT_UNKNOWN:
  1274. vxge_stop_all_tx_queue(vdev);
  1275. vxge_debug_init(VXGE_ERR,
  1276. "fatal: %s: Disabling device due to"
  1277. "unknown error",
  1278. vdev->ndev->name);
  1279. ret = -EPERM;
  1280. goto out;
  1281. case VXGE_HW_EVENT_RESET_START:
  1282. break;
  1283. case VXGE_HW_EVENT_RESET_COMPLETE:
  1284. case VXGE_HW_EVENT_LINK_DOWN:
  1285. case VXGE_HW_EVENT_LINK_UP:
  1286. case VXGE_HW_EVENT_ALARM_CLEARED:
  1287. case VXGE_HW_EVENT_ECCERR:
  1288. case VXGE_HW_EVENT_MRPCIM_ECCERR:
  1289. ret = -EPERM;
  1290. goto out;
  1291. case VXGE_HW_EVENT_FIFO_ERR:
  1292. case VXGE_HW_EVENT_VPATH_ERR:
  1293. break;
  1294. case VXGE_HW_EVENT_CRITICAL_ERR:
  1295. vxge_stop_all_tx_queue(vdev);
  1296. vxge_debug_init(VXGE_ERR,
  1297. "fatal: %s: Disabling device due to"
  1298. "serious error",
  1299. vdev->ndev->name);
  1300. /* SOP or device reset required */
  1301. /* This event is not currently used */
  1302. ret = -EPERM;
  1303. goto out;
  1304. case VXGE_HW_EVENT_SERR:
  1305. vxge_stop_all_tx_queue(vdev);
  1306. vxge_debug_init(VXGE_ERR,
  1307. "fatal: %s: Disabling device due to"
  1308. "serious error",
  1309. vdev->ndev->name);
  1310. ret = -EPERM;
  1311. goto out;
  1312. case VXGE_HW_EVENT_SRPCIM_SERR:
  1313. case VXGE_HW_EVENT_MRPCIM_SERR:
  1314. ret = -EPERM;
  1315. goto out;
  1316. case VXGE_HW_EVENT_SLOT_FREEZE:
  1317. vxge_stop_all_tx_queue(vdev);
  1318. vxge_debug_init(VXGE_ERR,
  1319. "fatal: %s: Disabling device due to"
  1320. "slot freeze",
  1321. vdev->ndev->name);
  1322. ret = -EPERM;
  1323. goto out;
  1324. default:
  1325. break;
  1326. }
  1327. }
  1328. if ((event == VXGE_LL_FULL_RESET) || (event == VXGE_LL_START_RESET))
  1329. vxge_stop_all_tx_queue(vdev);
  1330. if (event == VXGE_LL_FULL_RESET) {
  1331. status = vxge_reset_all_vpaths(vdev);
  1332. if (status != VXGE_HW_OK) {
  1333. vxge_debug_init(VXGE_ERR,
  1334. "fatal: %s: can not reset vpaths",
  1335. vdev->ndev->name);
  1336. ret = -EPERM;
  1337. goto out;
  1338. }
  1339. }
  1340. if (event == VXGE_LL_COMPL_RESET) {
  1341. for (i = 0; i < vdev->no_of_vpath; i++)
  1342. if (vdev->vpaths[i].handle) {
  1343. if (vxge_hw_vpath_recover_from_reset(
  1344. vdev->vpaths[i].handle)
  1345. != VXGE_HW_OK) {
  1346. vxge_debug_init(VXGE_ERR,
  1347. "vxge_hw_vpath_recover_"
  1348. "from_reset failed for vpath: "
  1349. "%d", i);
  1350. ret = -EPERM;
  1351. goto out;
  1352. }
  1353. } else {
  1354. vxge_debug_init(VXGE_ERR,
  1355. "vxge_hw_vpath_reset failed for "
  1356. "vpath:%d", i);
  1357. ret = -EPERM;
  1358. goto out;
  1359. }
  1360. }
  1361. if ((event == VXGE_LL_FULL_RESET) || (event == VXGE_LL_COMPL_RESET)) {
  1362. /* Reprogram the DA table with populated mac addresses */
  1363. for (vp_id = 0; vp_id < vdev->no_of_vpath; vp_id++) {
  1364. vxge_restore_vpath_mac_addr(&vdev->vpaths[vp_id]);
  1365. vxge_restore_vpath_vid_table(&vdev->vpaths[vp_id]);
  1366. }
  1367. /* enable vpath interrupts */
  1368. for (i = 0; i < vdev->no_of_vpath; i++)
  1369. vxge_vpath_intr_enable(vdev, i);
  1370. vxge_hw_device_intr_enable(vdev->devh);
  1371. smp_wmb();
  1372. /* Indicate card up */
  1373. set_bit(__VXGE_STATE_CARD_UP, &vdev->state);
  1374. /* Get the traffic to flow through the vpaths */
  1375. for (i = 0; i < vdev->no_of_vpath; i++) {
  1376. vxge_hw_vpath_enable(vdev->vpaths[i].handle);
  1377. smp_wmb();
  1378. vxge_hw_vpath_rx_doorbell_init(vdev->vpaths[i].handle);
  1379. }
  1380. vxge_wake_all_tx_queue(vdev);
  1381. }
  1382. out:
  1383. vxge_debug_entryexit(VXGE_TRACE,
  1384. "%s:%d Exiting...", __func__, __LINE__);
  1385. /* Indicate reset done */
  1386. if ((event == VXGE_LL_FULL_RESET) || (event == VXGE_LL_COMPL_RESET))
  1387. clear_bit(__VXGE_STATE_RESET_CARD, &vdev->state);
  1388. return ret;
  1389. }
  1390. /*
  1391. * vxge_reset
  1392. * @vdev: pointer to ll device
  1393. *
  1394. * driver may reset the chip on events of serr, eccerr, etc
  1395. */
  1396. int vxge_reset(struct vxgedev *vdev)
  1397. {
  1398. do_vxge_reset(vdev, VXGE_LL_FULL_RESET);
  1399. return 0;
  1400. }
  1401. /**
  1402. * vxge_poll - Receive handler when Receive Polling is used.
  1403. * @dev: pointer to the device structure.
  1404. * @budget: Number of packets budgeted to be processed in this iteration.
  1405. *
  1406. * This function comes into picture only if Receive side is being handled
  1407. * through polling (called NAPI in linux). It mostly does what the normal
  1408. * Rx interrupt handler does in terms of descriptor and packet processing
  1409. * but not in an interrupt context. Also it will process a specified number
  1410. * of packets at most in one iteration. This value is passed down by the
  1411. * kernel as the function argument 'budget'.
  1412. */
  1413. static int vxge_poll_msix(struct napi_struct *napi, int budget)
  1414. {
  1415. struct vxge_ring *ring =
  1416. container_of(napi, struct vxge_ring, napi);
  1417. int budget_org = budget;
  1418. ring->budget = budget;
  1419. vxge_hw_vpath_poll_rx(ring->handle);
  1420. if (ring->pkts_processed < budget_org) {
  1421. napi_complete(napi);
  1422. /* Re enable the Rx interrupts for the vpath */
  1423. vxge_hw_channel_msix_unmask(
  1424. (struct __vxge_hw_channel *)ring->handle,
  1425. ring->rx_vector_no);
  1426. }
  1427. return ring->pkts_processed;
  1428. }
  1429. static int vxge_poll_inta(struct napi_struct *napi, int budget)
  1430. {
  1431. struct vxgedev *vdev = container_of(napi, struct vxgedev, napi);
  1432. int pkts_processed = 0;
  1433. int i;
  1434. int budget_org = budget;
  1435. struct vxge_ring *ring;
  1436. struct __vxge_hw_device *hldev = (struct __vxge_hw_device *)
  1437. pci_get_drvdata(vdev->pdev);
  1438. for (i = 0; i < vdev->no_of_vpath; i++) {
  1439. ring = &vdev->vpaths[i].ring;
  1440. ring->budget = budget;
  1441. vxge_hw_vpath_poll_rx(ring->handle);
  1442. pkts_processed += ring->pkts_processed;
  1443. budget -= ring->pkts_processed;
  1444. if (budget <= 0)
  1445. break;
  1446. }
  1447. VXGE_COMPLETE_ALL_TX(vdev);
  1448. if (pkts_processed < budget_org) {
  1449. napi_complete(napi);
  1450. /* Re enable the Rx interrupts for the ring */
  1451. vxge_hw_device_unmask_all(hldev);
  1452. vxge_hw_device_flush_io(hldev);
  1453. }
  1454. return pkts_processed;
  1455. }
  1456. #ifdef CONFIG_NET_POLL_CONTROLLER
  1457. /**
  1458. * vxge_netpoll - netpoll event handler entry point
  1459. * @dev : pointer to the device structure.
  1460. * Description:
  1461. * This function will be called by upper layer to check for events on the
  1462. * interface in situations where interrupts are disabled. It is used for
  1463. * specific in-kernel networking tasks, such as remote consoles and kernel
  1464. * debugging over the network (example netdump in RedHat).
  1465. */
  1466. static void vxge_netpoll(struct net_device *dev)
  1467. {
  1468. struct __vxge_hw_device *hldev;
  1469. struct vxgedev *vdev;
  1470. vdev = (struct vxgedev *)netdev_priv(dev);
  1471. hldev = (struct __vxge_hw_device *)pci_get_drvdata(vdev->pdev);
  1472. vxge_debug_entryexit(VXGE_TRACE, "%s:%d", __func__, __LINE__);
  1473. if (pci_channel_offline(vdev->pdev))
  1474. return;
  1475. disable_irq(dev->irq);
  1476. vxge_hw_device_clear_tx_rx(hldev);
  1477. vxge_hw_device_clear_tx_rx(hldev);
  1478. VXGE_COMPLETE_ALL_RX(vdev);
  1479. VXGE_COMPLETE_ALL_TX(vdev);
  1480. enable_irq(dev->irq);
  1481. vxge_debug_entryexit(VXGE_TRACE,
  1482. "%s:%d Exiting...", __func__, __LINE__);
  1483. return;
  1484. }
  1485. #endif
  1486. /* RTH configuration */
  1487. static enum vxge_hw_status vxge_rth_configure(struct vxgedev *vdev)
  1488. {
  1489. enum vxge_hw_status status = VXGE_HW_OK;
  1490. struct vxge_hw_rth_hash_types hash_types;
  1491. u8 itable[256] = {0}; /* indirection table */
  1492. u8 mtable[256] = {0}; /* CPU to vpath mapping */
  1493. int index;
  1494. /*
  1495. * Filling
  1496. * - itable with bucket numbers
  1497. * - mtable with bucket-to-vpath mapping
  1498. */
  1499. for (index = 0; index < (1 << vdev->config.rth_bkt_sz); index++) {
  1500. itable[index] = index;
  1501. mtable[index] = index % vdev->no_of_vpath;
  1502. }
  1503. /* Fill RTH hash types */
  1504. hash_types.hash_type_tcpipv4_en = vdev->config.rth_hash_type_tcpipv4;
  1505. hash_types.hash_type_ipv4_en = vdev->config.rth_hash_type_ipv4;
  1506. hash_types.hash_type_tcpipv6_en = vdev->config.rth_hash_type_tcpipv6;
  1507. hash_types.hash_type_ipv6_en = vdev->config.rth_hash_type_ipv6;
  1508. hash_types.hash_type_tcpipv6ex_en =
  1509. vdev->config.rth_hash_type_tcpipv6ex;
  1510. hash_types.hash_type_ipv6ex_en = vdev->config.rth_hash_type_ipv6ex;
  1511. /* set indirection table, bucket-to-vpath mapping */
  1512. status = vxge_hw_vpath_rts_rth_itable_set(vdev->vp_handles,
  1513. vdev->no_of_vpath,
  1514. mtable, itable,
  1515. vdev->config.rth_bkt_sz);
  1516. if (status != VXGE_HW_OK) {
  1517. vxge_debug_init(VXGE_ERR,
  1518. "RTH indirection table configuration failed "
  1519. "for vpath:%d", vdev->vpaths[0].device_id);
  1520. return status;
  1521. }
  1522. /*
  1523. * Because the itable_set() method uses the active_table field
  1524. * for the target virtual path the RTH config should be updated
  1525. * for all VPATHs. The h/w only uses the lowest numbered VPATH
  1526. * when steering frames.
  1527. */
  1528. for (index = 0; index < vdev->no_of_vpath; index++) {
  1529. status = vxge_hw_vpath_rts_rth_set(
  1530. vdev->vpaths[index].handle,
  1531. vdev->config.rth_algorithm,
  1532. &hash_types,
  1533. vdev->config.rth_bkt_sz);
  1534. if (status != VXGE_HW_OK) {
  1535. vxge_debug_init(VXGE_ERR,
  1536. "RTH configuration failed for vpath:%d",
  1537. vdev->vpaths[index].device_id);
  1538. return status;
  1539. }
  1540. }
  1541. return status;
  1542. }
  1543. int vxge_mac_list_add(struct vxge_vpath *vpath, struct macInfo *mac)
  1544. {
  1545. struct vxge_mac_addrs *new_mac_entry;
  1546. u8 *mac_address = NULL;
  1547. if (vpath->mac_addr_cnt >= VXGE_MAX_LEARN_MAC_ADDR_CNT)
  1548. return TRUE;
  1549. new_mac_entry = kzalloc(sizeof(struct vxge_mac_addrs), GFP_ATOMIC);
  1550. if (!new_mac_entry) {
  1551. vxge_debug_mem(VXGE_ERR,
  1552. "%s: memory allocation failed",
  1553. VXGE_DRIVER_NAME);
  1554. return FALSE;
  1555. }
  1556. list_add(&new_mac_entry->item, &vpath->mac_addr_list);
  1557. /* Copy the new mac address to the list */
  1558. mac_address = (u8 *)&new_mac_entry->macaddr;
  1559. memcpy(mac_address, mac->macaddr, ETH_ALEN);
  1560. new_mac_entry->state = mac->state;
  1561. vpath->mac_addr_cnt++;
  1562. /* Is this a multicast address */
  1563. if (0x01 & mac->macaddr[0])
  1564. vpath->mcast_addr_cnt++;
  1565. return TRUE;
  1566. }
  1567. /* Add a mac address to DA table */
  1568. enum vxge_hw_status vxge_add_mac_addr(struct vxgedev *vdev, struct macInfo *mac)
  1569. {
  1570. enum vxge_hw_status status = VXGE_HW_OK;
  1571. struct vxge_vpath *vpath;
  1572. enum vxge_hw_vpath_mac_addr_add_mode duplicate_mode;
  1573. if (0x01 & mac->macaddr[0]) /* multicast address */
  1574. duplicate_mode = VXGE_HW_VPATH_MAC_ADDR_ADD_DUPLICATE;
  1575. else
  1576. duplicate_mode = VXGE_HW_VPATH_MAC_ADDR_REPLACE_DUPLICATE;
  1577. vpath = &vdev->vpaths[mac->vpath_no];
  1578. status = vxge_hw_vpath_mac_addr_add(vpath->handle, mac->macaddr,
  1579. mac->macmask, duplicate_mode);
  1580. if (status != VXGE_HW_OK) {
  1581. vxge_debug_init(VXGE_ERR,
  1582. "DA config add entry failed for vpath:%d",
  1583. vpath->device_id);
  1584. } else
  1585. if (FALSE == vxge_mac_list_add(vpath, mac))
  1586. status = -EPERM;
  1587. return status;
  1588. }
  1589. int vxge_mac_list_del(struct vxge_vpath *vpath, struct macInfo *mac)
  1590. {
  1591. struct list_head *entry, *next;
  1592. u64 del_mac = 0;
  1593. u8 *mac_address = (u8 *) (&del_mac);
  1594. /* Copy the mac address to delete from the list */
  1595. memcpy(mac_address, mac->macaddr, ETH_ALEN);
  1596. list_for_each_safe(entry, next, &vpath->mac_addr_list) {
  1597. if (((struct vxge_mac_addrs *)entry)->macaddr == del_mac) {
  1598. list_del(entry);
  1599. kfree((struct vxge_mac_addrs *)entry);
  1600. vpath->mac_addr_cnt--;
  1601. /* Is this a multicast address */
  1602. if (0x01 & mac->macaddr[0])
  1603. vpath->mcast_addr_cnt--;
  1604. return TRUE;
  1605. }
  1606. }
  1607. return FALSE;
  1608. }
  1609. /* delete a mac address from DA table */
  1610. enum vxge_hw_status vxge_del_mac_addr(struct vxgedev *vdev, struct macInfo *mac)
  1611. {
  1612. enum vxge_hw_status status = VXGE_HW_OK;
  1613. struct vxge_vpath *vpath;
  1614. vpath = &vdev->vpaths[mac->vpath_no];
  1615. status = vxge_hw_vpath_mac_addr_delete(vpath->handle, mac->macaddr,
  1616. mac->macmask);
  1617. if (status != VXGE_HW_OK) {
  1618. vxge_debug_init(VXGE_ERR,
  1619. "DA config delete entry failed for vpath:%d",
  1620. vpath->device_id);
  1621. } else
  1622. vxge_mac_list_del(vpath, mac);
  1623. return status;
  1624. }
  1625. /* list all mac addresses from DA table */
  1626. enum vxge_hw_status
  1627. static vxge_search_mac_addr_in_da_table(struct vxge_vpath *vpath,
  1628. struct macInfo *mac)
  1629. {
  1630. enum vxge_hw_status status = VXGE_HW_OK;
  1631. unsigned char macmask[ETH_ALEN];
  1632. unsigned char macaddr[ETH_ALEN];
  1633. status = vxge_hw_vpath_mac_addr_get(vpath->handle,
  1634. macaddr, macmask);
  1635. if (status != VXGE_HW_OK) {
  1636. vxge_debug_init(VXGE_ERR,
  1637. "DA config list entry failed for vpath:%d",
  1638. vpath->device_id);
  1639. return status;
  1640. }
  1641. while (memcmp(mac->macaddr, macaddr, ETH_ALEN)) {
  1642. status = vxge_hw_vpath_mac_addr_get_next(vpath->handle,
  1643. macaddr, macmask);
  1644. if (status != VXGE_HW_OK)
  1645. break;
  1646. }
  1647. return status;
  1648. }
  1649. /* Store all vlan ids from the list to the vid table */
  1650. enum vxge_hw_status vxge_restore_vpath_vid_table(struct vxge_vpath *vpath)
  1651. {
  1652. enum vxge_hw_status status = VXGE_HW_OK;
  1653. struct vxgedev *vdev = vpath->vdev;
  1654. u16 vid;
  1655. if (vdev->vlgrp && vpath->is_open) {
  1656. for (vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) {
  1657. if (!vlan_group_get_device(vdev->vlgrp, vid))
  1658. continue;
  1659. /* Add these vlan to the vid table */
  1660. status = vxge_hw_vpath_vid_add(vpath->handle, vid);
  1661. }
  1662. }
  1663. return status;
  1664. }
  1665. /* Store all mac addresses from the list to the DA table */
  1666. enum vxge_hw_status vxge_restore_vpath_mac_addr(struct vxge_vpath *vpath)
  1667. {
  1668. enum vxge_hw_status status = VXGE_HW_OK;
  1669. struct macInfo mac_info;
  1670. u8 *mac_address = NULL;
  1671. struct list_head *entry, *next;
  1672. memset(&mac_info, 0, sizeof(struct macInfo));
  1673. if (vpath->is_open) {
  1674. list_for_each_safe(entry, next, &vpath->mac_addr_list) {
  1675. mac_address =
  1676. (u8 *)&
  1677. ((struct vxge_mac_addrs *)entry)->macaddr;
  1678. memcpy(mac_info.macaddr, mac_address, ETH_ALEN);
  1679. ((struct vxge_mac_addrs *)entry)->state =
  1680. VXGE_LL_MAC_ADDR_IN_DA_TABLE;
  1681. /* does this mac address already exist in da table? */
  1682. status = vxge_search_mac_addr_in_da_table(vpath,
  1683. &mac_info);
  1684. if (status != VXGE_HW_OK) {
  1685. /* Add this mac address to the DA table */
  1686. status = vxge_hw_vpath_mac_addr_add(
  1687. vpath->handle, mac_info.macaddr,
  1688. mac_info.macmask,
  1689. VXGE_HW_VPATH_MAC_ADDR_ADD_DUPLICATE);
  1690. if (status != VXGE_HW_OK) {
  1691. vxge_debug_init(VXGE_ERR,
  1692. "DA add entry failed for vpath:%d",
  1693. vpath->device_id);
  1694. ((struct vxge_mac_addrs *)entry)->state
  1695. = VXGE_LL_MAC_ADDR_IN_LIST;
  1696. }
  1697. }
  1698. }
  1699. }
  1700. return status;
  1701. }
  1702. /* reset vpaths */
  1703. enum vxge_hw_status vxge_reset_all_vpaths(struct vxgedev *vdev)
  1704. {
  1705. int i;
  1706. enum vxge_hw_status status = VXGE_HW_OK;
  1707. for (i = 0; i < vdev->no_of_vpath; i++)
  1708. if (vdev->vpaths[i].handle) {
  1709. if (vxge_hw_vpath_reset(vdev->vpaths[i].handle)
  1710. == VXGE_HW_OK) {
  1711. if (is_vxge_card_up(vdev) &&
  1712. vxge_hw_vpath_recover_from_reset(
  1713. vdev->vpaths[i].handle)
  1714. != VXGE_HW_OK) {
  1715. vxge_debug_init(VXGE_ERR,
  1716. "vxge_hw_vpath_recover_"
  1717. "from_reset failed for vpath: "
  1718. "%d", i);
  1719. return status;
  1720. }
  1721. } else {
  1722. vxge_debug_init(VXGE_ERR,
  1723. "vxge_hw_vpath_reset failed for "
  1724. "vpath:%d", i);
  1725. return status;
  1726. }
  1727. }
  1728. return status;
  1729. }
  1730. /* close vpaths */
  1731. void vxge_close_vpaths(struct vxgedev *vdev, int index)
  1732. {
  1733. int i;
  1734. for (i = index; i < vdev->no_of_vpath; i++) {
  1735. if (vdev->vpaths[i].handle && vdev->vpaths[i].is_open) {
  1736. vxge_hw_vpath_close(vdev->vpaths[i].handle);
  1737. vdev->stats.vpaths_open--;
  1738. }
  1739. vdev->vpaths[i].is_open = 0;
  1740. vdev->vpaths[i].handle = NULL;
  1741. }
  1742. }
  1743. /* open vpaths */
  1744. int vxge_open_vpaths(struct vxgedev *vdev)
  1745. {
  1746. enum vxge_hw_status status;
  1747. int i;
  1748. u32 vp_id = 0;
  1749. struct vxge_hw_vpath_attr attr;
  1750. for (i = 0; i < vdev->no_of_vpath; i++) {
  1751. vxge_assert(vdev->vpaths[i].is_configured);
  1752. attr.vp_id = vdev->vpaths[i].device_id;
  1753. attr.fifo_attr.callback = vxge_xmit_compl;
  1754. attr.fifo_attr.txdl_term = vxge_tx_term;
  1755. attr.fifo_attr.per_txdl_space = sizeof(struct vxge_tx_priv);
  1756. attr.fifo_attr.userdata = (void *)&vdev->vpaths[i].fifo;
  1757. attr.ring_attr.callback = vxge_rx_1b_compl;
  1758. attr.ring_attr.rxd_init = vxge_rx_initial_replenish;
  1759. attr.ring_attr.rxd_term = vxge_rx_term;
  1760. attr.ring_attr.per_rxd_space = sizeof(struct vxge_rx_priv);
  1761. attr.ring_attr.userdata = (void *)&vdev->vpaths[i].ring;
  1762. vdev->vpaths[i].ring.ndev = vdev->ndev;
  1763. vdev->vpaths[i].ring.pdev = vdev->pdev;
  1764. status = vxge_hw_vpath_open(vdev->devh, &attr,
  1765. &(vdev->vpaths[i].handle));
  1766. if (status == VXGE_HW_OK) {
  1767. vdev->vpaths[i].fifo.handle =
  1768. (struct __vxge_hw_fifo *)attr.fifo_attr.userdata;
  1769. vdev->vpaths[i].ring.handle =
  1770. (struct __vxge_hw_ring *)attr.ring_attr.userdata;
  1771. vdev->vpaths[i].fifo.tx_steering_type =
  1772. vdev->config.tx_steering_type;
  1773. vdev->vpaths[i].fifo.ndev = vdev->ndev;
  1774. vdev->vpaths[i].fifo.pdev = vdev->pdev;
  1775. vdev->vpaths[i].fifo.indicate_max_pkts =
  1776. vdev->config.fifo_indicate_max_pkts;
  1777. vdev->vpaths[i].ring.rx_vector_no = 0;
  1778. vdev->vpaths[i].ring.rx_csum = vdev->rx_csum;
  1779. vdev->vpaths[i].is_open = 1;
  1780. vdev->vp_handles[i] = vdev->vpaths[i].handle;
  1781. vdev->vpaths[i].ring.gro_enable =
  1782. vdev->config.gro_enable;
  1783. vdev->vpaths[i].ring.vlan_tag_strip =
  1784. vdev->vlan_tag_strip;
  1785. vdev->stats.vpaths_open++;
  1786. } else {
  1787. vdev->stats.vpath_open_fail++;
  1788. vxge_debug_init(VXGE_ERR,
  1789. "%s: vpath: %d failed to open "
  1790. "with status: %d",
  1791. vdev->ndev->name, vdev->vpaths[i].device_id,
  1792. status);
  1793. vxge_close_vpaths(vdev, 0);
  1794. return -EPERM;
  1795. }
  1796. vp_id =
  1797. ((struct __vxge_hw_vpath_handle *)vdev->vpaths[i].handle)->
  1798. vpath->vp_id;
  1799. vdev->vpaths_deployed |= vxge_mBIT(vp_id);
  1800. }
  1801. return VXGE_HW_OK;
  1802. }
  1803. /*
  1804. * vxge_isr_napi
  1805. * @irq: the irq of the device.
  1806. * @dev_id: a void pointer to the hldev structure of the Titan device
  1807. * @ptregs: pointer to the registers pushed on the stack.
  1808. *
  1809. * This function is the ISR handler of the device when napi is enabled. It
  1810. * identifies the reason for the interrupt and calls the relevant service
  1811. * routines.
  1812. */
  1813. static irqreturn_t vxge_isr_napi(int irq, void *dev_id)
  1814. {
  1815. struct __vxge_hw_device *hldev = (struct __vxge_hw_device *)dev_id;
  1816. struct vxgedev *vdev;
  1817. struct net_device *dev;
  1818. u64 reason;
  1819. enum vxge_hw_status status;
  1820. vxge_debug_intr(VXGE_TRACE, "%s:%d", __func__, __LINE__);
  1821. dev = hldev->ndev;
  1822. vdev = netdev_priv(dev);
  1823. if (pci_channel_offline(vdev->pdev))
  1824. return IRQ_NONE;
  1825. if (unlikely(!is_vxge_card_up(vdev)))
  1826. return IRQ_NONE;
  1827. status = vxge_hw_device_begin_irq(hldev, vdev->exec_mode,
  1828. &reason);
  1829. if (status == VXGE_HW_OK) {
  1830. vxge_hw_device_mask_all(hldev);
  1831. if (reason &
  1832. VXGE_HW_TITAN_GENERAL_INT_STATUS_VPATH_TRAFFIC_INT(
  1833. vdev->vpaths_deployed >>
  1834. (64 - VXGE_HW_MAX_VIRTUAL_PATHS))) {
  1835. vxge_hw_device_clear_tx_rx(hldev);
  1836. napi_schedule(&vdev->napi);
  1837. vxge_debug_intr(VXGE_TRACE,
  1838. "%s:%d Exiting...", __func__, __LINE__);
  1839. return IRQ_HANDLED;
  1840. } else
  1841. vxge_hw_device_unmask_all(hldev);
  1842. } else if (unlikely((status == VXGE_HW_ERR_VPATH) ||
  1843. (status == VXGE_HW_ERR_CRITICAL) ||
  1844. (status == VXGE_HW_ERR_FIFO))) {
  1845. vxge_hw_device_mask_all(hldev);
  1846. vxge_hw_device_flush_io(hldev);
  1847. return IRQ_HANDLED;
  1848. } else if (unlikely(status == VXGE_HW_ERR_SLOT_FREEZE))
  1849. return IRQ_HANDLED;
  1850. vxge_debug_intr(VXGE_TRACE, "%s:%d Exiting...", __func__, __LINE__);
  1851. return IRQ_NONE;
  1852. }
  1853. #ifdef CONFIG_PCI_MSI
  1854. static irqreturn_t
  1855. vxge_tx_msix_handle(int irq, void *dev_id)
  1856. {
  1857. struct vxge_fifo *fifo = (struct vxge_fifo *)dev_id;
  1858. VXGE_COMPLETE_VPATH_TX(fifo);
  1859. return IRQ_HANDLED;
  1860. }
  1861. static irqreturn_t
  1862. vxge_rx_msix_napi_handle(int irq, void *dev_id)
  1863. {
  1864. struct vxge_ring *ring = (struct vxge_ring *)dev_id;
  1865. /* MSIX_IDX for Rx is 1 */
  1866. vxge_hw_channel_msix_mask((struct __vxge_hw_channel *)ring->handle,
  1867. ring->rx_vector_no);
  1868. napi_schedule(&ring->napi);
  1869. return IRQ_HANDLED;
  1870. }
  1871. static irqreturn_t
  1872. vxge_alarm_msix_handle(int irq, void *dev_id)
  1873. {
  1874. int i;
  1875. enum vxge_hw_status status;
  1876. struct vxge_vpath *vpath = (struct vxge_vpath *)dev_id;
  1877. struct vxgedev *vdev = vpath->vdev;
  1878. int alarm_msix_id =
  1879. VXGE_HW_VPATH_MSIX_ACTIVE * vdev->no_of_vpath - 2;
  1880. for (i = 0; i < vdev->no_of_vpath; i++) {
  1881. vxge_hw_vpath_msix_mask(vdev->vpaths[i].handle,
  1882. alarm_msix_id);
  1883. status = vxge_hw_vpath_alarm_process(vdev->vpaths[i].handle,
  1884. vdev->exec_mode);
  1885. if (status == VXGE_HW_OK) {
  1886. vxge_hw_vpath_msix_unmask(vdev->vpaths[i].handle,
  1887. alarm_msix_id);
  1888. continue;
  1889. }
  1890. vxge_debug_intr(VXGE_ERR,
  1891. "%s: vxge_hw_vpath_alarm_process failed %x ",
  1892. VXGE_DRIVER_NAME, status);
  1893. }
  1894. return IRQ_HANDLED;
  1895. }
  1896. static int vxge_alloc_msix(struct vxgedev *vdev)
  1897. {
  1898. int j, i, ret = 0;
  1899. int intr_cnt = 0;
  1900. int alarm_msix_id = 0, msix_intr_vect = 0;
  1901. vdev->intr_cnt = 0;
  1902. /* Tx/Rx MSIX Vectors count */
  1903. vdev->intr_cnt = vdev->no_of_vpath * 2;
  1904. /* Alarm MSIX Vectors count */
  1905. vdev->intr_cnt++;
  1906. intr_cnt = (vdev->max_vpath_supported * 2) + 1;
  1907. vdev->entries = kzalloc(intr_cnt * sizeof(struct msix_entry),
  1908. GFP_KERNEL);
  1909. if (!vdev->entries) {
  1910. vxge_debug_init(VXGE_ERR,
  1911. "%s: memory allocation failed",
  1912. VXGE_DRIVER_NAME);
  1913. return -ENOMEM;
  1914. }
  1915. vdev->vxge_entries = kzalloc(intr_cnt * sizeof(struct vxge_msix_entry),
  1916. GFP_KERNEL);
  1917. if (!vdev->vxge_entries) {
  1918. vxge_debug_init(VXGE_ERR, "%s: memory allocation failed",
  1919. VXGE_DRIVER_NAME);
  1920. kfree(vdev->entries);
  1921. return -ENOMEM;
  1922. }
  1923. /* Last vector in the list is used for alarm */
  1924. alarm_msix_id = VXGE_HW_VPATH_MSIX_ACTIVE * vdev->no_of_vpath - 2;
  1925. for (i = 0, j = 0; i < vdev->max_vpath_supported; i++) {
  1926. msix_intr_vect = i * VXGE_HW_VPATH_MSIX_ACTIVE;
  1927. /* Initialize the fifo vector */
  1928. vdev->entries[j].entry = msix_intr_vect;
  1929. vdev->vxge_entries[j].entry = msix_intr_vect;
  1930. vdev->vxge_entries[j].in_use = 0;
  1931. j++;
  1932. /* Initialize the ring vector */
  1933. vdev->entries[j].entry = msix_intr_vect + 1;
  1934. vdev->vxge_entries[j].entry = msix_intr_vect + 1;
  1935. vdev->vxge_entries[j].in_use = 0;
  1936. j++;
  1937. }
  1938. /* Initialize the alarm vector */
  1939. vdev->entries[j].entry = alarm_msix_id;
  1940. vdev->vxge_entries[j].entry = alarm_msix_id;
  1941. vdev->vxge_entries[j].in_use = 0;
  1942. ret = pci_enable_msix(vdev->pdev, vdev->entries, intr_cnt);
  1943. /* if driver request exceeeds available irq's, request with a small
  1944. * number.
  1945. */
  1946. if (ret > 0) {
  1947. vxge_debug_init(VXGE_ERR,
  1948. "%s: MSI-X enable failed for %d vectors, available: %d",
  1949. VXGE_DRIVER_NAME, intr_cnt, ret);
  1950. vdev->max_vpath_supported = vdev->no_of_vpath;
  1951. intr_cnt = (vdev->max_vpath_supported * 2) + 1;
  1952. /* Reset the alarm vector setting */
  1953. vdev->entries[j].entry = 0;
  1954. vdev->vxge_entries[j].entry = 0;
  1955. /* Initialize the alarm vector with new setting */
  1956. vdev->entries[intr_cnt - 1].entry = alarm_msix_id;
  1957. vdev->vxge_entries[intr_cnt - 1].entry = alarm_msix_id;
  1958. vdev->vxge_entries[intr_cnt - 1].in_use = 0;
  1959. ret = pci_enable_msix(vdev->pdev, vdev->entries, intr_cnt);
  1960. if (!ret)
  1961. vxge_debug_init(VXGE_ERR,
  1962. "%s: MSI-X enabled for %d vectors",
  1963. VXGE_DRIVER_NAME, intr_cnt);
  1964. }
  1965. if (ret) {
  1966. vxge_debug_init(VXGE_ERR,
  1967. "%s: MSI-X enable failed for %d vectors, ret: %d",
  1968. VXGE_DRIVER_NAME, intr_cnt, ret);
  1969. kfree(vdev->entries);
  1970. kfree(vdev->vxge_entries);
  1971. vdev->entries = NULL;
  1972. vdev->vxge_entries = NULL;
  1973. return -ENODEV;
  1974. }
  1975. return 0;
  1976. }
  1977. static int vxge_enable_msix(struct vxgedev *vdev)
  1978. {
  1979. int i, ret = 0;
  1980. enum vxge_hw_status status;
  1981. /* 0 - Tx, 1 - Rx */
  1982. int tim_msix_id[4];
  1983. int alarm_msix_id = 0, msix_intr_vect = 0;;
  1984. vdev->intr_cnt = 0;
  1985. /* allocate msix vectors */
  1986. ret = vxge_alloc_msix(vdev);
  1987. if (!ret) {
  1988. /* Last vector in the list is used for alarm */
  1989. alarm_msix_id =
  1990. VXGE_HW_VPATH_MSIX_ACTIVE * vdev->no_of_vpath - 2;
  1991. for (i = 0; i < vdev->no_of_vpath; i++) {
  1992. /* If fifo or ring are not enabled
  1993. the MSIX vector for that should be set to 0
  1994. Hence initializeing this array to all 0s.
  1995. */
  1996. memset(tim_msix_id, 0, sizeof(tim_msix_id));
  1997. msix_intr_vect = i * VXGE_HW_VPATH_MSIX_ACTIVE;
  1998. tim_msix_id[0] = msix_intr_vect;
  1999. tim_msix_id[1] = msix_intr_vect + 1;
  2000. vdev->vpaths[i].ring.rx_vector_no = tim_msix_id[1];
  2001. status = vxge_hw_vpath_msix_set(
  2002. vdev->vpaths[i].handle,
  2003. tim_msix_id, alarm_msix_id);
  2004. if (status != VXGE_HW_OK) {
  2005. vxge_debug_init(VXGE_ERR,
  2006. "vxge_hw_vpath_msix_set "
  2007. "failed with status : %x", status);
  2008. kfree(vdev->entries);
  2009. kfree(vdev->vxge_entries);
  2010. pci_disable_msix(vdev->pdev);
  2011. return -ENODEV;
  2012. }
  2013. }
  2014. }
  2015. return ret;
  2016. }
  2017. static void vxge_rem_msix_isr(struct vxgedev *vdev)
  2018. {
  2019. int intr_cnt;
  2020. for (intr_cnt = 0; intr_cnt < (vdev->max_vpath_supported * 2 + 1);
  2021. intr_cnt++) {
  2022. if (vdev->vxge_entries[intr_cnt].in_use) {
  2023. synchronize_irq(vdev->entries[intr_cnt].vector);
  2024. free_irq(vdev->entries[intr_cnt].vector,
  2025. vdev->vxge_entries[intr_cnt].arg);
  2026. vdev->vxge_entries[intr_cnt].in_use = 0;
  2027. }
  2028. }
  2029. kfree(vdev->entries);
  2030. kfree(vdev->vxge_entries);
  2031. vdev->entries = NULL;
  2032. vdev->vxge_entries = NULL;
  2033. if (vdev->config.intr_type == MSI_X)
  2034. pci_disable_msix(vdev->pdev);
  2035. }
  2036. #endif
  2037. static void vxge_rem_isr(struct vxgedev *vdev)
  2038. {
  2039. struct __vxge_hw_device *hldev;
  2040. hldev = (struct __vxge_hw_device *) pci_get_drvdata(vdev->pdev);
  2041. #ifdef CONFIG_PCI_MSI
  2042. if (vdev->config.intr_type == MSI_X) {
  2043. vxge_rem_msix_isr(vdev);
  2044. } else
  2045. #endif
  2046. if (vdev->config.intr_type == INTA) {
  2047. synchronize_irq(vdev->pdev->irq);
  2048. free_irq(vdev->pdev->irq, hldev);
  2049. }
  2050. }
  2051. static int vxge_add_isr(struct vxgedev *vdev)
  2052. {
  2053. int ret = 0;
  2054. struct __vxge_hw_device *hldev =
  2055. (struct __vxge_hw_device *) pci_get_drvdata(vdev->pdev);
  2056. #ifdef CONFIG_PCI_MSI
  2057. int vp_idx = 0, intr_idx = 0, intr_cnt = 0, msix_idx = 0, irq_req = 0;
  2058. u64 function_mode = vdev->config.device_hw_info.function_mode;
  2059. int pci_fun = PCI_FUNC(vdev->pdev->devfn);
  2060. if (vdev->config.intr_type == MSI_X)
  2061. ret = vxge_enable_msix(vdev);
  2062. if (ret) {
  2063. vxge_debug_init(VXGE_ERR,
  2064. "%s: Enabling MSI-X Failed", VXGE_DRIVER_NAME);
  2065. if ((function_mode == VXGE_HW_FUNCTION_MODE_MULTI_FUNCTION) &&
  2066. test_and_set_bit(__VXGE_STATE_CARD_UP,
  2067. &driver_config->inta_dev_open))
  2068. return VXGE_HW_FAIL;
  2069. else {
  2070. vxge_debug_init(VXGE_ERR,
  2071. "%s: Defaulting to INTA", VXGE_DRIVER_NAME);
  2072. vdev->config.intr_type = INTA;
  2073. vxge_hw_device_set_intr_type(vdev->devh,
  2074. VXGE_HW_INTR_MODE_IRQLINE);
  2075. vxge_close_vpaths(vdev, 1);
  2076. vdev->no_of_vpath = 1;
  2077. vdev->stats.vpaths_open = 1;
  2078. }
  2079. }
  2080. if (vdev->config.intr_type == MSI_X) {
  2081. for (intr_idx = 0;
  2082. intr_idx < (vdev->no_of_vpath *
  2083. VXGE_HW_VPATH_MSIX_ACTIVE); intr_idx++) {
  2084. msix_idx = intr_idx % VXGE_HW_VPATH_MSIX_ACTIVE;
  2085. irq_req = 0;
  2086. switch (msix_idx) {
  2087. case 0:
  2088. snprintf(vdev->desc[intr_cnt], VXGE_INTR_STRLEN,
  2089. "%s:vxge fn: %d vpath: %d Tx MSI-X: %d",
  2090. vdev->ndev->name, pci_fun, vp_idx,
  2091. vdev->entries[intr_cnt].entry);
  2092. ret = request_irq(
  2093. vdev->entries[intr_cnt].vector,
  2094. vxge_tx_msix_handle, 0,
  2095. vdev->desc[intr_cnt],
  2096. &vdev->vpaths[vp_idx].fifo);
  2097. vdev->vxge_entries[intr_cnt].arg =
  2098. &vdev->vpaths[vp_idx].fifo;
  2099. irq_req = 1;
  2100. break;
  2101. case 1:
  2102. snprintf(vdev->desc[intr_cnt], VXGE_INTR_STRLEN,
  2103. "%s:vxge fn: %d vpath: %d Rx MSI-X: %d",
  2104. vdev->ndev->name, pci_fun, vp_idx,
  2105. vdev->entries[intr_cnt].entry);
  2106. ret = request_irq(
  2107. vdev->entries[intr_cnt].vector,
  2108. vxge_rx_msix_napi_handle,
  2109. 0,
  2110. vdev->desc[intr_cnt],
  2111. &vdev->vpaths[vp_idx].ring);
  2112. vdev->vxge_entries[intr_cnt].arg =
  2113. &vdev->vpaths[vp_idx].ring;
  2114. irq_req = 1;
  2115. break;
  2116. }
  2117. if (ret) {
  2118. vxge_debug_init(VXGE_ERR,
  2119. "%s: MSIX - %d Registration failed",
  2120. vdev->ndev->name, intr_cnt);
  2121. vxge_rem_msix_isr(vdev);
  2122. if ((function_mode ==
  2123. VXGE_HW_FUNCTION_MODE_MULTI_FUNCTION) &&
  2124. test_and_set_bit(__VXGE_STATE_CARD_UP,
  2125. &driver_config->inta_dev_open))
  2126. return VXGE_HW_FAIL;
  2127. else {
  2128. vxge_hw_device_set_intr_type(
  2129. vdev->devh,
  2130. VXGE_HW_INTR_MODE_IRQLINE);
  2131. vdev->config.intr_type = INTA;
  2132. vxge_debug_init(VXGE_ERR,
  2133. "%s: Defaulting to INTA"
  2134. , vdev->ndev->name);
  2135. vxge_close_vpaths(vdev, 1);
  2136. vdev->no_of_vpath = 1;
  2137. vdev->stats.vpaths_open = 1;
  2138. goto INTA_MODE;
  2139. }
  2140. }
  2141. if (irq_req) {
  2142. /* We requested for this msix interrupt */
  2143. vdev->vxge_entries[intr_cnt].in_use = 1;
  2144. vxge_hw_vpath_msix_unmask(
  2145. vdev->vpaths[vp_idx].handle,
  2146. intr_idx);
  2147. intr_cnt++;
  2148. }
  2149. /* Point to next vpath handler */
  2150. if (((intr_idx + 1) % VXGE_HW_VPATH_MSIX_ACTIVE == 0)
  2151. && (vp_idx < (vdev->no_of_vpath - 1)))
  2152. vp_idx++;
  2153. }
  2154. intr_cnt = vdev->max_vpath_supported * 2;
  2155. snprintf(vdev->desc[intr_cnt], VXGE_INTR_STRLEN,
  2156. "%s:vxge Alarm fn: %d MSI-X: %d",
  2157. vdev->ndev->name, pci_fun,
  2158. vdev->entries[intr_cnt].entry);
  2159. /* For Alarm interrupts */
  2160. ret = request_irq(vdev->entries[intr_cnt].vector,
  2161. vxge_alarm_msix_handle, 0,
  2162. vdev->desc[intr_cnt],
  2163. &vdev->vpaths[vp_idx]);
  2164. if (ret) {
  2165. vxge_debug_init(VXGE_ERR,
  2166. "%s: MSIX - %d Registration failed",
  2167. vdev->ndev->name, intr_cnt);
  2168. vxge_rem_msix_isr(vdev);
  2169. if ((function_mode ==
  2170. VXGE_HW_FUNCTION_MODE_MULTI_FUNCTION) &&
  2171. test_and_set_bit(__VXGE_STATE_CARD_UP,
  2172. &driver_config->inta_dev_open))
  2173. return VXGE_HW_FAIL;
  2174. else {
  2175. vxge_hw_device_set_intr_type(vdev->devh,
  2176. VXGE_HW_INTR_MODE_IRQLINE);
  2177. vdev->config.intr_type = INTA;
  2178. vxge_debug_init(VXGE_ERR,
  2179. "%s: Defaulting to INTA",
  2180. vdev->ndev->name);
  2181. vxge_close_vpaths(vdev, 1);
  2182. vdev->no_of_vpath = 1;
  2183. vdev->stats.vpaths_open = 1;
  2184. goto INTA_MODE;
  2185. }
  2186. }
  2187. vxge_hw_vpath_msix_unmask(vdev->vpaths[vp_idx].handle,
  2188. intr_idx - 2);
  2189. vdev->vxge_entries[intr_cnt].in_use = 1;
  2190. vdev->vxge_entries[intr_cnt].arg = &vdev->vpaths[vp_idx];
  2191. }
  2192. INTA_MODE:
  2193. #endif
  2194. snprintf(vdev->desc[0], VXGE_INTR_STRLEN, "%s:vxge", vdev->ndev->name);
  2195. if (vdev->config.intr_type == INTA) {
  2196. ret = request_irq((int) vdev->pdev->irq,
  2197. vxge_isr_napi,
  2198. IRQF_SHARED, vdev->desc[0], hldev);
  2199. if (ret) {
  2200. vxge_debug_init(VXGE_ERR,
  2201. "%s %s-%d: ISR registration failed",
  2202. VXGE_DRIVER_NAME, "IRQ", vdev->pdev->irq);
  2203. return -ENODEV;
  2204. }
  2205. vxge_debug_init(VXGE_TRACE,
  2206. "new %s-%d line allocated",
  2207. "IRQ", vdev->pdev->irq);
  2208. }
  2209. return VXGE_HW_OK;
  2210. }
  2211. static void vxge_poll_vp_reset(unsigned long data)
  2212. {
  2213. struct vxgedev *vdev = (struct vxgedev *)data;
  2214. int i, j = 0;
  2215. for (i = 0; i < vdev->no_of_vpath; i++) {
  2216. if (test_bit(i, &vdev->vp_reset)) {
  2217. vxge_reset_vpath(vdev, i);
  2218. j++;
  2219. }
  2220. }
  2221. if (j && (vdev->config.intr_type != MSI_X)) {
  2222. vxge_hw_device_unmask_all(vdev->devh);
  2223. vxge_hw_device_flush_io(vdev->devh);
  2224. }
  2225. mod_timer(&vdev->vp_reset_timer, jiffies + HZ / 2);
  2226. }
  2227. static void vxge_poll_vp_lockup(unsigned long data)
  2228. {
  2229. struct vxgedev *vdev = (struct vxgedev *)data;
  2230. int i;
  2231. struct vxge_ring *ring;
  2232. enum vxge_hw_status status = VXGE_HW_OK;
  2233. for (i = 0; i < vdev->no_of_vpath; i++) {
  2234. ring = &vdev->vpaths[i].ring;
  2235. /* Did this vpath received any packets */
  2236. if (ring->stats.prev_rx_frms == ring->stats.rx_frms) {
  2237. status = vxge_hw_vpath_check_leak(ring->handle);
  2238. /* Did it received any packets last time */
  2239. if ((VXGE_HW_FAIL == status) &&
  2240. (VXGE_HW_FAIL == ring->last_status)) {
  2241. /* schedule vpath reset */
  2242. if (!test_and_set_bit(i, &vdev->vp_reset)) {
  2243. /* disable interrupts for this vpath */
  2244. vxge_vpath_intr_disable(vdev, i);
  2245. /* stop the queue for this vpath */
  2246. vxge_stop_tx_queue(&vdev->vpaths[i].
  2247. fifo);
  2248. continue;
  2249. }
  2250. }
  2251. }
  2252. ring->stats.prev_rx_frms = ring->stats.rx_frms;
  2253. ring->last_status = status;
  2254. }
  2255. /* Check every 1 milli second */
  2256. mod_timer(&vdev->vp_lockup_timer, jiffies + HZ / 1000);
  2257. }
  2258. /**
  2259. * vxge_open
  2260. * @dev: pointer to the device structure.
  2261. *
  2262. * This function is the open entry point of the driver. It mainly calls a
  2263. * function to allocate Rx buffers and inserts them into the buffer
  2264. * descriptors and then enables the Rx part of the NIC.
  2265. * Return value: '0' on success and an appropriate (-)ve integer as
  2266. * defined in errno.h file on failure.
  2267. */
  2268. int
  2269. vxge_open(struct net_device *dev)
  2270. {
  2271. enum vxge_hw_status status;
  2272. struct vxgedev *vdev;
  2273. struct __vxge_hw_device *hldev;
  2274. int ret = 0;
  2275. int i;
  2276. u64 val64, function_mode;
  2277. vxge_debug_entryexit(VXGE_TRACE,
  2278. "%s: %s:%d", dev->name, __func__, __LINE__);
  2279. vdev = (struct vxgedev *)netdev_priv(dev);
  2280. hldev = (struct __vxge_hw_device *) pci_get_drvdata(vdev->pdev);
  2281. function_mode = vdev->config.device_hw_info.function_mode;
  2282. /* make sure you have link off by default every time Nic is
  2283. * initialized */
  2284. netif_carrier_off(dev);
  2285. /* Check for another device already opn with INTA */
  2286. if ((function_mode == VXGE_HW_FUNCTION_MODE_MULTI_FUNCTION) &&
  2287. test_bit(__VXGE_STATE_CARD_UP, &driver_config->inta_dev_open)) {
  2288. ret = -EPERM;
  2289. goto out0;
  2290. }
  2291. /* Open VPATHs */
  2292. status = vxge_open_vpaths(vdev);
  2293. if (status != VXGE_HW_OK) {
  2294. vxge_debug_init(VXGE_ERR,
  2295. "%s: fatal: Vpath open failed", vdev->ndev->name);
  2296. ret = -EPERM;
  2297. goto out0;
  2298. }
  2299. vdev->mtu = dev->mtu;
  2300. status = vxge_add_isr(vdev);
  2301. if (status != VXGE_HW_OK) {
  2302. vxge_debug_init(VXGE_ERR,
  2303. "%s: fatal: ISR add failed", dev->name);
  2304. ret = -EPERM;
  2305. goto out1;
  2306. }
  2307. if (vdev->config.intr_type != MSI_X) {
  2308. netif_napi_add(dev, &vdev->napi, vxge_poll_inta,
  2309. vdev->config.napi_weight);
  2310. napi_enable(&vdev->napi);
  2311. } else {
  2312. for (i = 0; i < vdev->no_of_vpath; i++) {
  2313. netif_napi_add(dev, &vdev->vpaths[i].ring.napi,
  2314. vxge_poll_msix, vdev->config.napi_weight);
  2315. napi_enable(&vdev->vpaths[i].ring.napi);
  2316. }
  2317. }
  2318. /* configure RTH */
  2319. if (vdev->config.rth_steering) {
  2320. status = vxge_rth_configure(vdev);
  2321. if (status != VXGE_HW_OK) {
  2322. vxge_debug_init(VXGE_ERR,
  2323. "%s: fatal: RTH configuration failed",
  2324. dev->name);
  2325. ret = -EPERM;
  2326. goto out2;
  2327. }
  2328. }
  2329. for (i = 0; i < vdev->no_of_vpath; i++) {
  2330. /* set initial mtu before enabling the device */
  2331. status = vxge_hw_vpath_mtu_set(vdev->vpaths[i].handle,
  2332. vdev->mtu);
  2333. if (status != VXGE_HW_OK) {
  2334. vxge_debug_init(VXGE_ERR,
  2335. "%s: fatal: can not set new MTU", dev->name);
  2336. ret = -EPERM;
  2337. goto out2;
  2338. }
  2339. }
  2340. VXGE_DEVICE_DEBUG_LEVEL_SET(VXGE_TRACE, VXGE_COMPONENT_LL, vdev);
  2341. vxge_debug_init(vdev->level_trace,
  2342. "%s: MTU is %d", vdev->ndev->name, vdev->mtu);
  2343. VXGE_DEVICE_DEBUG_LEVEL_SET(VXGE_ERR, VXGE_COMPONENT_LL, vdev);
  2344. /* Reprogram the DA table with populated mac addresses */
  2345. for (i = 0; i < vdev->no_of_vpath; i++) {
  2346. vxge_restore_vpath_mac_addr(&vdev->vpaths[i]);
  2347. vxge_restore_vpath_vid_table(&vdev->vpaths[i]);
  2348. }
  2349. /* Enable vpath to sniff all unicast/multicast traffic that not
  2350. * addressed to them. We allow promiscous mode for PF only
  2351. */
  2352. val64 = 0;
  2353. for (i = 0; i < VXGE_HW_MAX_VIRTUAL_PATHS; i++)
  2354. val64 |= VXGE_HW_RXMAC_AUTHORIZE_ALL_ADDR_VP(i);
  2355. vxge_hw_mgmt_reg_write(vdev->devh,
  2356. vxge_hw_mgmt_reg_type_mrpcim,
  2357. 0,
  2358. (ulong)offsetof(struct vxge_hw_mrpcim_reg,
  2359. rxmac_authorize_all_addr),
  2360. val64);
  2361. vxge_hw_mgmt_reg_write(vdev->devh,
  2362. vxge_hw_mgmt_reg_type_mrpcim,
  2363. 0,
  2364. (ulong)offsetof(struct vxge_hw_mrpcim_reg,
  2365. rxmac_authorize_all_vid),
  2366. val64);
  2367. vxge_set_multicast(dev);
  2368. /* Enabling Bcast and mcast for all vpath */
  2369. for (i = 0; i < vdev->no_of_vpath; i++) {
  2370. status = vxge_hw_vpath_bcast_enable(vdev->vpaths[i].handle);
  2371. if (status != VXGE_HW_OK)
  2372. vxge_debug_init(VXGE_ERR,
  2373. "%s : Can not enable bcast for vpath "
  2374. "id %d", dev->name, i);
  2375. if (vdev->config.addr_learn_en) {
  2376. status =
  2377. vxge_hw_vpath_mcast_enable(vdev->vpaths[i].handle);
  2378. if (status != VXGE_HW_OK)
  2379. vxge_debug_init(VXGE_ERR,
  2380. "%s : Can not enable mcast for vpath "
  2381. "id %d", dev->name, i);
  2382. }
  2383. }
  2384. vxge_hw_device_setpause_data(vdev->devh, 0,
  2385. vdev->config.tx_pause_enable,
  2386. vdev->config.rx_pause_enable);
  2387. if (vdev->vp_reset_timer.function == NULL)
  2388. vxge_os_timer(vdev->vp_reset_timer,
  2389. vxge_poll_vp_reset, vdev, (HZ/2));
  2390. if (vdev->vp_lockup_timer.function == NULL)
  2391. vxge_os_timer(vdev->vp_lockup_timer,
  2392. vxge_poll_vp_lockup, vdev, (HZ/2));
  2393. set_bit(__VXGE_STATE_CARD_UP, &vdev->state);
  2394. smp_wmb();
  2395. if (vxge_hw_device_link_state_get(vdev->devh) == VXGE_HW_LINK_UP) {
  2396. netif_carrier_on(vdev->ndev);
  2397. printk(KERN_NOTICE "%s: Link Up\n", vdev->ndev->name);
  2398. vdev->stats.link_up++;
  2399. }
  2400. vxge_hw_device_intr_enable(vdev->devh);
  2401. smp_wmb();
  2402. for (i = 0; i < vdev->no_of_vpath; i++) {
  2403. vxge_hw_vpath_enable(vdev->vpaths[i].handle);
  2404. smp_wmb();
  2405. vxge_hw_vpath_rx_doorbell_init(vdev->vpaths[i].handle);
  2406. }
  2407. vxge_start_all_tx_queue(vdev);
  2408. goto out0;
  2409. out2:
  2410. vxge_rem_isr(vdev);
  2411. /* Disable napi */
  2412. if (vdev->config.intr_type != MSI_X)
  2413. napi_disable(&vdev->napi);
  2414. else {
  2415. for (i = 0; i < vdev->no_of_vpath; i++)
  2416. napi_disable(&vdev->vpaths[i].ring.napi);
  2417. }
  2418. out1:
  2419. vxge_close_vpaths(vdev, 0);
  2420. out0:
  2421. vxge_debug_entryexit(VXGE_TRACE,
  2422. "%s: %s:%d Exiting...",
  2423. dev->name, __func__, __LINE__);
  2424. return ret;
  2425. }
  2426. /* Loop throught the mac address list and delete all the entries */
  2427. void vxge_free_mac_add_list(struct vxge_vpath *vpath)
  2428. {
  2429. struct list_head *entry, *next;
  2430. if (list_empty(&vpath->mac_addr_list))
  2431. return;
  2432. list_for_each_safe(entry, next, &vpath->mac_addr_list) {
  2433. list_del(entry);
  2434. kfree((struct vxge_mac_addrs *)entry);
  2435. }
  2436. }
  2437. static void vxge_napi_del_all(struct vxgedev *vdev)
  2438. {
  2439. int i;
  2440. if (vdev->config.intr_type != MSI_X)
  2441. netif_napi_del(&vdev->napi);
  2442. else {
  2443. for (i = 0; i < vdev->no_of_vpath; i++)
  2444. netif_napi_del(&vdev->vpaths[i].ring.napi);
  2445. }
  2446. return;
  2447. }
  2448. int do_vxge_close(struct net_device *dev, int do_io)
  2449. {
  2450. enum vxge_hw_status status;
  2451. struct vxgedev *vdev;
  2452. struct __vxge_hw_device *hldev;
  2453. int i;
  2454. u64 val64, vpath_vector;
  2455. vxge_debug_entryexit(VXGE_TRACE, "%s: %s:%d",
  2456. dev->name, __func__, __LINE__);
  2457. vdev = (struct vxgedev *)netdev_priv(dev);
  2458. hldev = (struct __vxge_hw_device *) pci_get_drvdata(vdev->pdev);
  2459. /* If vxge_handle_crit_err task is executing,
  2460. * wait till it completes. */
  2461. while (test_and_set_bit(__VXGE_STATE_RESET_CARD, &vdev->state))
  2462. msleep(50);
  2463. clear_bit(__VXGE_STATE_CARD_UP, &vdev->state);
  2464. if (do_io) {
  2465. /* Put the vpath back in normal mode */
  2466. vpath_vector = vxge_mBIT(vdev->vpaths[0].device_id);
  2467. status = vxge_hw_mgmt_reg_read(vdev->devh,
  2468. vxge_hw_mgmt_reg_type_mrpcim,
  2469. 0,
  2470. (ulong)offsetof(
  2471. struct vxge_hw_mrpcim_reg,
  2472. rts_mgr_cbasin_cfg),
  2473. &val64);
  2474. if (status == VXGE_HW_OK) {
  2475. val64 &= ~vpath_vector;
  2476. status = vxge_hw_mgmt_reg_write(vdev->devh,
  2477. vxge_hw_mgmt_reg_type_mrpcim,
  2478. 0,
  2479. (ulong)offsetof(
  2480. struct vxge_hw_mrpcim_reg,
  2481. rts_mgr_cbasin_cfg),
  2482. val64);
  2483. }
  2484. /* Remove the function 0 from promiscous mode */
  2485. vxge_hw_mgmt_reg_write(vdev->devh,
  2486. vxge_hw_mgmt_reg_type_mrpcim,
  2487. 0,
  2488. (ulong)offsetof(struct vxge_hw_mrpcim_reg,
  2489. rxmac_authorize_all_addr),
  2490. 0);
  2491. vxge_hw_mgmt_reg_write(vdev->devh,
  2492. vxge_hw_mgmt_reg_type_mrpcim,
  2493. 0,
  2494. (ulong)offsetof(struct vxge_hw_mrpcim_reg,
  2495. rxmac_authorize_all_vid),
  2496. 0);
  2497. smp_wmb();
  2498. }
  2499. del_timer_sync(&vdev->vp_lockup_timer);
  2500. del_timer_sync(&vdev->vp_reset_timer);
  2501. /* Disable napi */
  2502. if (vdev->config.intr_type != MSI_X)
  2503. napi_disable(&vdev->napi);
  2504. else {
  2505. for (i = 0; i < vdev->no_of_vpath; i++)
  2506. napi_disable(&vdev->vpaths[i].ring.napi);
  2507. }
  2508. netif_carrier_off(vdev->ndev);
  2509. printk(KERN_NOTICE "%s: Link Down\n", vdev->ndev->name);
  2510. vxge_stop_all_tx_queue(vdev);
  2511. /* Note that at this point xmit() is stopped by upper layer */
  2512. if (do_io)
  2513. vxge_hw_device_intr_disable(vdev->devh);
  2514. mdelay(1000);
  2515. vxge_rem_isr(vdev);
  2516. vxge_napi_del_all(vdev);
  2517. if (do_io)
  2518. vxge_reset_all_vpaths(vdev);
  2519. vxge_close_vpaths(vdev, 0);
  2520. vxge_debug_entryexit(VXGE_TRACE,
  2521. "%s: %s:%d Exiting...", dev->name, __func__, __LINE__);
  2522. clear_bit(__VXGE_STATE_CARD_UP, &driver_config->inta_dev_open);
  2523. clear_bit(__VXGE_STATE_RESET_CARD, &vdev->state);
  2524. return 0;
  2525. }
  2526. /**
  2527. * vxge_close
  2528. * @dev: device pointer.
  2529. *
  2530. * This is the stop entry point of the driver. It needs to undo exactly
  2531. * whatever was done by the open entry point, thus it's usually referred to
  2532. * as the close function.Among other things this function mainly stops the
  2533. * Rx side of the NIC and frees all the Rx buffers in the Rx rings.
  2534. * Return value: '0' on success and an appropriate (-)ve integer as
  2535. * defined in errno.h file on failure.
  2536. */
  2537. int
  2538. vxge_close(struct net_device *dev)
  2539. {
  2540. do_vxge_close(dev, 1);
  2541. return 0;
  2542. }
  2543. /**
  2544. * vxge_change_mtu
  2545. * @dev: net device pointer.
  2546. * @new_mtu :the new MTU size for the device.
  2547. *
  2548. * A driver entry point to change MTU size for the device. Before changing
  2549. * the MTU the device must be stopped.
  2550. */
  2551. static int vxge_change_mtu(struct net_device *dev, int new_mtu)
  2552. {
  2553. struct vxgedev *vdev = netdev_priv(dev);
  2554. vxge_debug_entryexit(vdev->level_trace,
  2555. "%s:%d", __func__, __LINE__);
  2556. if ((new_mtu < VXGE_HW_MIN_MTU) || (new_mtu > VXGE_HW_MAX_MTU)) {
  2557. vxge_debug_init(vdev->level_err,
  2558. "%s: mtu size is invalid", dev->name);
  2559. return -EPERM;
  2560. }
  2561. /* check if device is down already */
  2562. if (unlikely(!is_vxge_card_up(vdev))) {
  2563. /* just store new value, will use later on open() */
  2564. dev->mtu = new_mtu;
  2565. vxge_debug_init(vdev->level_err,
  2566. "%s", "device is down on MTU change");
  2567. return 0;
  2568. }
  2569. vxge_debug_init(vdev->level_trace,
  2570. "trying to apply new MTU %d", new_mtu);
  2571. if (vxge_close(dev))
  2572. return -EIO;
  2573. dev->mtu = new_mtu;
  2574. vdev->mtu = new_mtu;
  2575. if (vxge_open(dev))
  2576. return -EIO;
  2577. vxge_debug_init(vdev->level_trace,
  2578. "%s: MTU changed to %d", vdev->ndev->name, new_mtu);
  2579. vxge_debug_entryexit(vdev->level_trace,
  2580. "%s:%d Exiting...", __func__, __LINE__);
  2581. return 0;
  2582. }
  2583. /**
  2584. * vxge_get_stats
  2585. * @dev: pointer to the device structure
  2586. *
  2587. * Updates the device statistics structure. This function updates the device
  2588. * statistics structure in the net_device structure and returns a pointer
  2589. * to the same.
  2590. */
  2591. static struct net_device_stats *
  2592. vxge_get_stats(struct net_device *dev)
  2593. {
  2594. struct vxgedev *vdev;
  2595. struct net_device_stats *net_stats;
  2596. int k;
  2597. vdev = netdev_priv(dev);
  2598. net_stats = &vdev->stats.net_stats;
  2599. memset(net_stats, 0, sizeof(struct net_device_stats));
  2600. for (k = 0; k < vdev->no_of_vpath; k++) {
  2601. net_stats->rx_packets += vdev->vpaths[k].ring.stats.rx_frms;
  2602. net_stats->rx_bytes += vdev->vpaths[k].ring.stats.rx_bytes;
  2603. net_stats->rx_errors += vdev->vpaths[k].ring.stats.rx_errors;
  2604. net_stats->multicast += vdev->vpaths[k].ring.stats.rx_mcast;
  2605. net_stats->rx_dropped +=
  2606. vdev->vpaths[k].ring.stats.rx_dropped;
  2607. net_stats->tx_packets += vdev->vpaths[k].fifo.stats.tx_frms;
  2608. net_stats->tx_bytes += vdev->vpaths[k].fifo.stats.tx_bytes;
  2609. net_stats->tx_errors += vdev->vpaths[k].fifo.stats.tx_errors;
  2610. }
  2611. return net_stats;
  2612. }
  2613. /**
  2614. * vxge_ioctl
  2615. * @dev: Device pointer.
  2616. * @ifr: An IOCTL specific structure, that can contain a pointer to
  2617. * a proprietary structure used to pass information to the driver.
  2618. * @cmd: This is used to distinguish between the different commands that
  2619. * can be passed to the IOCTL functions.
  2620. *
  2621. * Entry point for the Ioctl.
  2622. */
  2623. static int vxge_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
  2624. {
  2625. return -EOPNOTSUPP;
  2626. }
  2627. /**
  2628. * vxge_tx_watchdog
  2629. * @dev: pointer to net device structure
  2630. *
  2631. * Watchdog for transmit side.
  2632. * This function is triggered if the Tx Queue is stopped
  2633. * for a pre-defined amount of time when the Interface is still up.
  2634. */
  2635. static void
  2636. vxge_tx_watchdog(struct net_device *dev)
  2637. {
  2638. struct vxgedev *vdev;
  2639. vxge_debug_entryexit(VXGE_TRACE, "%s:%d", __func__, __LINE__);
  2640. vdev = (struct vxgedev *)netdev_priv(dev);
  2641. vdev->cric_err_event = VXGE_HW_EVENT_RESET_START;
  2642. vxge_reset(vdev);
  2643. vxge_debug_entryexit(VXGE_TRACE,
  2644. "%s:%d Exiting...", __func__, __LINE__);
  2645. }
  2646. /**
  2647. * vxge_vlan_rx_register
  2648. * @dev: net device pointer.
  2649. * @grp: vlan group
  2650. *
  2651. * Vlan group registration
  2652. */
  2653. static void
  2654. vxge_vlan_rx_register(struct net_device *dev, struct vlan_group *grp)
  2655. {
  2656. struct vxgedev *vdev;
  2657. struct vxge_vpath *vpath;
  2658. int vp;
  2659. u64 vid;
  2660. enum vxge_hw_status status;
  2661. int i;
  2662. vxge_debug_entryexit(VXGE_TRACE, "%s:%d", __func__, __LINE__);
  2663. vdev = (struct vxgedev *)netdev_priv(dev);
  2664. vpath = &vdev->vpaths[0];
  2665. if ((NULL == grp) && (vpath->is_open)) {
  2666. /* Get the first vlan */
  2667. status = vxge_hw_vpath_vid_get(vpath->handle, &vid);
  2668. while (status == VXGE_HW_OK) {
  2669. /* Delete this vlan from the vid table */
  2670. for (vp = 0; vp < vdev->no_of_vpath; vp++) {
  2671. vpath = &vdev->vpaths[vp];
  2672. if (!vpath->is_open)
  2673. continue;
  2674. vxge_hw_vpath_vid_delete(vpath->handle, vid);
  2675. }
  2676. /* Get the next vlan to be deleted */
  2677. vpath = &vdev->vpaths[0];
  2678. status = vxge_hw_vpath_vid_get(vpath->handle, &vid);
  2679. }
  2680. }
  2681. vdev->vlgrp = grp;
  2682. for (i = 0; i < vdev->no_of_vpath; i++) {
  2683. if (vdev->vpaths[i].is_configured)
  2684. vdev->vpaths[i].ring.vlgrp = grp;
  2685. }
  2686. vxge_debug_entryexit(VXGE_TRACE,
  2687. "%s:%d Exiting...", __func__, __LINE__);
  2688. }
  2689. /**
  2690. * vxge_vlan_rx_add_vid
  2691. * @dev: net device pointer.
  2692. * @vid: vid
  2693. *
  2694. * Add the vlan id to the devices vlan id table
  2695. */
  2696. static void
  2697. vxge_vlan_rx_add_vid(struct net_device *dev, unsigned short vid)
  2698. {
  2699. struct vxgedev *vdev;
  2700. struct vxge_vpath *vpath;
  2701. int vp_id;
  2702. vdev = (struct vxgedev *)netdev_priv(dev);
  2703. /* Add these vlan to the vid table */
  2704. for (vp_id = 0; vp_id < vdev->no_of_vpath; vp_id++) {
  2705. vpath = &vdev->vpaths[vp_id];
  2706. if (!vpath->is_open)
  2707. continue;
  2708. vxge_hw_vpath_vid_add(vpath->handle, vid);
  2709. }
  2710. }
  2711. /**
  2712. * vxge_vlan_rx_add_vid
  2713. * @dev: net device pointer.
  2714. * @vid: vid
  2715. *
  2716. * Remove the vlan id from the device's vlan id table
  2717. */
  2718. static void
  2719. vxge_vlan_rx_kill_vid(struct net_device *dev, unsigned short vid)
  2720. {
  2721. struct vxgedev *vdev;
  2722. struct vxge_vpath *vpath;
  2723. int vp_id;
  2724. vxge_debug_entryexit(VXGE_TRACE, "%s:%d", __func__, __LINE__);
  2725. vdev = (struct vxgedev *)netdev_priv(dev);
  2726. vlan_group_set_device(vdev->vlgrp, vid, NULL);
  2727. /* Delete this vlan from the vid table */
  2728. for (vp_id = 0; vp_id < vdev->no_of_vpath; vp_id++) {
  2729. vpath = &vdev->vpaths[vp_id];
  2730. if (!vpath->is_open)
  2731. continue;
  2732. vxge_hw_vpath_vid_delete(vpath->handle, vid);
  2733. }
  2734. vxge_debug_entryexit(VXGE_TRACE,
  2735. "%s:%d Exiting...", __func__, __LINE__);
  2736. }
  2737. static const struct net_device_ops vxge_netdev_ops = {
  2738. .ndo_open = vxge_open,
  2739. .ndo_stop = vxge_close,
  2740. .ndo_get_stats = vxge_get_stats,
  2741. .ndo_start_xmit = vxge_xmit,
  2742. .ndo_validate_addr = eth_validate_addr,
  2743. .ndo_set_multicast_list = vxge_set_multicast,
  2744. .ndo_do_ioctl = vxge_ioctl,
  2745. .ndo_set_mac_address = vxge_set_mac_addr,
  2746. .ndo_change_mtu = vxge_change_mtu,
  2747. .ndo_vlan_rx_register = vxge_vlan_rx_register,
  2748. .ndo_vlan_rx_kill_vid = vxge_vlan_rx_kill_vid,
  2749. .ndo_vlan_rx_add_vid = vxge_vlan_rx_add_vid,
  2750. .ndo_tx_timeout = vxge_tx_watchdog,
  2751. #ifdef CONFIG_NET_POLL_CONTROLLER
  2752. .ndo_poll_controller = vxge_netpoll,
  2753. #endif
  2754. };
  2755. int __devinit vxge_device_register(struct __vxge_hw_device *hldev,
  2756. struct vxge_config *config,
  2757. int high_dma, int no_of_vpath,
  2758. struct vxgedev **vdev_out)
  2759. {
  2760. struct net_device *ndev;
  2761. enum vxge_hw_status status = VXGE_HW_OK;
  2762. struct vxgedev *vdev;
  2763. int i, ret = 0, no_of_queue = 1;
  2764. u64 stat;
  2765. *vdev_out = NULL;
  2766. if (config->tx_steering_type == TX_MULTIQ_STEERING)
  2767. no_of_queue = no_of_vpath;
  2768. ndev = alloc_etherdev_mq(sizeof(struct vxgedev),
  2769. no_of_queue);
  2770. if (ndev == NULL) {
  2771. vxge_debug_init(
  2772. vxge_hw_device_trace_level_get(hldev),
  2773. "%s : device allocation failed", __func__);
  2774. ret = -ENODEV;
  2775. goto _out0;
  2776. }
  2777. vxge_debug_entryexit(
  2778. vxge_hw_device_trace_level_get(hldev),
  2779. "%s: %s:%d Entering...",
  2780. ndev->name, __func__, __LINE__);
  2781. vdev = netdev_priv(ndev);
  2782. memset(vdev, 0, sizeof(struct vxgedev));
  2783. vdev->ndev = ndev;
  2784. vdev->devh = hldev;
  2785. vdev->pdev = hldev->pdev;
  2786. memcpy(&vdev->config, config, sizeof(struct vxge_config));
  2787. vdev->rx_csum = 1; /* Enable Rx CSUM by default. */
  2788. SET_NETDEV_DEV(ndev, &vdev->pdev->dev);
  2789. ndev->features |= NETIF_F_HW_VLAN_TX | NETIF_F_HW_VLAN_RX |
  2790. NETIF_F_HW_VLAN_FILTER;
  2791. /* Driver entry points */
  2792. ndev->irq = vdev->pdev->irq;
  2793. ndev->base_addr = (unsigned long) hldev->bar0;
  2794. ndev->netdev_ops = &vxge_netdev_ops;
  2795. ndev->watchdog_timeo = VXGE_LL_WATCH_DOG_TIMEOUT;
  2796. initialize_ethtool_ops(ndev);
  2797. /* Allocate memory for vpath */
  2798. vdev->vpaths = kzalloc((sizeof(struct vxge_vpath)) *
  2799. no_of_vpath, GFP_KERNEL);
  2800. if (!vdev->vpaths) {
  2801. vxge_debug_init(VXGE_ERR,
  2802. "%s: vpath memory allocation failed",
  2803. vdev->ndev->name);
  2804. ret = -ENODEV;
  2805. goto _out1;
  2806. }
  2807. ndev->features |= NETIF_F_SG;
  2808. ndev->features |= NETIF_F_HW_CSUM;
  2809. vxge_debug_init(vxge_hw_device_trace_level_get(hldev),
  2810. "%s : checksuming enabled", __func__);
  2811. if (high_dma) {
  2812. ndev->features |= NETIF_F_HIGHDMA;
  2813. vxge_debug_init(vxge_hw_device_trace_level_get(hldev),
  2814. "%s : using High DMA", __func__);
  2815. }
  2816. ndev->features |= NETIF_F_TSO | NETIF_F_TSO6;
  2817. if (vdev->config.gro_enable)
  2818. ndev->features |= NETIF_F_GRO;
  2819. if (vdev->config.tx_steering_type == TX_MULTIQ_STEERING)
  2820. ndev->real_num_tx_queues = no_of_vpath;
  2821. #ifdef NETIF_F_LLTX
  2822. ndev->features |= NETIF_F_LLTX;
  2823. #endif
  2824. for (i = 0; i < no_of_vpath; i++)
  2825. spin_lock_init(&vdev->vpaths[i].fifo.tx_lock);
  2826. if (register_netdev(ndev)) {
  2827. vxge_debug_init(vxge_hw_device_trace_level_get(hldev),
  2828. "%s: %s : device registration failed!",
  2829. ndev->name, __func__);
  2830. ret = -ENODEV;
  2831. goto _out2;
  2832. }
  2833. /* Set the factory defined MAC address initially */
  2834. ndev->addr_len = ETH_ALEN;
  2835. /* Make Link state as off at this point, when the Link change
  2836. * interrupt comes the state will be automatically changed to
  2837. * the right state.
  2838. */
  2839. netif_carrier_off(ndev);
  2840. vxge_debug_init(vxge_hw_device_trace_level_get(hldev),
  2841. "%s: Ethernet device registered",
  2842. ndev->name);
  2843. *vdev_out = vdev;
  2844. /* Resetting the Device stats */
  2845. status = vxge_hw_mrpcim_stats_access(
  2846. hldev,
  2847. VXGE_HW_STATS_OP_CLEAR_ALL_STATS,
  2848. 0,
  2849. 0,
  2850. &stat);
  2851. if (status == VXGE_HW_ERR_PRIVILAGED_OPEARATION)
  2852. vxge_debug_init(
  2853. vxge_hw_device_trace_level_get(hldev),
  2854. "%s: device stats clear returns"
  2855. "VXGE_HW_ERR_PRIVILAGED_OPEARATION", ndev->name);
  2856. vxge_debug_entryexit(vxge_hw_device_trace_level_get(hldev),
  2857. "%s: %s:%d Exiting...",
  2858. ndev->name, __func__, __LINE__);
  2859. return ret;
  2860. _out2:
  2861. kfree(vdev->vpaths);
  2862. _out1:
  2863. free_netdev(ndev);
  2864. _out0:
  2865. return ret;
  2866. }
  2867. /*
  2868. * vxge_device_unregister
  2869. *
  2870. * This function will unregister and free network device
  2871. */
  2872. void
  2873. vxge_device_unregister(struct __vxge_hw_device *hldev)
  2874. {
  2875. struct vxgedev *vdev;
  2876. struct net_device *dev;
  2877. char buf[IFNAMSIZ];
  2878. #if ((VXGE_DEBUG_INIT & VXGE_DEBUG_MASK) || \
  2879. (VXGE_DEBUG_ENTRYEXIT & VXGE_DEBUG_MASK))
  2880. u32 level_trace;
  2881. #endif
  2882. dev = hldev->ndev;
  2883. vdev = netdev_priv(dev);
  2884. #if ((VXGE_DEBUG_INIT & VXGE_DEBUG_MASK) || \
  2885. (VXGE_DEBUG_ENTRYEXIT & VXGE_DEBUG_MASK))
  2886. level_trace = vdev->level_trace;
  2887. #endif
  2888. vxge_debug_entryexit(level_trace,
  2889. "%s: %s:%d", vdev->ndev->name, __func__, __LINE__);
  2890. memcpy(buf, vdev->ndev->name, IFNAMSIZ);
  2891. /* in 2.6 will call stop() if device is up */
  2892. unregister_netdev(dev);
  2893. flush_scheduled_work();
  2894. vxge_debug_init(level_trace, "%s: ethernet device unregistered", buf);
  2895. vxge_debug_entryexit(level_trace,
  2896. "%s: %s:%d Exiting...", buf, __func__, __LINE__);
  2897. }
  2898. /*
  2899. * vxge_callback_crit_err
  2900. *
  2901. * This function is called by the alarm handler in interrupt context.
  2902. * Driver must analyze it based on the event type.
  2903. */
  2904. static void
  2905. vxge_callback_crit_err(struct __vxge_hw_device *hldev,
  2906. enum vxge_hw_event type, u64 vp_id)
  2907. {
  2908. struct net_device *dev = hldev->ndev;
  2909. struct vxgedev *vdev = (struct vxgedev *)netdev_priv(dev);
  2910. int vpath_idx;
  2911. vxge_debug_entryexit(vdev->level_trace,
  2912. "%s: %s:%d", vdev->ndev->name, __func__, __LINE__);
  2913. /* Note: This event type should be used for device wide
  2914. * indications only - Serious errors, Slot freeze and critical errors
  2915. */
  2916. vdev->cric_err_event = type;
  2917. for (vpath_idx = 0; vpath_idx < vdev->no_of_vpath; vpath_idx++)
  2918. if (vdev->vpaths[vpath_idx].device_id == vp_id)
  2919. break;
  2920. if (!test_bit(__VXGE_STATE_RESET_CARD, &vdev->state)) {
  2921. if (type == VXGE_HW_EVENT_SLOT_FREEZE) {
  2922. vxge_debug_init(VXGE_ERR,
  2923. "%s: Slot is frozen", vdev->ndev->name);
  2924. } else if (type == VXGE_HW_EVENT_SERR) {
  2925. vxge_debug_init(VXGE_ERR,
  2926. "%s: Encountered Serious Error",
  2927. vdev->ndev->name);
  2928. } else if (type == VXGE_HW_EVENT_CRITICAL_ERR)
  2929. vxge_debug_init(VXGE_ERR,
  2930. "%s: Encountered Critical Error",
  2931. vdev->ndev->name);
  2932. }
  2933. if ((type == VXGE_HW_EVENT_SERR) ||
  2934. (type == VXGE_HW_EVENT_SLOT_FREEZE)) {
  2935. if (unlikely(vdev->exec_mode))
  2936. clear_bit(__VXGE_STATE_CARD_UP, &vdev->state);
  2937. } else if (type == VXGE_HW_EVENT_CRITICAL_ERR) {
  2938. vxge_hw_device_mask_all(hldev);
  2939. if (unlikely(vdev->exec_mode))
  2940. clear_bit(__VXGE_STATE_CARD_UP, &vdev->state);
  2941. } else if ((type == VXGE_HW_EVENT_FIFO_ERR) ||
  2942. (type == VXGE_HW_EVENT_VPATH_ERR)) {
  2943. if (unlikely(vdev->exec_mode))
  2944. clear_bit(__VXGE_STATE_CARD_UP, &vdev->state);
  2945. else {
  2946. /* check if this vpath is already set for reset */
  2947. if (!test_and_set_bit(vpath_idx, &vdev->vp_reset)) {
  2948. /* disable interrupts for this vpath */
  2949. vxge_vpath_intr_disable(vdev, vpath_idx);
  2950. /* stop the queue for this vpath */
  2951. vxge_stop_tx_queue(&vdev->vpaths[vpath_idx].
  2952. fifo);
  2953. }
  2954. }
  2955. }
  2956. vxge_debug_entryexit(vdev->level_trace,
  2957. "%s: %s:%d Exiting...",
  2958. vdev->ndev->name, __func__, __LINE__);
  2959. }
  2960. static void verify_bandwidth(void)
  2961. {
  2962. int i, band_width, total = 0, equal_priority = 0;
  2963. /* 1. If user enters 0 for some fifo, give equal priority to all */
  2964. for (i = 0; i < VXGE_HW_MAX_VIRTUAL_PATHS; i++) {
  2965. if (bw_percentage[i] == 0) {
  2966. equal_priority = 1;
  2967. break;
  2968. }
  2969. }
  2970. if (!equal_priority) {
  2971. /* 2. If sum exceeds 100, give equal priority to all */
  2972. for (i = 0; i < VXGE_HW_MAX_VIRTUAL_PATHS; i++) {
  2973. if (bw_percentage[i] == 0xFF)
  2974. break;
  2975. total += bw_percentage[i];
  2976. if (total > VXGE_HW_VPATH_BANDWIDTH_MAX) {
  2977. equal_priority = 1;
  2978. break;
  2979. }
  2980. }
  2981. }
  2982. if (!equal_priority) {
  2983. /* Is all the bandwidth consumed? */
  2984. if (total < VXGE_HW_VPATH_BANDWIDTH_MAX) {
  2985. if (i < VXGE_HW_MAX_VIRTUAL_PATHS) {
  2986. /* Split rest of bw equally among next VPs*/
  2987. band_width =
  2988. (VXGE_HW_VPATH_BANDWIDTH_MAX - total) /
  2989. (VXGE_HW_MAX_VIRTUAL_PATHS - i);
  2990. if (band_width < 2) /* min of 2% */
  2991. equal_priority = 1;
  2992. else {
  2993. for (; i < VXGE_HW_MAX_VIRTUAL_PATHS;
  2994. i++)
  2995. bw_percentage[i] =
  2996. band_width;
  2997. }
  2998. }
  2999. } else if (i < VXGE_HW_MAX_VIRTUAL_PATHS)
  3000. equal_priority = 1;
  3001. }
  3002. if (equal_priority) {
  3003. vxge_debug_init(VXGE_ERR,
  3004. "%s: Assigning equal bandwidth to all the vpaths",
  3005. VXGE_DRIVER_NAME);
  3006. bw_percentage[0] = VXGE_HW_VPATH_BANDWIDTH_MAX /
  3007. VXGE_HW_MAX_VIRTUAL_PATHS;
  3008. for (i = 1; i < VXGE_HW_MAX_VIRTUAL_PATHS; i++)
  3009. bw_percentage[i] = bw_percentage[0];
  3010. }
  3011. return;
  3012. }
  3013. /*
  3014. * Vpath configuration
  3015. */
  3016. static int __devinit vxge_config_vpaths(
  3017. struct vxge_hw_device_config *device_config,
  3018. u64 vpath_mask, struct vxge_config *config_param)
  3019. {
  3020. int i, no_of_vpaths = 0, default_no_vpath = 0, temp;
  3021. u32 txdl_size, txdl_per_memblock;
  3022. temp = driver_config->vpath_per_dev;
  3023. if ((driver_config->vpath_per_dev == VXGE_USE_DEFAULT) &&
  3024. (max_config_dev == VXGE_MAX_CONFIG_DEV)) {
  3025. /* No more CPU. Return vpath number as zero.*/
  3026. if (driver_config->g_no_cpus == -1)
  3027. return 0;
  3028. if (!driver_config->g_no_cpus)
  3029. driver_config->g_no_cpus = num_online_cpus();
  3030. driver_config->vpath_per_dev = driver_config->g_no_cpus >> 1;
  3031. if (!driver_config->vpath_per_dev)
  3032. driver_config->vpath_per_dev = 1;
  3033. for (i = 0; i < VXGE_HW_MAX_VIRTUAL_PATHS; i++)
  3034. if (!vxge_bVALn(vpath_mask, i, 1))
  3035. continue;
  3036. else
  3037. default_no_vpath++;
  3038. if (default_no_vpath < driver_config->vpath_per_dev)
  3039. driver_config->vpath_per_dev = default_no_vpath;
  3040. driver_config->g_no_cpus = driver_config->g_no_cpus -
  3041. (driver_config->vpath_per_dev * 2);
  3042. if (driver_config->g_no_cpus <= 0)
  3043. driver_config->g_no_cpus = -1;
  3044. }
  3045. if (driver_config->vpath_per_dev == 1) {
  3046. vxge_debug_ll_config(VXGE_TRACE,
  3047. "%s: Disable tx and rx steering, "
  3048. "as single vpath is configured", VXGE_DRIVER_NAME);
  3049. config_param->rth_steering = NO_STEERING;
  3050. config_param->tx_steering_type = NO_STEERING;
  3051. device_config->rth_en = 0;
  3052. }
  3053. /* configure bandwidth */
  3054. for (i = 0; i < VXGE_HW_MAX_VIRTUAL_PATHS; i++)
  3055. device_config->vp_config[i].min_bandwidth = bw_percentage[i];
  3056. for (i = 0; i < VXGE_HW_MAX_VIRTUAL_PATHS; i++) {
  3057. device_config->vp_config[i].vp_id = i;
  3058. device_config->vp_config[i].mtu = VXGE_HW_DEFAULT_MTU;
  3059. if (no_of_vpaths < driver_config->vpath_per_dev) {
  3060. if (!vxge_bVALn(vpath_mask, i, 1)) {
  3061. vxge_debug_ll_config(VXGE_TRACE,
  3062. "%s: vpath: %d is not available",
  3063. VXGE_DRIVER_NAME, i);
  3064. continue;
  3065. } else {
  3066. vxge_debug_ll_config(VXGE_TRACE,
  3067. "%s: vpath: %d available",
  3068. VXGE_DRIVER_NAME, i);
  3069. no_of_vpaths++;
  3070. }
  3071. } else {
  3072. vxge_debug_ll_config(VXGE_TRACE,
  3073. "%s: vpath: %d is not configured, "
  3074. "max_config_vpath exceeded",
  3075. VXGE_DRIVER_NAME, i);
  3076. break;
  3077. }
  3078. /* Configure Tx fifo's */
  3079. device_config->vp_config[i].fifo.enable =
  3080. VXGE_HW_FIFO_ENABLE;
  3081. device_config->vp_config[i].fifo.max_frags =
  3082. MAX_SKB_FRAGS;
  3083. device_config->vp_config[i].fifo.memblock_size =
  3084. VXGE_HW_MIN_FIFO_MEMBLOCK_SIZE;
  3085. txdl_size = MAX_SKB_FRAGS * sizeof(struct vxge_hw_fifo_txd);
  3086. txdl_per_memblock = VXGE_HW_MIN_FIFO_MEMBLOCK_SIZE / txdl_size;
  3087. device_config->vp_config[i].fifo.fifo_blocks =
  3088. ((VXGE_DEF_FIFO_LENGTH - 1) / txdl_per_memblock) + 1;
  3089. device_config->vp_config[i].fifo.intr =
  3090. VXGE_HW_FIFO_QUEUE_INTR_DISABLE;
  3091. /* Configure tti properties */
  3092. device_config->vp_config[i].tti.intr_enable =
  3093. VXGE_HW_TIM_INTR_ENABLE;
  3094. device_config->vp_config[i].tti.btimer_val =
  3095. (VXGE_TTI_BTIMER_VAL * 1000) / 272;
  3096. device_config->vp_config[i].tti.timer_ac_en =
  3097. VXGE_HW_TIM_TIMER_AC_ENABLE;
  3098. /* For msi-x with napi (each vector
  3099. has a handler of its own) -
  3100. Set CI to OFF for all vpaths */
  3101. device_config->vp_config[i].tti.timer_ci_en =
  3102. VXGE_HW_TIM_TIMER_CI_DISABLE;
  3103. device_config->vp_config[i].tti.timer_ri_en =
  3104. VXGE_HW_TIM_TIMER_RI_DISABLE;
  3105. device_config->vp_config[i].tti.util_sel =
  3106. VXGE_HW_TIM_UTIL_SEL_LEGACY_TX_NET_UTIL;
  3107. device_config->vp_config[i].tti.ltimer_val =
  3108. (VXGE_TTI_LTIMER_VAL * 1000) / 272;
  3109. device_config->vp_config[i].tti.rtimer_val =
  3110. (VXGE_TTI_RTIMER_VAL * 1000) / 272;
  3111. device_config->vp_config[i].tti.urange_a = TTI_TX_URANGE_A;
  3112. device_config->vp_config[i].tti.urange_b = TTI_TX_URANGE_B;
  3113. device_config->vp_config[i].tti.urange_c = TTI_TX_URANGE_C;
  3114. device_config->vp_config[i].tti.uec_a = TTI_TX_UFC_A;
  3115. device_config->vp_config[i].tti.uec_b = TTI_TX_UFC_B;
  3116. device_config->vp_config[i].tti.uec_c = TTI_TX_UFC_C;
  3117. device_config->vp_config[i].tti.uec_d = TTI_TX_UFC_D;
  3118. /* Configure Rx rings */
  3119. device_config->vp_config[i].ring.enable =
  3120. VXGE_HW_RING_ENABLE;
  3121. device_config->vp_config[i].ring.ring_blocks =
  3122. VXGE_HW_DEF_RING_BLOCKS;
  3123. device_config->vp_config[i].ring.buffer_mode =
  3124. VXGE_HW_RING_RXD_BUFFER_MODE_1;
  3125. device_config->vp_config[i].ring.rxds_limit =
  3126. VXGE_HW_DEF_RING_RXDS_LIMIT;
  3127. device_config->vp_config[i].ring.scatter_mode =
  3128. VXGE_HW_RING_SCATTER_MODE_A;
  3129. /* Configure rti properties */
  3130. device_config->vp_config[i].rti.intr_enable =
  3131. VXGE_HW_TIM_INTR_ENABLE;
  3132. device_config->vp_config[i].rti.btimer_val =
  3133. (VXGE_RTI_BTIMER_VAL * 1000)/272;
  3134. device_config->vp_config[i].rti.timer_ac_en =
  3135. VXGE_HW_TIM_TIMER_AC_ENABLE;
  3136. device_config->vp_config[i].rti.timer_ci_en =
  3137. VXGE_HW_TIM_TIMER_CI_DISABLE;
  3138. device_config->vp_config[i].rti.timer_ri_en =
  3139. VXGE_HW_TIM_TIMER_RI_DISABLE;
  3140. device_config->vp_config[i].rti.util_sel =
  3141. VXGE_HW_TIM_UTIL_SEL_LEGACY_RX_NET_UTIL;
  3142. device_config->vp_config[i].rti.urange_a =
  3143. RTI_RX_URANGE_A;
  3144. device_config->vp_config[i].rti.urange_b =
  3145. RTI_RX_URANGE_B;
  3146. device_config->vp_config[i].rti.urange_c =
  3147. RTI_RX_URANGE_C;
  3148. device_config->vp_config[i].rti.uec_a = RTI_RX_UFC_A;
  3149. device_config->vp_config[i].rti.uec_b = RTI_RX_UFC_B;
  3150. device_config->vp_config[i].rti.uec_c = RTI_RX_UFC_C;
  3151. device_config->vp_config[i].rti.uec_d = RTI_RX_UFC_D;
  3152. device_config->vp_config[i].rti.rtimer_val =
  3153. (VXGE_RTI_RTIMER_VAL * 1000) / 272;
  3154. device_config->vp_config[i].rti.ltimer_val =
  3155. (VXGE_RTI_LTIMER_VAL * 1000) / 272;
  3156. device_config->vp_config[i].rpa_strip_vlan_tag =
  3157. vlan_tag_strip;
  3158. }
  3159. driver_config->vpath_per_dev = temp;
  3160. return no_of_vpaths;
  3161. }
  3162. /* initialize device configuratrions */
  3163. static void __devinit vxge_device_config_init(
  3164. struct vxge_hw_device_config *device_config,
  3165. int *intr_type)
  3166. {
  3167. /* Used for CQRQ/SRQ. */
  3168. device_config->dma_blockpool_initial =
  3169. VXGE_HW_INITIAL_DMA_BLOCK_POOL_SIZE;
  3170. device_config->dma_blockpool_max =
  3171. VXGE_HW_MAX_DMA_BLOCK_POOL_SIZE;
  3172. if (max_mac_vpath > VXGE_MAX_MAC_ADDR_COUNT)
  3173. max_mac_vpath = VXGE_MAX_MAC_ADDR_COUNT;
  3174. #ifndef CONFIG_PCI_MSI
  3175. vxge_debug_init(VXGE_ERR,
  3176. "%s: This Kernel does not support "
  3177. "MSI-X. Defaulting to INTA", VXGE_DRIVER_NAME);
  3178. *intr_type = INTA;
  3179. #endif
  3180. /* Configure whether MSI-X or IRQL. */
  3181. switch (*intr_type) {
  3182. case INTA:
  3183. device_config->intr_mode = VXGE_HW_INTR_MODE_IRQLINE;
  3184. break;
  3185. case MSI_X:
  3186. device_config->intr_mode = VXGE_HW_INTR_MODE_MSIX;
  3187. break;
  3188. }
  3189. /* Timer period between device poll */
  3190. device_config->device_poll_millis = VXGE_TIMER_DELAY;
  3191. /* Configure mac based steering. */
  3192. device_config->rts_mac_en = addr_learn_en;
  3193. /* Configure Vpaths */
  3194. device_config->rth_it_type = VXGE_HW_RTH_IT_TYPE_MULTI_IT;
  3195. vxge_debug_ll_config(VXGE_TRACE, "%s : Device Config Params ",
  3196. __func__);
  3197. vxge_debug_ll_config(VXGE_TRACE, "dma_blockpool_initial : %d",
  3198. device_config->dma_blockpool_initial);
  3199. vxge_debug_ll_config(VXGE_TRACE, "dma_blockpool_max : %d",
  3200. device_config->dma_blockpool_max);
  3201. vxge_debug_ll_config(VXGE_TRACE, "intr_mode : %d",
  3202. device_config->intr_mode);
  3203. vxge_debug_ll_config(VXGE_TRACE, "device_poll_millis : %d",
  3204. device_config->device_poll_millis);
  3205. vxge_debug_ll_config(VXGE_TRACE, "rts_mac_en : %d",
  3206. device_config->rts_mac_en);
  3207. vxge_debug_ll_config(VXGE_TRACE, "rth_en : %d",
  3208. device_config->rth_en);
  3209. vxge_debug_ll_config(VXGE_TRACE, "rth_it_type : %d",
  3210. device_config->rth_it_type);
  3211. }
  3212. static void __devinit vxge_print_parm(struct vxgedev *vdev, u64 vpath_mask)
  3213. {
  3214. int i;
  3215. vxge_debug_init(VXGE_TRACE,
  3216. "%s: %d Vpath(s) opened",
  3217. vdev->ndev->name, vdev->no_of_vpath);
  3218. switch (vdev->config.intr_type) {
  3219. case INTA:
  3220. vxge_debug_init(VXGE_TRACE,
  3221. "%s: Interrupt type INTA", vdev->ndev->name);
  3222. break;
  3223. case MSI_X:
  3224. vxge_debug_init(VXGE_TRACE,
  3225. "%s: Interrupt type MSI-X", vdev->ndev->name);
  3226. break;
  3227. }
  3228. if (vdev->config.rth_steering) {
  3229. vxge_debug_init(VXGE_TRACE,
  3230. "%s: RTH steering enabled for TCP_IPV4",
  3231. vdev->ndev->name);
  3232. } else {
  3233. vxge_debug_init(VXGE_TRACE,
  3234. "%s: RTH steering disabled", vdev->ndev->name);
  3235. }
  3236. switch (vdev->config.tx_steering_type) {
  3237. case NO_STEERING:
  3238. vxge_debug_init(VXGE_TRACE,
  3239. "%s: Tx steering disabled", vdev->ndev->name);
  3240. break;
  3241. case TX_PRIORITY_STEERING:
  3242. vxge_debug_init(VXGE_TRACE,
  3243. "%s: Unsupported tx steering option",
  3244. vdev->ndev->name);
  3245. vxge_debug_init(VXGE_TRACE,
  3246. "%s: Tx steering disabled", vdev->ndev->name);
  3247. vdev->config.tx_steering_type = 0;
  3248. break;
  3249. case TX_VLAN_STEERING:
  3250. vxge_debug_init(VXGE_TRACE,
  3251. "%s: Unsupported tx steering option",
  3252. vdev->ndev->name);
  3253. vxge_debug_init(VXGE_TRACE,
  3254. "%s: Tx steering disabled", vdev->ndev->name);
  3255. vdev->config.tx_steering_type = 0;
  3256. break;
  3257. case TX_MULTIQ_STEERING:
  3258. vxge_debug_init(VXGE_TRACE,
  3259. "%s: Tx multiqueue steering enabled",
  3260. vdev->ndev->name);
  3261. break;
  3262. case TX_PORT_STEERING:
  3263. vxge_debug_init(VXGE_TRACE,
  3264. "%s: Tx port steering enabled",
  3265. vdev->ndev->name);
  3266. break;
  3267. default:
  3268. vxge_debug_init(VXGE_ERR,
  3269. "%s: Unsupported tx steering type",
  3270. vdev->ndev->name);
  3271. vxge_debug_init(VXGE_TRACE,
  3272. "%s: Tx steering disabled", vdev->ndev->name);
  3273. vdev->config.tx_steering_type = 0;
  3274. }
  3275. if (vdev->config.gro_enable) {
  3276. vxge_debug_init(VXGE_ERR,
  3277. "%s: Generic receive offload enabled",
  3278. vdev->ndev->name);
  3279. } else
  3280. vxge_debug_init(VXGE_TRACE,
  3281. "%s: Generic receive offload disabled",
  3282. vdev->ndev->name);
  3283. if (vdev->config.addr_learn_en)
  3284. vxge_debug_init(VXGE_TRACE,
  3285. "%s: MAC Address learning enabled", vdev->ndev->name);
  3286. vxge_debug_init(VXGE_TRACE,
  3287. "%s: Rx doorbell mode enabled", vdev->ndev->name);
  3288. for (i = 0; i < VXGE_HW_MAX_VIRTUAL_PATHS; i++) {
  3289. if (!vxge_bVALn(vpath_mask, i, 1))
  3290. continue;
  3291. vxge_debug_ll_config(VXGE_TRACE,
  3292. "%s: MTU size - %d", vdev->ndev->name,
  3293. ((struct __vxge_hw_device *)(vdev->devh))->
  3294. config.vp_config[i].mtu);
  3295. vxge_debug_init(VXGE_TRACE,
  3296. "%s: VLAN tag stripping %s", vdev->ndev->name,
  3297. ((struct __vxge_hw_device *)(vdev->devh))->
  3298. config.vp_config[i].rpa_strip_vlan_tag
  3299. ? "Enabled" : "Disabled");
  3300. vxge_debug_init(VXGE_TRACE,
  3301. "%s: Ring blocks : %d", vdev->ndev->name,
  3302. ((struct __vxge_hw_device *)(vdev->devh))->
  3303. config.vp_config[i].ring.ring_blocks);
  3304. vxge_debug_init(VXGE_TRACE,
  3305. "%s: Fifo blocks : %d", vdev->ndev->name,
  3306. ((struct __vxge_hw_device *)(vdev->devh))->
  3307. config.vp_config[i].fifo.fifo_blocks);
  3308. vxge_debug_ll_config(VXGE_TRACE,
  3309. "%s: Max frags : %d", vdev->ndev->name,
  3310. ((struct __vxge_hw_device *)(vdev->devh))->
  3311. config.vp_config[i].fifo.max_frags);
  3312. break;
  3313. }
  3314. }
  3315. #ifdef CONFIG_PM
  3316. /**
  3317. * vxge_pm_suspend - vxge power management suspend entry point
  3318. *
  3319. */
  3320. static int vxge_pm_suspend(struct pci_dev *pdev, pm_message_t state)
  3321. {
  3322. return -ENOSYS;
  3323. }
  3324. /**
  3325. * vxge_pm_resume - vxge power management resume entry point
  3326. *
  3327. */
  3328. static int vxge_pm_resume(struct pci_dev *pdev)
  3329. {
  3330. return -ENOSYS;
  3331. }
  3332. #endif
  3333. /**
  3334. * vxge_io_error_detected - called when PCI error is detected
  3335. * @pdev: Pointer to PCI device
  3336. * @state: The current pci connection state
  3337. *
  3338. * This function is called after a PCI bus error affecting
  3339. * this device has been detected.
  3340. */
  3341. static pci_ers_result_t vxge_io_error_detected(struct pci_dev *pdev,
  3342. pci_channel_state_t state)
  3343. {
  3344. struct __vxge_hw_device *hldev =
  3345. (struct __vxge_hw_device *) pci_get_drvdata(pdev);
  3346. struct net_device *netdev = hldev->ndev;
  3347. netif_device_detach(netdev);
  3348. if (netif_running(netdev)) {
  3349. /* Bring down the card, while avoiding PCI I/O */
  3350. do_vxge_close(netdev, 0);
  3351. }
  3352. pci_disable_device(pdev);
  3353. return PCI_ERS_RESULT_NEED_RESET;
  3354. }
  3355. /**
  3356. * vxge_io_slot_reset - called after the pci bus has been reset.
  3357. * @pdev: Pointer to PCI device
  3358. *
  3359. * Restart the card from scratch, as if from a cold-boot.
  3360. * At this point, the card has exprienced a hard reset,
  3361. * followed by fixups by BIOS, and has its config space
  3362. * set up identically to what it was at cold boot.
  3363. */
  3364. static pci_ers_result_t vxge_io_slot_reset(struct pci_dev *pdev)
  3365. {
  3366. struct __vxge_hw_device *hldev =
  3367. (struct __vxge_hw_device *) pci_get_drvdata(pdev);
  3368. struct net_device *netdev = hldev->ndev;
  3369. struct vxgedev *vdev = netdev_priv(netdev);
  3370. if (pci_enable_device(pdev)) {
  3371. printk(KERN_ERR "%s: "
  3372. "Cannot re-enable device after reset\n",
  3373. VXGE_DRIVER_NAME);
  3374. return PCI_ERS_RESULT_DISCONNECT;
  3375. }
  3376. pci_set_master(pdev);
  3377. vxge_reset(vdev);
  3378. return PCI_ERS_RESULT_RECOVERED;
  3379. }
  3380. /**
  3381. * vxge_io_resume - called when traffic can start flowing again.
  3382. * @pdev: Pointer to PCI device
  3383. *
  3384. * This callback is called when the error recovery driver tells
  3385. * us that its OK to resume normal operation.
  3386. */
  3387. static void vxge_io_resume(struct pci_dev *pdev)
  3388. {
  3389. struct __vxge_hw_device *hldev =
  3390. (struct __vxge_hw_device *) pci_get_drvdata(pdev);
  3391. struct net_device *netdev = hldev->ndev;
  3392. if (netif_running(netdev)) {
  3393. if (vxge_open(netdev)) {
  3394. printk(KERN_ERR "%s: "
  3395. "Can't bring device back up after reset\n",
  3396. VXGE_DRIVER_NAME);
  3397. return;
  3398. }
  3399. }
  3400. netif_device_attach(netdev);
  3401. }
  3402. /**
  3403. * vxge_probe
  3404. * @pdev : structure containing the PCI related information of the device.
  3405. * @pre: List of PCI devices supported by the driver listed in vxge_id_table.
  3406. * Description:
  3407. * This function is called when a new PCI device gets detected and initializes
  3408. * it.
  3409. * Return value:
  3410. * returns 0 on success and negative on failure.
  3411. *
  3412. */
  3413. static int __devinit
  3414. vxge_probe(struct pci_dev *pdev, const struct pci_device_id *pre)
  3415. {
  3416. struct __vxge_hw_device *hldev;
  3417. enum vxge_hw_status status;
  3418. int ret;
  3419. int high_dma = 0;
  3420. u64 vpath_mask = 0;
  3421. struct vxgedev *vdev;
  3422. struct vxge_config ll_config;
  3423. struct vxge_hw_device_config *device_config = NULL;
  3424. struct vxge_hw_device_attr attr;
  3425. int i, j, no_of_vpath = 0, max_vpath_supported = 0;
  3426. u8 *macaddr;
  3427. struct vxge_mac_addrs *entry;
  3428. static int bus = -1, device = -1;
  3429. u8 new_device = 0;
  3430. vxge_debug_entryexit(VXGE_TRACE, "%s:%d", __func__, __LINE__);
  3431. attr.pdev = pdev;
  3432. if (bus != pdev->bus->number)
  3433. new_device = 1;
  3434. if (device != PCI_SLOT(pdev->devfn))
  3435. new_device = 1;
  3436. bus = pdev->bus->number;
  3437. device = PCI_SLOT(pdev->devfn);
  3438. if (new_device) {
  3439. if (driver_config->config_dev_cnt &&
  3440. (driver_config->config_dev_cnt !=
  3441. driver_config->total_dev_cnt))
  3442. vxge_debug_init(VXGE_ERR,
  3443. "%s: Configured %d of %d devices",
  3444. VXGE_DRIVER_NAME,
  3445. driver_config->config_dev_cnt,
  3446. driver_config->total_dev_cnt);
  3447. driver_config->config_dev_cnt = 0;
  3448. driver_config->total_dev_cnt = 0;
  3449. driver_config->g_no_cpus = 0;
  3450. driver_config->vpath_per_dev = max_config_vpath;
  3451. }
  3452. driver_config->total_dev_cnt++;
  3453. if (++driver_config->config_dev_cnt > max_config_dev) {
  3454. ret = 0;
  3455. goto _exit0;
  3456. }
  3457. device_config = kzalloc(sizeof(struct vxge_hw_device_config),
  3458. GFP_KERNEL);
  3459. if (!device_config) {
  3460. ret = -ENOMEM;
  3461. vxge_debug_init(VXGE_ERR,
  3462. "device_config : malloc failed %s %d",
  3463. __FILE__, __LINE__);
  3464. goto _exit0;
  3465. }
  3466. memset(&ll_config, 0, sizeof(struct vxge_config));
  3467. ll_config.tx_steering_type = TX_MULTIQ_STEERING;
  3468. ll_config.intr_type = MSI_X;
  3469. ll_config.napi_weight = NEW_NAPI_WEIGHT;
  3470. ll_config.rth_steering = RTH_STEERING;
  3471. /* get the default configuration parameters */
  3472. vxge_hw_device_config_default_get(device_config);
  3473. /* initialize configuration parameters */
  3474. vxge_device_config_init(device_config, &ll_config.intr_type);
  3475. ret = pci_enable_device(pdev);
  3476. if (ret) {
  3477. vxge_debug_init(VXGE_ERR,
  3478. "%s : can not enable PCI device", __func__);
  3479. goto _exit0;
  3480. }
  3481. if (!pci_set_dma_mask(pdev, 0xffffffffffffffffULL)) {
  3482. vxge_debug_ll_config(VXGE_TRACE,
  3483. "%s : using 64bit DMA", __func__);
  3484. high_dma = 1;
  3485. if (pci_set_consistent_dma_mask(pdev,
  3486. 0xffffffffffffffffULL)) {
  3487. vxge_debug_init(VXGE_ERR,
  3488. "%s : unable to obtain 64bit DMA for "
  3489. "consistent allocations", __func__);
  3490. ret = -ENOMEM;
  3491. goto _exit1;
  3492. }
  3493. } else if (!pci_set_dma_mask(pdev, 0xffffffffUL)) {
  3494. vxge_debug_ll_config(VXGE_TRACE,
  3495. "%s : using 32bit DMA", __func__);
  3496. } else {
  3497. ret = -ENOMEM;
  3498. goto _exit1;
  3499. }
  3500. if (pci_request_regions(pdev, VXGE_DRIVER_NAME)) {
  3501. vxge_debug_init(VXGE_ERR,
  3502. "%s : request regions failed", __func__);
  3503. ret = -ENODEV;
  3504. goto _exit1;
  3505. }
  3506. pci_set_master(pdev);
  3507. attr.bar0 = pci_ioremap_bar(pdev, 0);
  3508. if (!attr.bar0) {
  3509. vxge_debug_init(VXGE_ERR,
  3510. "%s : cannot remap io memory bar0", __func__);
  3511. ret = -ENODEV;
  3512. goto _exit2;
  3513. }
  3514. vxge_debug_ll_config(VXGE_TRACE,
  3515. "pci ioremap bar0: %p:0x%llx",
  3516. attr.bar0,
  3517. (unsigned long long)pci_resource_start(pdev, 0));
  3518. attr.bar1 = pci_ioremap_bar(pdev, 2);
  3519. if (!attr.bar1) {
  3520. vxge_debug_init(VXGE_ERR,
  3521. "%s : cannot remap io memory bar2", __func__);
  3522. ret = -ENODEV;
  3523. goto _exit3;
  3524. }
  3525. vxge_debug_ll_config(VXGE_TRACE,
  3526. "pci ioremap bar1: %p:0x%llx",
  3527. attr.bar1,
  3528. (unsigned long long)pci_resource_start(pdev, 2));
  3529. status = vxge_hw_device_hw_info_get(attr.bar0,
  3530. &ll_config.device_hw_info);
  3531. if (status != VXGE_HW_OK) {
  3532. vxge_debug_init(VXGE_ERR,
  3533. "%s: Reading of hardware info failed."
  3534. "Please try upgrading the firmware.", VXGE_DRIVER_NAME);
  3535. ret = -EINVAL;
  3536. goto _exit4;
  3537. }
  3538. if (ll_config.device_hw_info.fw_version.major !=
  3539. VXGE_DRIVER_VERSION_MAJOR) {
  3540. vxge_debug_init(VXGE_ERR,
  3541. "FW Ver.(maj): %d not driver's expected version: %d",
  3542. ll_config.device_hw_info.fw_version.major,
  3543. VXGE_DRIVER_VERSION_MAJOR);
  3544. ret = -EINVAL;
  3545. goto _exit4;
  3546. }
  3547. vpath_mask = ll_config.device_hw_info.vpath_mask;
  3548. if (vpath_mask == 0) {
  3549. vxge_debug_ll_config(VXGE_TRACE,
  3550. "%s: No vpaths available in device", VXGE_DRIVER_NAME);
  3551. ret = -EINVAL;
  3552. goto _exit4;
  3553. }
  3554. vxge_debug_ll_config(VXGE_TRACE,
  3555. "%s:%d Vpath mask = %llx", __func__, __LINE__,
  3556. (unsigned long long)vpath_mask);
  3557. /* Check how many vpaths are available */
  3558. for (i = 0; i < VXGE_HW_MAX_VIRTUAL_PATHS; i++) {
  3559. if (!((vpath_mask) & vxge_mBIT(i)))
  3560. continue;
  3561. max_vpath_supported++;
  3562. }
  3563. /*
  3564. * Configure vpaths and get driver configured number of vpaths
  3565. * which is less than or equal to the maximum vpaths per function.
  3566. */
  3567. no_of_vpath = vxge_config_vpaths(device_config, vpath_mask, &ll_config);
  3568. if (!no_of_vpath) {
  3569. vxge_debug_ll_config(VXGE_ERR,
  3570. "%s: No more vpaths to configure", VXGE_DRIVER_NAME);
  3571. ret = 0;
  3572. goto _exit4;
  3573. }
  3574. /* Setting driver callbacks */
  3575. attr.uld_callbacks.link_up = vxge_callback_link_up;
  3576. attr.uld_callbacks.link_down = vxge_callback_link_down;
  3577. attr.uld_callbacks.crit_err = vxge_callback_crit_err;
  3578. status = vxge_hw_device_initialize(&hldev, &attr, device_config);
  3579. if (status != VXGE_HW_OK) {
  3580. vxge_debug_init(VXGE_ERR,
  3581. "Failed to initialize device (%d)", status);
  3582. ret = -EINVAL;
  3583. goto _exit4;
  3584. }
  3585. vxge_hw_device_debug_set(hldev, VXGE_ERR, VXGE_COMPONENT_LL);
  3586. /* set private device info */
  3587. pci_set_drvdata(pdev, hldev);
  3588. ll_config.gro_enable = VXGE_GRO_ALWAYS_AGGREGATE;
  3589. ll_config.fifo_indicate_max_pkts = VXGE_FIFO_INDICATE_MAX_PKTS;
  3590. ll_config.addr_learn_en = addr_learn_en;
  3591. ll_config.rth_algorithm = RTH_ALG_JENKINS;
  3592. ll_config.rth_hash_type_tcpipv4 = VXGE_HW_RING_HASH_TYPE_TCP_IPV4;
  3593. ll_config.rth_hash_type_ipv4 = VXGE_HW_RING_HASH_TYPE_NONE;
  3594. ll_config.rth_hash_type_tcpipv6 = VXGE_HW_RING_HASH_TYPE_NONE;
  3595. ll_config.rth_hash_type_ipv6 = VXGE_HW_RING_HASH_TYPE_NONE;
  3596. ll_config.rth_hash_type_tcpipv6ex = VXGE_HW_RING_HASH_TYPE_NONE;
  3597. ll_config.rth_hash_type_ipv6ex = VXGE_HW_RING_HASH_TYPE_NONE;
  3598. ll_config.rth_bkt_sz = RTH_BUCKET_SIZE;
  3599. ll_config.tx_pause_enable = VXGE_PAUSE_CTRL_ENABLE;
  3600. ll_config.rx_pause_enable = VXGE_PAUSE_CTRL_ENABLE;
  3601. if (vxge_device_register(hldev, &ll_config, high_dma, no_of_vpath,
  3602. &vdev)) {
  3603. ret = -EINVAL;
  3604. goto _exit5;
  3605. }
  3606. vxge_hw_device_debug_set(hldev, VXGE_TRACE, VXGE_COMPONENT_LL);
  3607. VXGE_COPY_DEBUG_INFO_TO_LL(vdev, vxge_hw_device_error_level_get(hldev),
  3608. vxge_hw_device_trace_level_get(hldev));
  3609. /* set private HW device info */
  3610. hldev->ndev = vdev->ndev;
  3611. vdev->mtu = VXGE_HW_DEFAULT_MTU;
  3612. vdev->bar0 = attr.bar0;
  3613. vdev->bar1 = attr.bar1;
  3614. vdev->max_vpath_supported = max_vpath_supported;
  3615. vdev->no_of_vpath = no_of_vpath;
  3616. /* Virtual Path count */
  3617. for (i = 0, j = 0; i < VXGE_HW_MAX_VIRTUAL_PATHS; i++) {
  3618. if (!vxge_bVALn(vpath_mask, i, 1))
  3619. continue;
  3620. if (j >= vdev->no_of_vpath)
  3621. break;
  3622. vdev->vpaths[j].is_configured = 1;
  3623. vdev->vpaths[j].device_id = i;
  3624. vdev->vpaths[j].fifo.driver_id = j;
  3625. vdev->vpaths[j].ring.driver_id = j;
  3626. vdev->vpaths[j].vdev = vdev;
  3627. vdev->vpaths[j].max_mac_addr_cnt = max_mac_vpath;
  3628. memcpy((u8 *)vdev->vpaths[j].macaddr,
  3629. (u8 *)ll_config.device_hw_info.mac_addrs[i],
  3630. ETH_ALEN);
  3631. /* Initialize the mac address list header */
  3632. INIT_LIST_HEAD(&vdev->vpaths[j].mac_addr_list);
  3633. vdev->vpaths[j].mac_addr_cnt = 0;
  3634. vdev->vpaths[j].mcast_addr_cnt = 0;
  3635. j++;
  3636. }
  3637. vdev->exec_mode = VXGE_EXEC_MODE_DISABLE;
  3638. vdev->max_config_port = max_config_port;
  3639. vdev->vlan_tag_strip = vlan_tag_strip;
  3640. /* map the hashing selector table to the configured vpaths */
  3641. for (i = 0; i < vdev->no_of_vpath; i++)
  3642. vdev->vpath_selector[i] = vpath_selector[i];
  3643. macaddr = (u8 *)vdev->vpaths[0].macaddr;
  3644. ll_config.device_hw_info.serial_number[VXGE_HW_INFO_LEN - 1] = '\0';
  3645. ll_config.device_hw_info.product_desc[VXGE_HW_INFO_LEN - 1] = '\0';
  3646. ll_config.device_hw_info.part_number[VXGE_HW_INFO_LEN - 1] = '\0';
  3647. vxge_debug_init(VXGE_TRACE, "%s: SERIAL NUMBER: %s",
  3648. vdev->ndev->name, ll_config.device_hw_info.serial_number);
  3649. vxge_debug_init(VXGE_TRACE, "%s: PART NUMBER: %s",
  3650. vdev->ndev->name, ll_config.device_hw_info.part_number);
  3651. vxge_debug_init(VXGE_TRACE, "%s: Neterion %s Server Adapter",
  3652. vdev->ndev->name, ll_config.device_hw_info.product_desc);
  3653. vxge_debug_init(VXGE_TRACE,
  3654. "%s: MAC ADDR: %02X:%02X:%02X:%02X:%02X:%02X",
  3655. vdev->ndev->name, macaddr[0], macaddr[1], macaddr[2],
  3656. macaddr[3], macaddr[4], macaddr[5]);
  3657. vxge_debug_init(VXGE_TRACE, "%s: Link Width x%d",
  3658. vdev->ndev->name, vxge_hw_device_link_width_get(hldev));
  3659. vxge_debug_init(VXGE_TRACE,
  3660. "%s: Firmware version : %s Date : %s", vdev->ndev->name,
  3661. ll_config.device_hw_info.fw_version.version,
  3662. ll_config.device_hw_info.fw_date.date);
  3663. vxge_print_parm(vdev, vpath_mask);
  3664. /* Store the fw version for ethttool option */
  3665. strcpy(vdev->fw_version, ll_config.device_hw_info.fw_version.version);
  3666. memcpy(vdev->ndev->dev_addr, (u8 *)vdev->vpaths[0].macaddr, ETH_ALEN);
  3667. memcpy(vdev->ndev->perm_addr, vdev->ndev->dev_addr, ETH_ALEN);
  3668. /* Copy the station mac address to the list */
  3669. for (i = 0; i < vdev->no_of_vpath; i++) {
  3670. entry = (struct vxge_mac_addrs *)
  3671. kzalloc(sizeof(struct vxge_mac_addrs),
  3672. GFP_KERNEL);
  3673. if (NULL == entry) {
  3674. vxge_debug_init(VXGE_ERR,
  3675. "%s: mac_addr_list : memory allocation failed",
  3676. vdev->ndev->name);
  3677. ret = -EPERM;
  3678. goto _exit6;
  3679. }
  3680. macaddr = (u8 *)&entry->macaddr;
  3681. memcpy(macaddr, vdev->ndev->dev_addr, ETH_ALEN);
  3682. list_add(&entry->item, &vdev->vpaths[i].mac_addr_list);
  3683. vdev->vpaths[i].mac_addr_cnt = 1;
  3684. }
  3685. vxge_debug_entryexit(VXGE_TRACE, "%s: %s:%d Exiting...",
  3686. vdev->ndev->name, __func__, __LINE__);
  3687. vxge_hw_device_debug_set(hldev, VXGE_ERR, VXGE_COMPONENT_LL);
  3688. VXGE_COPY_DEBUG_INFO_TO_LL(vdev, vxge_hw_device_error_level_get(hldev),
  3689. vxge_hw_device_trace_level_get(hldev));
  3690. return 0;
  3691. _exit6:
  3692. for (i = 0; i < vdev->no_of_vpath; i++)
  3693. vxge_free_mac_add_list(&vdev->vpaths[i]);
  3694. vxge_device_unregister(hldev);
  3695. _exit5:
  3696. vxge_hw_device_terminate(hldev);
  3697. _exit4:
  3698. iounmap(attr.bar1);
  3699. _exit3:
  3700. iounmap(attr.bar0);
  3701. _exit2:
  3702. pci_release_regions(pdev);
  3703. _exit1:
  3704. pci_disable_device(pdev);
  3705. _exit0:
  3706. kfree(device_config);
  3707. driver_config->config_dev_cnt--;
  3708. pci_set_drvdata(pdev, NULL);
  3709. return ret;
  3710. }
  3711. /**
  3712. * vxge_rem_nic - Free the PCI device
  3713. * @pdev: structure containing the PCI related information of the device.
  3714. * Description: This function is called by the Pci subsystem to release a
  3715. * PCI device and free up all resource held up by the device.
  3716. */
  3717. static void __devexit
  3718. vxge_remove(struct pci_dev *pdev)
  3719. {
  3720. struct __vxge_hw_device *hldev;
  3721. struct vxgedev *vdev = NULL;
  3722. struct net_device *dev;
  3723. int i = 0;
  3724. #if ((VXGE_DEBUG_INIT & VXGE_DEBUG_MASK) || \
  3725. (VXGE_DEBUG_ENTRYEXIT & VXGE_DEBUG_MASK))
  3726. u32 level_trace;
  3727. #endif
  3728. hldev = (struct __vxge_hw_device *) pci_get_drvdata(pdev);
  3729. if (hldev == NULL)
  3730. return;
  3731. dev = hldev->ndev;
  3732. vdev = netdev_priv(dev);
  3733. #if ((VXGE_DEBUG_INIT & VXGE_DEBUG_MASK) || \
  3734. (VXGE_DEBUG_ENTRYEXIT & VXGE_DEBUG_MASK))
  3735. level_trace = vdev->level_trace;
  3736. #endif
  3737. vxge_debug_entryexit(level_trace,
  3738. "%s:%d", __func__, __LINE__);
  3739. vxge_debug_init(level_trace,
  3740. "%s : removing PCI device...", __func__);
  3741. vxge_device_unregister(hldev);
  3742. for (i = 0; i < vdev->no_of_vpath; i++) {
  3743. vxge_free_mac_add_list(&vdev->vpaths[i]);
  3744. vdev->vpaths[i].mcast_addr_cnt = 0;
  3745. vdev->vpaths[i].mac_addr_cnt = 0;
  3746. }
  3747. kfree(vdev->vpaths);
  3748. iounmap(vdev->bar0);
  3749. iounmap(vdev->bar1);
  3750. /* we are safe to free it now */
  3751. free_netdev(dev);
  3752. vxge_debug_init(level_trace,
  3753. "%s:%d Device unregistered", __func__, __LINE__);
  3754. vxge_hw_device_terminate(hldev);
  3755. pci_disable_device(pdev);
  3756. pci_release_regions(pdev);
  3757. pci_set_drvdata(pdev, NULL);
  3758. vxge_debug_entryexit(level_trace,
  3759. "%s:%d Exiting...", __func__, __LINE__);
  3760. }
  3761. static struct pci_error_handlers vxge_err_handler = {
  3762. .error_detected = vxge_io_error_detected,
  3763. .slot_reset = vxge_io_slot_reset,
  3764. .resume = vxge_io_resume,
  3765. };
  3766. static struct pci_driver vxge_driver = {
  3767. .name = VXGE_DRIVER_NAME,
  3768. .id_table = vxge_id_table,
  3769. .probe = vxge_probe,
  3770. .remove = __devexit_p(vxge_remove),
  3771. #ifdef CONFIG_PM
  3772. .suspend = vxge_pm_suspend,
  3773. .resume = vxge_pm_resume,
  3774. #endif
  3775. .err_handler = &vxge_err_handler,
  3776. };
  3777. static int __init
  3778. vxge_starter(void)
  3779. {
  3780. int ret = 0;
  3781. char version[32];
  3782. snprintf(version, 32, "%s", DRV_VERSION);
  3783. printk(KERN_CRIT "%s: Copyright(c) 2002-2009 Neterion Inc\n",
  3784. VXGE_DRIVER_NAME);
  3785. printk(KERN_CRIT "%s: Driver version: %s\n",
  3786. VXGE_DRIVER_NAME, version);
  3787. verify_bandwidth();
  3788. driver_config = kzalloc(sizeof(struct vxge_drv_config), GFP_KERNEL);
  3789. if (!driver_config)
  3790. return -ENOMEM;
  3791. ret = pci_register_driver(&vxge_driver);
  3792. if (driver_config->config_dev_cnt &&
  3793. (driver_config->config_dev_cnt != driver_config->total_dev_cnt))
  3794. vxge_debug_init(VXGE_ERR,
  3795. "%s: Configured %d of %d devices",
  3796. VXGE_DRIVER_NAME, driver_config->config_dev_cnt,
  3797. driver_config->total_dev_cnt);
  3798. if (ret)
  3799. kfree(driver_config);
  3800. return ret;
  3801. }
  3802. static void __exit
  3803. vxge_closer(void)
  3804. {
  3805. pci_unregister_driver(&vxge_driver);
  3806. kfree(driver_config);
  3807. }
  3808. module_init(vxge_starter);
  3809. module_exit(vxge_closer);