vitesse.c 4.9 KB

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  1. /*
  2. * Driver for Vitesse PHYs
  3. *
  4. * Author: Kriston Carson
  5. *
  6. * Copyright (c) 2005 Freescale Semiconductor, Inc.
  7. *
  8. * This program is free software; you can redistribute it and/or modify it
  9. * under the terms of the GNU General Public License as published by the
  10. * Free Software Foundation; either version 2 of the License, or (at your
  11. * option) any later version.
  12. *
  13. */
  14. #include <linux/kernel.h>
  15. #include <linux/module.h>
  16. #include <linux/mii.h>
  17. #include <linux/ethtool.h>
  18. #include <linux/phy.h>
  19. /* Vitesse Extended Control Register 1 */
  20. #define MII_VSC8244_EXT_CON1 0x17
  21. #define MII_VSC8244_EXTCON1_INIT 0x0000
  22. #define MII_VSC8244_EXTCON1_TX_SKEW_MASK 0x0c00
  23. #define MII_VSC8244_EXTCON1_RX_SKEW_MASK 0x0300
  24. #define MII_VSC8244_EXTCON1_TX_SKEW 0x0800
  25. #define MII_VSC8244_EXTCON1_RX_SKEW 0x0200
  26. /* Vitesse Interrupt Mask Register */
  27. #define MII_VSC8244_IMASK 0x19
  28. #define MII_VSC8244_IMASK_IEN 0x8000
  29. #define MII_VSC8244_IMASK_SPEED 0x4000
  30. #define MII_VSC8244_IMASK_LINK 0x2000
  31. #define MII_VSC8244_IMASK_DUPLEX 0x1000
  32. #define MII_VSC8244_IMASK_MASK 0xf000
  33. #define MII_VSC8221_IMASK_MASK 0xa000
  34. /* Vitesse Interrupt Status Register */
  35. #define MII_VSC8244_ISTAT 0x1a
  36. #define MII_VSC8244_ISTAT_STATUS 0x8000
  37. #define MII_VSC8244_ISTAT_SPEED 0x4000
  38. #define MII_VSC8244_ISTAT_LINK 0x2000
  39. #define MII_VSC8244_ISTAT_DUPLEX 0x1000
  40. /* Vitesse Auxiliary Control/Status Register */
  41. #define MII_VSC8244_AUX_CONSTAT 0x1c
  42. #define MII_VSC8244_AUXCONSTAT_INIT 0x0000
  43. #define MII_VSC8244_AUXCONSTAT_DUPLEX 0x0020
  44. #define MII_VSC8244_AUXCONSTAT_SPEED 0x0018
  45. #define MII_VSC8244_AUXCONSTAT_GBIT 0x0010
  46. #define MII_VSC8244_AUXCONSTAT_100 0x0008
  47. #define MII_VSC8221_AUXCONSTAT_INIT 0x0004 /* need to set this bit? */
  48. #define MII_VSC8221_AUXCONSTAT_RESERVED 0x0004
  49. #define PHY_ID_VSC8244 0x000fc6c0
  50. #define PHY_ID_VSC8221 0x000fc550
  51. MODULE_DESCRIPTION("Vitesse PHY driver");
  52. MODULE_AUTHOR("Kriston Carson");
  53. MODULE_LICENSE("GPL");
  54. static int vsc824x_config_init(struct phy_device *phydev)
  55. {
  56. int extcon;
  57. int err;
  58. err = phy_write(phydev, MII_VSC8244_AUX_CONSTAT,
  59. MII_VSC8244_AUXCONSTAT_INIT);
  60. if (err < 0)
  61. return err;
  62. extcon = phy_read(phydev, MII_VSC8244_EXT_CON1);
  63. if (extcon < 0)
  64. return err;
  65. extcon &= ~(MII_VSC8244_EXTCON1_TX_SKEW_MASK |
  66. MII_VSC8244_EXTCON1_RX_SKEW_MASK);
  67. if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID)
  68. extcon |= (MII_VSC8244_EXTCON1_TX_SKEW |
  69. MII_VSC8244_EXTCON1_RX_SKEW);
  70. err = phy_write(phydev, MII_VSC8244_EXT_CON1, extcon);
  71. return err;
  72. }
  73. static int vsc824x_ack_interrupt(struct phy_device *phydev)
  74. {
  75. int err = 0;
  76. /*
  77. * Don't bother to ACK the interrupts if interrupts
  78. * are disabled. The 824x cannot clear the interrupts
  79. * if they are disabled.
  80. */
  81. if (phydev->interrupts == PHY_INTERRUPT_ENABLED)
  82. err = phy_read(phydev, MII_VSC8244_ISTAT);
  83. return (err < 0) ? err : 0;
  84. }
  85. static int vsc82xx_config_intr(struct phy_device *phydev)
  86. {
  87. int err;
  88. if (phydev->interrupts == PHY_INTERRUPT_ENABLED)
  89. err = phy_write(phydev, MII_VSC8244_IMASK,
  90. phydev->drv->phy_id == PHY_ID_VSC8244 ?
  91. MII_VSC8244_IMASK_MASK :
  92. MII_VSC8221_IMASK_MASK);
  93. else {
  94. /*
  95. * The Vitesse PHY cannot clear the interrupt
  96. * once it has disabled them, so we clear them first
  97. */
  98. err = phy_read(phydev, MII_VSC8244_ISTAT);
  99. if (err < 0)
  100. return err;
  101. err = phy_write(phydev, MII_VSC8244_IMASK, 0);
  102. }
  103. return err;
  104. }
  105. /* Vitesse 824x */
  106. static struct phy_driver vsc8244_driver = {
  107. .phy_id = PHY_ID_VSC8244,
  108. .name = "Vitesse VSC8244",
  109. .phy_id_mask = 0x000fffc0,
  110. .features = PHY_GBIT_FEATURES,
  111. .flags = PHY_HAS_INTERRUPT,
  112. .config_init = &vsc824x_config_init,
  113. .config_aneg = &genphy_config_aneg,
  114. .read_status = &genphy_read_status,
  115. .ack_interrupt = &vsc824x_ack_interrupt,
  116. .config_intr = &vsc82xx_config_intr,
  117. .driver = { .owner = THIS_MODULE,},
  118. };
  119. static int vsc8221_config_init(struct phy_device *phydev)
  120. {
  121. int err;
  122. err = phy_write(phydev, MII_VSC8244_AUX_CONSTAT,
  123. MII_VSC8221_AUXCONSTAT_INIT);
  124. return err;
  125. /* Perhaps we should set EXT_CON1 based on the interface?
  126. Options are 802.3Z SerDes or SGMII */
  127. }
  128. /* Vitesse 8221 */
  129. static struct phy_driver vsc8221_driver = {
  130. .phy_id = PHY_ID_VSC8221,
  131. .phy_id_mask = 0x000ffff0,
  132. .name = "Vitesse VSC8221",
  133. .features = PHY_GBIT_FEATURES,
  134. .flags = PHY_HAS_INTERRUPT,
  135. .config_init = &vsc8221_config_init,
  136. .config_aneg = &genphy_config_aneg,
  137. .read_status = &genphy_read_status,
  138. .ack_interrupt = &vsc824x_ack_interrupt,
  139. .config_intr = &vsc82xx_config_intr,
  140. .driver = { .owner = THIS_MODULE,},
  141. };
  142. static int __init vsc82xx_init(void)
  143. {
  144. int err;
  145. err = phy_driver_register(&vsc8244_driver);
  146. if (err < 0)
  147. return err;
  148. err = phy_driver_register(&vsc8221_driver);
  149. if (err < 0)
  150. phy_driver_unregister(&vsc8244_driver);
  151. return err;
  152. }
  153. static void __exit vsc82xx_exit(void)
  154. {
  155. phy_driver_unregister(&vsc8244_driver);
  156. phy_driver_unregister(&vsc8221_driver);
  157. }
  158. module_init(vsc82xx_init);
  159. module_exit(vsc82xx_exit);