netxen_nic_niu.c 17 KB

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  1. /*
  2. * Copyright (C) 2003 - 2009 NetXen, Inc.
  3. * All rights reserved.
  4. *
  5. * This program is free software; you can redistribute it and/or
  6. * modify it under the terms of the GNU General Public License
  7. * as published by the Free Software Foundation; either version 2
  8. * of the License, or (at your option) any later version.
  9. *
  10. * This program is distributed in the hope that it will be useful, but
  11. * WITHOUT ANY WARRANTY; without even the implied warranty of
  12. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  13. * GNU General Public License for more details.
  14. *
  15. * You should have received a copy of the GNU General Public License
  16. * along with this program; if not, write to the Free Software
  17. * Foundation, Inc., 59 Temple Place - Suite 330, Boston,
  18. * MA 02111-1307, USA.
  19. *
  20. * The full GNU General Public License is included in this distribution
  21. * in the file called LICENSE.
  22. *
  23. * Contact Information:
  24. * info@netxen.com
  25. * NetXen Inc,
  26. * 18922 Forge Drive
  27. * Cupertino, CA 95014-0701
  28. *
  29. */
  30. #include "netxen_nic.h"
  31. #define NETXEN_GB_MAC_SOFT_RESET 0x80000000
  32. #define NETXEN_GB_MAC_RESET_PROT_BLK 0x000F0000
  33. #define NETXEN_GB_MAC_ENABLE_TX_RX 0x00000005
  34. #define NETXEN_GB_MAC_PAUSED_FRMS 0x00000020
  35. static long phy_lock_timeout = 100000000;
  36. static int phy_lock(struct netxen_adapter *adapter)
  37. {
  38. int i;
  39. int done = 0, timeout = 0;
  40. while (!done) {
  41. done = netxen_nic_reg_read(adapter,
  42. NETXEN_PCIE_REG(PCIE_SEM3_LOCK));
  43. if (done == 1)
  44. break;
  45. if (timeout >= phy_lock_timeout) {
  46. return -1;
  47. }
  48. timeout++;
  49. if (!in_atomic())
  50. schedule();
  51. else {
  52. for (i = 0; i < 20; i++)
  53. cpu_relax();
  54. }
  55. }
  56. netxen_crb_writelit_adapter(adapter,
  57. NETXEN_PHY_LOCK_ID, PHY_LOCK_DRIVER);
  58. return 0;
  59. }
  60. static int phy_unlock(struct netxen_adapter *adapter)
  61. {
  62. adapter->pci_read_immediate(adapter, NETXEN_PCIE_REG(PCIE_SEM3_UNLOCK));
  63. return 0;
  64. }
  65. /*
  66. * netxen_niu_gbe_phy_read - read a register from the GbE PHY via
  67. * mii management interface.
  68. *
  69. * Note: The MII management interface goes through port 0.
  70. * Individual phys are addressed as follows:
  71. * @param phy [15:8] phy id
  72. * @param reg [7:0] register number
  73. *
  74. * @returns 0 on success
  75. * -1 on error
  76. *
  77. */
  78. int netxen_niu_gbe_phy_read(struct netxen_adapter *adapter, long reg,
  79. __u32 * readval)
  80. {
  81. long timeout = 0;
  82. long result = 0;
  83. long restore = 0;
  84. long phy = adapter->physical_port;
  85. __u32 address;
  86. __u32 command;
  87. __u32 status;
  88. __u32 mac_cfg0;
  89. if (phy_lock(adapter) != 0) {
  90. return -1;
  91. }
  92. /*
  93. * MII mgmt all goes through port 0 MAC interface,
  94. * so it cannot be in reset
  95. */
  96. if (adapter->hw_read_wx(adapter, NETXEN_NIU_GB_MAC_CONFIG_0(0),
  97. &mac_cfg0, 4))
  98. return -EIO;
  99. if (netxen_gb_get_soft_reset(mac_cfg0)) {
  100. __u32 temp;
  101. temp = 0;
  102. netxen_gb_tx_reset_pb(temp);
  103. netxen_gb_rx_reset_pb(temp);
  104. netxen_gb_tx_reset_mac(temp);
  105. netxen_gb_rx_reset_mac(temp);
  106. if (adapter->hw_write_wx(adapter,
  107. NETXEN_NIU_GB_MAC_CONFIG_0(0),
  108. &temp, 4))
  109. return -EIO;
  110. restore = 1;
  111. }
  112. address = 0;
  113. netxen_gb_mii_mgmt_reg_addr(address, reg);
  114. netxen_gb_mii_mgmt_phy_addr(address, phy);
  115. if (adapter->hw_write_wx(adapter, NETXEN_NIU_GB_MII_MGMT_ADDR(0),
  116. &address, 4))
  117. return -EIO;
  118. command = 0; /* turn off any prior activity */
  119. if (adapter->hw_write_wx(adapter, NETXEN_NIU_GB_MII_MGMT_COMMAND(0),
  120. &command, 4))
  121. return -EIO;
  122. /* send read command */
  123. netxen_gb_mii_mgmt_set_read_cycle(command);
  124. if (adapter->hw_write_wx(adapter, NETXEN_NIU_GB_MII_MGMT_COMMAND(0),
  125. &command, 4))
  126. return -EIO;
  127. status = 0;
  128. do {
  129. if (adapter->hw_read_wx(adapter,
  130. NETXEN_NIU_GB_MII_MGMT_INDICATE(0),
  131. &status, 4))
  132. return -EIO;
  133. timeout++;
  134. } while ((netxen_get_gb_mii_mgmt_busy(status)
  135. || netxen_get_gb_mii_mgmt_notvalid(status))
  136. && (timeout++ < NETXEN_NIU_PHY_WAITMAX));
  137. if (timeout < NETXEN_NIU_PHY_WAITMAX) {
  138. if (adapter->hw_read_wx(adapter,
  139. NETXEN_NIU_GB_MII_MGMT_STATUS(0),
  140. readval, 4))
  141. return -EIO;
  142. result = 0;
  143. } else
  144. result = -1;
  145. if (restore)
  146. if (adapter->hw_write_wx(adapter,
  147. NETXEN_NIU_GB_MAC_CONFIG_0(0),
  148. &mac_cfg0, 4))
  149. return -EIO;
  150. phy_unlock(adapter);
  151. return result;
  152. }
  153. /*
  154. * netxen_niu_gbe_phy_write - write a register to the GbE PHY via
  155. * mii management interface.
  156. *
  157. * Note: The MII management interface goes through port 0.
  158. * Individual phys are addressed as follows:
  159. * @param phy [15:8] phy id
  160. * @param reg [7:0] register number
  161. *
  162. * @returns 0 on success
  163. * -1 on error
  164. *
  165. */
  166. int netxen_niu_gbe_phy_write(struct netxen_adapter *adapter, long reg,
  167. __u32 val)
  168. {
  169. long timeout = 0;
  170. long result = 0;
  171. long restore = 0;
  172. long phy = adapter->physical_port;
  173. __u32 address;
  174. __u32 command;
  175. __u32 status;
  176. __u32 mac_cfg0;
  177. /*
  178. * MII mgmt all goes through port 0 MAC interface, so it
  179. * cannot be in reset
  180. */
  181. if (adapter->hw_read_wx(adapter, NETXEN_NIU_GB_MAC_CONFIG_0(0),
  182. &mac_cfg0, 4))
  183. return -EIO;
  184. if (netxen_gb_get_soft_reset(mac_cfg0)) {
  185. __u32 temp;
  186. temp = 0;
  187. netxen_gb_tx_reset_pb(temp);
  188. netxen_gb_rx_reset_pb(temp);
  189. netxen_gb_tx_reset_mac(temp);
  190. netxen_gb_rx_reset_mac(temp);
  191. if (adapter->hw_write_wx(adapter,
  192. NETXEN_NIU_GB_MAC_CONFIG_0(0),
  193. &temp, 4))
  194. return -EIO;
  195. restore = 1;
  196. }
  197. command = 0; /* turn off any prior activity */
  198. if (adapter->hw_write_wx(adapter, NETXEN_NIU_GB_MII_MGMT_COMMAND(0),
  199. &command, 4))
  200. return -EIO;
  201. address = 0;
  202. netxen_gb_mii_mgmt_reg_addr(address, reg);
  203. netxen_gb_mii_mgmt_phy_addr(address, phy);
  204. if (adapter->hw_write_wx(adapter, NETXEN_NIU_GB_MII_MGMT_ADDR(0),
  205. &address, 4))
  206. return -EIO;
  207. if (adapter->hw_write_wx(adapter, NETXEN_NIU_GB_MII_MGMT_CTRL(0),
  208. &val, 4))
  209. return -EIO;
  210. status = 0;
  211. do {
  212. if (adapter->hw_read_wx(adapter,
  213. NETXEN_NIU_GB_MII_MGMT_INDICATE(0),
  214. &status, 4))
  215. return -EIO;
  216. timeout++;
  217. } while ((netxen_get_gb_mii_mgmt_busy(status))
  218. && (timeout++ < NETXEN_NIU_PHY_WAITMAX));
  219. if (timeout < NETXEN_NIU_PHY_WAITMAX)
  220. result = 0;
  221. else
  222. result = -EIO;
  223. /* restore the state of port 0 MAC in case we tampered with it */
  224. if (restore)
  225. if (adapter->hw_write_wx(adapter,
  226. NETXEN_NIU_GB_MAC_CONFIG_0(0),
  227. &mac_cfg0, 4))
  228. return -EIO;
  229. return result;
  230. }
  231. int netxen_niu_xgbe_enable_phy_interrupts(struct netxen_adapter *adapter)
  232. {
  233. netxen_crb_writelit_adapter(adapter, NETXEN_NIU_INT_MASK, 0x3f);
  234. return 0;
  235. }
  236. int netxen_niu_gbe_enable_phy_interrupts(struct netxen_adapter *adapter)
  237. {
  238. int result = 0;
  239. __u32 enable = 0;
  240. netxen_set_phy_int_link_status_changed(enable);
  241. netxen_set_phy_int_autoneg_completed(enable);
  242. netxen_set_phy_int_speed_changed(enable);
  243. if (0 !=
  244. netxen_niu_gbe_phy_write(adapter,
  245. NETXEN_NIU_GB_MII_MGMT_ADDR_INT_ENABLE,
  246. enable))
  247. result = -EIO;
  248. return result;
  249. }
  250. int netxen_niu_xgbe_disable_phy_interrupts(struct netxen_adapter *adapter)
  251. {
  252. netxen_crb_writelit_adapter(adapter, NETXEN_NIU_INT_MASK, 0x7f);
  253. return 0;
  254. }
  255. int netxen_niu_gbe_disable_phy_interrupts(struct netxen_adapter *adapter)
  256. {
  257. int result = 0;
  258. if (0 !=
  259. netxen_niu_gbe_phy_write(adapter,
  260. NETXEN_NIU_GB_MII_MGMT_ADDR_INT_ENABLE, 0))
  261. result = -EIO;
  262. return result;
  263. }
  264. static int netxen_niu_gbe_clear_phy_interrupts(struct netxen_adapter *adapter)
  265. {
  266. int result = 0;
  267. if (0 !=
  268. netxen_niu_gbe_phy_write(adapter,
  269. NETXEN_NIU_GB_MII_MGMT_ADDR_INT_STATUS,
  270. -EIO))
  271. result = -EIO;
  272. return result;
  273. }
  274. /*
  275. * netxen_niu_gbe_set_mii_mode- Set 10/100 Mbit Mode for GbE MAC
  276. *
  277. */
  278. static void netxen_niu_gbe_set_mii_mode(struct netxen_adapter *adapter,
  279. int port, long enable)
  280. {
  281. netxen_crb_writelit_adapter(adapter, NETXEN_NIU_MODE, 0x2);
  282. netxen_crb_writelit_adapter(adapter, NETXEN_NIU_GB_MAC_CONFIG_0(port),
  283. 0x80000000);
  284. netxen_crb_writelit_adapter(adapter, NETXEN_NIU_GB_MAC_CONFIG_0(port),
  285. 0x0000f0025);
  286. netxen_crb_writelit_adapter(adapter, NETXEN_NIU_GB_MAC_CONFIG_1(port),
  287. 0xf1ff);
  288. netxen_crb_writelit_adapter(adapter,
  289. NETXEN_NIU_GB0_GMII_MODE + (port << 3), 0);
  290. netxen_crb_writelit_adapter(adapter,
  291. NETXEN_NIU_GB0_MII_MODE + (port << 3), 1);
  292. netxen_crb_writelit_adapter(adapter,
  293. (NETXEN_NIU_GB0_HALF_DUPLEX + port * 4), 0);
  294. netxen_crb_writelit_adapter(adapter,
  295. NETXEN_NIU_GB_MII_MGMT_CONFIG(port), 0x7);
  296. if (enable) {
  297. /*
  298. * Do NOT enable flow control until a suitable solution for
  299. * shutting down pause frames is found.
  300. */
  301. netxen_crb_writelit_adapter(adapter,
  302. NETXEN_NIU_GB_MAC_CONFIG_0(port),
  303. 0x5);
  304. }
  305. if (netxen_niu_gbe_enable_phy_interrupts(adapter))
  306. printk(KERN_ERR PFX "ERROR enabling PHY interrupts\n");
  307. if (netxen_niu_gbe_clear_phy_interrupts(adapter))
  308. printk(KERN_ERR PFX "ERROR clearing PHY interrupts\n");
  309. }
  310. /*
  311. * netxen_niu_gbe_set_gmii_mode- Set GbE Mode for GbE MAC
  312. */
  313. static void netxen_niu_gbe_set_gmii_mode(struct netxen_adapter *adapter,
  314. int port, long enable)
  315. {
  316. netxen_crb_writelit_adapter(adapter, NETXEN_NIU_MODE, 0x2);
  317. netxen_crb_writelit_adapter(adapter, NETXEN_NIU_GB_MAC_CONFIG_0(port),
  318. 0x80000000);
  319. netxen_crb_writelit_adapter(adapter, NETXEN_NIU_GB_MAC_CONFIG_0(port),
  320. 0x0000f0025);
  321. netxen_crb_writelit_adapter(adapter, NETXEN_NIU_GB_MAC_CONFIG_1(port),
  322. 0xf2ff);
  323. netxen_crb_writelit_adapter(adapter,
  324. NETXEN_NIU_GB0_MII_MODE + (port << 3), 0);
  325. netxen_crb_writelit_adapter(adapter,
  326. NETXEN_NIU_GB0_GMII_MODE + (port << 3), 1);
  327. netxen_crb_writelit_adapter(adapter,
  328. (NETXEN_NIU_GB0_HALF_DUPLEX + port * 4), 0);
  329. netxen_crb_writelit_adapter(adapter,
  330. NETXEN_NIU_GB_MII_MGMT_CONFIG(port), 0x7);
  331. if (enable) {
  332. /*
  333. * Do NOT enable flow control until a suitable solution for
  334. * shutting down pause frames is found.
  335. */
  336. netxen_crb_writelit_adapter(adapter,
  337. NETXEN_NIU_GB_MAC_CONFIG_0(port),
  338. 0x5);
  339. }
  340. if (netxen_niu_gbe_enable_phy_interrupts(adapter))
  341. printk(KERN_ERR PFX "ERROR enabling PHY interrupts\n");
  342. if (netxen_niu_gbe_clear_phy_interrupts(adapter))
  343. printk(KERN_ERR PFX "ERROR clearing PHY interrupts\n");
  344. }
  345. int netxen_niu_gbe_init_port(struct netxen_adapter *adapter, int port)
  346. {
  347. int result = 0;
  348. __u32 status;
  349. if (NX_IS_REVISION_P3(adapter->ahw.revision_id))
  350. return 0;
  351. if (adapter->disable_phy_interrupts)
  352. adapter->disable_phy_interrupts(adapter);
  353. mdelay(2);
  354. if (0 == netxen_niu_gbe_phy_read(adapter,
  355. NETXEN_NIU_GB_MII_MGMT_ADDR_PHY_STATUS, &status)) {
  356. if (netxen_get_phy_link(status)) {
  357. if (netxen_get_phy_speed(status) == 2) {
  358. netxen_niu_gbe_set_gmii_mode(adapter, port, 1);
  359. } else if ((netxen_get_phy_speed(status) == 1)
  360. || (netxen_get_phy_speed(status) == 0)) {
  361. netxen_niu_gbe_set_mii_mode(adapter, port, 1);
  362. } else {
  363. result = -1;
  364. }
  365. } else {
  366. /*
  367. * We don't have link. Cable must be unconnected.
  368. * Enable phy interrupts so we take action when
  369. * plugged in.
  370. */
  371. netxen_crb_writelit_adapter(adapter,
  372. NETXEN_NIU_GB_MAC_CONFIG_0
  373. (port),
  374. NETXEN_GB_MAC_SOFT_RESET);
  375. netxen_crb_writelit_adapter(adapter,
  376. NETXEN_NIU_GB_MAC_CONFIG_0
  377. (port),
  378. NETXEN_GB_MAC_RESET_PROT_BLK
  379. | NETXEN_GB_MAC_ENABLE_TX_RX
  380. |
  381. NETXEN_GB_MAC_PAUSED_FRMS);
  382. if (netxen_niu_gbe_clear_phy_interrupts(adapter))
  383. printk(KERN_ERR PFX
  384. "ERROR clearing PHY interrupts\n");
  385. if (netxen_niu_gbe_enable_phy_interrupts(adapter))
  386. printk(KERN_ERR PFX
  387. "ERROR enabling PHY interrupts\n");
  388. if (netxen_niu_gbe_clear_phy_interrupts(adapter))
  389. printk(KERN_ERR PFX
  390. "ERROR clearing PHY interrupts\n");
  391. result = -1;
  392. }
  393. } else {
  394. result = -EIO;
  395. }
  396. return result;
  397. }
  398. int netxen_niu_xg_init_port(struct netxen_adapter *adapter, int port)
  399. {
  400. if (NX_IS_REVISION_P2(adapter->ahw.revision_id)) {
  401. netxen_crb_writelit_adapter(adapter,
  402. NETXEN_NIU_XGE_CONFIG_1+(0x10000*port), 0x1447);
  403. netxen_crb_writelit_adapter(adapter,
  404. NETXEN_NIU_XGE_CONFIG_0+(0x10000*port), 0x5);
  405. }
  406. return 0;
  407. }
  408. /*
  409. * Return the current station MAC address.
  410. * Note that the passed-in value must already be in network byte order.
  411. */
  412. static int netxen_niu_macaddr_get(struct netxen_adapter *adapter,
  413. netxen_ethernet_macaddr_t * addr)
  414. {
  415. u32 stationhigh;
  416. u32 stationlow;
  417. int phy = adapter->physical_port;
  418. u8 val[8];
  419. if (addr == NULL)
  420. return -EINVAL;
  421. if ((phy < 0) || (phy > 3))
  422. return -EINVAL;
  423. if (adapter->hw_read_wx(adapter, NETXEN_NIU_GB_STATION_ADDR_0(phy),
  424. &stationhigh, 4))
  425. return -EIO;
  426. if (adapter->hw_read_wx(adapter, NETXEN_NIU_GB_STATION_ADDR_1(phy),
  427. &stationlow, 4))
  428. return -EIO;
  429. ((__le32 *)val)[1] = cpu_to_le32(stationhigh);
  430. ((__le32 *)val)[0] = cpu_to_le32(stationlow);
  431. memcpy(addr, val + 2, 6);
  432. return 0;
  433. }
  434. /*
  435. * Set the station MAC address.
  436. * Note that the passed-in value must already be in network byte order.
  437. */
  438. int netxen_niu_macaddr_set(struct netxen_adapter *adapter,
  439. netxen_ethernet_macaddr_t addr)
  440. {
  441. u8 temp[4];
  442. u32 val;
  443. int phy = adapter->physical_port;
  444. unsigned char mac_addr[6];
  445. int i;
  446. if (NX_IS_REVISION_P3(adapter->ahw.revision_id))
  447. return 0;
  448. for (i = 0; i < 10; i++) {
  449. temp[0] = temp[1] = 0;
  450. memcpy(temp + 2, addr, 2);
  451. val = le32_to_cpu(*(__le32 *)temp);
  452. if (adapter->hw_write_wx(adapter,
  453. NETXEN_NIU_GB_STATION_ADDR_1(phy), &val, 4))
  454. return -EIO;
  455. memcpy(temp, ((u8 *) addr) + 2, sizeof(__le32));
  456. val = le32_to_cpu(*(__le32 *)temp);
  457. if (adapter->hw_write_wx(adapter,
  458. NETXEN_NIU_GB_STATION_ADDR_0(phy), &val, 4))
  459. return -2;
  460. netxen_niu_macaddr_get(adapter,
  461. (netxen_ethernet_macaddr_t *) mac_addr);
  462. if (memcmp(mac_addr, addr, 6) == 0)
  463. break;
  464. }
  465. if (i == 10) {
  466. printk(KERN_ERR "%s: cannot set Mac addr for %s\n",
  467. netxen_nic_driver_name, adapter->netdev->name);
  468. printk(KERN_ERR "MAC address set: %pM.\n", addr);
  469. printk(KERN_ERR "MAC address get: %pM.\n", mac_addr);
  470. }
  471. return 0;
  472. }
  473. /* Disable a GbE interface */
  474. int netxen_niu_disable_gbe_port(struct netxen_adapter *adapter)
  475. {
  476. __u32 mac_cfg0;
  477. u32 port = adapter->physical_port;
  478. if (NX_IS_REVISION_P3(adapter->ahw.revision_id))
  479. return 0;
  480. if (port > NETXEN_NIU_MAX_GBE_PORTS)
  481. return -EINVAL;
  482. mac_cfg0 = 0;
  483. netxen_gb_soft_reset(mac_cfg0);
  484. if (adapter->hw_write_wx(adapter, NETXEN_NIU_GB_MAC_CONFIG_0(port),
  485. &mac_cfg0, 4))
  486. return -EIO;
  487. return 0;
  488. }
  489. /* Disable an XG interface */
  490. int netxen_niu_disable_xg_port(struct netxen_adapter *adapter)
  491. {
  492. __u32 mac_cfg;
  493. u32 port = adapter->physical_port;
  494. if (NX_IS_REVISION_P3(adapter->ahw.revision_id))
  495. return 0;
  496. if (port > NETXEN_NIU_MAX_XG_PORTS)
  497. return -EINVAL;
  498. mac_cfg = 0;
  499. if (adapter->hw_write_wx(adapter,
  500. NETXEN_NIU_XGE_CONFIG_0 + (0x10000 * port), &mac_cfg, 4))
  501. return -EIO;
  502. return 0;
  503. }
  504. /* Set promiscuous mode for a GbE interface */
  505. int netxen_niu_set_promiscuous_mode(struct netxen_adapter *adapter,
  506. u32 mode)
  507. {
  508. __u32 reg;
  509. u32 port = adapter->physical_port;
  510. if (port > NETXEN_NIU_MAX_GBE_PORTS)
  511. return -EINVAL;
  512. /* save previous contents */
  513. if (adapter->hw_read_wx(adapter, NETXEN_NIU_GB_DROP_WRONGADDR,
  514. &reg, 4))
  515. return -EIO;
  516. if (mode == NETXEN_NIU_PROMISC_MODE) {
  517. switch (port) {
  518. case 0:
  519. netxen_clear_gb_drop_gb0(reg);
  520. break;
  521. case 1:
  522. netxen_clear_gb_drop_gb1(reg);
  523. break;
  524. case 2:
  525. netxen_clear_gb_drop_gb2(reg);
  526. break;
  527. case 3:
  528. netxen_clear_gb_drop_gb3(reg);
  529. break;
  530. default:
  531. return -EIO;
  532. }
  533. } else {
  534. switch (port) {
  535. case 0:
  536. netxen_set_gb_drop_gb0(reg);
  537. break;
  538. case 1:
  539. netxen_set_gb_drop_gb1(reg);
  540. break;
  541. case 2:
  542. netxen_set_gb_drop_gb2(reg);
  543. break;
  544. case 3:
  545. netxen_set_gb_drop_gb3(reg);
  546. break;
  547. default:
  548. return -EIO;
  549. }
  550. }
  551. if (adapter->hw_write_wx(adapter, NETXEN_NIU_GB_DROP_WRONGADDR,
  552. &reg, 4))
  553. return -EIO;
  554. return 0;
  555. }
  556. /*
  557. * Set the MAC address for an XG port
  558. * Note that the passed-in value must already be in network byte order.
  559. */
  560. int netxen_niu_xg_macaddr_set(struct netxen_adapter *adapter,
  561. netxen_ethernet_macaddr_t addr)
  562. {
  563. int phy = adapter->physical_port;
  564. u8 temp[4];
  565. u32 val;
  566. if (NX_IS_REVISION_P3(adapter->ahw.revision_id))
  567. return 0;
  568. if ((phy < 0) || (phy > NETXEN_NIU_MAX_XG_PORTS))
  569. return -EIO;
  570. temp[0] = temp[1] = 0;
  571. switch (phy) {
  572. case 0:
  573. memcpy(temp + 2, addr, 2);
  574. val = le32_to_cpu(*(__le32 *)temp);
  575. if (adapter->hw_write_wx(adapter, NETXEN_NIU_XGE_STATION_ADDR_0_1,
  576. &val, 4))
  577. return -EIO;
  578. memcpy(&temp, ((u8 *) addr) + 2, sizeof(__le32));
  579. val = le32_to_cpu(*(__le32 *)temp);
  580. if (adapter->hw_write_wx(adapter, NETXEN_NIU_XGE_STATION_ADDR_0_HI,
  581. &val, 4))
  582. return -EIO;
  583. break;
  584. case 1:
  585. memcpy(temp + 2, addr, 2);
  586. val = le32_to_cpu(*(__le32 *)temp);
  587. if (adapter->hw_write_wx(adapter, NETXEN_NIU_XG1_STATION_ADDR_0_1,
  588. &val, 4))
  589. return -EIO;
  590. memcpy(&temp, ((u8 *) addr) + 2, sizeof(__le32));
  591. val = le32_to_cpu(*(__le32 *)temp);
  592. if (adapter->hw_write_wx(adapter, NETXEN_NIU_XG1_STATION_ADDR_0_HI,
  593. &val, 4))
  594. return -EIO;
  595. break;
  596. default:
  597. printk(KERN_ERR "Unknown port %d\n", phy);
  598. break;
  599. }
  600. return 0;
  601. }
  602. int netxen_niu_xg_set_promiscuous_mode(struct netxen_adapter *adapter,
  603. u32 mode)
  604. {
  605. __u32 reg;
  606. u32 port = adapter->physical_port;
  607. if (port > NETXEN_NIU_MAX_XG_PORTS)
  608. return -EINVAL;
  609. if (adapter->hw_read_wx(adapter,
  610. NETXEN_NIU_XGE_CONFIG_1 + (0x10000 * port), &reg, 4))
  611. return -EIO;
  612. if (mode == NETXEN_NIU_PROMISC_MODE)
  613. reg = (reg | 0x2000UL);
  614. else
  615. reg = (reg & ~0x2000UL);
  616. if (mode == NETXEN_NIU_ALLMULTI_MODE)
  617. reg = (reg | 0x1000UL);
  618. else
  619. reg = (reg & ~0x1000UL);
  620. netxen_crb_writelit_adapter(adapter,
  621. NETXEN_NIU_XGE_CONFIG_1 + (0x10000 * port), reg);
  622. return 0;
  623. }